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Diffstat (limited to 'dts/src/arm/socfpga_cyclone5_vining_fpga.dts')
-rw-r--r--dts/src/arm/socfpga_cyclone5_vining_fpga.dts101
1 files changed, 41 insertions, 60 deletions
diff --git a/dts/src/arm/socfpga_cyclone5_vining_fpga.dts b/dts/src/arm/socfpga_cyclone5_vining_fpga.dts
index 8931980493..655fe87e27 100644
--- a/dts/src/arm/socfpga_cyclone5_vining_fpga.dts
+++ b/dts/src/arm/socfpga_cyclone5_vining_fpga.dts
@@ -69,34 +69,7 @@
* to be added to the gmac1 device tree blob.
*/
ethernet0 = &gmac1;
- };
-
- leds {
- compatible = "gpio-leds";
-
- hps_led0 {
- label = "hps:green:led0"; /* ALIVE_LED_GR */
- gpios = <&portb 19 0>; /* HPS_GPIO48 */
- linux,default-trigger = "heartbeat";
- };
-
- hps_led1 {
- label = "hps:red:led0"; /* ALIVE_LED_RD */
- gpios = <&portb 24 0>; /* HPS_GPIO53 */
- linux,default-trigger = "none";
- };
-
- hps_led2 {
- label = "hps:green:led1"; /* LINK2HOST_LED_GR */
- gpios = <&portb 25 0>; /* HPS_GPIO54 */
- linux,default-trigger = "heartbeat";
- };
-
- hps_led3 {
- label = "hps:red:led1"; /* LINK2HOST_LED_RD */
- gpios = <&portc 7 0>; /* HPS_GPIO65 */
- linux,default-trigger = "none";
- };
+ ethernet1 = &gmac0;
};
gpio-keys {
@@ -203,69 +176,39 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
- eeprom@51 {
- compatible = "at,24c01";
- pagesize = <8>;
- reg = <0x51>;
- };
};
i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
- eeprom@51 {
- compatible = "at,24c01";
- pagesize = <8>;
- reg = <0x51>;
- };
};
i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
- eeprom@51 {
- compatible = "at,24c01";
- pagesize = <8>;
- reg = <0x51>;
- };
};
i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
- eeprom@51 {
- compatible = "at,24c01";
- pagesize = <8>;
- reg = <0x51>;
- };
};
i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
- eeprom@51 {
- compatible = "at,24c01";
- pagesize = <8>;
- reg = <0x51>;
- };
};
i2c@5 {
#address-cells = <1>;
#size-cells = <0>;
reg = <5>;
- eeprom@51 {
- compatible = "at,24c01";
- pagesize = <8>;
- reg = <0x51>;
- };
};
- i2c@6 {
+ i2c@6 { /* Backplane EEPROM */
#address-cells = <1>;
#size-cells = <0>;
reg = <6>;
@@ -276,7 +219,7 @@
};
};
- i2c@7 {
+ i2c@7 { /* Power board EEPROM */
#address-cells = <1>;
#size-cells = <0>;
reg = <7>;
@@ -300,6 +243,44 @@
};
};
+&qspi {
+ status = "okay";
+
+ n25q128@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "n25q128";
+ reg = <0>; /* chip select */
+ spi-max-frequency = <100000000>;
+ m25p,fast-read;
+
+ cdns,page-size = <256>;
+ cdns,block-size = <16>;
+ cdns,read-delay = <4>;
+ cdns,tshsl-ns = <50>;
+ cdns,tsd2d-ns = <50>;
+ cdns,tchsh-ns = <4>;
+ cdns,tslch-ns = <4>;
+ };
+
+ n25q00@1 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "n25q00";
+ reg = <1>; /* chip select */
+ spi-max-frequency = <100000000>;
+ m25p,fast-read;
+
+ cdns,page-size = <256>;
+ cdns,block-size = <16>;
+ cdns,read-delay = <4>;
+ cdns,tshsl-ns = <50>;
+ cdns,tsd2d-ns = <50>;
+ cdns,tchsh-ns = <4>;
+ cdns,tslch-ns = <4>;
+ };
+};
+
&usb0 {
dr_mode = "host";
status = "okay";