diff options
Diffstat (limited to 'dts/src/arm64/allwinner/sun50i-a64.dtsi')
| -rw-r--r-- | dts/src/arm64/allwinner/sun50i-a64.dtsi | 99 |
1 files changed, 99 insertions, 0 deletions
diff --git a/dts/src/arm64/allwinner/sun50i-a64.dtsi b/dts/src/arm64/allwinner/sun50i-a64.dtsi index d783d164b9..1b2ef28c42 100644 --- a/dts/src/arm64/allwinner/sun50i-a64.dtsi +++ b/dts/src/arm64/allwinner/sun50i-a64.dtsi @@ -52,6 +52,26 @@ #address-cells = <1>; #size-cells = <1>; + chosen { + #address-cells = <1>; + #size-cells = <1>; + ranges; + +/* + * The pipeline mixer0-lcd0 depends on clock CLK_MIXER0 from DE2 CCU. + * However there is no support for this clock on A64 yet, so we depend + * on the upstream clocks here to keep them (and thus CLK_MIXER0) up. + */ + simplefb_lcd: framebuffer-lcd { + compatible = "allwinner,simple-framebuffer", + "simple-framebuffer"; + allwinner,pipeline = "mixer0-lcd0"; + clocks = <&ccu CLK_TCON0>, + <&ccu CLK_DE>, <&ccu CLK_BUS_DE>; + status = "disabled"; + }; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -112,6 +132,24 @@ method = "smc"; }; + sound_spdif { + compatible = "simple-audio-card"; + simple-audio-card,name = "On-board SPDIF"; + + simple-audio-card,cpu { + sound-dai = <&spdif>; + }; + + simple-audio-card,codec { + sound-dai = <&spdif_out>; + }; + }; + + spdif_out: spdif-out { + #sound-dai-cells = <0>; + compatible = "linux,spdif-dit"; + }; + timer { compatible = "arm,armv8-timer"; interrupts = <GIC_PPI 13 @@ -291,6 +329,11 @@ interrupt-controller; #interrupt-cells = <3>; + i2c0_pins: i2c0_pins { + pins = "PH0", "PH1"; + function = "i2c0"; + }; + i2c1_pins: i2c1_pins { pins = "PH2", "PH3"; function = "i2c1"; @@ -336,6 +379,11 @@ drive-strength = <40>; }; + spdif_tx_pin: spdif { + pins = "PH8"; + function = "spdif"; + }; + spi0_pins: spi0 { pins = "PC0", "PC1", "PC2", "PC3"; function = "spi0"; @@ -382,6 +430,50 @@ }; }; + spdif: spdif@1c21000 { + #sound-dai-cells = <0>; + compatible = "allwinner,sun50i-a64-spdif", + "allwinner,sun8i-h3-spdif"; + reg = <0x01c21000 0x400>; + interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_SPDIF>, <&ccu CLK_SPDIF>; + resets = <&ccu RST_BUS_SPDIF>; + clock-names = "apb", "spdif"; + dmas = <&dma 2>; + dma-names = "tx"; + pinctrl-names = "default"; + pinctrl-0 = <&spdif_tx_pin>; + status = "disabled"; + }; + + i2s0: i2s@1c22000 { + #sound-dai-cells = <0>; + compatible = "allwinner,sun50i-a64-i2s", + "allwinner,sun8i-h3-i2s"; + reg = <0x01c22000 0x400>; + interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_I2S0>, <&ccu CLK_I2S0>; + clock-names = "apb", "mod"; + resets = <&ccu RST_BUS_I2S0>; + dma-names = "rx", "tx"; + dmas = <&dma 3>, <&dma 3>; + status = "disabled"; + }; + + i2s1: i2s@1c22400 { + #sound-dai-cells = <0>; + compatible = "allwinner,sun50i-a64-i2s", + "allwinner,sun8i-h3-i2s"; + reg = <0x01c22400 0x400>; + interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_I2S1>, <&ccu CLK_I2S1>; + clock-names = "apb", "mod"; + resets = <&ccu RST_BUS_I2S1>; + dma-names = "rx", "tx"; + dmas = <&dma 4>, <&dma 4>; + status = "disabled"; + }; + uart0: serial@1c28000 { compatible = "snps,dw-apb-uart"; reg = <0x01c28000 0x400>; @@ -593,5 +685,12 @@ #address-cells = <1>; #size-cells = <0>; }; + + wdt0: watchdog@1c20ca0 { + compatible = "allwinner,sun50i-a64-wdt", + "allwinner,sun6i-a31-wdt"; + reg = <0x01c20ca0 0x20>; + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; + }; }; }; |