summaryrefslogtreecommitdiffstats
path: root/dts/src/arm64/amlogic/meson-axg.dtsi
diff options
context:
space:
mode:
Diffstat (limited to 'dts/src/arm64/amlogic/meson-axg.dtsi')
-rw-r--r--dts/src/arm64/amlogic/meson-axg.dtsi243
1 files changed, 232 insertions, 11 deletions
diff --git a/dts/src/arm64/amlogic/meson-axg.dtsi b/dts/src/arm64/amlogic/meson-axg.dtsi
index aace3d32a3..7e5ac9db93 100644
--- a/dts/src/arm64/amlogic/meson-axg.dtsi
+++ b/dts/src/arm64/amlogic/meson-axg.dtsi
@@ -12,6 +12,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
#include <dt-bindings/reset/amlogic,meson-axg-reset.h>
+#include <dt-bindings/power/meson-axg-power.h>
/ {
compatible = "amlogic,meson-axg";
@@ -104,6 +105,8 @@
l2: l2-cache0 {
compatible = "cache";
+ cache-level = <2>;
+ cache-unified;
};
};
@@ -151,7 +154,7 @@
scpi_clocks: clocks {
compatible = "arm,scpi-clocks";
- scpi_dvfs: clock-controller {
+ scpi_dvfs: clocks-0 {
compatible = "arm,scpi-dvfs-clocks";
#clock-cells = <1>;
clock-indices = <0>;
@@ -160,7 +163,7 @@
};
scpi_sensors: sensors {
- compatible = "amlogic,meson-gxbb-scpi-sensors";
+ compatible = "amlogic,meson-gxbb-scpi-sensors", "arm,scpi-sensors";
#thermal-sensor-cells = <1>;
};
};
@@ -171,6 +174,98 @@
#size-cells = <2>;
ranges;
+ pcieA: pcie@f9800000 {
+ compatible = "amlogic,axg-pcie", "snps,dw-pcie";
+ reg = <0x0 0xf9800000 0x0 0x400000>,
+ <0x0 0xff646000 0x0 0x2000>,
+ <0x0 0xf9f00000 0x0 0x100000>;
+ reg-names = "elbi", "cfg", "config";
+ interrupts = <GIC_SPI 177 IRQ_TYPE_EDGE_RISING>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 179 IRQ_TYPE_EDGE_RISING>;
+ bus-range = <0x0 0xff>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ ranges = <0x82000000 0 0xf9c00000 0x0 0xf9c00000 0 0x00300000>;
+
+ clocks = <&clkc CLKID_USB>, <&clkc CLKID_PCIE_A>, <&clkc CLKID_PCIE_CML_EN0>;
+ clock-names = "general", "pclk", "port";
+ resets = <&reset RESET_PCIE_A>, <&reset RESET_PCIE_APB>;
+ reset-names = "port", "apb";
+ num-lanes = <1>;
+ phys = <&pcie_phy>;
+ phy-names = "pcie";
+ status = "disabled";
+ };
+
+ pcieB: pcie@fa000000 {
+ compatible = "amlogic,axg-pcie", "snps,dw-pcie";
+ reg = <0x0 0xfa000000 0x0 0x400000>,
+ <0x0 0xff648000 0x0 0x2000>,
+ <0x0 0xfa400000 0x0 0x100000>;
+ reg-names = "elbi", "cfg", "config";
+ interrupts = <GIC_SPI 167 IRQ_TYPE_EDGE_RISING>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 169 IRQ_TYPE_EDGE_RISING>;
+ bus-range = <0x0 0xff>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ ranges = <0x82000000 0 0xfa500000 0x0 0xfa500000 0 0x00300000>;
+
+ clocks = <&clkc CLKID_USB>, <&clkc CLKID_PCIE_B>, <&clkc CLKID_PCIE_CML_EN1>;
+ clock-names = "general", "pclk", "port";
+ resets = <&reset RESET_PCIE_B>, <&reset RESET_PCIE_APB>;
+ reset-names = "port", "apb";
+ num-lanes = <1>;
+ phys = <&pcie_phy>;
+ phy-names = "pcie";
+ status = "disabled";
+ };
+
+ usb: usb@ffe09080 {
+ compatible = "amlogic,meson-axg-usb-ctrl";
+ reg = <0x0 0xffe09080 0x0 0x20>;
+ interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1_DDR_BRIDGE>;
+ clock-names = "usb_ctrl", "ddr";
+ resets = <&reset RESET_USB_OTG>;
+
+ dr_mode = "otg";
+
+ phys = <&usb2_phy1>;
+ phy-names = "usb2-phy1";
+
+ dwc2: usb@ff400000 {
+ compatible = "amlogic,meson-g12a-usb", "snps,dwc2";
+ reg = <0x0 0xff400000 0x0 0x40000>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clkc CLKID_USB1>;
+ clock-names = "otg";
+ phys = <&usb2_phy1>;
+ dr_mode = "peripheral";
+ g-rx-fifo-size = <192>;
+ g-np-tx-fifo-size = <128>;
+ g-tx-fifo-size = <128 128 16 16 16>;
+ };
+
+ dwc3: usb@ff500000 {
+ compatible = "snps,dwc3";
+ reg = <0x0 0xff500000 0x0 0x100000>;
+ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+ dr_mode = "host";
+ maximum-speed = "high-speed";
+ snps,dis_u2_susphy_quirk;
+ };
+ };
+
ethmac: ethernet@ff3f0000 {
compatible = "amlogic,meson-axg-dwmac",
"snps,dwmac-3.70a",
@@ -181,13 +276,25 @@
interrupt-names = "macirq";
clocks = <&clkc CLKID_ETH>,
<&clkc CLKID_FCLK_DIV2>,
- <&clkc CLKID_MPLL2>;
- clock-names = "stmmaceth", "clkin0", "clkin1";
+ <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_FCLK_DIV2>;
+ clock-names = "stmmaceth", "clkin0", "clkin1",
+ "timing-adjustment";
rx-fifo-depth = <4096>;
tx-fifo-depth = <2048>;
+ power-domains = <&pwrc PWRC_AXG_ETHERNET_MEM_ID>;
status = "disabled";
};
+ pcie_phy: phy@ff644000 {
+ compatible = "amlogic,axg-pcie-phy";
+ reg = <0x0 0xff644000 0x0 0x1c>;
+ resets = <&reset RESET_PCIE_PHY>;
+ phys = <&mipi_pcie_analog_dphy>;
+ phy-names = "analog";
+ #phy-cells = <0>;
+ };
+
pdm: audio-controller@ff632000 {
compatible = "amlogic,axg-pdm";
reg = <0x0 0xff632000 0x0 0x34>;
@@ -325,6 +432,27 @@
};
};
+ nand_all_pins: nand-all-pins {
+ mux {
+ groups = "emmc_nand_d0",
+ "emmc_nand_d1",
+ "emmc_nand_d2",
+ "emmc_nand_d3",
+ "emmc_nand_d4",
+ "emmc_nand_d5",
+ "emmc_nand_d6",
+ "emmc_nand_d7",
+ "nand_ce0",
+ "nand_ale",
+ "nand_cle",
+ "nand_wen_clk",
+ "nand_ren_wr";
+ function = "nand";
+ input-enable;
+ bias-pull-up;
+ };
+ };
+
emmc_ds_pins: emmc_ds {
mux {
groups = "emmc_ds";
@@ -1115,6 +1243,52 @@
clocks = <&xtal>;
clock-names = "xtal";
};
+
+ pwrc: power-controller {
+ compatible = "amlogic,meson-axg-pwrc";
+ #power-domain-cells = <1>;
+ amlogic,ao-sysctrl = <&sysctrl_AO>;
+ resets = <&reset RESET_VIU>,
+ <&reset RESET_VENC>,
+ <&reset RESET_VCBUS>,
+ <&reset RESET_VENCL>,
+ <&reset RESET_VID_LOCK>;
+ reset-names = "viu", "venc", "vcbus",
+ "vencl", "vid_lock";
+ clocks = <&clkc CLKID_VPU>,
+ <&clkc CLKID_VAPB>;
+ clock-names = "vpu", "vapb";
+ /*
+ * VPU clocking is provided by two identical clock paths
+ * VPU_0 and VPU_1 muxed to a single clock by a glitch
+ * free mux to safely change frequency while running.
+ * Same for VAPB but with a final gate after the glitch free mux.
+ */
+ assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
+ <&clkc CLKID_VPU_0>,
+ <&clkc CLKID_VPU>, /* Glitch free mux */
+ <&clkc CLKID_VAPB_0_SEL>,
+ <&clkc CLKID_VAPB_0>,
+ <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
+ assigned-clock-parents = <&clkc CLKID_FCLK_DIV4>,
+ <0>, /* Do Nothing */
+ <&clkc CLKID_VPU_0>,
+ <&clkc CLKID_FCLK_DIV4>,
+ <0>, /* Do Nothing */
+ <&clkc CLKID_VAPB_0>;
+ assigned-clock-rates = <0>, /* Do Nothing */
+ <250000000>,
+ <0>, /* Do Nothing */
+ <0>, /* Do Nothing */
+ <250000000>,
+ <0>; /* Do Nothing */
+ };
+
+ mipi_pcie_analog_dphy: phy {
+ compatible = "amlogic,axg-mipi-pcie-analog-phy";
+ #phy-cells = <0>;
+ status = "disabled";
+ };
};
};
@@ -1127,6 +1301,19 @@
#mbox-cells = <1>;
};
+ mipi_dphy: phy@ff640000 {
+ compatible = "amlogic,axg-mipi-dphy";
+ reg = <0x0 0xff640000 0x0 0x100>;
+ clocks = <&clkc CLKID_MIPI_DSI_PHY>;
+ clock-names = "pclk";
+ resets = <&reset RESET_MIPI_PHY>;
+ reset-names = "phy";
+ phys = <&mipi_pcie_analog_dphy>;
+ phy-names = "analog";
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+
audio: bus@ff642000 {
compatible = "simple-bus";
reg = <0x0 0xff642000 0x0 0x2000>;
@@ -1371,7 +1558,7 @@
sysctrl_AO: sys-ctrl@0 {
compatible = "amlogic,meson-axg-ao-sysctrl", "simple-mfd", "syscon";
- reg = <0x0 0x0 0x0 0x100>;
+ reg = <0x0 0x0 0x0 0x100>;
clkc_AO: clock-controller {
compatible = "amlogic,meson-axg-aoclkc";
@@ -1561,6 +1748,14 @@
};
};
+ ge2d: ge2d@ff940000 {
+ compatible = "amlogic,axg-ge2d";
+ reg = <0x0 0xff940000 0x0 0x10000>;
+ interrupts = <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&clkc CLKID_VAPB>;
+ resets = <&reset RESET_GE2D>;
+ };
+
gic: interrupt-controller@ffc01000 {
compatible = "arm,gic-400";
reg = <0x0 0xffc01000 0 0x1000>,
@@ -1699,6 +1894,7 @@
status = "disabled";
clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
clock-names = "xtal", "pclk", "baud";
+ fifo-size = <128>;
};
};
@@ -1709,10 +1905,10 @@
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x200000>;
- sd_emmc_b: sd@5000 {
+ sd_emmc_b: mmc@5000 {
compatible = "amlogic,meson-axg-mmc";
reg = <0x0 0x5000 0x0 0x800>;
- interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
+ interrupts = <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
clocks = <&clkc CLKID_SD_EMMC_B>,
<&clkc CLKID_SD_EMMC_B_CLK0>,
@@ -1724,7 +1920,7 @@
sd_emmc_c: mmc@7000 {
compatible = "amlogic,meson-axg-mmc";
reg = <0x0 0x7000 0x0 0x800>;
- interrupts = <GIC_SPI 218 IRQ_TYPE_EDGE_RISING>;
+ interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
clocks = <&clkc CLKID_SD_EMMC_C>,
<&clkc CLKID_SD_EMMC_C_CLK0>,
@@ -1732,21 +1928,46 @@
clock-names = "core", "clkin0", "clkin1";
resets = <&reset RESET_SD_EMMC_C>;
};
+
+ nfc: nand-controller@7800 {
+ compatible = "amlogic,meson-axg-nfc";
+ reg = <0x0 0x7800 0x0 0x100>,
+ <0x0 0x7000 0x0 0x800>;
+ reg-names = "nfc", "emmc";
+ pinctrl-0 = <&nand_all_pins>;
+ pinctrl-names = "default";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&clkc CLKID_SD_EMMC_C>,
+ <&clkc CLKID_FCLK_DIV2>;
+ clock-names = "core", "device";
+ };
+
+ usb2_phy1: phy@9020 {
+ compatible = "amlogic,meson-gxl-usb2-phy";
+ #phy-cells = <0>;
+ reg = <0x0 0x9020 0x0 0x20>;
+ clocks = <&clkc CLKID_USB>;
+ clock-names = "phy";
+ resets = <&reset RESET_USB_OTG>;
+ reset-names = "phy";
+ };
};
sram: sram@fffc0000 {
- compatible = "amlogic,meson-axg-sram", "mmio-sram";
+ compatible = "mmio-sram";
reg = <0x0 0xfffc0000 0x0 0x20000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x0 0xfffc0000 0x20000>;
- cpu_scp_lpri: scp-shmem@13000 {
+ cpu_scp_lpri: scp-sram@13000 {
compatible = "amlogic,meson-axg-scp-shmem";
reg = <0x13000 0x400>;
};
- cpu_scp_hpri: scp-shmem@13400 {
+ cpu_scp_hpri: scp-sram@13400 {
compatible = "amlogic,meson-axg-scp-shmem";
reg = <0x13400 0x400>;
};