diff options
Diffstat (limited to 'dts/src/arm64/arm/fvp-base-revc.dts')
| -rw-r--r-- | dts/src/arm64/arm/fvp-base-revc.dts | 113 |
1 files changed, 82 insertions, 31 deletions
diff --git a/dts/src/arm64/arm/fvp-base-revc.dts b/dts/src/arm64/arm/fvp-base-revc.dts index 335fff7624..60472d65a3 100644 --- a/dts/src/arm64/arm/fvp-base-revc.dts +++ b/dts/src/arm64/arm/fvp-base-revc.dts @@ -47,48 +47,121 @@ compatible = "arm,armv8"; reg = <0x0 0x000>; enable-method = "psci"; + i-cache-size = <0x8000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <256>; + next-level-cache = <&C0_L2>; }; cpu1: cpu@100 { device_type = "cpu"; compatible = "arm,armv8"; reg = <0x0 0x100>; enable-method = "psci"; + i-cache-size = <0x8000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <256>; + next-level-cache = <&C0_L2>; }; cpu2: cpu@200 { device_type = "cpu"; compatible = "arm,armv8"; reg = <0x0 0x200>; enable-method = "psci"; + i-cache-size = <0x8000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <256>; + next-level-cache = <&C0_L2>; }; cpu3: cpu@300 { device_type = "cpu"; compatible = "arm,armv8"; reg = <0x0 0x300>; enable-method = "psci"; + i-cache-size = <0x8000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <256>; + next-level-cache = <&C0_L2>; }; cpu4: cpu@10000 { device_type = "cpu"; compatible = "arm,armv8"; reg = <0x0 0x10000>; enable-method = "psci"; + i-cache-size = <0x8000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <256>; + next-level-cache = <&C1_L2>; }; cpu5: cpu@10100 { device_type = "cpu"; compatible = "arm,armv8"; reg = <0x0 0x10100>; enable-method = "psci"; + i-cache-size = <0x8000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <256>; + next-level-cache = <&C1_L2>; }; cpu6: cpu@10200 { device_type = "cpu"; compatible = "arm,armv8"; reg = <0x0 0x10200>; enable-method = "psci"; + i-cache-size = <0x8000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <256>; + next-level-cache = <&C1_L2>; }; cpu7: cpu@10300 { device_type = "cpu"; compatible = "arm,armv8"; reg = <0x0 0x10300>; enable-method = "psci"; + i-cache-size = <0x8000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <256>; + next-level-cache = <&C1_L2>; + }; + C0_L2: l2-cache0 { + compatible = "cache"; + cache-size = <0x80000>; + cache-line-size = <64>; + cache-sets = <512>; + cache-level = <2>; + cache-unified; + }; + + C1_L2: l2-cache1 { + compatible = "cache"; + cache-size = <0x80000>; + cache-line-size = <64>; + cache-sets = <512>; + cache-level = <2>; + cache-unified; }; }; @@ -126,7 +199,7 @@ <0x0 0x2c02f000 0 0x2000>; // GICV interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; - its: its@2f020000 { + its: msi-controller@2f020000 { #msi-cells = <1>; compatible = "arm,gic-v3-its"; reg = <0x0 0x2f020000 0x0 0x20000>; // GITS @@ -172,52 +245,29 @@ dma-coherent; }; - smmu: smmu@2b400000 { + smmu: iommu@2b400000 { compatible = "arm,smmu-v3"; reg = <0x0 0x2b400000 0x0 0x100000>; interrupts = <GIC_SPI 74 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 77 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>; - interrupt-names = "eventq", "priq", "cmdq-sync", "gerror"; + <GIC_SPI 77 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "eventq", "gerror", "priq", "cmdq-sync"; dma-coherent; #iommu-cells = <1>; msi-parent = <&its 0x10000>; }; panel { - compatible = "arm,rtsm-display", "panel-dpi"; + compatible = "arm,rtsm-display"; port { panel_in: endpoint { remote-endpoint = <&clcd_pads>; }; }; - - panel-timing { - clock-frequency = <63500127>; - hactive = <1024>; - hback-porch = <152>; - hfront-porch = <48>; - hsync-len = <104>; - vactive = <768>; - vback-porch = <23>; - vfront-porch = <3>; - vsync-len = <4>; - }; }; - smb@8000000 { - compatible = "simple-bus"; - - #address-cells = <2>; - #size-cells = <1>; - ranges = <0 0 0 0x08000000 0x04000000>, - <1 0 0 0x14000000 0x04000000>, - <2 0 0 0x18000000 0x04000000>, - <3 0 0 0x1c000000 0x04000000>, - <4 0 0 0x0c000000 0x04000000>, - <5 0 0 0x10000000 0x04000000>; - + bus@8000000 { #interrupt-cells = <1>; interrupt-map-mask = <0 0 63>; interrupt-map = <0 0 0 &gic 0 0 GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, @@ -264,6 +314,7 @@ <0 0 41 &gic 0 0 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, <0 0 42 &gic 0 0 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, <0 0 43 &gic 0 0 GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, - <0 0 44 &gic 0 0 GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; + <0 0 44 &gic 0 0 GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, + <0 0 46 &gic 0 0 GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; }; }; |