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-rw-r--r--dts/src/arm64/arm/foundation-v8-gicv2.dtsi19
-rw-r--r--dts/src/arm64/arm/foundation-v8-gicv3-psci.dts9
-rw-r--r--dts/src/arm64/arm/foundation-v8-gicv3.dts25
-rw-r--r--dts/src/arm64/arm/foundation-v8-gicv3.dtsi28
-rw-r--r--dts/src/arm64/arm/foundation-v8-psci.dts9
-rw-r--r--dts/src/arm64/arm/foundation-v8-psci.dtsi28
-rw-r--r--dts/src/arm64/arm/foundation-v8-spin-table.dtsi25
-rw-r--r--dts/src/arm64/arm/foundation-v8.dts16
-rw-r--r--dts/src/arm64/arm/foundation-v8.dtsi30
-rw-r--r--dts/src/arm64/arm/rtsm_ve-aemv8a.dts2
-rw-r--r--dts/src/arm64/arm/rtsm_ve-motherboard.dtsi24
-rw-r--r--dts/src/arm64/arm/vexpress-v2f-1xv7-ca53x2.dts2
12 files changed, 147 insertions, 70 deletions
diff --git a/dts/src/arm64/arm/foundation-v8-gicv2.dtsi b/dts/src/arm64/arm/foundation-v8-gicv2.dtsi
new file mode 100644
index 0000000000..851abf34fc
--- /dev/null
+++ b/dts/src/arm64/arm/foundation-v8-gicv2.dtsi
@@ -0,0 +1,19 @@
+/*
+ * ARM Ltd.
+ *
+ * ARMv8 Foundation model DTS (GICv2 configuration)
+ */
+
+/ {
+ gic: interrupt-controller@2c001000 {
+ compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
+ #interrupt-cells = <3>;
+ #address-cells = <2>;
+ interrupt-controller;
+ reg = <0x0 0x2c001000 0 0x1000>,
+ <0x0 0x2c002000 0 0x2000>,
+ <0x0 0x2c004000 0 0x2000>,
+ <0x0 0x2c006000 0 0x2000>;
+ interrupts = <1 9 0xf04>;
+ };
+};
diff --git a/dts/src/arm64/arm/foundation-v8-gicv3-psci.dts b/dts/src/arm64/arm/foundation-v8-gicv3-psci.dts
new file mode 100644
index 0000000000..e096e670be
--- /dev/null
+++ b/dts/src/arm64/arm/foundation-v8-gicv3-psci.dts
@@ -0,0 +1,9 @@
+/*
+ * ARM Ltd.
+ *
+ * ARMv8 Foundation model DTS (GICv3+PSCI configuration)
+ */
+
+#include "foundation-v8.dtsi"
+#include "foundation-v8-gicv3.dtsi"
+#include "foundation-v8-psci.dtsi"
diff --git a/dts/src/arm64/arm/foundation-v8-gicv3.dts b/dts/src/arm64/arm/foundation-v8-gicv3.dts
index 4825cdbdcf..c87380e87f 100644
--- a/dts/src/arm64/arm/foundation-v8-gicv3.dts
+++ b/dts/src/arm64/arm/foundation-v8-gicv3.dts
@@ -6,26 +6,5 @@
*/
#include "foundation-v8.dtsi"
-
-/ {
- gic: interrupt-controller@2f000000 {
- compatible = "arm,gic-v3";
- #interrupt-cells = <3>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
- interrupt-controller;
- reg = <0x0 0x2f000000 0x0 0x10000>,
- <0x0 0x2f100000 0x0 0x200000>,
- <0x0 0x2c000000 0x0 0x2000>,
- <0x0 0x2c010000 0x0 0x2000>,
- <0x0 0x2c02f000 0x0 0x2000>;
- interrupts = <1 9 4>;
-
- its: its@2f020000 {
- compatible = "arm,gic-v3-its";
- msi-controller;
- reg = <0x0 0x2f020000 0x0 0x20000>;
- };
- };
-};
+#include "foundation-v8-gicv3.dtsi"
+#include "foundation-v8-spin-table.dtsi"
diff --git a/dts/src/arm64/arm/foundation-v8-gicv3.dtsi b/dts/src/arm64/arm/foundation-v8-gicv3.dtsi
new file mode 100644
index 0000000000..91fc5c60d8
--- /dev/null
+++ b/dts/src/arm64/arm/foundation-v8-gicv3.dtsi
@@ -0,0 +1,28 @@
+/*
+ * ARM Ltd.
+ *
+ * ARMv8 Foundation model DTS (GICv3 configuration)
+ */
+
+/ {
+ gic: interrupt-controller@2f000000 {
+ compatible = "arm,gic-v3";
+ #interrupt-cells = <3>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ interrupt-controller;
+ reg = <0x0 0x2f000000 0x0 0x10000>,
+ <0x0 0x2f100000 0x0 0x200000>,
+ <0x0 0x2c000000 0x0 0x2000>,
+ <0x0 0x2c010000 0x0 0x2000>,
+ <0x0 0x2c02f000 0x0 0x2000>;
+ interrupts = <1 9 4>;
+
+ its: its@2f020000 {
+ compatible = "arm,gic-v3-its";
+ msi-controller;
+ reg = <0x0 0x2f020000 0x0 0x20000>;
+ };
+ };
+};
diff --git a/dts/src/arm64/arm/foundation-v8-psci.dts b/dts/src/arm64/arm/foundation-v8-psci.dts
new file mode 100644
index 0000000000..723f23c7cd
--- /dev/null
+++ b/dts/src/arm64/arm/foundation-v8-psci.dts
@@ -0,0 +1,9 @@
+/*
+ * ARM Ltd.
+ *
+ * ARMv8 Foundation model DTS (GICv2+PSCI configuration)
+ */
+
+#include "foundation-v8.dtsi"
+#include "foundation-v8-gicv2.dtsi"
+#include "foundation-v8-psci.dtsi"
diff --git a/dts/src/arm64/arm/foundation-v8-psci.dtsi b/dts/src/arm64/arm/foundation-v8-psci.dtsi
new file mode 100644
index 0000000000..16cdf39572
--- /dev/null
+++ b/dts/src/arm64/arm/foundation-v8-psci.dtsi
@@ -0,0 +1,28 @@
+/*
+ * ARM Ltd.
+ *
+ * ARMv8 Foundation model DTS (PSCI configuration)
+ */
+
+/ {
+ psci {
+ compatible = "arm,psci-1.0";
+ method = "smc";
+ };
+};
+
+&cpu0 {
+ enable-method = "psci";
+};
+
+&cpu1 {
+ enable-method = "psci";
+};
+
+&cpu2 {
+ enable-method = "psci";
+};
+
+&cpu3 {
+ enable-method = "psci";
+};
diff --git a/dts/src/arm64/arm/foundation-v8-spin-table.dtsi b/dts/src/arm64/arm/foundation-v8-spin-table.dtsi
new file mode 100644
index 0000000000..4d4186ba0e
--- /dev/null
+++ b/dts/src/arm64/arm/foundation-v8-spin-table.dtsi
@@ -0,0 +1,25 @@
+/*
+ * ARM Ltd.
+ *
+ * ARMv8 Foundation model DTS (spin table configuration)
+ */
+
+&cpu0 {
+ enable-method = "spin-table";
+ cpu-release-addr = <0x0 0x8000fff8>;
+};
+
+&cpu1 {
+ enable-method = "spin-table";
+ cpu-release-addr = <0x0 0x8000fff8>;
+};
+
+&cpu2 {
+ enable-method = "spin-table";
+ cpu-release-addr = <0x0 0x8000fff8>;
+};
+
+&cpu3 {
+ enable-method = "spin-table";
+ cpu-release-addr = <0x0 0x8000fff8>;
+};
diff --git a/dts/src/arm64/arm/foundation-v8.dts b/dts/src/arm64/arm/foundation-v8.dts
index 8a9136f4ab..b17347d75e 100644
--- a/dts/src/arm64/arm/foundation-v8.dts
+++ b/dts/src/arm64/arm/foundation-v8.dts
@@ -6,17 +6,5 @@
*/
#include "foundation-v8.dtsi"
-
-/ {
- gic: interrupt-controller@2c001000 {
- compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
- #interrupt-cells = <3>;
- #address-cells = <2>;
- interrupt-controller;
- reg = <0x0 0x2c001000 0 0x1000>,
- <0x0 0x2c002000 0 0x2000>,
- <0x0 0x2c004000 0 0x2000>,
- <0x0 0x2c006000 0 0x2000>;
- interrupts = <1 9 0xf04>;
- };
-};
+#include "foundation-v8-gicv2.dtsi"
+#include "foundation-v8-spin-table.dtsi"
diff --git a/dts/src/arm64/arm/foundation-v8.dtsi b/dts/src/arm64/arm/foundation-v8.dtsi
index f0b67e439f..e080277d27 100644
--- a/dts/src/arm64/arm/foundation-v8.dtsi
+++ b/dts/src/arm64/arm/foundation-v8.dtsi
@@ -29,36 +29,28 @@
#address-cells = <2>;
#size-cells = <0>;
- cpu@0 {
+ cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x0>;
- enable-method = "spin-table";
- cpu-release-addr = <0x0 0x8000fff8>;
next-level-cache = <&L2_0>;
};
- cpu@1 {
+ cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x1>;
- enable-method = "spin-table";
- cpu-release-addr = <0x0 0x8000fff8>;
next-level-cache = <&L2_0>;
};
- cpu@2 {
+ cpu2: cpu@2 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x2>;
- enable-method = "spin-table";
- cpu-release-addr = <0x0 0x8000fff8>;
next-level-cache = <&L2_0>;
};
- cpu@3 {
+ cpu3: cpu@3 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x3>;
- enable-method = "spin-table";
- cpu-release-addr = <0x0 0x8000fff8>;
next-level-cache = <&L2_0>;
};
@@ -98,7 +90,7 @@
timeout-sec = <30>;
};
- smb@08000000 {
+ smb@8000000 {
compatible = "arm,vexpress,v2m-p1", "simple-bus";
arm,v2m-memory-map = "rs1";
#address-cells = <2>; /* SMB chipselect number and offset */
@@ -190,12 +182,12 @@
#size-cells = <1>;
ranges = <0 3 0 0x200000>;
- v2m_sysreg: sysreg@010000 {
+ v2m_sysreg: sysreg@10000 {
compatible = "arm,vexpress-sysreg";
reg = <0x010000 0x1000>;
};
- v2m_serial0: uart@090000 {
+ v2m_serial0: uart@90000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x090000 0x1000>;
interrupts = <5>;
@@ -203,7 +195,7 @@
clock-names = "uartclk", "apb_pclk";
};
- v2m_serial1: uart@0a0000 {
+ v2m_serial1: uart@a0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0a0000 0x1000>;
interrupts = <6>;
@@ -211,7 +203,7 @@
clock-names = "uartclk", "apb_pclk";
};
- v2m_serial2: uart@0b0000 {
+ v2m_serial2: uart@b0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0b0000 0x1000>;
interrupts = <7>;
@@ -219,7 +211,7 @@
clock-names = "uartclk", "apb_pclk";
};
- v2m_serial3: uart@0c0000 {
+ v2m_serial3: uart@c0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0c0000 0x1000>;
interrupts = <8>;
@@ -227,7 +219,7 @@
clock-names = "uartclk", "apb_pclk";
};
- virtio-block@0130000 {
+ virtio-block@130000 {
compatible = "virtio,mmio";
reg = <0x130000 0x200>;
interrupts = <42>;
diff --git a/dts/src/arm64/arm/rtsm_ve-aemv8a.dts b/dts/src/arm64/arm/rtsm_ve-aemv8a.dts
index 7810632d34..06c8117e81 100644
--- a/dts/src/arm64/arm/rtsm_ve-aemv8a.dts
+++ b/dts/src/arm64/arm/rtsm_ve-aemv8a.dts
@@ -105,7 +105,7 @@
<0 63 4>;
};
- smb@08000000 {
+ smb@8000000 {
compatible = "simple-bus";
#address-cells = <2>;
diff --git a/dts/src/arm64/arm/rtsm_ve-motherboard.dtsi b/dts/src/arm64/arm/rtsm_ve-motherboard.dtsi
index e18fe006cc..1134e5d8df 100644
--- a/dts/src/arm64/arm/rtsm_ve-motherboard.dtsi
+++ b/dts/src/arm64/arm/rtsm_ve-motherboard.dtsi
@@ -61,14 +61,14 @@
#size-cells = <1>;
ranges = <0 3 0 0x200000>;
- v2m_sysreg: sysreg@010000 {
+ v2m_sysreg: sysreg@10000 {
compatible = "arm,vexpress-sysreg";
reg = <0x010000 0x1000>;
gpio-controller;
#gpio-cells = <2>;
};
- v2m_sysctl: sysctl@020000 {
+ v2m_sysctl: sysctl@20000 {
compatible = "arm,sp810", "arm,primecell";
reg = <0x020000 0x1000>;
clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&v2m_clk24mhz>;
@@ -79,7 +79,7 @@
assigned-clock-parents = <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>;
};
- aaci@040000 {
+ aaci@40000 {
compatible = "arm,pl041", "arm,primecell";
reg = <0x040000 0x1000>;
interrupts = <11>;
@@ -87,7 +87,7 @@
clock-names = "apb_pclk";
};
- mmci@050000 {
+ mmci@50000 {
compatible = "arm,pl180", "arm,primecell";
reg = <0x050000 0x1000>;
interrupts = <9 10>;
@@ -99,7 +99,7 @@
clock-names = "mclk", "apb_pclk";
};
- kmi@060000 {
+ kmi@60000 {
compatible = "arm,pl050", "arm,primecell";
reg = <0x060000 0x1000>;
interrupts = <12>;
@@ -107,7 +107,7 @@
clock-names = "KMIREFCLK", "apb_pclk";
};
- kmi@070000 {
+ kmi@70000 {
compatible = "arm,pl050", "arm,primecell";
reg = <0x070000 0x1000>;
interrupts = <13>;
@@ -115,7 +115,7 @@
clock-names = "KMIREFCLK", "apb_pclk";
};
- v2m_serial0: uart@090000 {
+ v2m_serial0: uart@90000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x090000 0x1000>;
interrupts = <5>;
@@ -123,7 +123,7 @@
clock-names = "uartclk", "apb_pclk";
};
- v2m_serial1: uart@0a0000 {
+ v2m_serial1: uart@a0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0a0000 0x1000>;
interrupts = <6>;
@@ -131,7 +131,7 @@
clock-names = "uartclk", "apb_pclk";
};
- v2m_serial2: uart@0b0000 {
+ v2m_serial2: uart@b0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0b0000 0x1000>;
interrupts = <7>;
@@ -139,7 +139,7 @@
clock-names = "uartclk", "apb_pclk";
};
- v2m_serial3: uart@0c0000 {
+ v2m_serial3: uart@c0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0c0000 0x1000>;
interrupts = <8>;
@@ -147,7 +147,7 @@
clock-names = "uartclk", "apb_pclk";
};
- wdt@0f0000 {
+ wdt@f0000 {
compatible = "arm,sp805", "arm,primecell";
reg = <0x0f0000 0x1000>;
interrupts = <0>;
@@ -220,7 +220,7 @@
};
};
- virtio-block@0130000 {
+ virtio-block@130000 {
compatible = "virtio,mmio";
reg = <0x130000 0x200>;
interrupts = <42>;
diff --git a/dts/src/arm64/arm/vexpress-v2f-1xv7-ca53x2.dts b/dts/src/arm64/arm/vexpress-v2f-1xv7-ca53x2.dts
index 2cb6049578..1c9eadc2d7 100644
--- a/dts/src/arm64/arm/vexpress-v2f-1xv7-ca53x2.dts
+++ b/dts/src/arm64/arm/vexpress-v2f-1xv7-ca53x2.dts
@@ -129,7 +129,7 @@
};
};
- smb@08000000 {
+ smb@8000000 {
compatible = "simple-bus";
#address-cells = <2>;
generated by cgit v1.2.3 (git 2.39.1) at 2024-04-18 01:58:07 +0000