diff options
Diffstat (limited to 'dts/src/arm64/broadcom')
-rw-r--r-- | dts/src/arm64/broadcom/bcm2835-rpi.dtsi | 15 | ||||
-rw-r--r-- | dts/src/arm64/broadcom/bcm2837-rpi-3-b.dts | 8 | ||||
-rw-r--r-- | dts/src/arm64/broadcom/bcm2837.dtsi | 8 | ||||
-rw-r--r-- | dts/src/arm64/broadcom/bcm283x-rpi-usb-host.dtsi | 3 | ||||
-rw-r--r-- | dts/src/arm64/broadcom/bcm283x.dtsi | 212 | ||||
-rw-r--r-- | dts/src/arm64/broadcom/ns2-svk.dts | 43 | ||||
-rw-r--r-- | dts/src/arm64/broadcom/ns2.dtsi | 74 |
7 files changed, 347 insertions, 16 deletions
diff --git a/dts/src/arm64/broadcom/bcm2835-rpi.dtsi b/dts/src/arm64/broadcom/bcm2835-rpi.dtsi index e9b47b2bbc..6ddf7dfe3f 100644 --- a/dts/src/arm64/broadcom/bcm2835-rpi.dtsi +++ b/dts/src/arm64/broadcom/bcm2835-rpi.dtsi @@ -39,22 +39,21 @@ }; alt0: alt0 { - brcm,pins = <0 1 2 3 4 5 7 8 9 10 11 14 15 40 45>; + brcm,pins = <4 5 7 8 9 10 11 14 15>; brcm,function = <BCM2835_FSEL_ALT0>; }; - - alt3: alt3 { - brcm,pins = <48 49 50 51 52 53>; - brcm,function = <BCM2835_FSEL_ALT3>; - }; }; &i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_gpio0>; status = "okay"; clock-frequency = <100000>; }; &i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_gpio2>; status = "okay"; clock-frequency = <100000>; }; @@ -64,11 +63,15 @@ }; &sdhci { + pinctrl-names = "default"; + pinctrl-0 = <&emmc_gpio48>; status = "okay"; bus-width = <4>; }; &pwm { + pinctrl-names = "default"; + pinctrl-0 = <&pwm0_gpio40 &pwm1_gpio45>; status = "okay"; }; diff --git a/dts/src/arm64/broadcom/bcm2837-rpi-3-b.dts b/dts/src/arm64/broadcom/bcm2837-rpi-3-b.dts index 7841b724e3..c309633a1e 100644 --- a/dts/src/arm64/broadcom/bcm2837-rpi-3-b.dts +++ b/dts/src/arm64/broadcom/bcm2837-rpi-3-b.dts @@ -2,6 +2,7 @@ #include "bcm2837.dtsi" #include "bcm2835-rpi.dtsi" #include "bcm283x-rpi-smsc9514.dtsi" +#include "bcm283x-rpi-usb-host.dtsi" / { compatible = "raspberrypi,3-model-b", "brcm,bcm2837"; @@ -15,13 +16,6 @@ act { gpios = <&gpio 47 0>; }; - - pwr { - label = "PWR"; - gpios = <&gpio 35 0>; - default-state = "keep"; - linux,default-trigger = "default-on"; - }; }; }; diff --git a/dts/src/arm64/broadcom/bcm2837.dtsi b/dts/src/arm64/broadcom/bcm2837.dtsi index 8216bbb29f..19f2fe620a 100644 --- a/dts/src/arm64/broadcom/bcm2837.dtsi +++ b/dts/src/arm64/broadcom/bcm2837.dtsi @@ -1,7 +1,7 @@ #include "bcm283x.dtsi" / { - compatible = "brcm,bcm2836"; + compatible = "brcm,bcm2837"; soc { ranges = <0x7e000000 0x3f000000 0x1000000>, @@ -74,3 +74,9 @@ interrupt-parent = <&local_intc>; interrupts = <8>; }; + +/* enable thermal sensor with the correct compatible property set */ +&thermal { + compatible = "brcm,bcm2837-thermal"; + status = "okay"; +}; diff --git a/dts/src/arm64/broadcom/bcm283x-rpi-usb-host.dtsi b/dts/src/arm64/broadcom/bcm283x-rpi-usb-host.dtsi new file mode 100644 index 0000000000..73f4ece8dc --- /dev/null +++ b/dts/src/arm64/broadcom/bcm283x-rpi-usb-host.dtsi @@ -0,0 +1,3 @@ +&usb { + dr_mode = "host"; +}; diff --git a/dts/src/arm64/broadcom/bcm283x.dtsi b/dts/src/arm64/broadcom/bcm283x.dtsi index 46d46d894a..9a44da1908 100644 --- a/dts/src/arm64/broadcom/bcm283x.dtsi +++ b/dts/src/arm64/broadcom/bcm283x.dtsi @@ -104,7 +104,7 @@ reg = <0x7e104000 0x10>; }; - mailbox: mailbox@7e00b800 { + mailbox: mailbox@7e00b880 { compatible = "brcm,bcm2835-mbox"; reg = <0x7e00b880 0x40>; interrupts = <0 1>; @@ -132,6 +132,209 @@ interrupt-controller; #interrupt-cells = <2>; + + /* Defines pin muxing groups according to + * BCM2835-ARM-Peripherals.pdf page 102. + * + * While each pin can have its mux selected + * for various functions individually, some + * groups only make sense to switch to a + * particular function together. + */ + dpi_gpio0: dpi_gpio0 { + brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11 + 12 13 14 15 16 17 18 19 + 20 21 22 23 24 25 26 27>; + brcm,function = <BCM2835_FSEL_ALT2>; + }; + emmc_gpio22: emmc_gpio22 { + brcm,pins = <22 23 24 25 26 27>; + brcm,function = <BCM2835_FSEL_ALT3>; + }; + emmc_gpio34: emmc_gpio34 { + brcm,pins = <34 35 36 37 38 39>; + brcm,function = <BCM2835_FSEL_ALT3>; + brcm,pull = <BCM2835_PUD_OFF + BCM2835_PUD_UP + BCM2835_PUD_UP + BCM2835_PUD_UP + BCM2835_PUD_UP + BCM2835_PUD_UP>; + }; + emmc_gpio48: emmc_gpio48 { + brcm,pins = <48 49 50 51 52 53>; + brcm,function = <BCM2835_FSEL_ALT3>; + }; + + gpclk0_gpio4: gpclk0_gpio4 { + brcm,pins = <4>; + brcm,function = <BCM2835_FSEL_ALT0>; + }; + gpclk1_gpio5: gpclk1_gpio5 { + brcm,pins = <5>; + brcm,function = <BCM2835_FSEL_ALT0>; + }; + gpclk1_gpio42: gpclk1_gpio42 { + brcm,pins = <42>; + brcm,function = <BCM2835_FSEL_ALT0>; + }; + gpclk1_gpio44: gpclk1_gpio44 { + brcm,pins = <44>; + brcm,function = <BCM2835_FSEL_ALT0>; + }; + gpclk2_gpio6: gpclk2_gpio6 { + brcm,pins = <6>; + brcm,function = <BCM2835_FSEL_ALT0>; + }; + gpclk2_gpio43: gpclk2_gpio43 { + brcm,pins = <43>; + brcm,function = <BCM2835_FSEL_ALT0>; + }; + + i2c0_gpio0: i2c0_gpio0 { + brcm,pins = <0 1>; + brcm,function = <BCM2835_FSEL_ALT0>; + }; + i2c0_gpio32: i2c0_gpio32 { + brcm,pins = <32 34>; + brcm,function = <BCM2835_FSEL_ALT0>; + }; + i2c0_gpio44: i2c0_gpio44 { + brcm,pins = <44 45>; + brcm,function = <BCM2835_FSEL_ALT1>; + }; + i2c1_gpio2: i2c1_gpio2 { + brcm,pins = <2 3>; + brcm,function = <BCM2835_FSEL_ALT0>; + }; + i2c1_gpio44: i2c1_gpio44 { + brcm,pins = <44 45>; + brcm,function = <BCM2835_FSEL_ALT2>; + }; + i2c_slave_gpio18: i2c_slave_gpio18 { + brcm,pins = <18 19 20 21>; + brcm,function = <BCM2835_FSEL_ALT3>; + }; + + jtag_gpio4: jtag_gpio4 { + brcm,pins = <4 5 6 12 13>; + brcm,function = <BCM2835_FSEL_ALT4>; + }; + jtag_gpio22: jtag_gpio22 { + brcm,pins = <22 23 24 25 26 27>; + brcm,function = <BCM2835_FSEL_ALT4>; + }; + + pcm_gpio18: pcm_gpio18 { + brcm,pins = <18 19 20 21>; + brcm,function = <BCM2835_FSEL_ALT0>; + }; + pcm_gpio28: pcm_gpio28 { + brcm,pins = <28 29 30 31>; + brcm,function = <BCM2835_FSEL_ALT2>; + }; + + pwm0_gpio12: pwm0_gpio12 { + brcm,pins = <12>; + brcm,function = <BCM2835_FSEL_ALT0>; + }; + pwm0_gpio18: pwm0_gpio18 { + brcm,pins = <18>; + brcm,function = <BCM2835_FSEL_ALT5>; + }; + pwm0_gpio40: pwm0_gpio40 { + brcm,pins = <40>; + brcm,function = <BCM2835_FSEL_ALT0>; + }; + pwm1_gpio13: pwm1_gpio13 { + brcm,pins = <13>; + brcm,function = <BCM2835_FSEL_ALT0>; + }; + pwm1_gpio19: pwm1_gpio19 { + brcm,pins = <19>; + brcm,function = <BCM2835_FSEL_ALT5>; + }; + pwm1_gpio41: pwm1_gpio41 { + brcm,pins = <41>; + brcm,function = <BCM2835_FSEL_ALT0>; + }; + pwm1_gpio45: pwm1_gpio45 { + brcm,pins = <45>; + brcm,function = <BCM2835_FSEL_ALT0>; + }; + + sdhost_gpio48: sdhost_gpio48 { + brcm,pins = <48 49 50 51 52 53>; + brcm,function = <BCM2835_FSEL_ALT0>; + }; + + spi0_gpio7: spi0_gpio7 { + brcm,pins = <7 8 9 10 11>; + brcm,function = <BCM2835_FSEL_ALT0>; + }; + spi0_gpio35: spi0_gpio35 { + brcm,pins = <35 36 37 38 39>; + brcm,function = <BCM2835_FSEL_ALT0>; + }; + spi1_gpio16: spi1_gpio16 { + brcm,pins = <16 17 18 19 20 21>; + brcm,function = <BCM2835_FSEL_ALT4>; + }; + spi2_gpio40: spi2_gpio40 { + brcm,pins = <40 41 42 43 44 45>; + brcm,function = <BCM2835_FSEL_ALT4>; + }; + + uart0_gpio14: uart0_gpio14 { + brcm,pins = <14 15>; + brcm,function = <BCM2835_FSEL_ALT0>; + }; + /* Separate from the uart0_gpio14 group + * because it conflicts with spi1_gpio16, and + * people often run uart0 on the two pins + * without flow contrl. + */ + uart0_ctsrts_gpio16: uart0_ctsrts_gpio16 { + brcm,pins = <16 17>; + brcm,function = <BCM2835_FSEL_ALT3>; + }; + uart0_gpio30: uart0_gpio30 { + brcm,pins = <30 31>; + brcm,function = <BCM2835_FSEL_ALT3>; + }; + uart0_ctsrts_gpio32: uart0_ctsrts_gpio32 { + brcm,pins = <32 33>; + brcm,function = <BCM2835_FSEL_ALT3>; + }; + + uart1_gpio14: uart1_gpio14 { + brcm,pins = <14 15>; + brcm,function = <BCM2835_FSEL_ALT5>; + }; + uart1_ctsrts_gpio16: uart1_ctsrts_gpio16 { + brcm,pins = <16 17>; + brcm,function = <BCM2835_FSEL_ALT5>; + }; + uart1_gpio32: uart1_gpio32 { + brcm,pins = <32 33>; + brcm,function = <BCM2835_FSEL_ALT5>; + }; + uart1_ctsrts_gpio30: uart1_ctsrts_gpio30 { + brcm,pins = <30 31>; + brcm,function = <BCM2835_FSEL_ALT5>; + }; + uart1_gpio36: uart1_gpio36 { + brcm,pins = <36 37 38 39>; + brcm,function = <BCM2835_FSEL_ALT2>; + }; + uart1_gpio40: uart1_gpio40 { + brcm,pins = <40 41>; + brcm,function = <BCM2835_FSEL_ALT5>; + }; + uart1_ctsrts_gpio42: uart1_ctsrts_gpio42 { + brcm,pins = <42 43>; + brcm,function = <BCM2835_FSEL_ALT5>; + }; }; uart0: serial@7e201000 { @@ -187,6 +390,13 @@ interrupts = <2 14>; /* pwa1 */ }; + thermal: thermal@7e212000 { + compatible = "brcm,bcm2835-thermal"; + reg = <0x7e212000 0x8>; + clocks = <&clocks BCM2835_CLOCK_TSENS>; + status = "disabled"; + }; + aux: aux@0x7e215000 { compatible = "brcm,bcm2835-aux"; #clock-cells = <1>; diff --git a/dts/src/arm64/broadcom/ns2-svk.dts b/dts/src/arm64/broadcom/ns2-svk.dts index b09f3bc5c6..de8d379f44 100644 --- a/dts/src/arm64/broadcom/ns2-svk.dts +++ b/dts/src/arm64/broadcom/ns2-svk.dts @@ -56,6 +56,10 @@ }; }; +&enet { + status = "ok"; +}; + &pci_phy0 { status = "ok"; }; @@ -157,6 +161,10 @@ status = "ok"; }; +&sdio1 { + status = "ok"; +}; + &nand { nandcs@0 { compatible = "brcm,nandcs"; @@ -174,6 +182,7 @@ &mdio_mux_iproc { mdio@10 { gphy0: eth-phy@10 { + enet-phy-lane-swap; reg = <0x10>; }; }; @@ -187,3 +196,37 @@ groups = "nand_grp"; }; }; + +&qspi { + bspi-sel = <0>; + flash: m25p80@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "m25p80"; + reg = <0x0>; + spi-max-frequency = <12500000>; + m25p,fast-read; + spi-cpol; + spi-cpha; + + partition@0 { + label = "boot"; + reg = <0x00000000 0x000a0000>; + }; + + partition@a0000 { + label = "env"; + reg = <0x000a0000 0x00060000>; + }; + + partition@100000 { + label = "system"; + reg = <0x00100000 0x00600000>; + }; + + partition@700000 { + label = "rootfs"; + reg = <0x00700000 0x01900000>; + }; + }; +}; diff --git a/dts/src/arm64/broadcom/ns2.dtsi b/dts/src/arm64/broadcom/ns2.dtsi index d95dc40862..4fcdeca3a9 100644 --- a/dts/src/arm64/broadcom/ns2.dtsi +++ b/dts/src/arm64/broadcom/ns2.dtsi @@ -133,6 +133,9 @@ status = "disabled"; + phys = <&pci_phy0>; + phy-names = "pcie-phy"; + msi-parent = <&msi0>; msi0: msi@20020000 { compatible = "brcm,iproc-msi"; @@ -171,6 +174,9 @@ status = "disabled"; + phys = <&pci_phy1>; + phy-names = "pcie-phy"; + msi-parent = <&msi4>; msi4: msi@50020000 { compatible = "brcm,iproc-msi"; @@ -191,6 +197,54 @@ #include "ns2-clock.dtsi" + enet: ethernet@61000000 { + compatible = "brcm,ns2-amac"; + reg = <0x61000000 0x1000>, + <0x61090000 0x1000>, + <0x61030000 0x100>; + reg-names = "amac_base", "idm_base", "nicpm_base"; + interrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>; + phy-handle = <&gphy0>; + phy-mode = "rgmii"; + status = "disabled"; + }; + + pdc0: iproc-pdc0@612c0000 { + compatible = "brcm,iproc-pdc-mbox"; + reg = <0x612c0000 0x445>; /* PDC FS0 regs */ + interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; + #mbox-cells = <1>; + brcm,rx-status-len = <32>; + brcm,use-bcm-hdr; + }; + + pdc1: iproc-pdc1@612e0000 { + compatible = "brcm,iproc-pdc-mbox"; + reg = <0x612e0000 0x445>; /* PDC FS1 regs */ + interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; + #mbox-cells = <1>; + brcm,rx-status-len = <32>; + brcm,use-bcm-hdr; + }; + + pdc2: iproc-pdc2@61300000 { + compatible = "brcm,iproc-pdc-mbox"; + reg = <0x61300000 0x445>; /* PDC FS2 regs */ + interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; + #mbox-cells = <1>; + brcm,rx-status-len = <32>; + brcm,use-bcm-hdr; + }; + + pdc3: iproc-pdc3@61320000 { + compatible = "brcm,iproc-pdc-mbox"; + reg = <0x61320000 0x445>; /* PDC FS3 regs */ + interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; + #mbox-cells = <1>; + brcm,rx-status-len = <32>; + brcm,use-bcm-hdr; + }; + dma0: dma@61360000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x61360000 0x1000>; @@ -248,7 +302,7 @@ <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; - mmu-masters; + #iommu-cells = <1>; }; pinctrl: pinctrl@6501d130 { @@ -565,5 +619,23 @@ brcm,nand-has-wp; }; + + qspi: spi@66470200 { + compatible = "brcm,spi-bcm-qspi", "brcm,spi-ns2-qspi"; + reg = <0x66470200 0x184>, + <0x66470000 0x124>, + <0x67017408 0x004>, + <0x664703a0 0x01c>; + reg-names = "mspi", "bspi", "intr_regs", + "intr_status_reg"; + interrupts = <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "spi_l1_intr"; + clocks = <&iprocmed>; + clock-names = "iprocmed"; + num-cs = <2>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; }; |