diff options
Diffstat (limited to 'dts/src/arm64/exynos/exynos5433.dtsi')
-rw-r--r-- | dts/src/arm64/exynos/exynos5433.dtsi | 177 |
1 files changed, 94 insertions, 83 deletions
diff --git a/dts/src/arm64/exynos/exynos5433.dtsi b/dts/src/arm64/exynos/exynos5433.dtsi index 4422021cf4..7fbbec04bf 100644 --- a/dts/src/arm64/exynos/exynos5433.dtsi +++ b/dts/src/arm64/exynos/exynos5433.dtsi @@ -89,7 +89,6 @@ compatible = "arm,cortex-a53"; enable-method = "psci"; reg = <0x100>; - clock-frequency = <1300000000>; clocks = <&cmu_apollo CLK_SCLK_APOLLO>; clock-names = "apolloclk"; operating-points-v2 = <&cluster_a53_opp_table>; @@ -108,7 +107,6 @@ compatible = "arm,cortex-a53"; enable-method = "psci"; reg = <0x101>; - clock-frequency = <1300000000>; operating-points-v2 = <&cluster_a53_opp_table>; #cooling-cells = <2>; i-cache-size = <0x8000>; @@ -125,7 +123,6 @@ compatible = "arm,cortex-a53"; enable-method = "psci"; reg = <0x102>; - clock-frequency = <1300000000>; operating-points-v2 = <&cluster_a53_opp_table>; #cooling-cells = <2>; i-cache-size = <0x8000>; @@ -142,7 +139,6 @@ compatible = "arm,cortex-a53"; enable-method = "psci"; reg = <0x103>; - clock-frequency = <1300000000>; operating-points-v2 = <&cluster_a53_opp_table>; #cooling-cells = <2>; i-cache-size = <0x8000>; @@ -159,7 +155,6 @@ compatible = "arm,cortex-a57"; enable-method = "psci"; reg = <0x0>; - clock-frequency = <1900000000>; clocks = <&cmu_atlas CLK_SCLK_ATLAS>; clock-names = "atlasclk"; operating-points-v2 = <&cluster_a57_opp_table>; @@ -178,7 +173,6 @@ compatible = "arm,cortex-a57"; enable-method = "psci"; reg = <0x1>; - clock-frequency = <1900000000>; operating-points-v2 = <&cluster_a57_opp_table>; #cooling-cells = <2>; i-cache-size = <0xc000>; @@ -195,7 +189,6 @@ compatible = "arm,cortex-a57"; enable-method = "psci"; reg = <0x2>; - clock-frequency = <1900000000>; operating-points-v2 = <&cluster_a57_opp_table>; #cooling-cells = <2>; i-cache-size = <0xc000>; @@ -212,7 +205,6 @@ compatible = "arm,cortex-a57"; enable-method = "psci"; reg = <0x3>; - clock-frequency = <1900000000>; operating-points-v2 = <&cluster_a57_opp_table>; #cooling-cells = <2>; i-cache-size = <0xc000>; @@ -226,6 +218,8 @@ cluster_a57_l2: l2-cache0 { compatible = "cache"; + cache-level = <2>; + cache-unified; cache-size = <0x200000>; cache-line-size = <64>; cache-sets = <2048>; @@ -233,6 +227,8 @@ cluster_a53_l2: l2-cache1 { compatible = "cache"; + cache-level = <2>; + cache-unified; cache-size = <0x40000>; cache-line-size = <64>; cache-sets = <256>; @@ -355,7 +351,7 @@ compatible = "arm,psci"; method = "smc"; cpu_off = <0x84000002>; - cpu_on = <0xC4000003>; + cpu_on = <0xc4000003>; }; soc: soc@0 { @@ -365,7 +361,8 @@ ranges = <0x0 0x0 0x0 0x18000000>; chipid@10000000 { - compatible = "samsung,exynos4210-chipid"; + compatible = "samsung,exynos5433-chipid", + "samsung,exynos4210-chipid"; reg = <0x10000000 0x100>; }; @@ -806,7 +803,8 @@ }; timer@101c0000 { - compatible = "samsung,exynos4210-mct"; + compatible = "samsung,exynos5433-mct", + "samsung,exynos4210-mct"; reg = <0x101c0000 0x800>; interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, @@ -853,7 +851,8 @@ reg = <0x10580000 0x1a20>, <0x11090000 0x100>; wakeup-interrupt-controller { - compatible = "samsung,exynos7-wakeup-eint"; + compatible = "samsung,exynos5433-wakeup-eint", + "samsung,exynos7-wakeup-eint"; interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; }; }; @@ -914,12 +913,20 @@ }; pmu_system_controller: system-controller@105c0000 { - compatible = "samsung,exynos5433-pmu", "syscon"; + compatible = "samsung,exynos5433-pmu", "simple-mfd", "syscon"; reg = <0x105c0000 0x5008>; #clock-cells = <1>; clock-names = "clkout16"; clocks = <&xxti>; + mipi_phy: mipi-phy { + compatible = "samsung,exynos5433-mipi-video-phy"; + #phy-cells = <1>; + samsung,cam0-sysreg = <&syscon_cam0>; + samsung,cam1-sysreg = <&syscon_cam1>; + samsung,disp-sysreg = <&syscon_disp>; + }; + reboot: syscon-reboot { compatible = "syscon-reboot"; regmap = <&pmu_system_controller>; @@ -939,15 +946,6 @@ interrupts = <GIC_PPI 9 0xf04>; }; - mipi_phy: video-phy { - compatible = "samsung,exynos5433-mipi-video-phy"; - #phy-cells = <1>; - samsung,pmu-syscon = <&pmu_system_controller>; - samsung,cam0-sysreg = <&syscon_cam0>; - samsung,cam1-sysreg = <&syscon_cam1>; - samsung,disp-sysreg = <&syscon_disp>; - }; - decon: decon@13800000 { compatible = "samsung,exynos5433-decon"; reg = <0x13800000 0x2104>; @@ -1023,7 +1021,7 @@ dsi: dsi@13900000 { compatible = "samsung,exynos5433-mipi-dsi"; - reg = <0x13900000 0xC0>; + reg = <0x13900000 0xc0>; interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>; phys = <&mipi_phy 1>; phy-names = "dsim"; @@ -1117,22 +1115,26 @@ }; syscon_disp: syscon@13b80000 { - compatible = "samsung,exynos5433-sysreg", "syscon"; + compatible = "samsung,exynos5433-disp-sysreg", + "samsung,exynos5433-sysreg", "syscon"; reg = <0x13b80000 0x1010>; }; syscon_cam0: syscon@120f0000 { - compatible = "samsung,exynos5433-sysreg", "syscon"; + compatible = "samsung,exynos5433-cam0-sysreg", + "samsung,exynos5433-sysreg", "syscon"; reg = <0x120f0000 0x1020>; }; syscon_cam1: syscon@145f0000 { - compatible = "samsung,exynos5433-sysreg", "syscon"; + compatible = "samsung,exynos5433-cam1-sysreg", + "samsung,exynos5433-sysreg", "syscon"; reg = <0x145f0000 0x1038>; }; syscon_fsys: syscon@156f0000 { - compatible = "samsung,exynos5433-sysreg", "syscon"; + compatible = "samsung,exynos5433-fsys-sysreg", + "samsung,exynos5433-sysreg", "syscon"; reg = <0x156f0000 0x1044>; }; @@ -1271,7 +1273,7 @@ mfc: codec@152e0000 { compatible = "samsung,exynos5433-mfc"; - reg = <0x152E0000 0x10000>; + reg = <0x152e0000 0x10000>; interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; clock-names = "pclk", "aclk", "aclk_xiu"; clocks = <&cmu_mfc CLK_PCLK_MFC>, @@ -1328,7 +1330,7 @@ sysmmu_gscl0: sysmmu@13c80000 { compatible = "samsung,exynos-sysmmu"; - reg = <0x13C80000 0x1000>; + reg = <0x13c80000 0x1000>; interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; clock-names = "aclk", "pclk"; clocks = <&cmu_gscl CLK_ACLK_SMMU_GSCL0>, @@ -1339,7 +1341,7 @@ sysmmu_gscl1: sysmmu@13c90000 { compatible = "samsung,exynos-sysmmu"; - reg = <0x13C90000 0x1000>; + reg = <0x13c90000 0x1000>; interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; clock-names = "aclk", "pclk"; clocks = <&cmu_gscl CLK_ACLK_SMMU_GSCL1>, @@ -1350,7 +1352,7 @@ sysmmu_gscl2: sysmmu@13ca0000 { compatible = "samsung,exynos-sysmmu"; - reg = <0x13CA0000 0x1000>; + reg = <0x13ca0000 0x1000>; interrupts = <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>; clock-names = "aclk", "pclk"; clocks = <&cmu_gscl CLK_ACLK_SMMU_GSCL2>, @@ -1546,7 +1548,7 @@ }; adc: adc@14d10000 { - compatible = "samsung,exynos7-adc"; + compatible = "samsung,exynos5433-adc", "samsung,exynos7-adc"; reg = <0x14d10000 0x100>; interrupts = <GIC_SPI 438 IRQ_TYPE_LEVEL_HIGH>; clock-names = "adc"; @@ -1556,7 +1558,7 @@ }; i2s1: i2s@14d60000 { - compatible = "samsung,exynos7-i2s"; + compatible = "samsung,exynos5433-i2s", "samsung,exynos7-i2s"; reg = <0x14d60000 0x100>; dmas = <&pdma0 31>, <&pdma0 30>; dma-names = "tx", "rx"; @@ -1571,7 +1573,7 @@ }; pwm: pwm@14dd0000 { - compatible = "samsung,exynos4210-pwm"; + compatible = "samsung,exynos5433-pwm", "samsung,exynos4210-pwm"; reg = <0x14dd0000 0x100>; interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, @@ -1585,8 +1587,9 @@ status = "disabled"; }; - hsi2c_0: hsi2c@14e40000 { - compatible = "samsung,exynos7-hsi2c"; + hsi2c_0: i2c@14e40000 { + compatible = "samsung,exynos5433-hsi2c", + "samsung,exynos7-hsi2c"; reg = <0x14e40000 0x1000>; interrupts = <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; @@ -1598,8 +1601,9 @@ status = "disabled"; }; - hsi2c_1: hsi2c@14e50000 { - compatible = "samsung,exynos7-hsi2c"; + hsi2c_1: i2c@14e50000 { + compatible = "samsung,exynos5433-hsi2c", + "samsung,exynos7-hsi2c"; reg = <0x14e50000 0x1000>; interrupts = <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; @@ -1611,8 +1615,9 @@ status = "disabled"; }; - hsi2c_2: hsi2c@14e60000 { - compatible = "samsung,exynos7-hsi2c"; + hsi2c_2: i2c@14e60000 { + compatible = "samsung,exynos5433-hsi2c", + "samsung,exynos7-hsi2c"; reg = <0x14e60000 0x1000>; interrupts = <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; @@ -1624,8 +1629,9 @@ status = "disabled"; }; - hsi2c_3: hsi2c@14e70000 { - compatible = "samsung,exynos7-hsi2c"; + hsi2c_3: i2c@14e70000 { + compatible = "samsung,exynos5433-hsi2c", + "samsung,exynos7-hsi2c"; reg = <0x14e70000 0x1000>; interrupts = <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; @@ -1637,8 +1643,9 @@ status = "disabled"; }; - hsi2c_4: hsi2c@14ec0000 { - compatible = "samsung,exynos7-hsi2c"; + hsi2c_4: i2c@14ec0000 { + compatible = "samsung,exynos5433-hsi2c", + "samsung,exynos7-hsi2c"; reg = <0x14ec0000 0x1000>; interrupts = <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; @@ -1650,8 +1657,9 @@ status = "disabled"; }; - hsi2c_5: hsi2c@14ed0000 { - compatible = "samsung,exynos7-hsi2c"; + hsi2c_5: i2c@14ed0000 { + compatible = "samsung,exynos5433-hsi2c", + "samsung,exynos7-hsi2c"; reg = <0x14ed0000 0x1000>; interrupts = <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; @@ -1663,8 +1671,9 @@ status = "disabled"; }; - hsi2c_6: hsi2c@14ee0000 { - compatible = "samsung,exynos7-hsi2c"; + hsi2c_6: i2c@14ee0000 { + compatible = "samsung,exynos5433-hsi2c", + "samsung,exynos7-hsi2c"; reg = <0x14ee0000 0x1000>; interrupts = <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; @@ -1676,8 +1685,9 @@ status = "disabled"; }; - hsi2c_7: hsi2c@14ef0000 { - compatible = "samsung,exynos7-hsi2c"; + hsi2c_7: i2c@14ef0000 { + compatible = "samsung,exynos5433-hsi2c", + "samsung,exynos7-hsi2c"; reg = <0x14ef0000 0x1000>; interrupts = <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; @@ -1689,8 +1699,9 @@ status = "disabled"; }; - hsi2c_8: hsi2c@14d90000 { - compatible = "samsung,exynos7-hsi2c"; + hsi2c_8: i2c@14d90000 { + compatible = "samsung,exynos5433-hsi2c", + "samsung,exynos7-hsi2c"; reg = <0x14d90000 0x1000>; interrupts = <GIC_SPI 443 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; @@ -1702,8 +1713,9 @@ status = "disabled"; }; - hsi2c_9: hsi2c@14da0000 { - compatible = "samsung,exynos7-hsi2c"; + hsi2c_9: i2c@14da0000 { + compatible = "samsung,exynos5433-hsi2c", + "samsung,exynos7-hsi2c"; reg = <0x14da0000 0x1000>; interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; @@ -1715,8 +1727,9 @@ status = "disabled"; }; - hsi2c_10: hsi2c@14de0000 { - compatible = "samsung,exynos7-hsi2c"; + hsi2c_10: i2c@14de0000 { + compatible = "samsung,exynos5433-hsi2c", + "samsung,exynos7-hsi2c"; reg = <0x14de0000 0x1000>; interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; @@ -1728,8 +1741,9 @@ status = "disabled"; }; - hsi2c_11: hsi2c@14df0000 { - compatible = "samsung,exynos7-hsi2c"; + hsi2c_11: i2c@14df0000 { + compatible = "samsung,exynos5433-hsi2c", + "samsung,exynos7-hsi2c"; reg = <0x14df0000 0x1000>; interrupts = <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; @@ -1741,7 +1755,7 @@ status = "disabled"; }; - usbdrd30: usbdrd { + usbdrd30: usb@15400000 { compatible = "samsung,exynos5433-dwusb3"; clocks = <&cmu_fsys CLK_ACLK_USBDRD30>, <&cmu_fsys CLK_SCLK_USBDRD30>, @@ -1750,16 +1764,16 @@ clock-names = "aclk", "susp_clk", "phyclk", "pipe_pclk"; #address-cells = <1>; #size-cells = <1>; - ranges; + ranges = <0x0 0x15400000 0x10000>; status = "disabled"; - usbdrd_dwc3: usb@15400000 { + usbdrd_dwc3: usb@0 { compatible = "snps,dwc3"; clocks = <&cmu_fsys CLK_SCLK_USBDRD30>, <&cmu_fsys CLK_ACLK_USBDRD30>, <&cmu_fsys CLK_SCLK_USBDRD30>; clock-names = "ref", "bus_early", "suspend"; - reg = <0x15400000 0x10000>; + reg = <0x0 0x10000>; interrupts = <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>; phys = <&usbdrd30_phy 0>, <&usbdrd30_phy 1>; phy-names = "usb2-phy", "usb3-phy"; @@ -1794,7 +1808,7 @@ status = "disabled"; }; - usbhost30: usbhost { + usbhost30: usb@15a00000 { compatible = "samsung,exynos5433-dwusb3"; clocks = <&cmu_fsys CLK_ACLK_USBHOST30>, <&cmu_fsys CLK_SCLK_USBHOST30>, @@ -1803,24 +1817,25 @@ clock-names = "aclk", "susp_clk", "phyclk", "pipe_pclk"; #address-cells = <1>; #size-cells = <1>; - ranges; + ranges = <0x0 0x15a00000 0x10000>; status = "disabled"; - usbhost_dwc3: usb@15a00000 { + usbhost_dwc3: usb@0 { compatible = "snps,dwc3"; clocks = <&cmu_fsys CLK_SCLK_USBHOST30>, <&cmu_fsys CLK_ACLK_USBHOST30>, <&cmu_fsys CLK_SCLK_USBHOST30>; clock-names = "ref", "bus_early", "suspend"; - reg = <0x15a00000 0x10000>; + reg = <0x0 0x10000>; interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>; phys = <&usbhost30_phy 0>, <&usbhost30_phy 1>; phy-names = "usb2-phy", "usb3-phy"; }; }; - mshc_0: mshc@15540000 { - compatible = "samsung,exynos7-dw-mshc-smu"; + mshc_0: mmc@15540000 { + compatible = "samsung,exynos5433-dw-mshc-smu", + "samsung,exynos7-dw-mshc-smu"; interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; @@ -1832,8 +1847,9 @@ status = "disabled"; }; - mshc_1: mshc@15550000 { - compatible = "samsung,exynos7-dw-mshc-smu"; + mshc_1: mmc@15550000 { + compatible = "samsung,exynos5433-dw-mshc-smu", + "samsung,exynos7-dw-mshc-smu"; interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; @@ -1845,8 +1861,9 @@ status = "disabled"; }; - mshc_2: mshc@15560000 { - compatible = "samsung,exynos7-dw-mshc-smu"; + mshc_2: mmc@15560000 { + compatible = "samsung,exynos5433-dw-mshc-smu", + "samsung,exynos7-dw-mshc-smu"; interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; @@ -1858,26 +1875,22 @@ status = "disabled"; }; - pdma0: pdma@15610000 { + pdma0: dma-controller@15610000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x15610000 0x1000>; interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cmu_fsys CLK_PDMA0>; clock-names = "apb_pclk"; #dma-cells = <1>; - #dma-channels = <8>; - #dma-requests = <32>; }; - pdma1: pdma@15600000 { + pdma1: dma-controller@15600000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x15600000 0x1000>; interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cmu_fsys CLK_PDMA1>; clock-names = "apb_pclk"; #dma-cells = <1>; - #dma-channels = <8>; - #dma-requests = <32>; }; audio-subsystem@11400000 { @@ -1885,26 +1898,24 @@ reg = <0x11400000 0x100>, <0x11500000 0x08>; clocks = <&cmu_aud CLK_PCLK_SFR0_CTRL>; clock-names = "sfr0_ctrl"; - samsung,pmu-syscon = <&pmu_system_controller>; power-domains = <&pd_aud>; #address-cells = <1>; #size-cells = <1>; ranges; - adma: adma@11420000 { + adma: dma-controller@11420000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x11420000 0x1000>; interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cmu_aud CLK_ACLK_DMAC>; clock-names = "apb_pclk"; #dma-cells = <1>; - #dma-channels = <8>; - #dma-requests = <32>; power-domains = <&pd_aud>; }; i2s0: i2s@11440000 { - compatible = "samsung,exynos7-i2s"; + compatible = "samsung,exynos5433-i2s", + "samsung,exynos7-i2s"; reg = <0x11440000 0x100>; dmas = <&adma 0>, <&adma 2>; dma-names = "tx", "rx"; |