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-rw-r--r--dts/src/arm64/exynos/exynos5433-tmu-g3d-sensor-conf.dtsi20
-rw-r--r--dts/src/arm64/exynos/exynos5433-tmu-sensor-conf.dtsi19
-rw-r--r--dts/src/arm64/exynos/exynos5433.dtsi14
-rw-r--r--dts/src/arm64/exynos/exynos7-tmu-sensor-conf.dtsi21
-rw-r--r--dts/src/arm64/exynos/exynos7.dtsi2
5 files changed, 8 insertions, 68 deletions
diff --git a/dts/src/arm64/exynos/exynos5433-tmu-g3d-sensor-conf.dtsi b/dts/src/arm64/exynos/exynos5433-tmu-g3d-sensor-conf.dtsi
deleted file mode 100644
index f080357..0000000
--- a/dts/src/arm64/exynos/exynos5433-tmu-g3d-sensor-conf.dtsi
+++ /dev/null
@@ -1,20 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Device tree sources for Exynos5433 TMU sensor configuration
- *
- * Copyright (c) 2016 Jonghwa Lee <jonghwa3.lee@samsung.com>
- */
-
-#include <dt-bindings/thermal/thermal_exynos.h>
-
-#thermal-sensor-cells = <0>;
-samsung,tmu_gain = <8>;
-samsung,tmu_reference_voltage = <23>;
-samsung,tmu_noise_cancel_mode = <4>;
-samsung,tmu_efuse_value = <75>;
-samsung,tmu_min_efuse_value = <40>;
-samsung,tmu_max_efuse_value = <150>;
-samsung,tmu_first_point_trim = <25>;
-samsung,tmu_second_point_trim = <85>;
-samsung,tmu_default_temp_offset = <50>;
-samsung,tmu_mux_addr = <6>;
diff --git a/dts/src/arm64/exynos/exynos5433-tmu-sensor-conf.dtsi b/dts/src/arm64/exynos/exynos5433-tmu-sensor-conf.dtsi
deleted file mode 100644
index cccae66..0000000
--- a/dts/src/arm64/exynos/exynos5433-tmu-sensor-conf.dtsi
+++ /dev/null
@@ -1,19 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Device tree sources for Exynos5433 TMU sensor configuration
- *
- * Copyright (c) 2016 Chanwoo Choi <cw00.choi@samsung.com>
- */
-
-#include <dt-bindings/thermal/thermal_exynos.h>
-
-#thermal-sensor-cells = <0>;
-samsung,tmu_gain = <8>;
-samsung,tmu_reference_voltage = <16>;
-samsung,tmu_noise_cancel_mode = <4>;
-samsung,tmu_efuse_value = <75>;
-samsung,tmu_min_efuse_value = <40>;
-samsung,tmu_max_efuse_value = <150>;
-samsung,tmu_first_point_trim = <25>;
-samsung,tmu_second_point_trim = <85>;
-samsung,tmu_default_temp_offset = <50>;
diff --git a/dts/src/arm64/exynos/exynos5433.dtsi b/dts/src/arm64/exynos/exynos5433.dtsi
index 038c997..2131f12 100644
--- a/dts/src/arm64/exynos/exynos5433.dtsi
+++ b/dts/src/arm64/exynos/exynos5433.dtsi
@@ -630,7 +630,7 @@
clocks = <&cmu_peris CLK_PCLK_TMU0_APBIF>,
<&cmu_peris CLK_SCLK_TMU0>;
clock-names = "tmu_apbif", "tmu_sclk";
- #include "exynos5433-tmu-sensor-conf.dtsi"
+ #thermal-sensor-cells = <0>;
status = "disabled";
};
@@ -641,7 +641,7 @@
clocks = <&cmu_peris CLK_PCLK_TMU0_APBIF>,
<&cmu_peris CLK_SCLK_TMU0>;
clock-names = "tmu_apbif", "tmu_sclk";
- #include "exynos5433-tmu-sensor-conf.dtsi"
+ #thermal-sensor-cells = <0>;
status = "disabled";
};
@@ -652,7 +652,7 @@
clocks = <&cmu_peris CLK_PCLK_TMU1_APBIF>,
<&cmu_peris CLK_SCLK_TMU1>;
clock-names = "tmu_apbif", "tmu_sclk";
- #include "exynos5433-tmu-g3d-sensor-conf.dtsi"
+ #thermal-sensor-cells = <0>;
status = "disabled";
};
@@ -663,7 +663,7 @@
clocks = <&cmu_peris CLK_PCLK_TMU1_APBIF>,
<&cmu_peris CLK_SCLK_TMU1>;
clock-names = "tmu_apbif", "tmu_sclk";
- #include "exynos5433-tmu-sensor-conf.dtsi"
+ #thermal-sensor-cells = <0>;
status = "disabled";
};
@@ -674,7 +674,7 @@
clocks = <&cmu_peris CLK_PCLK_TMU1_APBIF>,
<&cmu_peris CLK_SCLK_TMU1>;
clock-names = "tmu_apbif", "tmu_sclk";
- #include "exynos5433-tmu-sensor-conf.dtsi"
+ #thermal-sensor-cells = <0>;
status = "disabled";
};
@@ -1171,7 +1171,7 @@
power-domains = <&pd_gscl>;
};
- sysmmu_scaler_0: sysmmu@0x15040000 {
+ sysmmu_scaler_0: sysmmu@15040000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x15040000 0x1000>;
interrupts = <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>;
@@ -1182,7 +1182,7 @@
power-domains = <&pd_mscl>;
};
- sysmmu_scaler_1: sysmmu@0x15050000 {
+ sysmmu_scaler_1: sysmmu@15050000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x15050000 0x1000>;
interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/dts/src/arm64/exynos/exynos7-tmu-sensor-conf.dtsi b/dts/src/arm64/exynos/exynos7-tmu-sensor-conf.dtsi
deleted file mode 100644
index 4849471..0000000
--- a/dts/src/arm64/exynos/exynos7-tmu-sensor-conf.dtsi
+++ /dev/null
@@ -1,21 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Device tree sources for Exynos7 TMU sensor configuration
- *
- * Copyright (c) 2016 Samsung Electronics Co., Ltd.
- * http://www.samsung.com
- */
-
-#include <dt-bindings/thermal/thermal_exynos.h>
-
-#thermal-sensor-cells = <0>;
-samsung,tmu_gain = <9>;
-samsung,tmu_reference_voltage = <17>;
-samsung,tmu_noise_cancel_mode = <4>;
-samsung,tmu_efuse_value = <75>;
-samsung,tmu_min_efuse_value = <15>;
-samsung,tmu_max_efuse_value = <100>;
-samsung,tmu_first_point_trim = <25>;
-samsung,tmu_second_point_trim = <85>;
-samsung,tmu_default_temp_offset = <50>;
-samsung,tmu_cal_type = <TYPE_ONE_POINT_TRIMMING>;
diff --git a/dts/src/arm64/exynos/exynos7.dtsi b/dts/src/arm64/exynos/exynos7.dtsi
index 93a8433..75ad724 100644
--- a/dts/src/arm64/exynos/exynos7.dtsi
+++ b/dts/src/arm64/exynos/exynos7.dtsi
@@ -589,7 +589,7 @@
clocks = <&clock_peris PCLK_TMU>,
<&clock_peris SCLK_TMU>;
clock-names = "tmu_apbif", "tmu_sclk";
- #include "exynos7-tmu-sensor-conf.dtsi"
+ #thermal-sensor-cells = <0>;
};
thermal-zones {