diff options
Diffstat (limited to 'dts/src/arm64/freescale/imx8mm-ddr4-evk.dts')
| -rw-r--r-- | dts/src/arm64/freescale/imx8mm-ddr4-evk.dts | 57 |
1 files changed, 57 insertions, 0 deletions
diff --git a/dts/src/arm64/freescale/imx8mm-ddr4-evk.dts b/dts/src/arm64/freescale/imx8mm-ddr4-evk.dts new file mode 100644 index 0000000000..6c079c0a3a --- /dev/null +++ b/dts/src/arm64/freescale/imx8mm-ddr4-evk.dts @@ -0,0 +1,57 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2020 NXP + */ + +/dts-v1/; + +#include "imx8mm-evk.dtsi" + +/ { + model = "FSL i.MX8MM DDR4 EVK with CYW43455 WIFI/BT board"; + compatible = "fsl,imx8mm-ddr4-evk", "fsl,imx8mm"; + + leds { + pinctrl-0 = <&pinctrl_gpio_led_2>; + + status { + gpios = <&gpio3 4 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&gpmi { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpmi_nand>; + nand-on-flash-bbt; + status = "okay"; +}; + +&iomuxc { + pinctrl_gpmi_nand: gpmi-nand { + fsl,pins = < + MX8MM_IOMUXC_NAND_ALE_RAWNAND_ALE 0x00000096 + MX8MM_IOMUXC_NAND_CE0_B_RAWNAND_CE0_B 0x00000096 + MX8MM_IOMUXC_NAND_CE1_B_RAWNAND_CE1_B 0x00000096 + MX8MM_IOMUXC_NAND_CLE_RAWNAND_CLE 0x00000096 + MX8MM_IOMUXC_NAND_DATA00_RAWNAND_DATA00 0x00000096 + MX8MM_IOMUXC_NAND_DATA01_RAWNAND_DATA01 0x00000096 + MX8MM_IOMUXC_NAND_DATA02_RAWNAND_DATA02 0x00000096 + MX8MM_IOMUXC_NAND_DATA03_RAWNAND_DATA03 0x00000096 + MX8MM_IOMUXC_NAND_DATA04_RAWNAND_DATA04 0x00000096 + MX8MM_IOMUXC_NAND_DATA05_RAWNAND_DATA05 0x00000096 + MX8MM_IOMUXC_NAND_DATA06_RAWNAND_DATA06 0x00000096 + MX8MM_IOMUXC_NAND_DATA07_RAWNAND_DATA07 0x00000096 + MX8MM_IOMUXC_NAND_RE_B_RAWNAND_RE_B 0x00000096 + MX8MM_IOMUXC_NAND_READY_B_RAWNAND_READY_B 0x00000056 + MX8MM_IOMUXC_NAND_WE_B_RAWNAND_WE_B 0x00000096 + MX8MM_IOMUXC_NAND_WP_B_RAWNAND_WP_B 0x00000096 + >; + }; + + pinctrl_gpio_led_2: gpioled2grp { + fsl,pins = < + MX8MM_IOMUXC_NAND_CE3_B_GPIO3_IO4 0x19 + >; + }; +}; |