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Diffstat (limited to 'dts/src/arm64/freescale/imx8mm-tqma8mqml-mba8mx.dts')
-rw-r--r--dts/src/arm64/freescale/imx8mm-tqma8mqml-mba8mx.dts19
1 files changed, 19 insertions, 0 deletions
diff --git a/dts/src/arm64/freescale/imx8mm-tqma8mqml-mba8mx.dts b/dts/src/arm64/freescale/imx8mm-tqma8mqml-mba8mx.dts
index 7844878788..286d2df01c 100644
--- a/dts/src/arm64/freescale/imx8mm-tqma8mqml-mba8mx.dts
+++ b/dts/src/arm64/freescale/imx8mm-tqma8mqml-mba8mx.dts
@@ -5,6 +5,7 @@
/dts-v1/;
+#include <dt-bindings/phy/phy-imx8-pcie.h>
#include "imx8mm-tqma8mqml.dtsi"
#include "mba8mx.dtsi"
@@ -58,6 +59,24 @@
};
};
+&pcie_phy {
+ clocks = <&pcie0_refclk>;
+ status = "okay";
+};
+
+&pcie0 {
+ reset-gpio = <&expander0 14 GPIO_ACTIVE_LOW>;
+ clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk IMX8MM_CLK_PCIE1_AUX>,
+ <&pcie0_refclk>;
+ clock-names = "pcie", "pcie_aux", "pcie_bus";
+ assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
+ <&clk IMX8MM_CLK_PCIE1_CTRL>;
+ assigned-clock-rates = <10000000>, <250000000>;
+ assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
+ <&clk IMX8MM_SYS_PLL2_250M>;
+ status = "okay";
+};
+
&sai3 {
assigned-clocks = <&clk IMX8MM_CLK_SAI3>;
assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;