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Diffstat (limited to 'dts/src/arm64/freescale/imx8mq-kontron-pitx-imx8m.dts')
-rw-r--r--dts/src/arm64/freescale/imx8mq-kontron-pitx-imx8m.dts16
1 files changed, 7 insertions, 9 deletions
diff --git a/dts/src/arm64/freescale/imx8mq-kontron-pitx-imx8m.dts b/dts/src/arm64/freescale/imx8mq-kontron-pitx-imx8m.dts
index f593e4ff62..d8cf1f27c3 100644
--- a/dts/src/arm64/freescale/imx8mq-kontron-pitx-imx8m.dts
+++ b/dts/src/arm64/freescale/imx8mq-kontron-pitx-imx8m.dts
@@ -65,7 +65,7 @@
status = "okay";
tpm@0 {
- compatible = "infineon,slb9670";
+ compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
reg = <0>;
spi-max-frequency = <43000000>;
};
@@ -245,20 +245,18 @@
pinctrl-0 = <&pinctrl_pcie0>;
reset-gpio = <&gpio1 9 GPIO_ACTIVE_LOW>;
clocks = <&clk IMX8MQ_CLK_PCIE1_ROOT>,
- <&clk IMX8MQ_CLK_PCIE1_AUX>,
+ <&pcie0_refclk>,
<&clk IMX8MQ_CLK_PCIE1_PHY>,
- <&pcie0_refclk>;
- clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
+ <&clk IMX8MQ_CLK_PCIE1_AUX>;
status = "okay";
};
/* Intel Ethernet Controller I210/I211 */
&pcie1 {
clocks = <&clk IMX8MQ_CLK_PCIE2_ROOT>,
- <&clk IMX8MQ_CLK_PCIE2_AUX>,
+ <&pcie1_refclk>,
<&clk IMX8MQ_CLK_PCIE2_PHY>,
- <&pcie1_refclk>;
- clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
+ <&clk IMX8MQ_CLK_PCIE2_AUX>;
fsl,max-link-speed = <1>;
status = "okay";
};
@@ -281,7 +279,7 @@
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
- spi-tx-bus-width = <4>;
+ spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
m25p,fast-read;
spi-max-frequency = <50000000>;
@@ -311,7 +309,7 @@
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;
- fsl,uart-has-rtscts;
+ uart-has-rtscts;
assigned-clocks = <&clk IMX8MQ_CLK_UART3>;
assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_80M>;
status = "okay";