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-rw-r--r--dts/src/arm64/hisilicon/hip07.dtsi178
1 files changed, 89 insertions, 89 deletions
diff --git a/dts/src/arm64/hisilicon/hip07.dtsi b/dts/src/arm64/hisilicon/hip07.dtsi
index 4773a533fc..7832d9cdec 100644
--- a/dts/src/arm64/hisilicon/hip07.dtsi
+++ b/dts/src/arm64/hisilicon/hip07.dtsi
@@ -924,56 +924,56 @@
<0x0 0xfe020000 0x0 0x10000>; /* GICV */
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
- p0_its_peri_a: interrupt-controller@4c000000 {
+ p0_its_peri_a: msi-controller@4c000000 {
compatible = "arm,gic-v3-its";
msi-controller;
#msi-cells = <1>;
reg = <0x0 0x4c000000 0x0 0x40000>;
};
- p0_its_peri_b: interrupt-controller@6c000000 {
+ p0_its_peri_b: msi-controller@6c000000 {
compatible = "arm,gic-v3-its";
msi-controller;
#msi-cells = <1>;
reg = <0x0 0x6c000000 0x0 0x40000>;
};
- p0_its_dsa_a: interrupt-controller@c6000000 {
+ p0_its_dsa_a: msi-controller@c6000000 {
compatible = "arm,gic-v3-its";
msi-controller;
#msi-cells = <1>;
reg = <0x0 0xc6000000 0x0 0x40000>;
};
- p0_its_dsa_b: interrupt-controller@8,c6000000 {
+ p0_its_dsa_b: msi-controller@8c6000000 {
compatible = "arm,gic-v3-its";
msi-controller;
#msi-cells = <1>;
reg = <0x8 0xc6000000 0x0 0x40000>;
};
- p1_its_peri_a: interrupt-controller@400,4c000000 {
+ p1_its_peri_a: msi-controller@4004c000000 {
compatible = "arm,gic-v3-its";
msi-controller;
#msi-cells = <1>;
reg = <0x400 0x4c000000 0x0 0x40000>;
};
- p1_its_peri_b: interrupt-controller@400,6c000000 {
+ p1_its_peri_b: msi-controller@4006c000000 {
compatible = "arm,gic-v3-its";
msi-controller;
#msi-cells = <1>;
reg = <0x400 0x6c000000 0x0 0x40000>;
};
- p1_its_dsa_a: interrupt-controller@400,c6000000 {
+ p1_its_dsa_a: msi-controller@400c6000000 {
compatible = "arm,gic-v3-its";
msi-controller;
#msi-cells = <1>;
reg = <0x400 0xc6000000 0x0 0x40000>;
};
- p1_its_dsa_b: interrupt-controller@408,c6000000 {
+ p1_its_dsa_b: msi-controller@408c6000000 {
compatible = "arm,gic-v3-its";
msi-controller;
#msi-cells = <1>;
@@ -1161,7 +1161,7 @@
* when iommu-map entry is used along with the PCIe node.
* Refer:https://www.spinics.net/lists/arm-kernel/msg602812.html
*/
- smmu0: smmu_pcie {
+ smmu0: iommu@a0040000 {
compatible = "arm,smmu-v3";
reg = <0x0 0xa0040000 0x0 0x20000>;
#iommu-cells = <1>;
@@ -1170,7 +1170,7 @@
hisilicon,broken-prefetch-cmd;
status = "disabled";
};
- p0_smmu_alg_a: smmu_alg@d0040000 {
+ p0_smmu_alg_a: iommu@d0040000 {
compatible = "arm,smmu-v3";
reg = <0x0 0xd0040000 0x0 0x20000>;
interrupt-parent = <&p0_mbigen_smmu_alg_a>;
@@ -1183,7 +1183,7 @@
hisilicon,broken-prefetch-cmd;
/* smmu-cb-memtype = <0x0 0x1>;*/
};
- p0_smmu_alg_b: smmu_alg@8,d0040000 {
+ p0_smmu_alg_b: iommu@8d0040000 {
compatible = "arm,smmu-v3";
reg = <0x8 0xd0040000 0x0 0x20000>;
interrupt-parent = <&p0_mbigen_smmu_alg_b>;
@@ -1196,7 +1196,7 @@
hisilicon,broken-prefetch-cmd;
/* smmu-cb-memtype = <0x0 0x1>;*/
};
- p1_smmu_alg_a: smmu_alg@400,d0040000 {
+ p1_smmu_alg_a: iommu@400d0040000 {
compatible = "arm,smmu-v3";
reg = <0x400 0xd0040000 0x0 0x20000>;
interrupt-parent = <&p1_mbigen_smmu_alg_a>;
@@ -1209,7 +1209,7 @@
hisilicon,broken-prefetch-cmd;
/* smmu-cb-memtype = <0x0 0x1>;*/
};
- p1_smmu_alg_b: smmu_alg@408,d0040000 {
+ p1_smmu_alg_b: iommu@408d0040000 {
compatible = "arm,smmu-v3";
reg = <0x408 0xd0040000 0x0 0x20000>;
interrupt-parent = <&p1_mbigen_smmu_alg_b>;
@@ -1253,7 +1253,7 @@
status = "disabled";
};
- usb_ohci: ohci@a7030000 {
+ usb_ohci: usb@a7030000 {
compatible = "generic-ohci";
reg = <0x0 0xa7030000 0x0 0x10000>;
interrupt-parent = <&mbigen_usb>;
@@ -1262,7 +1262,7 @@
status = "disabled";
};
- usb_ehci: ehci@a7020000 {
+ usb_ehci: usb@a7020000 {
compatible = "generic-ehci";
reg = <0x0 0xa7020000 0x0 0x10000>;
interrupt-parent = <&mbigen_usb>;
@@ -1321,8 +1321,8 @@
#size-cells = <0>;
compatible = "hisilicon,hns-dsaf-v2";
mode = "6port-16rss";
- reg = <0x0 0xc5000000 0x0 0x890000
- 0x0 0xc7000000 0x0 0x600000>;
+ reg = <0x0 0xc5000000 0x0 0x890000>,
+ <0x0 0xc7000000 0x0 0x600000>;
reg-names = "ppe-base", "dsaf-base";
interrupt-parent = <&mbigen_dsaf0>;
subctrl-syscon = <&dsa_subctrl>;
@@ -1720,24 +1720,24 @@
};
p0_sec_a: crypto@d2000000 {
compatible = "hisilicon,hip07-sec";
- reg = <0x0 0xd0000000 0x0 0x10000
- 0x0 0xd2000000 0x0 0x10000
- 0x0 0xd2010000 0x0 0x10000
- 0x0 0xd2020000 0x0 0x10000
- 0x0 0xd2030000 0x0 0x10000
- 0x0 0xd2040000 0x0 0x10000
- 0x0 0xd2050000 0x0 0x10000
- 0x0 0xd2060000 0x0 0x10000
- 0x0 0xd2070000 0x0 0x10000
- 0x0 0xd2080000 0x0 0x10000
- 0x0 0xd2090000 0x0 0x10000
- 0x0 0xd20a0000 0x0 0x10000
- 0x0 0xd20b0000 0x0 0x10000
- 0x0 0xd20c0000 0x0 0x10000
- 0x0 0xd20d0000 0x0 0x10000
- 0x0 0xd20e0000 0x0 0x10000
- 0x0 0xd20f0000 0x0 0x10000
- 0x0 0xd2100000 0x0 0x10000>;
+ reg = <0x0 0xd0000000 0x0 0x10000>,
+ <0x0 0xd2000000 0x0 0x10000>,
+ <0x0 0xd2010000 0x0 0x10000>,
+ <0x0 0xd2020000 0x0 0x10000>,
+ <0x0 0xd2030000 0x0 0x10000>,
+ <0x0 0xd2040000 0x0 0x10000>,
+ <0x0 0xd2050000 0x0 0x10000>,
+ <0x0 0xd2060000 0x0 0x10000>,
+ <0x0 0xd2070000 0x0 0x10000>,
+ <0x0 0xd2080000 0x0 0x10000>,
+ <0x0 0xd2090000 0x0 0x10000>,
+ <0x0 0xd20a0000 0x0 0x10000>,
+ <0x0 0xd20b0000 0x0 0x10000>,
+ <0x0 0xd20c0000 0x0 0x10000>,
+ <0x0 0xd20d0000 0x0 0x10000>,
+ <0x0 0xd20e0000 0x0 0x10000>,
+ <0x0 0xd20f0000 0x0 0x10000>,
+ <0x0 0xd2100000 0x0 0x10000>;
interrupt-parent = <&p0_mbigen_sec_a>;
iommus = <&p0_smmu_alg_a 0x600>;
dma-coherent;
@@ -1761,24 +1761,24 @@
};
p0_sec_b: crypto@8,d2000000 {
compatible = "hisilicon,hip07-sec";
- reg = <0x8 0xd0000000 0x0 0x10000
- 0x8 0xd2000000 0x0 0x10000
- 0x8 0xd2010000 0x0 0x10000
- 0x8 0xd2020000 0x0 0x10000
- 0x8 0xd2030000 0x0 0x10000
- 0x8 0xd2040000 0x0 0x10000
- 0x8 0xd2050000 0x0 0x10000
- 0x8 0xd2060000 0x0 0x10000
- 0x8 0xd2070000 0x0 0x10000
- 0x8 0xd2080000 0x0 0x10000
- 0x8 0xd2090000 0x0 0x10000
- 0x8 0xd20a0000 0x0 0x10000
- 0x8 0xd20b0000 0x0 0x10000
- 0x8 0xd20c0000 0x0 0x10000
- 0x8 0xd20d0000 0x0 0x10000
- 0x8 0xd20e0000 0x0 0x10000
- 0x8 0xd20f0000 0x0 0x10000
- 0x8 0xd2100000 0x0 0x10000>;
+ reg = <0x8 0xd0000000 0x0 0x10000>,
+ <0x8 0xd2000000 0x0 0x10000>,
+ <0x8 0xd2010000 0x0 0x10000>,
+ <0x8 0xd2020000 0x0 0x10000>,
+ <0x8 0xd2030000 0x0 0x10000>,
+ <0x8 0xd2040000 0x0 0x10000>,
+ <0x8 0xd2050000 0x0 0x10000>,
+ <0x8 0xd2060000 0x0 0x10000>,
+ <0x8 0xd2070000 0x0 0x10000>,
+ <0x8 0xd2080000 0x0 0x10000>,
+ <0x8 0xd2090000 0x0 0x10000>,
+ <0x8 0xd20a0000 0x0 0x10000>,
+ <0x8 0xd20b0000 0x0 0x10000>,
+ <0x8 0xd20c0000 0x0 0x10000>,
+ <0x8 0xd20d0000 0x0 0x10000>,
+ <0x8 0xd20e0000 0x0 0x10000>,
+ <0x8 0xd20f0000 0x0 0x10000>,
+ <0x8 0xd2100000 0x0 0x10000>;
interrupt-parent = <&p0_mbigen_sec_b>;
iommus = <&p0_smmu_alg_b 0x600>;
dma-coherent;
@@ -1802,24 +1802,24 @@
};
p1_sec_a: crypto@400,d2000000 {
compatible = "hisilicon,hip07-sec";
- reg = <0x400 0xd0000000 0x0 0x10000
- 0x400 0xd2000000 0x0 0x10000
- 0x400 0xd2010000 0x0 0x10000
- 0x400 0xd2020000 0x0 0x10000
- 0x400 0xd2030000 0x0 0x10000
- 0x400 0xd2040000 0x0 0x10000
- 0x400 0xd2050000 0x0 0x10000
- 0x400 0xd2060000 0x0 0x10000
- 0x400 0xd2070000 0x0 0x10000
- 0x400 0xd2080000 0x0 0x10000
- 0x400 0xd2090000 0x0 0x10000
- 0x400 0xd20a0000 0x0 0x10000
- 0x400 0xd20b0000 0x0 0x10000
- 0x400 0xd20c0000 0x0 0x10000
- 0x400 0xd20d0000 0x0 0x10000
- 0x400 0xd20e0000 0x0 0x10000
- 0x400 0xd20f0000 0x0 0x10000
- 0x400 0xd2100000 0x0 0x10000>;
+ reg = <0x400 0xd0000000 0x0 0x10000>,
+ <0x400 0xd2000000 0x0 0x10000>,
+ <0x400 0xd2010000 0x0 0x10000>,
+ <0x400 0xd2020000 0x0 0x10000>,
+ <0x400 0xd2030000 0x0 0x10000>,
+ <0x400 0xd2040000 0x0 0x10000>,
+ <0x400 0xd2050000 0x0 0x10000>,
+ <0x400 0xd2060000 0x0 0x10000>,
+ <0x400 0xd2070000 0x0 0x10000>,
+ <0x400 0xd2080000 0x0 0x10000>,
+ <0x400 0xd2090000 0x0 0x10000>,
+ <0x400 0xd20a0000 0x0 0x10000>,
+ <0x400 0xd20b0000 0x0 0x10000>,
+ <0x400 0xd20c0000 0x0 0x10000>,
+ <0x400 0xd20d0000 0x0 0x10000>,
+ <0x400 0xd20e0000 0x0 0x10000>,
+ <0x400 0xd20f0000 0x0 0x10000>,
+ <0x400 0xd2100000 0x0 0x10000>;
interrupt-parent = <&p1_mbigen_sec_a>;
iommus = <&p1_smmu_alg_a 0x600>;
dma-coherent;
@@ -1843,24 +1843,24 @@
};
p1_sec_b: crypto@408,d2000000 {
compatible = "hisilicon,hip07-sec";
- reg = <0x408 0xd0000000 0x0 0x10000
- 0x408 0xd2000000 0x0 0x10000
- 0x408 0xd2010000 0x0 0x10000
- 0x408 0xd2020000 0x0 0x10000
- 0x408 0xd2030000 0x0 0x10000
- 0x408 0xd2040000 0x0 0x10000
- 0x408 0xd2050000 0x0 0x10000
- 0x408 0xd2060000 0x0 0x10000
- 0x408 0xd2070000 0x0 0x10000
- 0x408 0xd2080000 0x0 0x10000
- 0x408 0xd2090000 0x0 0x10000
- 0x408 0xd20a0000 0x0 0x10000
- 0x408 0xd20b0000 0x0 0x10000
- 0x408 0xd20c0000 0x0 0x10000
- 0x408 0xd20d0000 0x0 0x10000
- 0x408 0xd20e0000 0x0 0x10000
- 0x408 0xd20f0000 0x0 0x10000
- 0x408 0xd2100000 0x0 0x10000>;
+ reg = <0x408 0xd0000000 0x0 0x10000>,
+ <0x408 0xd2000000 0x0 0x10000>,
+ <0x408 0xd2010000 0x0 0x10000>,
+ <0x408 0xd2020000 0x0 0x10000>,
+ <0x408 0xd2030000 0x0 0x10000>,
+ <0x408 0xd2040000 0x0 0x10000>,
+ <0x408 0xd2050000 0x0 0x10000>,
+ <0x408 0xd2060000 0x0 0x10000>,
+ <0x408 0xd2070000 0x0 0x10000>,
+ <0x408 0xd2080000 0x0 0x10000>,
+ <0x408 0xd2090000 0x0 0x10000>,
+ <0x408 0xd20a0000 0x0 0x10000>,
+ <0x408 0xd20b0000 0x0 0x10000>,
+ <0x408 0xd20c0000 0x0 0x10000>,
+ <0x408 0xd20d0000 0x0 0x10000>,
+ <0x408 0xd20e0000 0x0 0x10000>,
+ <0x408 0xd20f0000 0x0 0x10000>,
+ <0x408 0xd2100000 0x0 0x10000>;
interrupt-parent = <&p1_mbigen_sec_b>;
iommus = <&p1_smmu_alg_b 0x600>;
dma-coherent;
generated by cgit v1.2.3 (git 2.39.1) at 2024-04-20 01:05:08 +0000