diff options
Diffstat (limited to 'dts/src/arm64/intel/socfpga_agilex_socdk.dts')
-rw-r--r-- | dts/src/arm64/intel/socfpga_agilex_socdk.dts | 31 |
1 files changed, 18 insertions, 13 deletions
diff --git a/dts/src/arm64/intel/socfpga_agilex_socdk.dts b/dts/src/arm64/intel/socfpga_agilex_socdk.dts index 51d948323b..ad99aefeb1 100644 --- a/dts/src/arm64/intel/socfpga_agilex_socdk.dts +++ b/dts/src/arm64/intel/socfpga_agilex_socdk.dts @@ -6,6 +6,7 @@ / { model = "SoCFPGA Agilex SoCDK"; + compatible = "intel,socfpga-agilex-socdk", "intel,socfpga-agilex"; aliases { serial0 = &uart0; @@ -20,26 +21,26 @@ leds { compatible = "gpio-leds"; - hps0 { + led0 { label = "hps_led0"; gpios = <&portb 20 GPIO_ACTIVE_HIGH>; }; - hps1 { + led1 { label = "hps_led1"; gpios = <&portb 19 GPIO_ACTIVE_HIGH>; }; - hps2 { + led2 { label = "hps_led2"; gpios = <&portb 21 GPIO_ACTIVE_HIGH>; }; }; - memory { + memory@80000000 { device_type = "memory"; /* We expect the bootloader to fill in the reg */ - reg = <0 0 0 0>; + reg = <0 0x80000000 0 0>; }; }; @@ -82,6 +83,11 @@ cap-sd-highspeed; broken-cd; bus-width = <4>; + clk-phase-sd-hs = <0>, <135>; +}; + +&osc1 { + clock-frequency = <25000000>; }; &uart0 { @@ -98,17 +104,16 @@ }; &qspi { + status = "okay"; flash@0 { #address-cells = <1>; #size-cells = <1>; - compatible = "mt25qu02g"; + compatible = "micron,mt25qu02g", "jedec,spi-nor"; reg = <0>; spi-max-frequency = <100000000>; m25p,fast-read; - cdns,page-size = <256>; - cdns,block-size = <16>; - cdns,read-delay = <1>; + cdns,read-delay = <2>; cdns,tshsl-ns = <50>; cdns,tsd2d-ns = <50>; cdns,tchsh-ns = <4>; @@ -121,12 +126,12 @@ qspi_boot: partition@0 { label = "Boot and fpga data"; - reg = <0x0 0x03FE0000>; + reg = <0x0 0x04200000>; }; - qspi_rootfs: partition@3FE0000 { - label = "Root Filesystem - JFFS2"; - reg = <0x03FE0000 0x0C020000>; + root: partition@4200000 { + label = "Root Filesystem - UBIFS"; + reg = <0x04200000 0x0BE00000>; }; }; }; |