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Diffstat (limited to 'dts/src/arm64/intel/socfpga_n5x_socdk.dts')
-rw-r--r--dts/src/arm64/intel/socfpga_n5x_socdk.dts53
1 files changed, 53 insertions, 0 deletions
diff --git a/dts/src/arm64/intel/socfpga_n5x_socdk.dts b/dts/src/arm64/intel/socfpga_n5x_socdk.dts
new file mode 100644
index 0000000000..5f56e2697f
--- /dev/null
+++ b/dts/src/arm64/intel/socfpga_n5x_socdk.dts
@@ -0,0 +1,53 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2021, Intel Corporation
+ */
+#include "socfpga_agilex.dtsi"
+
+/ {
+ model = "eASIC N5X SoCDK";
+
+ aliases {
+ serial0 = &uart0;
+ ethernet0 = &gmac0;
+ ethernet1 = &gmac1;
+ ethernet2 = &gmac2;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory {
+ device_type = "memory";
+ /* We expect the bootloader to fill in the reg */
+ reg = <0 0 0 0>;
+ };
+
+ soc {
+ clocks {
+ osc1 {
+ clock-frequency = <25000000>;
+ };
+ };
+ };
+};
+
+&clkmgr {
+ compatible = "intel,easic-n5x-clkmgr";
+};
+
+&mmc {
+ status = "okay";
+ cap-sd-highspeed;
+ broken-cd;
+ bus-width = <4>;
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&watchdog0 {
+ status = "okay";
+};