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-rw-r--r--dts/src/arm64/marvell/armada-3720-db.dts32
-rw-r--r--dts/src/arm64/marvell/armada-372x.dtsi1
-rw-r--r--dts/src/arm64/marvell/armada-37xx.dtsi20
-rw-r--r--dts/src/arm64/marvell/armada-7020.dtsi1
-rw-r--r--dts/src/arm64/marvell/armada-7040-db.dts108
-rw-r--r--dts/src/arm64/marvell/armada-7040.dtsi1
-rw-r--r--dts/src/arm64/marvell/armada-8020.dtsi1
-rw-r--r--dts/src/arm64/marvell/armada-8040.dtsi1
-rw-r--r--dts/src/arm64/marvell/armada-ap806-dual.dtsi1
-rw-r--r--dts/src/arm64/marvell/armada-ap806-quad.dtsi2
-rw-r--r--dts/src/arm64/marvell/armada-ap806.dtsi56
-rw-r--r--dts/src/arm64/marvell/armada-cp110-master.dtsi228
12 files changed, 367 insertions, 85 deletions
diff --git a/dts/src/arm64/marvell/armada-3720-db.dts b/dts/src/arm64/marvell/armada-3720-db.dts
index 3590501545..86110a6ae3 100644
--- a/dts/src/arm64/marvell/armada-3720-db.dts
+++ b/dts/src/arm64/marvell/armada-3720-db.dts
@@ -60,27 +60,19 @@
device_type = "memory";
reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
};
+};
- soc {
- internal-regs {
- /*
- * Exported on the micro USB connector CON32
- * through an FTDI
- */
- uart0: serial@12000 {
- status = "okay";
- };
-
- /* CON31 */
- usb3@58000 {
- status = "okay";
- };
+/* CON3 */
+&sata {
+ status = "okay";
+};
- /* CON3 */
- sata@e0000 {
- status = "okay";
- };
- };
- };
+/* Exported on the micro USB connector CON32 through an FTDI */
+&uart0 {
+ status = "okay";
};
+/* CON31 */
+&usb3 {
+ status = "okay";
+};
diff --git a/dts/src/arm64/marvell/armada-372x.dtsi b/dts/src/arm64/marvell/armada-372x.dtsi
index f292a00ce9..5120296596 100644
--- a/dts/src/arm64/marvell/armada-372x.dtsi
+++ b/dts/src/arm64/marvell/armada-372x.dtsi
@@ -59,5 +59,4 @@
enable-method = "psci";
};
};
-
};
diff --git a/dts/src/arm64/marvell/armada-37xx.dtsi b/dts/src/arm64/marvell/armada-37xx.dtsi
index ba9df7ff2a..9e2efb8829 100644
--- a/dts/src/arm64/marvell/armada-37xx.dtsi
+++ b/dts/src/arm64/marvell/armada-37xx.dtsi
@@ -105,14 +105,28 @@
status = "disabled";
};
- usb3@58000 {
- compatible = "generic-xhci";
+ usb3: usb@58000 {
+ compatible = "marvell,armada3700-xhci",
+ "generic-xhci";
reg = <0x58000 0x4000>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
- sata@e0000 {
+ xor@60900 {
+ compatible = "marvell,armada-3700-xor";
+ reg = <0x60900 0x100
+ 0x60b00 0x100>;
+
+ xor10 {
+ interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ xor11 {
+ interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ };
+
+ sata: sata@e0000 {
compatible = "marvell,armada-3700-ahci";
reg = <0xe0000 0x2000>;
interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/dts/src/arm64/marvell/armada-7020.dtsi b/dts/src/arm64/marvell/armada-7020.dtsi
index 52575756d0..975e733027 100644
--- a/dts/src/arm64/marvell/armada-7020.dtsi
+++ b/dts/src/arm64/marvell/armada-7020.dtsi
@@ -46,6 +46,7 @@
*/
#include "armada-ap806-dual.dtsi"
+#include "armada-cp110-master.dtsi"
/ {
model = "Marvell Armada 7020";
diff --git a/dts/src/arm64/marvell/armada-7040-db.dts b/dts/src/arm64/marvell/armada-7040-db.dts
index 064a251346..070b589680 100644
--- a/dts/src/arm64/marvell/armada-7040-db.dts
+++ b/dts/src/arm64/marvell/armada-7040-db.dts
@@ -51,42 +51,98 @@
compatible = "marvell,armada7040-db", "marvell,armada7040",
"marvell,armada-ap806-quad", "marvell,armada-ap806";
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
memory@00000000 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x80000000>;
};
+};
+
+&i2c0 {
+ status = "okay";
+ clock-frequency = <100000>;
+};
+
+&spi0 {
+ status = "okay";
+
+ spi-flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <10000000>;
- ap806 {
- config-space {
- spi@510600 {
- status = "okay";
-
- spi-flash@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "n25q128a13";
- reg = <0>; /* Chip select 0 */
- spi-max-frequency = <10000000>;
-
- partition@0 {
- label = "U-Boot";
- reg = <0 0x200000>;
- };
- partition@400000 {
- label = "Filesystem";
- reg = <0x200000 0xce0000>;
- };
- };
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "U-Boot";
+ reg = <0 0x200000>;
+ };
+ partition@400000 {
+ label = "Filesystem";
+ reg = <0x200000 0xce0000>;
};
+ };
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
- i2c@511000 {
- status = "okay";
- clock-frequency = <100000>;
+
+&cpm_pcie2 {
+ status = "okay";
+};
+
+&cpm_i2c0 {
+ status = "okay";
+ clock-frequency = <100000>;
+};
+
+&cpm_spi1 {
+ status = "okay";
+
+ spi-flash@0 {
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ compatible = "jedec,spi-nor";
+ reg = <0x0>;
+ spi-max-frequency = <20000000>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "U-Boot";
+ reg = <0x0 0x200000>;
};
- serial@512000 {
- status = "okay";
+ partition@400000 {
+ label = "Filesystem";
+ reg = <0x200000 0xe00000>;
};
};
};
};
+
+&cpm_sata0 {
+ status = "okay";
+};
+
+&cpm_usb3_0 {
+ status = "okay";
+};
+
+&cpm_usb3_1 {
+ status = "okay";
+};
diff --git a/dts/src/arm64/marvell/armada-7040.dtsi b/dts/src/arm64/marvell/armada-7040.dtsi
index 7a2de8bf79..78d995d627 100644
--- a/dts/src/arm64/marvell/armada-7040.dtsi
+++ b/dts/src/arm64/marvell/armada-7040.dtsi
@@ -46,6 +46,7 @@
*/
#include "armada-ap806-quad.dtsi"
+#include "armada-cp110-master.dtsi"
/ {
model = "Marvell Armada 7040";
diff --git a/dts/src/arm64/marvell/armada-8020.dtsi b/dts/src/arm64/marvell/armada-8020.dtsi
index 73d69d9951..3753c1c6d5 100644
--- a/dts/src/arm64/marvell/armada-8020.dtsi
+++ b/dts/src/arm64/marvell/armada-8020.dtsi
@@ -46,6 +46,7 @@
*/
#include "armada-ap806-dual.dtsi"
+#include "armada-cp110-master.dtsi"
/ {
model = "Marvell Armada 8020";
diff --git a/dts/src/arm64/marvell/armada-8040.dtsi b/dts/src/arm64/marvell/armada-8040.dtsi
index a1406a4095..8bd0d8f8ad 100644
--- a/dts/src/arm64/marvell/armada-8040.dtsi
+++ b/dts/src/arm64/marvell/armada-8040.dtsi
@@ -46,6 +46,7 @@
*/
#include "armada-ap806-quad.dtsi"
+#include "armada-cp110-master.dtsi"
/ {
model = "Marvell Armada 8040";
diff --git a/dts/src/arm64/marvell/armada-ap806-dual.dtsi b/dts/src/arm64/marvell/armada-ap806-dual.dtsi
index f25c5c17fa..95a1ff60f6 100644
--- a/dts/src/arm64/marvell/armada-ap806-dual.dtsi
+++ b/dts/src/arm64/marvell/armada-ap806-dual.dtsi
@@ -68,4 +68,3 @@
};
};
};
-
diff --git a/dts/src/arm64/marvell/armada-ap806-quad.dtsi b/dts/src/arm64/marvell/armada-ap806-quad.dtsi
index baa7d9a516..ba43a4357b 100644
--- a/dts/src/arm64/marvell/armada-ap806-quad.dtsi
+++ b/dts/src/arm64/marvell/armada-ap806-quad.dtsi
@@ -79,6 +79,4 @@
enable-method = "psci";
};
};
-
};
-
diff --git a/dts/src/arm64/marvell/armada-ap806.dtsi b/dts/src/arm64/marvell/armada-ap806.dtsi
index 556a92bcc2..20d256b326 100644
--- a/dts/src/arm64/marvell/armada-ap806.dtsi
+++ b/dts/src/arm64/marvell/armada-ap806.dtsi
@@ -54,12 +54,16 @@
#address-cells = <2>;
#size-cells = <2>;
+ aliases {
+ serial0 = &uart0;
+ serial1 = &uart1;
+ };
+
psci {
compatible = "arm,psci-0.2";
method = "smc";
};
-
ap806 {
#address-cells = <2>;
#size-cells = <2>;
@@ -136,7 +140,7 @@
marvell,spi-base = <128>, <136>, <144>, <152>;
};
- xor0@400000 {
+ xor@400000 {
compatible = "marvell,mv-xor-v2";
reg = <0x400000 0x1000>,
<0x410000 0x1000>;
@@ -144,7 +148,7 @@
dma-coherent;
};
- xor1@420000 {
+ xor@420000 {
compatible = "marvell,mv-xor-v2";
reg = <0x420000 0x1000>,
<0x430000 0x1000>;
@@ -152,7 +156,7 @@
dma-coherent;
};
- xor2@440000 {
+ xor@440000 {
compatible = "marvell,mv-xor-v2";
reg = <0x440000 0x1000>,
<0x450000 0x1000>;
@@ -160,7 +164,7 @@
dma-coherent;
};
- xor3@460000 {
+ xor@460000 {
compatible = "marvell,mv-xor-v2";
reg = <0x460000 0x1000>,
<0x470000 0x1000>;
@@ -175,63 +179,51 @@
#size-cells = <0>;
cell-index = <0>;
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ringclk 2>;
+ clocks = <&ap_syscon 3>;
status = "disabled";
};
i2c0: i2c@511000 {
- compatible = "marvell,mv64xxx-i2c";
+ compatible = "marvell,mv78230-i2c";
reg = <0x511000 0x20>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
timeout-ms = <1000>;
- clocks = <&ringclk 2>;
+ clocks = <&ap_syscon 3>;
status = "disabled";
};
- serial@512000 {
+ uart0: serial@512000 {
compatible = "snps,dw-apb-uart";
reg = <0x512000 0x100>;
reg-shift = <2>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <1>;
- clocks = <&ringclk 2>;
+ clocks = <&ap_syscon 3>;
status = "disabled";
};
- serial@512100 {
+ uart1: serial@512100 {
compatible = "snps,dw-apb-uart";
reg = <0x512100 0x100>;
reg-shift = <2>;
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <1>;
- clocks = <&ringclk 2>;
+ clocks = <&ap_syscon 3>;
status = "disabled";
};
- dfx-server@6f8000 {
- compatible = "simple-mfd", "syscon";
- reg = <0x6f8000 0x70000>;
-
- coreclk: clk@204 {
- compatible = "marvell,armada-ap806-core-clock";
- #clock-cells = <1>;
- clock-output-names = "ddr", "ring", "cpu";
- };
-
- ringclk: clk@250 {
- compatible = "marvell,armada-ap806-ring-clock";
- #clock-cells = <1>;
- clock-output-names = "ring-0", "ring-2",
- "ring-3", "ring-4",
- "ring-5";
- clocks = <&coreclk 1>;
- };
+ ap_syscon: system-controller@6f4000 {
+ compatible = "marvell,ap806-system-controller",
+ "syscon";
+ #clock-cells = <1>;
+ clock-output-names = "ap-cpu-cluster-0",
+ "ap-cpu-cluster-1",
+ "ap-fixed", "ap-mss";
+ reg = <0x6f4000 0x1000>;
};
};
};
-
};
-
diff --git a/dts/src/arm64/marvell/armada-cp110-master.dtsi b/dts/src/arm64/marvell/armada-cp110-master.dtsi
new file mode 100644
index 0000000000..367138bae3
--- /dev/null
+++ b/dts/src/arm64/marvell/armada-cp110-master.dtsi
@@ -0,0 +1,228 @@
+/*
+ * Copyright (C) 2016 Marvell Technology Group Ltd.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPLv2 or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/*
+ * Device Tree file for Marvell Armada CP110 Master.
+ */
+
+/ {
+ cp110-master {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ compatible = "simple-bus";
+ interrupt-parent = <&gic>;
+ ranges;
+
+ config-space {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "simple-bus";
+ interrupt-parent = <&gic>;
+ ranges = <0x0 0x0 0xf2000000 0x2000000>;
+
+ cpm_syscon0: system-controller@440000 {
+ compatible = "marvell,cp110-system-controller0",
+ "syscon";
+ reg = <0x440000 0x1000>;
+ #clock-cells = <2>;
+ core-clock-output-names =
+ "cpm-apll", "cpm-ppv2-core", "cpm-eip",
+ "cpm-core", "cpm-nand-core";
+ gate-clock-output-names =
+ "cpm-audio", "cpm-communit", "cpm-nand",
+ "cpm-ppv2", "cpm-sdio", "cpm-mg-domain",
+ "cpm-mg-core", "cpm-xor1", "cpm-xor0",
+ "cpm-gop-dp", "none", "cpm-pcie_x10",
+ "cpm-pcie_x11", "cpm-pcie_x4", "cpm-pcie-xor",
+ "cpm-sata", "cpm-sata-usb", "cpm-main",
+ "cpm-sd-mmc", "none", "none",
+ "cpm-slow-io", "cpm-usb3h0", "cpm-usb3h1",
+ "cpm-usb3dev", "cpm-eip150", "cpm-eip197";
+ };
+
+ cpm_sata0: sata@540000 {
+ compatible = "marvell,armada-8k-ahci";
+ reg = <0x540000 0x30000>;
+ interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpm_syscon0 1 15>;
+ status = "disabled";
+ };
+
+ cpm_usb3_0: usb3@500000 {
+ compatible = "marvell,armada-8k-xhci",
+ "generic-xhci";
+ reg = <0x500000 0x4000>;
+ dma-coherent;
+ interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpm_syscon0 1 22>;
+ status = "disabled";
+ };
+
+ cpm_usb3_1: usb3@510000 {
+ compatible = "marvell,armada-8k-xhci",
+ "generic-xhci";
+ reg = <0x510000 0x4000>;
+ dma-coherent;
+ interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpm_syscon0 1 23>;
+ status = "disabled";
+ };
+
+ cpm_spi0: spi@700600 {
+ compatible = "marvell,armada-380-spi";
+ reg = <0x700600 0x50>;
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+ cell-index = <1>;
+ clocks = <&cpm_syscon0 0 3>;
+ status = "disabled";
+ };
+
+ cpm_spi1: spi@700680 {
+ compatible = "marvell,armada-380-spi";
+ reg = <0x700680 0x50>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <2>;
+ clocks = <&cpm_syscon0 1 21>;
+ status = "disabled";
+ };
+
+ cpm_i2c0: i2c@701000 {
+ compatible = "marvell,mv78230-i2c";
+ reg = <0x701000 0x20>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpm_syscon0 1 21>;
+ status = "disabled";
+ };
+
+ cpm_i2c1: i2c@701100 {
+ compatible = "marvell,mv78230-i2c";
+ reg = <0x701100 0x20>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpm_syscon0 1 21>;
+ status = "disabled";
+ };
+ };
+
+ cpm_pcie0: pcie@f2600000 {
+ compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
+ reg = <0 0xf2600000 0 0x10000>,
+ <0 0xf6f00000 0 0x80000>;
+ reg-names = "ctrl", "config";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ device_type = "pci";
+ dma-coherent;
+
+ bus-range = <0 0xff>;
+ ranges =
+ /* downstream I/O */
+ <0x81000000 0 0xf9000000 0 0xf9000000 0 0x10000
+ /* non-prefetchable memory */
+ 0x82000000 0 0xf6000000 0 0xf6000000 0 0xf00000>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ num-lanes = <1>;
+ clocks = <&cpm_syscon0 1 13>;
+ status = "disabled";
+ };
+
+ cpm_pcie1: pcie@f2620000 {
+ compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
+ reg = <0 0xf2620000 0 0x10000>,
+ <0 0xf7f00000 0 0x80000>;
+ reg-names = "ctrl", "config";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ device_type = "pci";
+ dma-coherent;
+
+ bus-range = <0 0xff>;
+ ranges =
+ /* downstream I/O */
+ <0x81000000 0 0xf9010000 0 0xf9010000 0 0x10000
+ /* non-prefetchable memory */
+ 0x82000000 0 0xf7000000 0 0xf7000000 0 0xf00000>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+
+ num-lanes = <1>;
+ clocks = <&cpm_syscon0 1 11>;
+ status = "disabled";
+ };
+
+ cpm_pcie2: pcie@f2640000 {
+ compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
+ reg = <0 0xf2640000 0 0x10000>,
+ <0 0xf8f00000 0 0x80000>;
+ reg-names = "ctrl", "config";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ device_type = "pci";
+ dma-coherent;
+
+ bus-range = <0 0xff>;
+ ranges =
+ /* downstream I/O */
+ <0x81000000 0 0xf9020000 0 0xf9020000 0 0x10000
+ /* non-prefetchable memory */
+ 0x82000000 0 0xf8000000 0 0xf8000000 0 0xf00000>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+
+ num-lanes = <1>;
+ clocks = <&cpm_syscon0 1 12>;
+ status = "disabled";
+ };
+ };
+};
generated by cgit v1.2.3 (git 2.39.1) at 2024-04-27 15:41:29 +0000