diff options
Diffstat (limited to 'dts/src/arm64/mediatek/mt8173.dtsi')
-rw-r--r-- | dts/src/arm64/mediatek/mt8173.dtsi | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/dts/src/arm64/mediatek/mt8173.dtsi b/dts/src/arm64/mediatek/mt8173.dtsi index 15f1842f6d..8b4e806d51 100644 --- a/dts/src/arm64/mediatek/mt8173.dtsi +++ b/dts/src/arm64/mediatek/mt8173.dtsi @@ -157,6 +157,7 @@ enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; #cooling-cells = <2>; + dynamic-power-coefficient = <263>; clocks = <&infracfg CLK_INFRA_CA53SEL>, <&apmixedsys CLK_APMIXED_MAINPLL>; clock-names = "cpu", "intermediate"; @@ -170,6 +171,7 @@ enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; #cooling-cells = <2>; + dynamic-power-coefficient = <263>; clocks = <&infracfg CLK_INFRA_CA53SEL>, <&apmixedsys CLK_APMIXED_MAINPLL>; clock-names = "cpu", "intermediate"; @@ -183,6 +185,7 @@ enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; #cooling-cells = <2>; + dynamic-power-coefficient = <530>; clocks = <&infracfg CLK_INFRA_CA72SEL>, <&apmixedsys CLK_APMIXED_MAINPLL>; clock-names = "cpu", "intermediate"; @@ -196,6 +199,7 @@ enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; #cooling-cells = <2>; + dynamic-power-coefficient = <530>; clocks = <&infracfg CLK_INFRA_CA72SEL>, <&apmixedsys CLK_APMIXED_MAINPLL>; clock-names = "cpu", "intermediate"; @@ -1401,6 +1405,20 @@ <&topckgen CLK_TOP_UNIVPLL1_D2>; }; + jpegdec: jpegdec@18004000 { + compatible = "mediatek,mt8173-jpgdec"; + reg = <0 0x18004000 0 0x1000>; + interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_LOW>; + clocks = <&vencsys CLK_VENC_CKE0>, + <&vencsys CLK_VENC_CKE3>; + clock-names = "jpgdec-smi", + "jpgdec"; + power-domains = <&scpsys MT8173_POWER_DOMAIN_VENC>; + mediatek,larb = <&larb3>; + iommus = <&iommu M4U_PORT_JPGDEC_WDMA>, + <&iommu M4U_PORT_JPGDEC_BSDMA>; + }; + vencltsys: clock-controller@19000000 { compatible = "mediatek,mt8173-vencltsys", "syscon"; reg = <0 0x19000000 0 0x1000>; |