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-rw-r--r--dts/src/arm64/qcom/sdm845-db845c.dts506
1 files changed, 241 insertions, 265 deletions
diff --git a/dts/src/arm64/qcom/sdm845-db845c.dts b/dts/src/arm64/qcom/sdm845-db845c.dts
index 2d5533dd4e..ab62204565 100644
--- a/dts/src/arm64/qcom/sdm845-db845c.dts
+++ b/dts/src/arm64/qcom/sdm845-db845c.dts
@@ -5,28 +5,38 @@
/dts-v1/;
-#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include <dt-bindings/sound/qcom,q6afe.h>
#include <dt-bindings/sound/qcom,q6asm.h>
#include "sdm845.dtsi"
+#include "sdm845-wcd9340.dtsi"
#include "pm8998.dtsi"
#include "pmi8998.dtsi"
/ {
model = "Thundercomm Dragonboard 845c";
compatible = "thundercomm,db845c", "qcom,sdm845";
+ qcom,msm-id = <341 0x20001>;
+ qcom,board-id = <8 0>;
aliases {
serial0 = &uart9;
- hsuart0 = &uart6;
+ serial1 = &uart6;
};
chosen {
stdout-path = "serial0:115200n8";
};
+ /* Fixed crystal oscillator dedicated to MCP2517FD */
+ clk40M: can-clock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <40000000>;
+ };
+
dc12v: dc12v-regulator {
compatible = "regulator-fixed";
regulator-name = "DC12V";
@@ -35,40 +45,46 @@
regulator-always-on;
};
- gpio_keys {
+ gpio-keys {
compatible = "gpio-keys";
autorepeat;
pinctrl-names = "default";
pinctrl-0 = <&vol_up_pin_a>;
- vol-up {
+ key-vol-up {
label = "Volume Up";
linux,code = <KEY_VOLUMEUP>;
- gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>;
+ gpios = <&pm8998_gpios 6 GPIO_ACTIVE_LOW>;
};
};
leds {
compatible = "gpio-leds";
- user4 {
+ led-0 {
label = "green:user4";
- gpios = <&pm8998_gpio 13 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "panic-indicator";
+ function = LED_FUNCTION_INDICATOR;
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&pm8998_gpios 13 GPIO_ACTIVE_HIGH>;
default-state = "off";
+ panic-indicator;
};
- wlan {
+ led-1 {
label = "yellow:wlan";
- gpios = <&pm8998_gpio 9 GPIO_ACTIVE_HIGH>;
+ function = LED_FUNCTION_WLAN;
+ color = <LED_COLOR_ID_YELLOW>;
+ gpios = <&pm8998_gpios 9 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "phy0tx";
default-state = "off";
};
- bt {
+ led-2 {
label = "blue:bt";
- gpios = <&pm8998_gpio 5 GPIO_ACTIVE_HIGH>;
+ function = LED_FUNCTION_BLUETOOTH;
+ color = <LED_COLOR_ID_BLUE>;
+ gpios = <&pm8998_gpios 5 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "bluetooth-power";
default-state = "off";
};
@@ -85,6 +101,14 @@
};
};
+ reserved-memory {
+ /* Cont splash region set up by the bootloader */
+ cont_splash_mem: framebuffer@9d400000 {
+ reg = <0x0 0x9d400000 0x0 0x2400000>;
+ no-map;
+ };
+ };
+
lt9611_1v8: lt9611-vdd18-regulator {
compatible = "regulator-fixed";
regulator-name = "LT9611_1V8";
@@ -105,9 +129,11 @@
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
- // TODO: make it possible to drive same GPIO from two clients
- // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
- // enable-active-high;
+ /*
+ * TODO: make it possible to drive same GPIO from two clients
+ * gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
+ * enable-active-high;
+ */
};
pcie0_1p05v: pcie-0-1p05v-regulator {
@@ -118,37 +144,39 @@
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
- // TODO: make it possible to drive same GPIO from two clients
- // gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
- // enable-active-high;
+ /*
+ * TODO: make it possible to drive same GPIO from two clients
+ * gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
+ * enable-active-high;
+ */
};
- cam0_dvdd_1v2: reg_cam0_dvdd_1v2 {
+ cam0_dvdd_1v2: cam0-dvdd-1v2-regulator {
compatible = "regulator-fixed";
regulator-name = "CAM0_DVDD_1V2";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
enable-active-high;
- gpio = <&pm8998_gpio 12 GPIO_ACTIVE_HIGH>;
+ gpio = <&pm8998_gpios 12 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&cam0_dvdd_1v2_en_default>;
vin-supply = <&vbat>;
};
- cam0_avdd_2v8: reg_cam0_avdd_2v8 {
+ cam0_avdd_2v8: cam0-avdd-2v8-regulator {
compatible = "regulator-fixed";
regulator-name = "CAM0_AVDD_2V8";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
enable-active-high;
- gpio = <&pm8998_gpio 10 GPIO_ACTIVE_HIGH>;
+ gpio = <&pm8998_gpios 10 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&cam0_avdd_2v8_en_default>;
vin-supply = <&vbat>;
};
/* This regulator is enabled when the VREG_LVS1A_1P8 trace is enabled */
- cam3_avdd_2v8: reg_cam3_avdd_2v8 {
+ cam3_avdd_2v8: cam3-avdd-2v8-regulator {
compatible = "regulator-fixed";
regulator-name = "CAM3_AVDD_2V8";
regulator-min-microvolt = <2800000>;
@@ -180,9 +208,11 @@
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <500000>;
- // TODO: make it possible to drive same GPIO from two clients
- // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
- // enable-active-high;
+ /*
+ * TODO: make it possible to drive same GPIO from two clients
+ * gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
+ * enable-active-high;
+ */
};
vbat: vbat-regulator {
@@ -248,7 +278,7 @@
};
&apps_rsc {
- pm8998-rpmh-regulators {
+ regulators-0 {
compatible = "qcom,pm8998-rpmh-regulators";
qcom,pmic-id = "a";
vdd-s1-supply = <&vph_pwr>;
@@ -373,7 +403,7 @@
};
};
- pmi8998-rpmh-regulators {
+ regulators-1 {
compatible = "qcom,pmi8998-rpmh-regulators";
qcom,pmic-id = "b";
@@ -388,28 +418,16 @@
};
};
-&cdsp_pas {
- status = "okay";
- firmware-name = "qcom/sdm845/cdsp.mbn";
-};
-
-&dsi0 {
+&camss {
status = "okay";
- vdda-supply = <&vreg_l26a_1p2>;
- ports {
- port@1 {
- endpoint {
- remote-endpoint = <&lt9611_a>;
- data-lanes = <0 1 2 3>;
- };
- };
- };
+ vdda-phy-supply = <&vreg_l1a_0p875>;
+ vdda-pll-supply = <&vreg_l26a_1p2>;
};
-&dsi0_phy {
+&cdsp_pas {
status = "okay";
- vdds-supply = <&vreg_l1a_0p875>;
+ firmware-name = "qcom/sdm845/cdsp.mbn";
};
&gcc {
@@ -420,7 +438,20 @@
<GCC_LPASS_SWAY_CLK>;
};
+&gmu {
+ status = "okay";
+};
+
+&gpi_dma0 {
+ status = "okay";
+};
+
+&gpi_dma1 {
+ status = "okay";
+};
+
&gpu {
+ status = "okay";
zap-shader {
memory-region = <&gpu_mem>;
firmware-name = "qcom/sdm845/a630_zap.mbn";
@@ -454,7 +485,15 @@
reg = <0>;
lt9611_a: endpoint {
- remote-endpoint = <&dsi0_out>;
+ remote-endpoint = <&mdss_dsi0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ lt9611_b: endpoint {
+ remote-endpoint = <&mdss_dsi1_out>;
};
};
@@ -471,21 +510,65 @@
&i2c11 {
/* On Low speed expansion */
- label = "LS-I2C1";
+ clock-frequency = <100000>;
status = "okay";
};
&i2c14 {
/* On Low speed expansion */
- label = "LS-I2C0";
+ clock-frequency = <100000>;
status = "okay";
};
&mdss {
+ memory-region = <&cont_splash_mem>;
+ status = "okay";
+};
+
+&mdss_dsi0 {
status = "okay";
+ vdda-supply = <&vreg_l26a_1p2>;
+
+ qcom,dual-dsi-mode;
+ qcom,master-dsi;
+
+ ports {
+ port@1 {
+ endpoint {
+ remote-endpoint = <&lt9611_a>;
+ data-lanes = <0 1 2 3>;
+ };
+ };
+ };
};
-&mdss_mdp {
+&mdss_dsi0_phy {
+ status = "okay";
+ vdds-supply = <&vreg_l1a_0p875>;
+};
+
+&mdss_dsi1 {
+ vdda-supply = <&vreg_l26a_1p2>;
+
+ qcom,dual-dsi-mode;
+
+ /* DSI1 is slave, so use DSI0 clocks */
+ assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>;
+
+ status = "okay";
+
+ ports {
+ port@1 {
+ endpoint {
+ remote-endpoint = <&lt9611_b>;
+ data-lanes = <0 1 2 3>;
+ };
+ };
+ };
+};
+
+&mdss_dsi1_phy {
+ vdds-supply = <&vreg_l1a_0p875>;
status = "okay";
};
@@ -496,7 +579,7 @@
&pcie0 {
status = "okay";
- perst-gpio = <&tlmm 35 GPIO_ACTIVE_LOW>;
+ perst-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
enable-gpio = <&tlmm 134 GPIO_ACTIVE_HIGH>;
vddpe-3v3-supply = <&pcie0_3p3v_dual>;
@@ -514,7 +597,7 @@
&pcie1 {
status = "okay";
- perst-gpio = <&tlmm 102 GPIO_ACTIVE_LOW>;
+ perst-gpios = <&tlmm 102 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pcie1_default_state>;
@@ -527,7 +610,7 @@
vdda-pll-supply = <&vreg_l26a_1p2>;
};
-&pm8998_gpio {
+&pm8998_gpios {
gpio-line-names =
"NC",
"NC",
@@ -556,7 +639,7 @@
"OPTION2",
"PM845_SLB";
- cam0_dvdd_1v2_en_default: cam0-dvdd-1v2-en {
+ cam0_dvdd_1v2_en_default: cam0-dvdd-1v2-en-state {
pins = "gpio12";
function = "normal";
@@ -565,7 +648,7 @@
qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
};
- cam0_avdd_2v8_en_default: cam0-avdd-2v8-en {
+ cam0_avdd_2v8_en_default: cam0-avdd-2v8-en-state {
pins = "gpio10";
function = "normal";
@@ -574,7 +657,7 @@
qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
};
- vol_up_pin_a: vol-up-active {
+ vol_up_pin_a: vol-up-active-state {
pins = "gpio6";
function = "normal";
input-enable;
@@ -583,20 +666,45 @@
};
};
-&pm8998_pon {
- resin {
- compatible = "qcom,pm8941-resin";
- interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>;
- debounce = <15625>;
- bias-pull-up;
- linux,code = <KEY_VOLUMEDOWN>;
+&pm8998_resin {
+ linux,code = <KEY_VOLUMEDOWN>;
+ status = "okay";
+};
+
+&pmi8998_lpg {
+ status = "okay";
+
+ qcom,power-source = <1>;
+
+ led@3 {
+ reg = <3>;
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_HEARTBEAT;
+ function-enumerator = <3>;
+
+ linux,default-trigger = "heartbeat";
+ default-state = "on";
+ };
+
+ led@4 {
+ reg = <4>;
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_INDICATOR;
+ function-enumerator = <2>;
+ };
+
+ led@5 {
+ reg = <5>;
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_INDICATOR;
+ function-enumerator = <1>;
};
};
/* QUAT I2S Uses 4 I2S SD Lines for audio on LT9611 HDMI Bridge */
&q6afedai {
- qi2s@22 {
- reg = <22>;
+ dai@22 {
+ reg = <QUATERNARY_MI2S_RX>;
qcom,sd-lines = <0 1 2 3>;
};
};
@@ -643,7 +751,7 @@
};
&sound {
- compatible = "qcom,db845c-sndcard";
+ compatible = "qcom,db845c-sndcard", "qcom,sdm845-sndcard";
pinctrl-0 = <&quat_mi2s_active
&quat_mi2s_sd0_active
&quat_mi2s_sd1_active
@@ -705,7 +813,7 @@
};
codec {
- sound-dai = <&lt9611_codec 0>;
+ sound-dai = <&lt9611_codec 0>;
};
};
@@ -720,7 +828,7 @@
};
codec {
- sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>;
+ sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>;
};
};
@@ -740,15 +848,31 @@
};
};
+&spi0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&qup_spi0_default>;
+ cs-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>;
+
+ can@0 {
+ compatible = "microchip,mcp2517fd";
+ reg = <0>;
+ clocks = <&clk40M>;
+ interrupts-extended = <&tlmm 104 IRQ_TYPE_LEVEL_LOW>;
+ spi-max-frequency = <10000000>;
+ vdd-supply = <&vdc_5v>;
+ xceiver-supply = <&vdc_5v>;
+ };
+};
+
&spi2 {
/* On Low speed expansion */
- label = "LS-SPI0";
status = "okay";
};
&tlmm {
- cam0_default: cam0_default {
- rst {
+ cam0_default: cam0-default-state {
+ rst-pins {
pins = "gpio9";
function = "gpio";
@@ -756,7 +880,7 @@
bias-disable;
};
- mclk0 {
+ mclk0-pins {
pins = "gpio13";
function = "cam_mclk";
@@ -765,8 +889,8 @@
};
};
- cam3_default: cam3_default {
- rst {
+ cam3_default: cam3-default-state {
+ rst-pins {
function = "gpio";
pins = "gpio21";
@@ -774,7 +898,7 @@
bias-disable;
};
- mclk3 {
+ mclk3-pins {
function = "cam_mclk";
pins = "gpio16";
@@ -783,7 +907,7 @@
};
};
- dsi_sw_sel: dsi-sw-sel {
+ dsi_sw_sel: dsi-sw-sel-state {
pins = "gpio120";
function = "gpio";
@@ -792,20 +916,20 @@
output-high;
};
- lt9611_irq_pin: lt9611-irq {
+ lt9611_irq_pin: lt9611-irq-state {
pins = "gpio84";
function = "gpio";
bias-disable;
};
- pcie0_default_state: pcie0-default {
- clkreq {
+ pcie0_default_state: pcie0-default-state {
+ clkreq-pins {
pins = "gpio36";
function = "pci_e0";
bias-pull-up;
};
- reset-n {
+ reset-n-pins {
pins = "gpio35";
function = "gpio";
@@ -814,7 +938,7 @@
bias-pull-down;
};
- wake-n {
+ wake-n-pins {
pins = "gpio37";
function = "gpio";
@@ -823,7 +947,7 @@
};
};
- pcie0_pwren_state: pcie0-pwren {
+ pcie0_pwren_state: pcie0-pwren-state {
pins = "gpio90";
function = "gpio";
@@ -831,8 +955,8 @@
bias-disable;
};
- pcie1_default_state: pcie1-default {
- perst-n {
+ pcie1_default_state: pcie1-default-state {
+ perst-n-pins {
pins = "gpio102";
function = "gpio";
@@ -840,13 +964,13 @@
bias-disable;
};
- clkreq {
+ clkreq-pins {
pins = "gpio103";
function = "pci_e1";
bias-pull-up;
};
- wake-n {
+ wake-n-pins {
pins = "gpio11";
function = "gpio";
@@ -854,7 +978,7 @@
bias-pull-up;
};
- reset-n {
+ reset-n-pins {
pins = "gpio75";
function = "gpio";
@@ -864,8 +988,8 @@
};
};
- sdc2_default_state: sdc2-default {
- clk {
+ sdc2_default_state: sdc2-default-state {
+ clk-pins {
pins = "sdc2_clk";
bias-disable;
@@ -876,43 +1000,38 @@
drive-strength = <16>;
};
- cmd {
+ cmd-pins {
pins = "sdc2_cmd";
bias-pull-up;
drive-strength = <10>;
};
- data {
+ data-pins {
pins = "sdc2_data";
bias-pull-up;
drive-strength = <10>;
};
};
- sdc2_card_det_n: sd-card-det-n {
+ sdc2_card_det_n: sd-card-det-n-state {
pins = "gpio126";
function = "gpio";
bias-pull-up;
};
-
- wcd_intr_default: wcd_intr_default {
- pins = <54>;
- function = "gpio";
-
- input-enable;
- bias-pull-down;
- drive-strength = <2>;
- };
};
&uart3 {
label = "LS-UART0";
+ pinctrl-0 = <&qup_uart3_4pin>;
+
status = "disabled";
};
&uart6 {
status = "okay";
+ pinctrl-0 = <&qup_uart6_4pin>;
+
bluetooth {
compatible = "qcom,wcn3990-bt";
@@ -999,20 +1118,20 @@
vdda-pll-supply = <&vreg_l26a_1p2>;
};
-&wcd9340{
- pinctrl-0 = <&wcd_intr_default>;
- pinctrl-names = "default";
- clock-names = "extclk";
- clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
- reset-gpios = <&tlmm 64 0>;
+&venus {
+ status = "okay";
+};
+
+&wcd9340 {
+ reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
vdd-buck-supply = <&vreg_s4a_1p8>;
vdd-buck-sido-supply = <&vreg_s4a_1p8>;
vdd-tx-supply = <&vreg_s4a_1p8>;
vdd-rx-supply = <&vreg_s4a_1p8>;
vdd-io-supply = <&vreg_s4a_1p8>;
- swm: swm@c85 {
- left_spkr: wsa8810-left{
+ swm: soundwire@c85 {
+ left_spkr: speaker@0,1 {
compatible = "sdw10217201000";
reg = <0 1>;
powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
@@ -1021,7 +1140,7 @@
#sound-dai-cells = <0>;
};
- right_spkr: wsa8810-right{
+ right_spkr: speaker@0,2 {
compatible = "sdw10217201000";
powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
reg = <0 2>;
@@ -1041,6 +1160,7 @@
vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
qcom,snoc-host-cap-8bit-quirk;
+ qcom,ath10k-calibration-variant = "Thundercomm_DB845C";
};
/* PINCTRL - additions to nodes defined in sdm845.dtsi */
@@ -1048,167 +1168,23 @@
drive-strength = <16>;
};
-&qup_uart3_default{
- pinmux {
- pins = "gpio41", "gpio42", "gpio43", "gpio44";
- function = "qup3";
- };
-};
-
&qup_i2c10_default {
- pinconf {
- pins = "gpio55", "gpio56";
- drive-strength = <2>;
- bias-disable;
- };
-};
-
-&qup_uart6_default {
- pinmux {
- pins = "gpio45", "gpio46", "gpio47", "gpio48";
- function = "qup6";
- };
-
- cts {
- pins = "gpio45";
- bias-disable;
- };
-
- rts-tx {
- pins = "gpio46", "gpio47";
- drive-strength = <2>;
- bias-disable;
- };
-
- rx {
- pins = "gpio48";
- bias-pull-up;
- };
-};
-
-&qup_uart9_default {
- pinconf-tx {
- pins = "gpio4";
- drive-strength = <2>;
- bias-disable;
- };
-
- pinconf-rx {
- pins = "gpio5";
- drive-strength = <2>;
- bias-pull-up;
- };
+ drive-strength = <2>;
+ bias-disable;
};
-&pm8998_gpio {
-
-};
-
-&cci {
- status = "okay";
+&qup_uart9_rx {
+ drive-strength = <2>;
+ bias-pull-up;
};
-&camss {
- vdda-supply = <&vreg_l1a_0p875>;
-
- status = "ok";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
- port@0 {
- reg = <0>;
- csiphy0_ep: endpoint {
- clock-lanes = <7>;
- data-lanes = <0 1 2 3>;
- remote-endpoint = <&ov8856_ep>;
- };
- };
- };
+&qup_uart9_tx {
+ drive-strength = <2>;
+ bias-disable;
};
-&cci_i2c0 {
- camera@10 {
- compatible = "ovti,ov8856";
- reg = <0x10>;
-
- // CAM0_RST_N
- reset-gpios = <&tlmm 9 GPIO_ACTIVE_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&cam0_default>;
- gpios = <&tlmm 13 0>,
- <&tlmm 9 GPIO_ACTIVE_LOW>;
-
- clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
- clock-names = "xvclk";
- clock-frequency = <19200000>;
-
- /* The &vreg_s4a_1p8 trace is powered on as a,
- * so it is represented by a fixed regulator.
- *
- * The 2.8V vdda-supply and 1.2V vddd-supply regulators
- * both have to be enabled through the power management
- * gpios.
- */
- power-domains = <&clock_camcc TITAN_TOP_GDSC>;
-
- dovdd-supply = <&vreg_lvs1a_1p8>;
- avdd-supply = <&cam0_avdd_2v8>;
- dvdd-supply = <&cam0_dvdd_1v2>;
-
- status = "ok";
-
- port {
- ov8856_ep: endpoint {
- clock-lanes = <1>;
- link-frequencies = /bits/ 64
- <360000000 180000000>;
- data-lanes = <1 2 3 4>;
- remote-endpoint = <&csiphy0_ep>;
- };
- };
- };
-};
-
-&cci_i2c1 {
- camera@60 {
- compatible = "ovti,ov7251";
-
- // I2C address as per ov7251.txt linux documentation
- reg = <0x60>;
-
- // CAM3_RST_N
- enable-gpios = <&tlmm 21 0>;
- pinctrl-names = "default";
- pinctrl-0 = <&cam3_default>;
- gpios = <&tlmm 16 0>,
- <&tlmm 21 0>;
-
- clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
- clock-names = "xclk";
- clock-frequency = <24000000>;
-
- /* The &vreg_s4a_1p8 trace always powered on.
- *
- * The 2.8V vdda-supply regulator is enabled when the
- * vreg_s4a_1p8 trace is pulled high.
- * It too is represented by a fixed regulator.
- *
- * No 1.2V vddd-supply regulator is used.
- */
- power-domains = <&clock_camcc TITAN_TOP_GDSC>;
-
- vdddo-supply = <&vreg_lvs1a_1p8>;
- vdda-supply = <&cam3_avdd_2v8>;
-
- status = "disable";
-
- port {
- ov7251_ep: endpoint {
- clock-lanes = <1>;
- data-lanes = <0 1>;
-// remote-endpoint = <&csiphy3_ep>;
- };
- };
- };
+/* PINCTRL - additions to nodes defined in sdm845.dtsi */
+&qup_spi0_default {
+ drive-strength = <6>;
+ bias-disable;
};