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Diffstat (limited to 'dts/src/arm64/realtek/rtd1295.dtsi')
-rw-r--r--dts/src/arm64/realtek/rtd1295.dtsi23
1 files changed, 7 insertions, 16 deletions
diff --git a/dts/src/arm64/realtek/rtd1295.dtsi b/dts/src/arm64/realtek/rtd1295.dtsi
index 93f0e1d977..b7f63102f2 100644
--- a/dts/src/arm64/realtek/rtd1295.dtsi
+++ b/dts/src/arm64/realtek/rtd1295.dtsi
@@ -2,7 +2,7 @@
/*
* Realtek RTD1295 SoC
*
- * Copyright (c) 2016-2017 Andreas Färber
+ * Copyright (c) 2016-2019 Andreas Färber
*/
#include "rtd129x.dtsi"
@@ -44,30 +44,21 @@
l2: l2-cache {
compatible = "cache";
- };
- };
-
- reserved-memory {
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- tee@10100000 {
- reg = <0x10100000 0xf00000>;
- no-map;
+ cache-level = <2>;
+ cache-unified;
};
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13
- (GIC_CPU_MASK_RAW(0xf) | IRQ_TYPE_LEVEL_LOW)>,
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14
- (GIC_CPU_MASK_RAW(0xf) | IRQ_TYPE_LEVEL_LOW)>,
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11
- (GIC_CPU_MASK_RAW(0xf) | IRQ_TYPE_LEVEL_LOW)>,
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10
- (GIC_CPU_MASK_RAW(0xf) | IRQ_TYPE_LEVEL_LOW)>;
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};
};