diff options
Diffstat (limited to 'dts/src/arm64/realtek/rtd1295.dtsi')
| -rw-r--r-- | dts/src/arm64/realtek/rtd1295.dtsi | 62 |
1 files changed, 4 insertions, 58 deletions
diff --git a/dts/src/arm64/realtek/rtd1295.dtsi b/dts/src/arm64/realtek/rtd1295.dtsi index d8f84666c8..8d9ac05d17 100644 --- a/dts/src/arm64/realtek/rtd1295.dtsi +++ b/dts/src/arm64/realtek/rtd1295.dtsi @@ -6,13 +6,10 @@ * SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ -#include <dt-bindings/interrupt-controller/arm-gic.h> +#include "rtd129x.dtsi" / { compatible = "realtek,rtd1295"; - interrupt-parent = <&gic>; - #address-cells = <1>; - #size-cells = <1>; cpus { #address-cells = <2>; @@ -62,12 +59,6 @@ }; }; - arm-pmu { - compatible = "arm,cortex-a53-pmu"; - interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; - interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; - }; - timer { compatible = "arm,armv8-timer"; interrupts = <GIC_PPI 13 @@ -79,53 +70,8 @@ <GIC_PPI 10 (GIC_CPU_MASK_RAW(0xf) | IRQ_TYPE_LEVEL_LOW)>; }; +}; - soc { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - /* Exclude up to 2 GiB of RAM */ - ranges = <0x80000000 0x80000000 0x80000000>; - - uart0: serial@98007800 { - compatible = "snps,dw-apb-uart"; - reg = <0x98007800 0x400>, - <0x98007000 0x100>; - reg-shift = <2>; - reg-io-width = <4>; - clock-frequency = <27000000>; - status = "disabled"; - }; - - uart1: serial@9801b200 { - compatible = "snps,dw-apb-uart"; - reg = <0x9801b200 0x100>, - <0x9801b00c 0x100>; - reg-shift = <2>; - reg-io-width = <4>; - clock-frequency = <432000000>; - status = "disabled"; - }; - - uart2: serial@9801b400 { - compatible = "snps,dw-apb-uart"; - reg = <0x9801b400 0x100>, - <0x9801b00c 0x100>; - reg-shift = <2>; - reg-io-width = <4>; - clock-frequency = <432000000>; - status = "disabled"; - }; - - gic: interrupt-controller@ff011000 { - compatible = "arm,gic-400"; - reg = <0xff011000 0x1000>, - <0xff012000 0x2000>, - <0xff014000 0x2000>, - <0xff016000 0x2000>; - interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; - interrupt-controller; - #interrupt-cells = <3>; - }; - }; +&arm_pmu { + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; }; |