summaryrefslogtreecommitdiffstats
path: root/dts/src/arm64/renesas/r8a7795.dtsi
diff options
context:
space:
mode:
Diffstat (limited to 'dts/src/arm64/renesas/r8a7795.dtsi')
-rw-r--r--dts/src/arm64/renesas/r8a7795.dtsi212
1 files changed, 159 insertions, 53 deletions
diff --git a/dts/src/arm64/renesas/r8a7795.dtsi b/dts/src/arm64/renesas/r8a7795.dtsi
index 706d242602..3285a92867 100644
--- a/dts/src/arm64/renesas/r8a7795.dtsi
+++ b/dts/src/arm64/renesas/r8a7795.dtsi
@@ -10,6 +10,7 @@
#include <dt-bindings/clock/r8a7795-cpg-mssr.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/power/r8a7795-sysc.h>
/ {
compatible = "renesas,r8a7795";
@@ -39,6 +40,7 @@
compatible = "arm,cortex-a57", "arm,armv8";
reg = <0x0>;
device_type = "cpu";
+ power-domains = <&sysc R8A7795_PD_CA57_CPU0>;
next-level-cache = <&L2_CA57>;
enable-method = "psci";
};
@@ -47,6 +49,7 @@
compatible = "arm,cortex-a57","arm,armv8";
reg = <0x1>;
device_type = "cpu";
+ power-domains = <&sysc R8A7795_PD_CA57_CPU1>;
next-level-cache = <&L2_CA57>;
enable-method = "psci";
};
@@ -54,6 +57,7 @@
compatible = "arm,cortex-a57","arm,armv8";
reg = <0x2>;
device_type = "cpu";
+ power-domains = <&sysc R8A7795_PD_CA57_CPU2>;
next-level-cache = <&L2_CA57>;
enable-method = "psci";
};
@@ -61,6 +65,7 @@
compatible = "arm,cortex-a57","arm,armv8";
reg = <0x3>;
device_type = "cpu";
+ power-domains = <&sysc R8A7795_PD_CA57_CPU3>;
next-level-cache = <&L2_CA57>;
enable-method = "psci";
};
@@ -68,12 +73,14 @@
L2_CA57: cache-controller@0 {
compatible = "cache";
+ power-domains = <&sysc R8A7795_PD_CA57_SCU>;
cache-unified;
cache-level = <2>;
};
L2_CA53: cache-controller@1 {
compatible = "cache";
+ power-domains = <&sysc R8A7795_PD_CA53_SCU>;
cache-unified;
cache-level = <2>;
};
@@ -115,6 +122,13 @@
clock-frequency = <0>;
};
+ /* External CAN clock - to be overridden by boards that provide it */
+ can_clk: can {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
/* External SCIF clock - to be overridden by boards that provide it */
scif_clk: scif {
compatible = "fixed-clock";
@@ -122,6 +136,13 @@
clock-frequency = <0>;
};
+ /* External PCIe clock - can be overridden by the board */
+ pcie_bus_clk: pcie_bus {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
soc {
compatible = "simple-bus";
interrupt-parent = <&gic>;
@@ -154,7 +175,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 912>;
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
};
gpio1: gpio@e6051000 {
@@ -168,7 +189,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 911>;
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
};
gpio2: gpio@e6052000 {
@@ -182,7 +203,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 910>;
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
};
gpio3: gpio@e6053000 {
@@ -196,7 +217,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 909>;
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
};
gpio4: gpio@e6054000 {
@@ -210,7 +231,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 908>;
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
};
gpio5: gpio@e6055000 {
@@ -224,7 +245,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 907>;
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
};
gpio6: gpio@e6055400 {
@@ -238,7 +259,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 906>;
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
};
gpio7: gpio@e6055800 {
@@ -252,7 +273,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 905>;
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
};
pmu_a57 {
@@ -288,6 +309,12 @@
#power-domain-cells = <0>;
};
+ sysc: system-controller@e6180000 {
+ compatible = "renesas,r8a7795-sysc";
+ reg = <0 0xe6180000 0 0x0400>;
+ #power-domain-cells = <1>;
+ };
+
audma0: dma-controller@ec700000 {
compatible = "renesas,rcar-dmac";
reg = <0 0xec700000 0 0x10000>;
@@ -315,7 +342,7 @@
"ch12", "ch13", "ch14", "ch15";
clocks = <&cpg CPG_MOD 502>;
clock-names = "fck";
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
#dma-cells = <1>;
dma-channels = <16>;
};
@@ -347,7 +374,7 @@
"ch12", "ch13", "ch14", "ch15";
clocks = <&cpg CPG_MOD 501>;
clock-names = "fck";
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
#dma-cells = <1>;
dma-channels = <16>;
};
@@ -369,7 +396,7 @@
GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 407>;
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
};
dmac0: dma-controller@e6700000 {
@@ -400,7 +427,7 @@
"ch12", "ch13", "ch14", "ch15";
clocks = <&cpg CPG_MOD 219>;
clock-names = "fck";
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
#dma-cells = <1>;
dma-channels = <16>;
};
@@ -433,7 +460,7 @@
"ch12", "ch13", "ch14", "ch15";
clocks = <&cpg CPG_MOD 218>;
clock-names = "fck";
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
#dma-cells = <1>;
dma-channels = <16>;
};
@@ -466,7 +493,7 @@
"ch12", "ch13", "ch14", "ch15";
clocks = <&cpg CPG_MOD 217>;
clock-names = "fck";
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
#dma-cells = <1>;
dma-channels = <16>;
};
@@ -508,12 +535,42 @@
"ch20", "ch21", "ch22", "ch23",
"ch24";
clocks = <&cpg CPG_MOD 812>;
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
phy-mode = "rgmii-id";
#address-cells = <1>;
#size-cells = <0>;
};
+ can0: can@e6c30000 {
+ compatible = "renesas,can-r8a7795",
+ "renesas,rcar-gen3-can";
+ reg = <0 0xe6c30000 0 0x1000>;
+ interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 916>,
+ <&cpg CPG_CORE R8A7795_CLK_CANFD>,
+ <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
+ assigned-clock-rates = <40000000>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+
+ can1: can@e6c38000 {
+ compatible = "renesas,can-r8a7795",
+ "renesas,rcar-gen3-can";
+ reg = <0 0xe6c38000 0 0x1000>;
+ interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 915>,
+ <&cpg CPG_CORE R8A7795_CLK_CANFD>,
+ <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
+ assigned-clock-rates = <40000000>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+
hscif0: serial@e6540000 {
compatible = "renesas,hscif-r8a7795",
"renesas,rcar-gen3-hscif",
@@ -526,7 +583,7 @@
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x31>, <&dmac1 0x30>;
dma-names = "tx", "rx";
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -542,7 +599,7 @@
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x33>, <&dmac1 0x32>;
dma-names = "tx", "rx";
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -558,7 +615,7 @@
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x35>, <&dmac1 0x34>;
dma-names = "tx", "rx";
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -574,7 +631,7 @@
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x37>, <&dmac0 0x36>;
dma-names = "tx", "rx";
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -590,7 +647,7 @@
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x39>, <&dmac0 0x38>;
dma-names = "tx", "rx";
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -605,7 +662,7 @@
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x51>, <&dmac1 0x50>;
dma-names = "tx", "rx";
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -620,7 +677,7 @@
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x53>, <&dmac1 0x52>;
dma-names = "tx", "rx";
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -635,7 +692,7 @@
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x13>, <&dmac1 0x12>;
dma-names = "tx", "rx";
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -650,7 +707,7 @@
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x57>, <&dmac0 0x56>;
dma-names = "tx", "rx";
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -665,7 +722,7 @@
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x59>, <&dmac0 0x58>;
dma-names = "tx", "rx";
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -680,7 +737,7 @@
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x5b>, <&dmac1 0x5a>;
dma-names = "tx", "rx";
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -691,7 +748,7 @@
reg = <0 0xe6500000 0 0x40>;
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 931>;
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
i2c-scl-internal-delay-ns = <110>;
status = "disabled";
};
@@ -703,7 +760,7 @@
reg = <0 0xe6508000 0 0x40>;
interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 930>;
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
@@ -715,7 +772,7 @@
reg = <0 0xe6510000 0 0x40>;
interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 929>;
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
@@ -727,7 +784,7 @@
reg = <0 0xe66d0000 0 0x40>;
interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 928>;
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
i2c-scl-internal-delay-ns = <110>;
status = "disabled";
};
@@ -739,7 +796,7 @@
reg = <0 0xe66d8000 0 0x40>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 927>;
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
i2c-scl-internal-delay-ns = <110>;
status = "disabled";
};
@@ -751,7 +808,7 @@
reg = <0 0xe66e0000 0 0x40>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 919>;
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
i2c-scl-internal-delay-ns = <110>;
status = "disabled";
};
@@ -763,7 +820,7 @@
reg = <0 0xe66e8000 0 0x40>;
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 918>;
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
@@ -813,7 +870,7 @@
"src.1", "src.0",
"dvc.0", "dvc.1",
"clk_a", "clk_b", "clk_c", "clk_i";
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
rcar_sound,dvc {
@@ -943,20 +1000,20 @@
};
xhci0: usb@ee000000 {
- compatible = "renesas,xhci-r8a7795";
+ compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
reg = <0 0xee000000 0 0xc00>;
interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 328>;
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
xhci1: usb@ee0400000 {
- compatible = "renesas,xhci-r8a7795";
+ compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
reg = <0 0xee040000 0 0xc00>;
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 327>;
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -968,7 +1025,7 @@
GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ch0", "ch1";
clocks = <&cpg CPG_MOD 330>;
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
#dma-cells = <1>;
dma-channels = <2>;
};
@@ -981,7 +1038,7 @@
GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ch0", "ch1";
clocks = <&cpg CPG_MOD 331>;
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
#dma-cells = <1>;
dma-channels = <2>;
};
@@ -991,7 +1048,7 @@
reg = <0 0xee100000 0 0x2000>;
interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 314>;
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -1000,7 +1057,7 @@
reg = <0 0xee120000 0 0x2000>;
interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 313>;
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -1009,7 +1066,7 @@
reg = <0 0xee140000 0 0x2000>;
interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 312>;
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
cap-mmc-highspeed;
status = "disabled";
};
@@ -1019,7 +1076,7 @@
reg = <0 0xee160000 0 0x2000>;
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 311>;
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
cap-mmc-highspeed;
status = "disabled";
};
@@ -1029,7 +1086,7 @@
reg = <0 0xee080200 0 0x700>;
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 703>;
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
#phy-cells = <0>;
status = "disabled";
};
@@ -1038,7 +1095,7 @@
compatible = "renesas,usb2-phy-r8a7795";
reg = <0 0xee0a0200 0 0x700>;
clocks = <&cpg CPG_MOD 702>;
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
#phy-cells = <0>;
status = "disabled";
};
@@ -1047,7 +1104,7 @@
compatible = "renesas,usb2-phy-r8a7795";
reg = <0 0xee0c0200 0 0x700>;
clocks = <&cpg CPG_MOD 701>;
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
#phy-cells = <0>;
status = "disabled";
};
@@ -1059,7 +1116,7 @@
clocks = <&cpg CPG_MOD 703>;
phys = <&usb2_phy0>;
phy-names = "usb";
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -1070,7 +1127,7 @@
clocks = <&cpg CPG_MOD 702>;
phys = <&usb2_phy1>;
phy-names = "usb";
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -1081,7 +1138,7 @@
clocks = <&cpg CPG_MOD 701>;
phys = <&usb2_phy2>;
phy-names = "usb";
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -1092,7 +1149,7 @@
clocks = <&cpg CPG_MOD 703>;
phys = <&usb2_phy0>;
phy-names = "usb";
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -1103,7 +1160,7 @@
clocks = <&cpg CPG_MOD 702>;
phys = <&usb2_phy1>;
phy-names = "usb";
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -1114,7 +1171,56 @@
clocks = <&cpg CPG_MOD 701>;
phys = <&usb2_phy2>;
phy-names = "usb";
- power-domains = <&cpg>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+ pciec0: pcie@fe000000 {
+ compatible = "renesas,pcie-r8a7795";
+ reg = <0 0xfe000000 0 0x80000>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x00 0xff>;
+ device_type = "pci";
+ ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
+ 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
+ 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
+ 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
+ /* Map all possible DDR as inbound ranges */
+ dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
+ interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
+ clock-names = "pcie", "pcie_bus";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+
+ pciec1: pcie@ee800000 {
+ compatible = "renesas,pcie-r8a7795";
+ reg = <0 0xee800000 0 0x80000>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x00 0xff>;
+ device_type = "pci";
+ ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
+ 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
+ 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
+ 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
+ /* Map all possible DDR as inbound ranges */
+ dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
+ interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
+ clock-names = "pcie", "pcie_bus";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
};
generated by cgit v1.2.3 (git 2.39.1) at 2024-04-18 17:53:14 +0000