diff options
Diffstat (limited to 'dts/src/arm64/renesas/rzg2lc-smarc-pinfunction.dtsi')
| -rw-r--r-- | dts/src/arm64/renesas/rzg2lc-smarc-pinfunction.dtsi | 94 |
1 files changed, 94 insertions, 0 deletions
diff --git a/dts/src/arm64/renesas/rzg2lc-smarc-pinfunction.dtsi b/dts/src/arm64/renesas/rzg2lc-smarc-pinfunction.dtsi new file mode 100644 index 0000000000..37ff209158 --- /dev/null +++ b/dts/src/arm64/renesas/rzg2lc-smarc-pinfunction.dtsi @@ -0,0 +1,94 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/* + * Device Tree Source for the RZ/G2LC SMARC pincontrol parts + * + * Copyright (C) 2021 Renesas Electronics Corp. + */ + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/pinctrl/rzg2l-pinctrl.h> + +&pinctrl { + pinctrl-0 = <&sound_clk_pins>; + pinctrl-names = "default"; + + scif0_pins: scif0 { + pinmux = <RZG2L_PORT_PINMUX(38, 0, 1)>, /* TxD */ + <RZG2L_PORT_PINMUX(38, 1, 1)>; /* RxD */ + }; + +#if SW_SCIF_CAN + /* SW8 should be at position 2->1 */ + can1_pins: can1 { + pinmux = <RZG2L_PORT_PINMUX(40, 0, 3)>, /* TxD */ + <RZG2L_PORT_PINMUX(40, 1, 3)>; /* RxD */ + }; +#endif + + scif1_pins: scif1 { + pinmux = <RZG2L_PORT_PINMUX(40, 0, 1)>, /* TxD */ + <RZG2L_PORT_PINMUX(40, 1, 1)>, /* RxD */ + <RZG2L_PORT_PINMUX(41, 0, 1)>, /* CTS# */ + <RZG2L_PORT_PINMUX(41, 1, 1)>; /* RTS# */ + }; + +#if SW_RSPI_CAN + /* SW8 should be at position 2->3 so that GPIO9_CAN1_STB line is activated */ + can1-stb-hog { + gpio-hog; + gpios = <RZG2L_GPIO(44, 3) GPIO_ACTIVE_HIGH>; + output-low; + line-name = "can1_stb"; + }; + + can1_pins: can1 { + pinmux = <RZG2L_PORT_PINMUX(44, 0, 3)>, /* TxD */ + <RZG2L_PORT_PINMUX(44, 1, 3)>; /* RxD */ + }; +#endif + + sd1-pwr-en-hog { + gpio-hog; + gpios = <RZG2L_GPIO(39, 2) GPIO_ACTIVE_HIGH>; + output-high; + line-name = "sd1_pwr_en"; + }; + + sdhi1_pins: sd1 { + sd1_data { + pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3"; + power-source = <3300>; + }; + + sd1_ctrl { + pins = "SD1_CLK", "SD1_CMD"; + power-source = <3300>; + }; + + sd1_mux { + pinmux = <RZG2L_PORT_PINMUX(19, 0, 1)>; /* SD1_CD */ + }; + }; + + sdhi1_pins_uhs: sd1_uhs { + sd1_data_uhs { + pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3"; + power-source = <1800>; + }; + + sd1_ctrl_uhs { + pins = "SD1_CLK", "SD1_CMD"; + power-source = <1800>; + }; + + sd1_mux_uhs { + pinmux = <RZG2L_PORT_PINMUX(19, 0, 1)>; /* SD1_CD */ + }; + }; + + sound_clk_pins: sound_clk { + pins = "AUDIO_CLK1", "AUDIO_CLK2"; + input-enable; + }; +}; + |