diff options
Diffstat (limited to 'dts/src/arm64/renesas/rzg2lc-smarc.dtsi')
| -rw-r--r-- | dts/src/arm64/renesas/rzg2lc-smarc.dtsi | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/dts/src/arm64/renesas/rzg2lc-smarc.dtsi b/dts/src/arm64/renesas/rzg2lc-smarc.dtsi index df7631fe5f..aa170492dd 100644 --- a/dts/src/arm64/renesas/rzg2lc-smarc.dtsi +++ b/dts/src/arm64/renesas/rzg2lc-smarc.dtsi @@ -43,6 +43,7 @@ / { aliases { serial1 = &scif1; + i2c2 = &i2c2; }; }; @@ -59,6 +60,24 @@ }; #endif +&cpu_dai { + sound-dai = <&ssi0>; +}; + +&i2c2 { + pinctrl-0 = <&i2c2_pins>; + pinctrl-names = "default"; + clock-frequency = <400000>; + + status = "okay"; + + wm8978: codec@1a { + compatible = "wlf,wm8978"; + #sound-dai-cells = <0>; + reg = <0x1a>; + }; +}; + /* * To enable SCIF1 (SER0) on PMOD1 (CN7), On connector board * SW1 should be at position 2->3 so that SER0_CTS# line is activated @@ -75,3 +94,22 @@ status = "okay"; }; #endif + +&ssi0 { + pinctrl-0 = <&ssi0_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +#if (SW_RSPI_CAN) +&spi1 { + /delete-property/ pinctrl-0; + /delete-property/ pinctrl-names; + status = "disabled"; +}; +#endif + +&vccq_sdhi1 { + gpios = <&pinctrl RZG2L_GPIO(39, 1) GPIO_ACTIVE_HIGH>; +}; |