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-rw-r--r--dts/src/arm64/rockchip/rk3568-bpi-r2-pro.dts283
1 files changed, 273 insertions, 10 deletions
diff --git a/dts/src/arm64/rockchip/rk3568-bpi-r2-pro.dts b/dts/src/arm64/rockchip/rk3568-bpi-r2-pro.dts
index 40cf2236c0..f9127ddfbb 100644
--- a/dts/src/arm64/rockchip/rk3568-bpi-r2-pro.dts
+++ b/dts/src/arm64/rockchip/rk3568-bpi-r2-pro.dts
@@ -8,6 +8,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/soc/rockchip,vop2.h>
#include "rk3568.dtsi"
/ {
@@ -45,7 +46,7 @@
};
};
- dc_12v: dc-12v {
+ dc_12v: dc-12v-regulator {
compatible = "regulator-fixed";
regulator-name = "dc_12v";
regulator-always-on;
@@ -54,7 +55,25 @@
regulator-max-microvolt = <12000000>;
};
- vcc3v3_sys: vcc3v3-sys {
+ hdmi-con {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ ir-receiver {
+ compatible = "gpio-ir-receiver";
+ gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&ir_receiver_pin>;
+ };
+
+ vcc3v3_sys: vcc3v3-sys-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_sys";
regulator-always-on;
@@ -64,7 +83,7 @@
vin-supply = <&dc_12v>;
};
- vcc5v0_sys: vcc5v0-sys {
+ vcc5v0_sys: vcc5v0-sys-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_sys";
regulator-always-on;
@@ -74,7 +93,67 @@
vin-supply = <&dc_12v>;
};
- vcc5v0_usb: vcc5v0_usb {
+ pcie30_avdd0v9: pcie30-avdd0v9-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "pcie30_avdd0v9";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+ vin-supply = <&vcc3v3_sys>;
+ };
+
+ pcie30_avdd1v8: pcie30-avdd1v8-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "pcie30_avdd1v8";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&vcc3v3_sys>;
+ };
+
+ /* pi6c pcie clock generator feeds both ports */
+ vcc3v3_pi6c_05: vcc3v3-pi6c-05-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_pcie";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ enable-active-high;
+ gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
+ startup-delay-us = <200000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ /* actually fed by vcc3v3_sys, dependent on pi6c clock generator */
+ vcc3v3_minipcie: vcc3v3-minipcie-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_minipcie";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ enable-active-high;
+ gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&minipcie_enable_h>;
+ startup-delay-us = <50000>;
+ vin-supply = <&vcc3v3_pi6c_05>;
+ };
+
+ /* actually fed by vcc3v3_sys, dependent on pi6c clock generator */
+ vcc3v3_ngff: vcc3v3-ngff-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_ngff";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ enable-active-high;
+ gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&ngffpcie_enable_h>;
+ startup-delay-us = <50000>;
+ vin-supply = <&vcc3v3_pi6c_05>;
+ };
+
+ vcc5v0_usb: vcc5v0-usb-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_usb";
regulator-always-on;
@@ -84,7 +163,7 @@
vin-supply = <&dc_12v>;
};
- vcc5v0_usb_host: vcc5v0-usb-host {
+ vcc5v0_usb_host: vcc5v0-usb-host-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
@@ -96,7 +175,7 @@
vin-supply = <&vcc5v0_usb>;
};
- vcc5v0_usb_otg: vcc5v0-usb-otg {
+ vcc5v0_usb_otg: vcc5v0-usb-otg-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
@@ -174,6 +253,33 @@
status = "okay";
};
+&gpu {
+ mali-supply = <&vdd_gpu>;
+ status = "okay";
+};
+
+&hdmi {
+ avdd-0v9-supply = <&vdda0v9_image>;
+ avdd-1v8-supply = <&vcca1v8_image>;
+ status = "okay";
+};
+
+&hdmi_in {
+ hdmi_in_vp0: endpoint {
+ remote-endpoint = <&vp0_out_hdmi>;
+ };
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&hdmi_sound {
+ status = "okay";
+};
+
&i2c0 {
status = "okay";
@@ -202,7 +308,6 @@
regulator-name = "vdd_logic";
regulator-always-on;
regulator-boot-on;
- regulator-init-microvolt = <900000>;
regulator-initial-mode = <0x2>;
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1350000>;
@@ -215,7 +320,7 @@
vdd_gpu: DCDC_REG2 {
regulator-name = "vdd_gpu";
- regulator-init-microvolt = <900000>;
+ regulator-always-on;
regulator-initial-mode = <0x2>;
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1350000>;
@@ -239,7 +344,6 @@
vdd_npu: DCDC_REG4 {
regulator-name = "vdd_npu";
- regulator-init-microvolt = <900000>;
regulator-initial-mode = <0x2>;
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1350000>;
@@ -264,6 +368,7 @@
vdda0v9_image: LDO_REG1 {
regulator-name = "vdda0v9_image";
+ regulator-always-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
@@ -359,6 +464,7 @@
vcca1v8_image: LDO_REG9 {
regulator-name = "vcca1v8_image";
+ regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
@@ -389,11 +495,80 @@
};
};
+&i2c3 {
+ status = "okay";
+
+ hym8563: rtc@51 {
+ compatible = "haoyu,hym8563";
+ reg = <0x51>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PD3 IRQ_TYPE_EDGE_FALLING>;
+ #clock-cells = <0>;
+ clock-output-names = "rtcic_32kout";
+ pinctrl-names = "default";
+ pinctrl-0 = <&hym8563_int>;
+ wakeup-source;
+ };
+};
+
&i2c5 {
/* pin 3 (SDA) + 4 (SCL) of header con2 */
status = "disabled";
};
+&i2s0_8ch {
+ /* hdmi sound */
+ status = "okay";
+};
+
+&mdio0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ switch@0 {
+ compatible = "mediatek,mt7531";
+ reg = <0>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@1 {
+ reg = <1>;
+ label = "lan0";
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan1";
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan2";
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "lan3";
+ };
+
+ port@5 {
+ reg = <5>;
+ label = "cpu";
+ ethernet = <&gmac0>;
+ phy-mode = "rgmii";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ pause;
+ };
+ };
+ };
+ };
+};
+
&mdio1 {
rgmii_phy1: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
@@ -401,6 +576,32 @@
};
};
+&pcie30phy {
+ data-lanes = <1 2>;
+ phy-supply = <&vcc3v3_pi6c_05>;
+ status = "okay";
+};
+
+&pcie3x1 {
+ /* M.2 slot */
+ num-lanes = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&ngffpcie_reset_h>;
+ reset-gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc3v3_ngff>;
+ status = "okay";
+};
+
+&pcie3x2 {
+ /* mPCIe slot */
+ num-lanes = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&minipcie_reset_h>;
+ reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc3v3_minipcie>;
+ status = "okay";
+};
+
&pinctrl {
leds {
blue_led_pin: blue-led-pin {
@@ -411,6 +612,36 @@
};
};
+ hym8563 {
+ hym8563_int: hym8563-int {
+ rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ ir-receiver {
+ ir_receiver_pin: ir-receiver-pin {
+ rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ pcie {
+ minipcie_enable_h: minipcie-enable-h {
+ rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none_drv_level_5>;
+ };
+
+ ngffpcie_enable_h: ngffpcie-enable-h {
+ rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none_drv_level_5>;
+ };
+
+ minipcie_reset_h: minipcie-reset-h {
+ rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none_drv_level_5>;
+ };
+
+ ngffpcie_reset_h: ngffpcie-reset-h {
+ rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none_drv_level_5>;
+ };
+ };
+
pmic {
pmic_int: pmic_int {
rockchip,pins =
@@ -523,6 +754,8 @@
};
&tsadc {
+ rockchip,hw-tshut-mode = <1>;
+ rockchip,hw-tshut-polarity = <0>;
status = "okay";
};
@@ -558,7 +791,7 @@
};
&usb_host0_xhci {
- extcon = <&usb2phy0>;
+ dr_mode = "host";
status = "okay";
};
@@ -587,3 +820,33 @@
phy-supply = <&vcc5v0_usb_otg>;
status = "okay";
};
+
+&usb2phy1 {
+ /* USB for PCIe/M2 */
+ status = "okay";
+};
+
+&usb2phy1_host {
+ status = "okay";
+};
+
+&usb2phy1_otg {
+ status = "okay";
+};
+
+&vop {
+ assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
+ assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
+ status = "okay";
+};
+
+&vop_mmu {
+ status = "okay";
+};
+
+&vp0 {
+ vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
+ reg = <ROCKCHIP_VOP2_EP_HDMI0>;
+ remote-endpoint = <&hdmi_in_vp0>;
+ };
+};
generated by cgit v1.2.3 (git 2.39.1) at 2024-04-18 20:01:40 +0000