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-rw-r--r--dts/src/arm64/sprd/sc2731.dtsi169
-rw-r--r--dts/src/arm64/sprd/sp9860g-1h10.dts2
-rw-r--r--dts/src/arm64/sprd/whale2.dtsi81
3 files changed, 252 insertions, 0 deletions
diff --git a/dts/src/arm64/sprd/sc2731.dtsi b/dts/src/arm64/sprd/sc2731.dtsi
new file mode 100644
index 0000000000..4331006185
--- /dev/null
+++ b/dts/src/arm64/sprd/sc2731.dtsi
@@ -0,0 +1,169 @@
+/*
+ * Spreadtrum SC2731 PMIC dts file
+ *
+ * Copyright (C) 2018, Spreadtrum Communications Inc.
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+&adi_bus {
+ sc2731_pmic: pmic@0 {
+ compatible = "sprd,sc2731";
+ reg = <0>;
+ spi-max-frequency = <26000000>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ rtc@280 {
+ compatible = "sprd,sc27xx-rtc", "sprd,sc2731-rtc";
+ reg = <0x280>;
+ interrupt-parent = <&sc2731_pmic>;
+ interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ regulators {
+ compatible = "sprd,sc27xx-regulator";
+
+ vddarm0: BUCK_CPU0 {
+ regulator-name = "vddarm0";
+ regulator-min-microvolt = <400000>;
+ regulator-max-microvolt = <1996875>;
+ regulator-ramp-delay = <25000>;
+ regulator-always-on;
+ };
+
+ vddarm1: BUCK_CPU1 {
+ regulator-name = "vddarm1";
+ regulator-min-microvolt = <400000>;
+ regulator-max-microvolt = <1996875>;
+ regulator-ramp-delay = <25000>;
+ regulator-always-on;
+ };
+
+ dcdcrf: BUCK_RF {
+ regulator-name = "dcdcrf";
+ regulator-min-microvolt = <600000>;
+ regulator-max-microvolt = <2196875>;
+ regulator-ramp-delay = <25000>;
+ regulator-enable-ramp-delay = <100>;
+ regulator-always-on;
+ };
+
+ vddcama0: LDO_CAMA0 {
+ regulator-name = "vddcama0";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <3750000>;
+ regulator-enable-ramp-delay = <100>;
+ };
+
+ vddcama1: LDO_CAMA1 {
+ regulator-name = "vddcama1";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <3750000>;
+ regulator-enable-ramp-delay = <100>;
+ regulator-ramp-delay = <25000>;
+ };
+
+ vddcammot: LDO_CAMMOT {
+ regulator-name = "vddcammot";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <3750000>;
+ regulator-enable-ramp-delay = <100>;
+ regulator-ramp-delay = <25000>;
+ };
+
+ vddvldo: LDO_VLDO {
+ regulator-name = "vddvldo";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <3750000>;
+ regulator-enable-ramp-delay = <100>;
+ regulator-ramp-delay = <25000>;
+ };
+
+ vddemmccore: LDO_EMMCCORE {
+ regulator-name = "vddemmccore";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <3750000>;
+ regulator-enable-ramp-delay = <100>;
+ regulator-ramp-delay = <25000>;
+ regulator-boot-on;
+ };
+
+ vddsdcore: LDO_SDCORE {
+ regulator-name = "vddsdcore";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <3750000>;
+ regulator-enable-ramp-delay = <100>;
+ regulator-ramp-delay = <25000>;
+ };
+
+ vddsdio: LDO_SDIO {
+ regulator-name = "vddsdio";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <3750000>;
+ regulator-enable-ramp-delay = <100>;
+ regulator-ramp-delay = <25000>;
+ };
+
+ vddwifipa: LDO_WIFIPA {
+ regulator-name = "vddwifipa";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <3750000>;
+ regulator-enable-ramp-delay = <100>;
+ regulator-ramp-delay = <25000>;
+ };
+
+ vddusb33: LDO_USB33 {
+ regulator-name = "vddusb33";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <3750000>;
+ regulator-enable-ramp-delay = <100>;
+ regulator-ramp-delay = <25000>;
+ };
+
+ vddcamd0: LDO_CAMD0 {
+ regulator-name = "vddcamd0";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1793750>;
+ regulator-enable-ramp-delay = <100>;
+ regulator-ramp-delay = <25000>;
+ };
+
+ vddcamd1: LDO_CAMD1 {
+ regulator-name = "vddcamd1";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1793750>;
+ regulator-enable-ramp-delay = <100>;
+ regulator-ramp-delay = <25000>;
+ };
+
+ vddcon: LDO_CON {
+ regulator-name = "vddcon";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1793750>;
+ regulator-enable-ramp-delay = <100>;
+ regulator-ramp-delay = <25000>;
+ };
+
+ vddcamio: LDO_CAMIO {
+ regulator-name = "vddcamio";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1793750>;
+ regulator-enable-ramp-delay = <100>;
+ regulator-ramp-delay = <25000>;
+ };
+
+ vddsram: LDO_SRAM {
+ regulator-name = "vddsram";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1793750>;
+ regulator-enable-ramp-delay = <100>;
+ regulator-ramp-delay = <25000>;
+ regulator-always-on;
+ };
+ };
+ };
+};
diff --git a/dts/src/arm64/sprd/sp9860g-1h10.dts b/dts/src/arm64/sprd/sp9860g-1h10.dts
index ae0b28ce63..985ebb5d15 100644
--- a/dts/src/arm64/sprd/sp9860g-1h10.dts
+++ b/dts/src/arm64/sprd/sp9860g-1h10.dts
@@ -9,6 +9,7 @@
/dts-v1/;
#include "sc9860.dtsi"
+#include "sc2731.dtsi"
/ {
model = "Spreadtrum SP9860G 3GFHD Board";
@@ -20,6 +21,7 @@
serial1 = &uart1; /* UART console */
serial2 = &uart2; /* Reserved */
serial3 = &uart3; /* for GPS */
+ spi0 = &adi_bus;
};
memory{
diff --git a/dts/src/arm64/sprd/whale2.dtsi b/dts/src/arm64/sprd/whale2.dtsi
index 328009c463..66a881e6da 100644
--- a/dts/src/arm64/sprd/whale2.dtsi
+++ b/dts/src/arm64/sprd/whale2.dtsi
@@ -6,6 +6,8 @@
* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
+#include <dt-bindings/clock/sprd,sc9860-clk.h>
+
/ {
interrupt-parent = <&gic>;
#address-cells = <2>;
@@ -104,6 +106,85 @@
status = "disabled";
};
};
+
+ ap-ahb {
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ ap_dma: dma-controller@20100000 {
+ compatible = "sprd,sc9860-dma";
+ reg = <0 0x20100000 0 0x4000>;
+ interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+ #dma-channels = <32>;
+ clock-names = "enable";
+ clocks = <&apahb_gate CLK_DMA_EB>;
+ };
+ };
+
+ aon {
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ adi_bus: spi@40030000 {
+ compatible = "sprd,sc9860-adi";
+ reg = <0 0x40030000 0 0x10000>;
+ hwlocks = <&hwlock 0>;
+ hwlock-names = "adi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ timer@40050000 {
+ compatible = "sprd,sc9860-timer";
+ reg = <0 0x40050000 0 0x20>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ext_32k>;
+ };
+
+ hwlock: hwspinlock@40500000 {
+ compatible = "sprd,hwspinlock-r3p0";
+ reg = <0 0x40500000 0 0x1000>;
+ #hwlock-cells = <1>;
+ clock-names = "enable";
+ clocks = <&aon_gate CLK_SPLK_EB>;
+ };
+
+ pin_controller: pinctrl@402a0000 {
+ compatible = "sprd,sc9860-pinctrl";
+ reg = <0 0x402a0000 0 0x10000>;
+ };
+
+ watchdog@40310000 {
+ compatible = "sprd,sp9860-wdt";
+ reg = <0 0x40310000 0 0x1000>;
+ interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
+ timeout-sec = <12>;
+ clock-names = "enable";
+ clocks = <&aon_gate CLK_APCPU_WDG_EB>;
+ };
+ };
+
+ agcp {
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ agcp_dma: dma-controller@41580000 {
+ compatible = "sprd,sc9860-dma";
+ reg = <0 0x41580000 0 0x4000>;
+ #dma-cells = <1>;
+ #dma-channels = <32>;
+ clock-names = "enable", "ashb_eb";
+ clocks = <&agcp_gate CLK_AGCP_DMAAP_EB>,
+ <&agcp_gate CLK_AGCP_AP_ASHB_EB>;
+ };
+ };
};
ext_32k: ext_32k {
generated by cgit v1.2.3 (git 2.39.1) at 2024-04-24 19:09:01 +0000