diff options
Diffstat (limited to 'dts/src/arm')
261 files changed, 10369 insertions, 2331 deletions
diff --git a/dts/src/arm/am335x-pdu001.dts b/dts/src/arm/am335x-pdu001.dts index b793beeab2..ce6cc2b966 100644 --- a/dts/src/arm/am335x-pdu001.dts +++ b/dts/src/arm/am335x-pdu001.dts @@ -353,7 +353,7 @@ }; }; - mcp79400: mcp79400@6f { + mcp79400: rtc@6f { compatible = "microchip,mcp7940x"; reg = <0x6f>; }; diff --git a/dts/src/arm/am335x-sancloud-bbe-extended-wifi.dts b/dts/src/arm/am335x-sancloud-bbe-extended-wifi.dts new file mode 100644 index 0000000000..246a1a9b3e --- /dev/null +++ b/dts/src/arm/am335x-sancloud-bbe-extended-wifi.dts @@ -0,0 +1,113 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2021 Sancloud Ltd + * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ + */ +/dts-v1/; + +#include "am33xx.dtsi" +#include "am335x-bone-common.dtsi" +#include "am335x-boneblack-common.dtsi" +#include "am335x-sancloud-bbe-common.dtsi" +#include <dt-bindings/interrupt-controller/irq.h> + +/ { + model = "SanCloud BeagleBone Enhanced Extended WiFi"; + compatible = "sancloud,am335x-boneenhanced", + "ti,am335x-bone-black", + "ti,am335x-bone", + "ti,am33xx"; + + wlan_en_reg: fixedregulator@2 { + compatible = "regulator-fixed"; + regulator-name = "wlan-en-regulator"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + startup-delay-us= <100000>; + }; +}; + +&am33xx_pinmux { + mmc3_pins: pinmux_mmc3_pins { + pinctrl-single,pins = < + /* gpmc_a9.gpio1_25: RADIO_EN */ + AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_OUTPUT_PULLUP, MUX_MODE7) + + /* gpmc_ad12.mmc2_dat0 */ + AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT_PULLUP, MUX_MODE3) + + /* gpmc_ad13.mmc2_dat1 */ + AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLUP, MUX_MODE3) + + /* gpmc_ad14.mmc2_dat2 */ + AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLUP, MUX_MODE3) + + /* gpmc_ad15.mmc2_dat3 */ + AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLUP, MUX_MODE3) + + /* gpmc_csn3.mmc2_cmd */ + AM33XX_PADCONF(AM335X_PIN_GPMC_CSN3, PIN_INPUT_PULLUP, MUX_MODE3) + + /* gpmc_clk.mmc2_clk */ + AM33XX_PADCONF(AM335X_PIN_GPMC_CLK, PIN_INPUT_PULLUP, MUX_MODE3) + >; + }; + + bluetooth_pins: pinmux_bluetooth_pins { + pinctrl-single,pins = < + /* event_intr0.gpio0_19 */ + AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_INPUT_PULLUP, MUX_MODE7) + >; + }; + + uart1_pins: pinmux_uart1_pins { + pinctrl-single,pins = < + /* uart1_rxd */ + AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT, MUX_MODE0) + + /* uart1_txd */ + AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_INPUT, MUX_MODE0) + + /* uart1_ctsn */ + AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE0) + + /* uart1_rtsn */ + AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE0) + >; + }; +}; + +&i2c2 { + status = "disabled"; +}; + +&mmc3 { + status = "okay"; + vmmc-supply = <&wlan_en_reg>; + bus-width = <4>; + non-removable; + cap-power-off-card; + ti,needs-special-hs-handling; + keep-power-in-suspend; + pinctrl-names = "default"; + pinctrl-0 = <&mmc3_pins>; + dmas = <&edma_xbar 12 0 1 + &edma_xbar 13 0 2>; + dma-names = "tx", "rx"; + clock-frequency = <50000000>; + max-frequency = <50000000>; +}; + +&uart1 { + status = "okay"; + + bluetooth { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins &bluetooth_pins>; + compatible = "qcom,qca6174-bt"; + enable-gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>; + clocks = <&l4ls_clkctrl AM3_L4LS_UART2_CLKCTRL 0>; + interrupt-parent = <&gpio0>; + interrupts = <19 IRQ_TYPE_EDGE_RISING>; + }; +}; diff --git a/dts/src/arm/am43x-epos-evm.dts b/dts/src/arm/am43x-epos-evm.dts index 2f4d2e4e9b..4f9a7251a1 100644 --- a/dts/src/arm/am43x-epos-evm.dts +++ b/dts/src/arm/am43x-epos-evm.dts @@ -11,7 +11,7 @@ #include <dt-bindings/pinctrl/am43xx.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/pwm/pwm.h> -#include <dt-bindings/sound/tlv320aic31xx-micbias.h> +#include <dt-bindings/sound/tlv320aic31xx.h> / { model = "TI AM43x EPOS EVM"; diff --git a/dts/src/arm/armada-370-c200-v2.dts b/dts/src/arm/armada-370-c200-v2.dts new file mode 100644 index 0000000000..1a4a09bdde --- /dev/null +++ b/dts/src/arm/armada-370-c200-v2.dts @@ -0,0 +1,388 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) +/* + * Device Tree file for Ctera C200-V2 + * + * Copyright (C) 2022 Pawel Dembicki <paweldembicki@gmail.com> + */ + +/dts-v1/; + +#include "armada-370.dtsi" +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/thermal/thermal.h> +#include <dt-bindings/leds/common.h> + +/ { + model = "Ctera C200 V2"; + compatible = "ctera,c200-v2", "marvell,armada370", "marvell,armada-370-xp"; + + chosen { + bootargs = "console=ttyS0,115200"; + stdout-path = "serial0:115200n8"; + }; + + memory { + device_type = "memory"; + reg = <0x00000000 0x40000000>; /* 1024 MB */ + }; + + soc { + ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000 + MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000 + MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>; + }; + + thermal-zones { + ethphy-thermal { + polling-delay = <20000>; + polling-delay-passive = <2000>; + + thermal-sensors = <ðphy0>; + + trips { + ethphy_alert1: trip1 { + temperature = <65000>; + hysteresis = <4000>; + type = "passive"; + }; + + ethphy_crit: trip2 { + temperature = <100000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + }; + + beeper { + compatible = "pwm-beeper"; + pinctrl-0 = <&pmx_beeper>; + pinctrl-names = "default"; + pwms = <&gpio1 31 4000>; + }; + + gpio-poweroff { + compatible = "gpio-poweroff"; + pinctrl-0 = <&pmx_poweroff>; + pinctrl-names = "default"; + gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>; + }; + + keys { + compatible = "gpio-keys"; + pinctrl-0 = <&pmx_buttons>; + pinctrl-names = "default"; + + power { + label = "Power Button"; + linux,code = <KEY_POWER>; + gpios = <&gpio0 10 GPIO_ACTIVE_HIGH>; + }; + + reset { + label = "Reset Button"; + linux,code = <KEY_RESTART>; + gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; + }; + + usb1 { + label = "USB1 Button"; + linux,code = <BTN_0>; + gpios = <&gpio1 0 GPIO_ACTIVE_LOW>; + }; + + usb2 { + label = "USB2 Button"; + linux,code = <BTN_1>; + gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-0 = <&pmx_leds1 &pmx_leds2>; + pinctrl-names = "default"; + + led-0 { + function = LED_FUNCTION_USB; + function-enumerator = <2>; + color = <LED_COLOR_ID_RED>; + gpios = <&gpio0 12 GPIO_ACTIVE_LOW>; + }; + + led-1 { + function = LED_FUNCTION_USB; + function-enumerator = <2>; + color = <LED_COLOR_ID_GREEN>; + gpios = <&gpio0 13 GPIO_ACTIVE_LOW>; + }; + + led-2 { + function = LED_FUNCTION_USB; + function-enumerator = <1>; + color = <LED_COLOR_ID_RED>; + gpios = <&gpio0 15 GPIO_ACTIVE_LOW>; + }; + + led-3 { + function = LED_FUNCTION_USB; + function-enumerator = <1>; + color = <LED_COLOR_ID_GREEN>; + gpios = <&gpio0 16 GPIO_ACTIVE_LOW>; + }; + + led-4 { + function = LED_FUNCTION_DISK; + function-enumerator = <2>; + color = <LED_COLOR_ID_GREEN>; + gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; + }; + + led-5 { + function = LED_FUNCTION_DISK; + function-enumerator = <1>; + color = <LED_COLOR_ID_RED>; + gpios = <&gpio1 18 GPIO_ACTIVE_LOW>; + }; + + led-6 { + function = LED_FUNCTION_DISK; + function-enumerator = <2>; + color = <LED_COLOR_ID_RED>; + gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; + }; + + led-7 { + function = LED_FUNCTION_INDICATOR; + color = <LED_COLOR_ID_BLUE>; + gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>; + }; + + led-8 { + function = LED_FUNCTION_DISK_ERR; + color = <LED_COLOR_ID_RED>; + gpios = <&gpio1 21 GPIO_ACTIVE_LOW>; + }; + + led-9 { + function = LED_FUNCTION_DISK_ERR; + color = <LED_COLOR_ID_GREEN>; + gpios = <&gpio1 23 GPIO_ACTIVE_LOW>; + }; + + led-10 { + function = LED_FUNCTION_STATUS; + color = <LED_COLOR_ID_RED>; + gpios = <&gpio1 24 GPIO_ACTIVE_LOW>; + }; + + led-11 { + function = LED_FUNCTION_DISK; + function-enumerator = <1>; + color = <LED_COLOR_ID_GREEN>; + gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; + }; + + led-12 { + function = LED_FUNCTION_STATUS; + color = <LED_COLOR_ID_GREEN>; + gpios = <&gpio1 26 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&coherencyfab { + broken-idle; +}; + +ð1 { + pinctrl-0 = <&ge1_rgmii_pins>; + pinctrl-names = "default"; + status = "okay"; + phy-handle = <ðphy0>; + phy-connection-type = "rgmii-id"; +}; + +&i2c0 { + pinctrl-0 = <&i2c0_pins>; + pinctrl-names = "default"; + clock-frequency = <100000>; + status = "okay"; + + hwmon@2a { + compatible = "nuvoton,nct7802"; + reg = <0x2a>; + }; + + rtc@30 { + compatible = "sii,s35390a"; + reg = <0x30>; + }; +}; + +&mdio { + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + + ethphy0: ethernet-phy@0 { /* Marvell 88E1318 */ + reg = <0>; + #thermal-sensor-cells = <0>; + }; +}; + +&nand_controller { + status = "okay"; + + nand@0 { + reg = <0>; + label = "pxa3xx_nand-0"; + nand-rb = <0>; + marvell,nand-keep-config; + nand-on-flash-bbt; + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "uboot"; + reg = <0x0000000 0x200000>; + read-only; + }; + + partition@200000 { + label = "certificate"; + reg = <0x0200000 0x100000>; + read-only; + }; + + partition@300000 { + label = "preset_cfg"; + reg = <0x0300000 0x100000>; + read-only; + }; + + partition@400000 { + label = "dev_params"; + reg = <0x0400000 0x100000>; + read-only; + }; + partition@500000 { + label = "active_bank"; + reg = <0x0500000 0x0100000>; + }; + + partition@600000 { + label = "magic"; + reg = <0x0600000 0x0100000>; + read-only; + }; + + partition@700000 { + label = "bank1"; + reg = <0x0700000 0x2800000>; + }; + + partition@2f00000 { + label = "bank2"; + reg = <0x2f00000 0x2800000>; + }; + + /* 0x5700000-0x5a00000 undefined in vendor firmware */ + + partition@5a00000 { + label = "reserved"; + reg = <0x5a00000 0x2000000>; + }; + + partition@7a00000 { + label = "rootfs"; + reg = <0x7a00000 0x8600000>; + }; + }; + }; +}; + +&pciec { + status = "okay"; + + pcie@1,0 { /* Renesas uPD720202 USB 3.0 controller */ + pinctrl-0 = <&pmx_pcie>; + pinctrl-names = "default"; + status = "okay"; + reset-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>; + }; +}; + +&pinctrl { + pmx_poweroff: pmx-poweroff { + marvell,pins = "mpp7"; + marvell,function = "gpo"; + }; + + pmx_power_cpu: pmx-power-cpu { + marvell,pins = "mpp4"; + marvell,function = "vdd"; + }; + + pmx_buttons: pmx-buttons { + marvell,pins = "mpp6", "mpp10", "mpp14", "mpp32"; + marvell,function = "gpio"; + }; + + pmx_leds1: pmx-leds1 { + marvell,pins = "mpp47"; + marvell,function = "gpo"; + }; + + pmx_leds2: pmx-leds2 { + marvell,pins = "mpp12", "mpp13", "mpp15", "mpp16", "mpp50", "mpp51", + "mpp52", "mpp53", "mpp55", "mpp56", "mpp57", "mpp58"; + marvell,function = "gpio"; + }; + + pmx_pcie: pmx-pcie { + marvell,pins = "mpp59"; + marvell,function = "gpio"; + }; + + pmx_beeper: pmx-beeper { + marvell,pins = "mpp63"; + marvell,function = "gpio"; + }; +}; + +&pmsu { + pinctrl-0 = <&pmx_power_cpu>; + pinctrl-names = "default"; +}; + +&rtc { + status = "disabled"; +}; + +&sata { + nr-ports = <2>; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + hdd0_temp: sata-port@0 { + reg = <0>; + #thermal-sensor-cells = <0>; + }; + + hdd1_temp: sata-port@1 { + reg = <1>; + #thermal-sensor-cells = <0>; + }; +}; + +&uart0 { + status = "okay"; +}; diff --git a/dts/src/arm/armada-385-turris-omnia.dts b/dts/src/arm/armada-385-turris-omnia.dts index 5bd6a66d2c..f240018148 100644 --- a/dts/src/arm/armada-385-turris-omnia.dts +++ b/dts/src/arm/armada-385-turris-omnia.dts @@ -71,16 +71,19 @@ pcie@1,0 { /* Port 0, Lane 0 */ status = "okay"; + slot-power-limit-milliwatt = <10000>; }; pcie@2,0 { /* Port 1, Lane 0 */ status = "okay"; + slot-power-limit-milliwatt = <10000>; }; pcie@3,0 { /* Port 2, Lane 0 */ status = "okay"; + slot-power-limit-milliwatt = <10000>; }; }; }; diff --git a/dts/src/arm/armada-385.dtsi b/dts/src/arm/armada-385.dtsi index f0022d10c7..83392b92da 100644 --- a/dts/src/arm/armada-385.dtsi +++ b/dts/src/arm/armada-385.dtsi @@ -69,16 +69,25 @@ reg = <0x0800 0 0 0 0>; #address-cells = <3>; #size-cells = <2>; + interrupt-names = "intx"; + interrupts-extended = <&gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 0x81000000 0 0 0x81000000 0x1 0 1 0>; bus-range = <0x00 0xff>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie1_intc 0>, + <0 0 0 2 &pcie1_intc 1>, + <0 0 0 3 &pcie1_intc 2>, + <0 0 0 4 &pcie1_intc 3>; marvell,pcie-port = <0>; marvell,pcie-lane = <0>; clocks = <&gateclk 8>; status = "disabled"; + pcie1_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells = <1>; + }; }; /* x1 port */ @@ -88,16 +97,25 @@ reg = <0x1000 0 0 0 0>; #address-cells = <3>; #size-cells = <2>; + interrupt-names = "intx"; + interrupts-extended = <&gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 0x81000000 0 0 0x81000000 0x2 0 1 0>; bus-range = <0x00 0xff>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie2_intc 0>, + <0 0 0 2 &pcie2_intc 1>, + <0 0 0 3 &pcie2_intc 2>, + <0 0 0 4 &pcie2_intc 3>; marvell,pcie-port = <1>; marvell,pcie-lane = <0>; clocks = <&gateclk 5>; status = "disabled"; + pcie2_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells = <1>; + }; }; /* x1 port */ @@ -107,16 +125,25 @@ reg = <0x1800 0 0 0 0>; #address-cells = <3>; #size-cells = <2>; + interrupt-names = "intx"; + interrupts-extended = <&gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0 0x81000000 0 0 0x81000000 0x3 0 1 0>; bus-range = <0x00 0xff>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie3_intc 0>, + <0 0 0 2 &pcie3_intc 1>, + <0 0 0 3 &pcie3_intc 2>, + <0 0 0 4 &pcie3_intc 3>; marvell,pcie-port = <2>; marvell,pcie-lane = <0>; clocks = <&gateclk 6>; status = "disabled"; + pcie3_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells = <1>; + }; }; /* @@ -129,16 +156,25 @@ reg = <0x2000 0 0 0 0>; #address-cells = <3>; #size-cells = <2>; + interrupt-names = "intx"; + interrupts-extended = <&gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0 0x81000000 0 0 0x81000000 0x4 0 1 0>; bus-range = <0x00 0xff>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie4_intc 0>, + <0 0 0 2 &pcie4_intc 1>, + <0 0 0 3 &pcie4_intc 2>, + <0 0 0 4 &pcie4_intc 3>; marvell,pcie-port = <3>; marvell,pcie-lane = <0>; clocks = <&gateclk 7>; status = "disabled"; + pcie4_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells = <1>; + }; }; }; }; diff --git a/dts/src/arm/aspeed-bmc-ampere-mtjade.dts b/dts/src/arm/aspeed-bmc-ampere-mtjade.dts index 4c3c3f1a12..1b2e7ad375 100644 --- a/dts/src/arm/aspeed-bmc-ampere-mtjade.dts +++ b/dts/src/arm/aspeed-bmc-ampere-mtjade.dts @@ -339,17 +339,8 @@ <&adc10mux 0>, <&adc10mux 1>, <&adc11mux 0>, <&adc11mux 1>, <&adc12mux 0>, <&adc12mux 1>, - <&adc13mux 0>, <&adc13mux 1>; - }; - - iio-hwmon-adc14 { - compatible = "iio-hwmon"; - io-channels = <&adc 14>; - }; - - iio-hwmon-battery { - compatible = "iio-hwmon"; - io-channels = <&adc 15>; + <&adc13mux 0>, <&adc13mux 1>, + <&adc 14>, <&adc 15>; }; }; @@ -362,6 +353,13 @@ /* spi-max-frequency = <50000000>; */ #include "openbmc-flash-layout-64.dtsi" }; + + flash@1 { + status = "okay"; + m25p,fast-read; + label = "alt-bmc"; +#include "openbmc-flash-layout-64-alt.dtsi" + }; }; &spi1 { @@ -853,7 +851,7 @@ /*E0-E7*/ "","","","","","","","", /*F0-F7*/ "","","BMC_SYS_PSON_L","S0_DDR_SAVE","PGOOD", "S1_DDR_SAVE","","", - /*G0-G7*/ "S0_FW_BOOT_OK","SHD_REQ_L","","S0_OVERTEMP_L","","", + /*G0-G7*/ "host0-ready","SHD_REQ_L","","S0_OVERTEMP_L","","", "","", /*H0-H7*/ "","","","","PSU1_VIN_GOOD","PSU2_VIN_GOOD","","", /*I0-I7*/ "PSU1_PRESENT","PSU2_PRESENT","S1_BMC_SPECIAL_BOOT", @@ -869,7 +867,7 @@ /*Q0-Q7*/ "","","","","","UID_BUTTON","","", /*R0-R7*/ "","","BMC_EXT_HIGHTEMP_L","OCP_AUX_PWREN", "OCP_MAIN_PWREN","RESET_BUTTON","","", - /*S0-S7*/ "","","","","RTC_BAT_SEN_EN","","","", + /*S0-S7*/ "","","","","rtc-battery-voltage-read-enable","","","", /*T0-T7*/ "","","","","","","","", /*U0-U7*/ "","","","","","","","", /*V0-V7*/ "","","","","","","","", @@ -884,7 +882,7 @@ /*AC0-AC7*/ "SYS_PWR_GD","","","","","BMC_READY","SLAVE_PRESENT_L", "BMC_OCP_PG"; - i2c4_o_en { + i2c4-o-en-hog { gpio-hog; gpios = <ASPEED_GPIO(Y, 2) GPIO_ACTIVE_HIGH>; output-high; diff --git a/dts/src/arm/aspeed-bmc-asrock-romed8hm3.dts b/dts/src/arm/aspeed-bmc-asrock-romed8hm3.dts new file mode 100644 index 0000000000..e71ccfd1df --- /dev/null +++ b/dts/src/arm/aspeed-bmc-asrock-romed8hm3.dts @@ -0,0 +1,259 @@ +// SPDX-License-Identifier: GPL-2.0+ +/dts-v1/; + +#include "aspeed-g5.dtsi" +#include <dt-bindings/gpio/aspeed-gpio.h> +#include <dt-bindings/interrupt-controller/irq.h> + +/{ + model = "ASRock ROMED8HM3 BMC v1.00"; + compatible = "asrock,romed8hm3-bmc", "aspeed,ast2500"; + + aliases { + serial4 = &uart5; + }; + + chosen { + stdout-path = &uart5; + bootargs = "console=tty0 console=ttyS4,115200 earlycon"; + }; + + memory@80000000 { + reg = <0x80000000 0x20000000>; + }; + + leds { + compatible = "gpio-leds"; + + heartbeat { + gpios = <&gpio ASPEED_GPIO(H, 6) GPIO_ACTIVE_LOW>; + linux,default-trigger = "timer"; + }; + + system-fault { + gpios = <&gpio ASPEED_GPIO(Z, 2) GPIO_ACTIVE_LOW>; + panic-indicator; + }; + }; + + iio-hwmon { + compatible = "iio-hwmon"; + io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, + <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>, + <&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>, + <&adc 12>, <&adc 13>, <&adc 14>, <&adc 15>; + }; +}; + +&fmc { + status = "okay"; + flash@0 { + status = "okay"; + m25p,fast-read; + label = "bmc"; + spi-max-frequency = <100000000>; /* 100 MHz */ +#include "openbmc-flash-layout-64.dtsi" + }; +}; + +&uart5 { + status = "okay"; +}; + +&vuart { + status = "okay"; + aspeed,lpc-io-reg = <0x2f8>; + aspeed,lpc-interrupts = <3 IRQ_TYPE_LEVEL_HIGH>; +}; + +&mac0 { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rgmii1_default &pinctrl_mdio1_default>; +}; + +&i2c0 { + status = "okay"; + + /* inlet temp sensor */ + w83773g@4c { + compatible = "nuvoton,w83773g"; + reg = <0x4c>; + }; +}; + +&i2c1 { + status = "okay"; +}; + +&i2c2 { + status = "okay"; + + /* IPB temp sensor */ + w83773g@4c { + compatible = "nuvoton,w83773g"; + reg = <0x4c>; + }; + + /* IPB PMIC */ + lm25066@40 { + compatible = "lm25066"; + reg = <0x40>; + }; + + /* 12VSB PMIC */ + lm25066@41 { + compatible = "lm25066"; + reg = <0x41>; + }; +}; + +&i2c4 { + status = "okay"; +}; + +&i2c5 { + status = "okay"; +}; + +&i2c6 { + status = "okay"; +}; + +&i2c7 { + status = "okay"; + + /* Baseboard FRU eeprom */ + eeprom@50 { + compatible = "st,24c128", "atmel,24c128"; + reg = <0x50>; + pagesize = <16>; + }; +}; + +&i2c8 { + status = "okay"; +}; + +&i2c9 { + status = "okay"; +}; + +&video { + status = "okay"; +}; + +&vhub { + status = "okay"; +}; + +&lpc_ctrl { + status = "okay"; +}; + +&lpc_snoop { + status = "okay"; + snoop-ports = <0x80>; +}; + +&kcs3 { + status = "okay"; + aspeed,lpc-io-reg = <0xca2>; +}; + +&pwm_tacho { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm3_default + &pinctrl_pwm4_default + &pinctrl_pwm5_default + &pinctrl_pwm6_default>; + + fan@3 { + reg = <0x03>; + aspeed,fan-tach-ch = /bits/ 8 <0x03 0x0b>; + }; + + fan@4 { + reg = <0x04>; + aspeed,fan-tach-ch = /bits/ 8 <0x04 0x0c>; + }; + + fan@5 { + reg = <0x05>; + aspeed,fan-tach-ch = /bits/ 8 <0x05 0x0d>; + }; + + fan@6 { + reg = <0x06>; + aspeed,fan-tach-ch = /bits/ 8 <0x06 0x0e>; + }; +}; + +&gpio { + status = "okay"; + gpio-line-names = + /* A */ "LOCATORLED_STATUS_N", "BMC_MAC2_INTB", "NMI_BTN_N", "BMC_NMI", + "", "", "", "", + /* B */ "DDR_MEM_TEMP", "", "", "", "", "", "", "", + /* C */ "", "", "", "", "PCIE_HP_SEL_N", "PCIE_SATA_SEL_N", "LOCATORBTN", "", + /* D */ "BMC_PSIN", "BMC_PSOUT", "BMC_RESETCON", "RESETCON", + "", "", "", "PSU_FAN_FAIL_N", + /* E */ "", "", "", "", "", "", "", "", + /* F */ "NIC_PWR_GOOD", "PRSNTB0", "PRSNTB1", "PRSNTB2", + "PRSNTB3", "", "3VSB_PCIE1_PG", "12V_PCIE1_PG", + /* G */ "HWM_BAT_EN", "CHASSIS_ID0", "CHASSIS_ID1", "CHASSIS_ID2", + "BMC_ALERT1_N_R", "BMC_ALERT2_N_R", "BMC_ALERT3_N", "BMC_ALERT4_N", + /* H */ "X24_C1_PRSNT", "X24_C2_PRSNT", "X24_C3_PRSNT", "FM_MEM_THERM_EVENT_BMC_R_N", + "FACMODE", "BMC_RTCRST", "BMC_HB_LED_N", "BMC_CASEOPEN", + /* I */ "", "", "", "", "", "", "", "", + /* J */ "BMC_READY", "BMC_PCH_BIOS_CS_N", "", "P0_MA_DDR_QS_CS_N", + "", "", "", "", + /* K */ "", "", "", "", "", "", "", "", + /* L */ "", "", "", "", "", "", "", "", + /* M */ "", "", "MEZZ_PWRBRK_N", "OCP_HP_RST_EN", + "MAIN_PWR_EN_G", "BMC_MAIN_EN", "AUX_PWR_EN_G", "BMC_AUX_EN", + /* N */ "", "", "", "", "", "", "", "", + /* O */ "", "", "", "", "", "", "", "", + /* P */ "", "", "", "", "", "", "", "", + /* Q */ "", "", "", "", + "BMC_SMB_PRESENT_1_N", "BMC_SMB_PRESENT_2_N", + "BMC_SMB_PRESENT_3_N", "BMC_PCIE_WAKE_N", + /* R */ "", "", "THERMALTRIP_CLEAR_N", "", "", "", "", "", + /* S */ "", "", "", "", "", "", "", "", + /* T */ "", "", "", "", "", "", "", "", + /* U */ "", "", "", "", "", "", "", "", + /* V */ "", "", "", "", "", "", "", "", + /* W */ "", "", "", "", "", "", "", "", + /* X */ "", "", "", "", "", "", "", "", + /* Y */ "SLP_S3", "SLP_S4_S5", "NODE_ID_1", "NODE_ID_2", "", "", "", "", + /* Z */ "", "", "SYSTEM_FAULT_LED_N", "FAST_THROTTLE_N", + "", "", "", "", + /* AA */ "FM_CPU0_IBMC_THERMTRIP_N", "", "PROCHOT_L_G", "", + "", "", "", "", + /* AB */ "BMC_FORCE_SELFREFRESH", "PWRGD_OUT", "", "IRQ_BMC_PCH_SMI_LPC_N", + "", "", "", "", + /* AC */ "", "", "", "", "", "", "", ""; +}; + +&adc { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_adc0_default + &pinctrl_adc1_default + &pinctrl_adc2_default + &pinctrl_adc3_default + &pinctrl_adc4_default + &pinctrl_adc5_default + &pinctrl_adc6_default + &pinctrl_adc7_default + &pinctrl_adc8_default + &pinctrl_adc9_default + &pinctrl_adc10_default + &pinctrl_adc11_default + &pinctrl_adc12_default + &pinctrl_adc13_default + &pinctrl_adc14_default + &pinctrl_adc15_default>; +}; diff --git a/dts/src/arm/aspeed-bmc-facebook-bletchley.dts b/dts/src/arm/aspeed-bmc-facebook-bletchley.dts index f973ea883b..eaf1bc261e 100644 --- a/dts/src/arm/aspeed-bmc-facebook-bletchley.dts +++ b/dts/src/arm/aspeed-bmc-facebook-bletchley.dts @@ -5,6 +5,8 @@ #include "aspeed-g6.dtsi" #include <dt-bindings/gpio/aspeed-gpio.h> #include <dt-bindings/usb/pd.h> +#include <dt-bindings/leds/leds-pca955x.h> +#include <dt-bindings/interrupt-controller/irq.h> / { model = "Facebook Bletchley BMC"; @@ -31,7 +33,7 @@ <&adc1 4>, <&adc1 5>, <&adc1 6>, <&adc1 7>; }; - spi_gpio: spi-gpio { + spi1_gpio: spi1-gpio { compatible = "spi-gpio"; #address-cells = <1>; #size-cells = <0>; @@ -49,119 +51,165 @@ }; }; + spi2_gpio: spi2-gpio { + compatible = "spi-gpio"; + #address-cells = <1>; + #size-cells = <0>; + + gpio-sck = <&gpio0 ASPEED_GPIO(X, 3) GPIO_ACTIVE_HIGH>; + gpio-mosi = <&gpio0 ASPEED_GPIO(X, 4) GPIO_ACTIVE_HIGH>; + gpio-miso = <&gpio0 ASPEED_GPIO(X, 5) GPIO_ACTIVE_HIGH>; + num-chipselects = <1>; + cs-gpios = <&gpio0 ASPEED_GPIO(X, 0) GPIO_ACTIVE_LOW>; + + flash@0 { + reg = <0>; + compatible = "jedec,spi-nor"; + m25p,fast-read; + label = "pnor"; + spi-max-frequency = <100000000>; + }; + }; + switchphy: ethernet-phy@0 { // Fixed link }; - leds { + front_gpio_leds { compatible = "gpio-leds"; - sys_log_id { - retain-state-shutdown; - default-state = "keep"; + default-state = "off"; gpios = <&front_leds 0 GPIO_ACTIVE_HIGH>; }; + }; + + fan_gpio_leds { + compatible = "gpio-leds"; fan0_blue { retain-state-shutdown; default-state = "on"; - gpios = <&fan_ioexp 8 GPIO_ACTIVE_HIGH>; + gpios = <&fan_leds 8 GPIO_ACTIVE_HIGH>; }; fan1_blue { retain-state-shutdown; default-state = "on"; - gpios = <&fan_ioexp 9 GPIO_ACTIVE_HIGH>; + gpios = <&fan_leds 9 GPIO_ACTIVE_HIGH>; }; fan2_blue { retain-state-shutdown; default-state = "on"; - gpios = <&fan_ioexp 10 GPIO_ACTIVE_HIGH>; + gpios = <&fan_leds 10 GPIO_ACTIVE_HIGH>; }; fan3_blue { retain-state-shutdown; default-state = "on"; - gpios = <&fan_ioexp 11 GPIO_ACTIVE_HIGH>; + gpios = <&fan_leds 11 GPIO_ACTIVE_HIGH>; }; fan0_amber { retain-state-shutdown; default-state = "off"; - gpios = <&fan_ioexp 12 GPIO_ACTIVE_HIGH>; + gpios = <&fan_leds 12 GPIO_ACTIVE_HIGH>; }; fan1_amber { retain-state-shutdown; default-state = "off"; - gpios = <&fan_ioexp 13 GPIO_ACTIVE_HIGH>; + gpios = <&fan_leds 13 GPIO_ACTIVE_HIGH>; }; fan2_amber { retain-state-shutdown; default-state = "off"; - gpios = <&fan_ioexp 14 GPIO_ACTIVE_HIGH>; + gpios = <&fan_leds 14 GPIO_ACTIVE_HIGH>; }; fan3_amber { retain-state-shutdown; default-state = "off"; - gpios = <&fan_ioexp 15 GPIO_ACTIVE_HIGH>; - }; - sled0_amber { - retain-state-shutdown; - default-state = "off"; - gpios = <&sled0_leds 0 GPIO_ACTIVE_LOW>; - }; - sled0_blue { - retain-state-shutdown; - default-state = "off"; - gpios = <&sled0_leds 1 GPIO_ACTIVE_LOW>; + gpios = <&fan_leds 15 GPIO_ACTIVE_HIGH>; }; + }; + + sled1_gpio_leds { + compatible = "gpio-leds"; sled1_amber { retain-state-shutdown; - default-state = "off"; + default-state = "keep"; gpios = <&sled1_leds 0 GPIO_ACTIVE_LOW>; }; sled1_blue { retain-state-shutdown; - default-state = "off"; + default-state = "keep"; gpios = <&sled1_leds 1 GPIO_ACTIVE_LOW>; }; + }; + + sled2_gpio_leds { + compatible = "gpio-leds"; sled2_amber { retain-state-shutdown; - default-state = "off"; + default-state = "keep"; gpios = <&sled2_leds 0 GPIO_ACTIVE_LOW>; }; sled2_blue { retain-state-shutdown; - default-state = "off"; + default-state = "keep"; gpios = <&sled2_leds 1 GPIO_ACTIVE_LOW>; }; + }; + + sled3_gpio_leds { + compatible = "gpio-leds"; sled3_amber { retain-state-shutdown; - default-state = "off"; + default-state = "keep"; gpios = <&sled3_leds 0 GPIO_ACTIVE_LOW>; }; sled3_blue { retain-state-shutdown; - default-state = "off"; + default-state = "keep"; gpios = <&sled3_leds 1 GPIO_ACTIVE_LOW>; }; + }; + + sled4_gpio_leds { + compatible = "gpio-leds"; sled4_amber { retain-state-shutdown; - default-state = "off"; + default-state = "keep"; gpios = <&sled4_leds 0 GPIO_ACTIVE_LOW>; }; sled4_blue { retain-state-shutdown; - default-state = "off"; + default-state = "keep"; gpios = <&sled4_leds 1 GPIO_ACTIVE_LOW>; }; + }; + + sled5_gpio_leds { + compatible = "gpio-leds"; sled5_amber { retain-state-shutdown; - default-state = "off"; + default-state = "keep"; gpios = <&sled5_leds 0 GPIO_ACTIVE_LOW>; }; sled5_blue { retain-state-shutdown; - default-state = "off"; + default-state = "keep"; gpios = <&sled5_leds 1 GPIO_ACTIVE_LOW>; }; }; + + sled6_gpio_leds { + compatible = "gpio-leds"; + sled6_amber { + retain-state-shutdown; + default-state = "keep"; + gpios = <&sled6_leds 0 GPIO_ACTIVE_LOW>; + }; + sled6_blue { + retain-state-shutdown; + default-state = "keep"; + gpios = <&sled6_leds 1 GPIO_ACTIVE_LOW>; + }; + }; }; &mac2 { @@ -177,10 +225,6 @@ }; }; -&rtc { - status = "okay"; -}; - &fmc { status = "okay"; flash@0 { @@ -190,24 +234,21 @@ spi-max-frequency = <50000000>; #include "openbmc-flash-layout-128.dtsi" }; -}; - -&spi2 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_spi2_default>; - - flash@0 { + flash@1 { status = "okay"; m25p,fast-read; - label = "pnor"; - spi-max-frequency = <100000000>; + label = "flash1"; + spi-max-frequency = <50000000>; }; }; &i2c0 { status = "okay"; - /* TODO: Add ADC INA230 */ + ina230@45 { + compatible = "ti,ina230"; + reg = <0x45>; + shunt-resistor = <2000>; + }; mp5023@40 { compatible = "mps,mp5023"; @@ -219,7 +260,7 @@ reg = <0x4f>; }; - sled0_ioexp: pca9539@76 { + sled1_ioexp: pca9539@76 { compatible = "nxp,pca9539"; reg = <0x76>; #address-cells = <1>; @@ -227,14 +268,17 @@ gpio-controller; #gpio-cells = <2>; + interrupt-parent = <&gpio0>; + interrupts = <ASPEED_GPIO(M, 0) IRQ_TYPE_LEVEL_LOW>; + gpio-line-names = - "SLED0_MS_DETECT1","SLED0_VBUS_BMC_EN","SLED0_INA230_ALERT","SLED0_P12V_STBY_ALERT", - "SLED0_SSD_ALERT","SLED0_MS_DETECT0","SLED0_RST_CCG5","SLED0_FUSB302_INT", - "SLED0_MD_STBY_RESET","SLED0_MD_IOEXP_EN_FAULT","SLED0_MD_DIR","SLED0_MD_DECAY", - "SLED0_MD_MODE1","SLED0_MD_MODE2","SLED0_MD_MODE3","power-host0"; + "SLED1_MS_DETECT1","SLED1_VBUS_BMC_EN","SLED1_INA230_ALERT","SLED1_P12V_STBY_ALERT", + "SLED1_SSD_ALERT","SLED1_MS_DETECT0","SLED1_RST_CCG5","SLED1_FUSB302_INT", + "SLED1_MD_STBY_RESET","SLED1_MD_IOEXP_EN_FAULT","SLED1_MD_DIR","SLED1_MD_DECAY", + "SLED1_MD_MODE1","SLED1_MD_MODE2","SLED1_MD_MODE3","power-host1"; }; - sled0_leds: pca9552@67 { + sled1_leds: pca9552@67 { compatible = "nxp,pca9552"; reg = <0x67>; #address-cells = <1>; @@ -243,13 +287,13 @@ #gpio-cells = <2>; gpio-line-names = - "led-sled0-amber","led-sled0-blue","SLED0_RST_IOEXP","", + "led-sled1-amber","led-sled1-blue","SLED1_RST_IOEXP","SLED1_MD_REF_PWM", "","","","", "","","","", "","","",""; }; - sled0_fusb302: typec-portc@22 { + sled1_fusb302: typec-portc@22 { compatible = "fcs,fusb302"; reg = <0x22>; @@ -270,7 +314,11 @@ &i2c1 { status = "okay"; - /* TODO: Add ADC INA230 */ + ina230@45 { + compatible = "ti,ina230"; + reg = <0x45>; + shunt-resistor = <2000>; + }; mp5023@40 { compatible = "mps,mp5023"; @@ -282,7 +330,7 @@ reg = <0x4f>; }; - sled1_ioexp: pca9539@76 { + sled2_ioexp: pca9539@76 { compatible = "nxp,pca9539"; reg = <0x76>; #address-cells = <1>; @@ -290,14 +338,17 @@ gpio-controller; #gpio-cells = <2>; + interrupt-parent = <&gpio0>; + interrupts = <ASPEED_GPIO(M, 1) IRQ_TYPE_LEVEL_LOW>; + gpio-line-names = - "SLED1_MS_DETECT1","SLED1_VBUS_BMC_EN","SLED1_INA230_ALERT","SLED1_P12V_STBY_ALERT", - "SLED1_SSD_ALERT","SLED1_MS_DETECT0","SLED1_RST_CCG5","SLED1_FUSB302_INT", - "SLED1_MD_STBY_RESET","SLED1_MD_IOEXP_EN_FAULT","SLED1_MD_DIR","SLED1_MD_DECAY", - "SLED1_MD_MODE1","SLED1_MD_MODE2","SLED1_MD_MODE3","power-host1"; + "SLED2_MS_DETECT1","SLED2_VBUS_BMC_EN","SLED2_INA230_ALERT","SLED2_P12V_STBY_ALERT", + "SLED2_SSD_ALERT","SLED2_MS_DETECT0","SLED2_RST_CCG5","SLED2_FUSB302_INT", + "SLED2_MD_STBY_RESET","SLED2_MD_IOEXP_EN_FAULT","SLED2_MD_DIR","SLED2_MD_DECAY", + "SLED2_MD_MODE1","SLED2_MD_MODE2","SLED2_MD_MODE3","power-host2"; }; - sled1_leds: pca9552@67 { + sled2_leds: pca9552@67 { compatible = "nxp,pca9552"; reg = <0x67>; #address-cells = <1>; @@ -306,13 +357,13 @@ #gpio-cells = <2>; gpio-line-names = - "led-sled1-amber","led-sled1-blue","SLED1_RST_IOEXP","", + "led-sled2-amber","led-sled2-blue","SLED2_RST_IOEXP","SLED2_MD_REF_PWM", "","","","", "","","","", "","","",""; }; - sled1_fusb302: typec-portc@22 { + sled2_fusb302: typec-portc@22 { compatible = "fcs,fusb302"; reg = <0x22>; @@ -331,13 +382,13 @@ }; }; -&i2c1 { - status = "okay"; -}; - &i2c2 { status = "okay"; - /* TODO: Add ADC INA230 */ + ina230@45 { + compatible = "ti,ina230"; + reg = <0x45>; + shunt-resistor = <2000>; + }; mp5023@40 { compatible = "mps,mp5023"; @@ -349,7 +400,7 @@ reg = <0x4f>; }; - sled2_ioexp: pca9539@76 { + sled3_ioexp: pca9539@76 { compatible = "nxp,pca9539"; reg = <0x76>; #address-cells = <1>; @@ -357,14 +408,17 @@ gpio-controller; #gpio-cells = <2>; + interrupt-parent = <&gpio0>; + interrupts = <ASPEED_GPIO(M, 2) IRQ_TYPE_LEVEL_LOW>; + gpio-line-names = - "SLED2_MS_DETECT1","SLED2_VBUS_BMC_EN","SLED2_INA230_ALERT","SLED2_P12V_STBY_ALERT", - "SLED2_SSD_ALERT","SLED2_MS_DETECT0","SLED2_RST_CCG5","SLED2_FUSB302_INT", - "SLED2_MD_STBY_RESET","SLED2_MD_IOEXP_EN_FAULT","SLED2_MD_DIR","SLED2_MD_DECAY", - "SLED2_MD_MODE1","SLED2_MD_MODE2","SLED2_MD_MODE3","power-host2"; + "SLED3_MS_DETECT1","SLED3_VBUS_BMC_EN","SLED3_INA230_ALERT","SLED3_P12V_STBY_ALERT", + "SLED3_SSD_ALERT","SLED3_MS_DETECT0","SLED3_RST_CCG5","SLED3_FUSB302_INT", + "SLED3_MD_STBY_RESET","SLED3_MD_IOEXP_EN_FAULT","SLED3_MD_DIR","SLED3_MD_DECAY", + "SLED3_MD_MODE1","SLED3_MD_MODE2","SLED3_MD_MODE3","power-host3"; }; - sled2_leds: pca9552@67 { + sled3_leds: pca9552@67 { compatible = "nxp,pca9552"; reg = <0x67>; #address-cells = <1>; @@ -373,13 +427,13 @@ #gpio-cells = <2>; gpio-line-names = - "led-sled2-amber","led-sled2-blue","SLED2_RST_IOEXP","", + "led-sled3-amber","led-sled3-blue","SLED3_RST_IOEXP","SLED3_MD_REF_PWM", "","","","", "","","","", "","","",""; }; - sled2_fusb302: typec-portc@22 { + sled3_fusb302: typec-portc@22 { compatible = "fcs,fusb302"; reg = <0x22>; @@ -400,7 +454,11 @@ &i2c3 { status = "okay"; - /* TODO: Add ADC INA230 */ + ina230@45 { + compatible = "ti,ina230"; + reg = <0x45>; + shunt-resistor = <2000>; + }; mp5023@40 { compatible = "mps,mp5023"; @@ -412,7 +470,7 @@ reg = <0x4f>; }; - sled3_ioexp: pca9539@76 { + sled4_ioexp: pca9539@76 { compatible = "nxp,pca9539"; reg = <0x76>; #address-cells = <1>; @@ -420,14 +478,17 @@ gpio-controller; #gpio-cells = <2>; + interrupt-parent = <&gpio0>; + interrupts = <ASPEED_GPIO(M, 3) IRQ_TYPE_LEVEL_LOW>; + gpio-line-names = - "SLED3_MS_DETECT1","SLED3_VBUS_BMC_EN","SLED3_INA230_ALERT","SLED3_P12V_STBY_ALERT", - "SLED3_SSD_ALERT","SLED3_MS_DETECT0","SLED3_RST_CCG5","SLED3_FUSB302_INT", - "SLED3_MD_STBY_RESET","SLED3_MD_IOEXP_EN_FAULT","SLED3_MD_DIR","SLED3_MD_DECAY", - "SLED3_MD_MODE1","SLED3_MD_MODE2","SLED3_MD_MODE3","power-host3"; + "SLED4_MS_DETECT1","SLED4_VBUS_BMC_EN","SLED4_INA230_ALERT","SLED4_P12V_STBY_ALERT", + "SLED4_SSD_ALERT","SLED4_MS_DETECT0","SLED4_RST_CCG5","SLED4_FUSB302_INT", + "SLED4_MD_STBY_RESET","SLED4_MD_IOEXP_EN_FAULT","SLED4_MD_DIR","SLED4_MD_DECAY", + "SLED4_MD_MODE1","SLED4_MD_MODE2","SLED4_MD_MODE3","power-host4"; }; - sled3_leds: pca9552@67 { + sled4_leds: pca9552@67 { compatible = "nxp,pca9552"; reg = <0x67>; #address-cells = <1>; @@ -436,13 +497,13 @@ #gpio-cells = <2>; gpio-line-names = - "led-sled3-amber","led-sled3-blue","SLED3_RST_IOEXP","", + "led-sled4-amber","led-sled4-blue","SLED4_RST_IOEXP","SLED4_MD_REF_PWM", "","","","", "","","","", "","","",""; }; - sled3_fusb302: typec-portc@22 { + sled4_fusb302: typec-portc@22 { compatible = "fcs,fusb302"; reg = <0x22>; @@ -463,7 +524,11 @@ &i2c4 { status = "okay"; - /* TODO: Add ADC INA230 */ + ina230@45 { + compatible = "ti,ina230"; + reg = <0x45>; + shunt-resistor = <2000>; + }; mp5023@40 { compatible = "mps,mp5023"; @@ -475,7 +540,7 @@ reg = <0x4f>; }; - sled4_ioexp: pca9539@76 { + sled5_ioexp: pca9539@76 { compatible = "nxp,pca9539"; reg = <0x76>; #address-cells = <1>; @@ -483,14 +548,17 @@ gpio-controller; #gpio-cells = <2>; + interrupt-parent = <&gpio0>; + interrupts = <ASPEED_GPIO(M, 4) IRQ_TYPE_LEVEL_LOW>; + gpio-line-names = - "SLED4_MS_DETECT1","SLED4_VBUS_BMC_EN","SLED4_INA230_ALERT","SLED4_P12V_STBY_ALERT", - "SLED4_SSD_ALERT","SLED4_MS_DETECT0","SLED4_RST_CCG5","SLED4_FUSB302_INT", - "SLED4_MD_STBY_RESET","SLED4_MD_IOEXP_EN_FAULT","SLED4_MD_DIR","SLED4_MD_DECAY", - "SLED4_MD_MODE1","SLED4_MD_MODE2","SLED4_MD_MODE3","power-host4"; + "SLED5_MS_DETECT1","SLED5_VBUS_BMC_EN","SLED5_INA230_ALERT","SLED5_P12V_STBY_ALERT", + "SLED5_SSD_ALERT","SLED5_MS_DETECT0","SLED5_RST_CCG5","SLED5_FUSB302_INT", + "SLED5_MD_STBY_RESET","SLED5_MD_IOEXP_EN_FAULT","SLED5_MD_DIR","SLED5_MD_DECAY", + "SLED5_MD_MODE1","SLED5_MD_MODE2","SLED5_MD_MODE3","power-host5"; }; - sled4_leds: pca9552@67 { + sled5_leds: pca9552@67 { compatible = "nxp,pca9552"; reg = <0x67>; #address-cells = <1>; @@ -499,13 +567,13 @@ #gpio-cells = <2>; gpio-line-names = - "led-sled4-amber","led-sled4-blue","SLED4_RST_IOEXP","", + "led-sled5-amber","led-sled5-blue","SLED5_RST_IOEXP","SLED5_MD_REF_PWM", "","","","", "","","","", "","","",""; }; - sled4_fusb302: typec-portc@22 { + sled5_fusb302: typec-portc@22 { compatible = "fcs,fusb302"; reg = <0x22>; @@ -526,7 +594,11 @@ &i2c5 { status = "okay"; - /* TODO: Add ADC INA230 */ + ina230@45 { + compatible = "ti,ina230"; + reg = <0x45>; + shunt-resistor = <2000>; + }; mp5023@40 { compatible = "mps,mp5023"; @@ -538,7 +610,7 @@ reg = <0x4f>; }; - sled5_ioexp: pca9539@76 { + sled6_ioexp: pca9539@76 { compatible = "nxp,pca9539"; reg = <0x76>; #address-cells = <1>; @@ -546,14 +618,17 @@ gpio-controller; #gpio-cells = <2>; + interrupt-parent = <&gpio0>; + interrupts = <ASPEED_GPIO(M, 5) IRQ_TYPE_LEVEL_LOW>; + gpio-line-names = - "SLED5_MS_DETECT1","SLED5_VBUS_BMC_EN","SLED5_INA230_ALERT","SLED5_P12V_STBY_ALERT", - "SLED5_SSD_ALERT","SLED5_MS_DETECT0","SLED5_RST_CCG5","SLED5_FUSB302_INT", - "SLED5_MD_STBY_RESET","SLED5_MD_IOEXP_EN_FAULT","SLED5_MD_DIR","SLED5_MD_DECAY", - "SLED5_MD_MODE1","SLED5_MD_MODE2","SLED5_MD_MODE3","power-host5"; + "SLED6_MS_DETECT1","SLED6_VBUS_BMC_EN","SLED6_INA230_ALERT","SLED6_P12V_STBY_ALERT", + "SLED6_SSD_ALERT","SLED6_MS_DETECT0","SLED6_RST_CCG5","SLED6_FUSB302_INT", + "SLED6_MD_STBY_RESET","SLED6_MD_IOEXP_EN_FAULT","SLED6_MD_DIR","SLED6_MD_DECAY", + "SLED6_MD_MODE1","SLED6_MD_MODE2","SLED6_MD_MODE3","power-host6"; }; - sled5_leds: pca9552@67 { + sled6_leds: pca9552@67 { compatible = "nxp,pca9552"; reg = <0x67>; #address-cells = <1>; @@ -562,13 +637,13 @@ #gpio-cells = <2>; gpio-line-names = - "led-sled5-amber","led-sled5-blue","SLED5_RST_IOEXP","", + "led-sled6-amber","led-sled6-blue","SLED6_RST_IOEXP","SLED6_MD_REF_PWM", "","","","", "","","","", "","","",""; }; - sled5_fusb302: typec-portc@22 { + sled6_fusb302: typec-portc@22 { compatible = "fcs,fusb302"; reg = <0x22>; @@ -596,6 +671,7 @@ }; rtc@51 { + /* in-chip rtc disabled, use external rtc (battery-backed) */ compatible = "nxp,pcf85263"; reg = <0x51>; }; @@ -655,6 +731,7 @@ adm1278@11 { compatible = "adi,adm1278"; reg = <0x11>; + shunt-resistor-micro-ohms = <300>; }; tmp421@4c { @@ -667,7 +744,7 @@ reg = <0x4d>; }; - fan_ioexp: pca9552@67 { + fan_leds: pca9552@67 { compatible = "nxp,pca9552"; reg = <0x67>; #address-cells = <1>; @@ -700,36 +777,38 @@ /*D0-D7*/ "","","","","","","","", /*E0-E7*/ "","","","","","","","", /*F0-F7*/ "","","","","","","","", - /*G0-G7*/ "","SWITCH_FRU_MUX","","","","","","", + /*G0-G7*/ "BSM_FRU_WP","SWITCH_FRU_MUX","","", + "PWRGD_P1V05_VDDCORE","PWRGD_P1V5_VDD","","", /*H0-H7*/ "presence-riser1","presence-riser2", - "presence-sled0","presence-sled1", - "presence-sled2","presence-sled3", - "presence-sled4","presence-sled5", + "presence-sled1","presence-sled2", + "presence-sled3","presence-sled4", + "presence-sled5","presence-sled6", /*I0-I7*/ "REV_ID0","","REV_ID1","REV_ID2", - "","","","", + "","BSM_FLASH_WP_STATUS","BMC_TPM_PRES","", /*J0-J7*/ "","","","","","","","", /*K0-K7*/ "","","","","","","","", - /*L0-L7*/ "","","","","","","","", - /*M0-M7*/ "ALERT_SLED0","ALERT_SLED1", - "ALERT_SLED2","ALERT_SLED3", - "ALERT_SLED4","ALERT_SLED5", + /*L0-L7*/ "","","","","","BMC_RTC_INT","","", + /*M0-M7*/ "ALERT_SLED1","ALERT_SLED2", + "ALERT_SLED3","ALERT_SLED4", + "ALERT_SLED5","ALERT_SLED6", "P12V_AUX_ALERT1","", /*N0-N7*/ "","","","","","","","", /*O0-O7*/ "","","","", "","BOARD_ID0","BOARD_ID1","BOARD_ID2", - /*P0-P7*/ "","","","","","","","", + /*P0-P7*/ "","","","","","","","BMC_HEARTBEAT", /*Q0-Q7*/ "","","","","","","","", /*R0-R7*/ "","","","","","","","", /*S0-S7*/ "","","","BAT_DETECT", "BMC_BT_WP0","BMC_BT_WP1","","", /*T0-T7*/ "","","","","","","","", /*U0-U7*/ "","","","","","","","", - /*V0-V7*/ "","RST_BMC_MVL","","", + /*V0-V7*/ "PWRGD_CNS_PSU","RST_BMC_MVL","","PSU_PRSNT", "USB2_SEL0_A","USB2_SEL1_A", "USB2_SEL0_B","USB2_SEL1_B", /*W0-W7*/ "RST_FRONT_IOEXP","","","","","","","", /*X0-X7*/ "","","","","","","","", - /*Y0-Y7*/ "","","BSM_FLASH_LATCH","","","","","", + /*Y0-Y7*/ "BMC_SELF_HW_RST","BSM_PRSNT","BSM_FLASH_LATCH","", + "","","","", /*Z0-Z7*/ "","","","","","","",""; }; @@ -754,3 +833,8 @@ &pinctrl_adc12_default &pinctrl_adc13_default &pinctrl_adc14_default &pinctrl_adc15_default>; }; + +&mdio3 { + status = "okay"; + /* TODO: Add Marvell 88X3310 */ +}; diff --git a/dts/src/arm/aspeed-bmc-ibm-everest.dts b/dts/src/arm/aspeed-bmc-ibm-everest.dts index 22c06ff7a7..578f9e2fc7 100644 --- a/dts/src/arm/aspeed-bmc-ibm-everest.dts +++ b/dts/src/arm/aspeed-bmc-ibm-everest.dts @@ -171,9 +171,10 @@ /* 48MB region from the end of flash to start of vga memory */ ramoops@bc000000 { compatible = "ramoops"; - reg = <0xbc000000 0x180000>; /* 16 * (3 * 0x8000) */ + reg = <0xbc000000 0x200000>; /* 16 * (4 * 0x8000) */ record-size = <0x8000>; console-size = <0x8000>; + ftrace-size = <0x8000>; pmsg-size = <0x8000>; max-reason = <3>; /* KMSG_DUMP_EMERG */ }; @@ -269,9 +270,7 @@ /*C0-C7*/ "","","","","","","","", /*D0-D7*/ "","","","","","","","", /*E0-E7*/ "","","","","","","","", - /*F0-F7*/ "PIN_HOLE_RESET_IN_N","","", - "PIN_HOLE_RESET_OUT_N","","", - "factory-reset-toggle","", + /*F0-F7*/ "","","rtc-battery-voltage-read-enable","reset-cause-pinhole","","","factory-reset-toggle","", /*G0-G7*/ "","","","","","","","", /*H0-H7*/ "led-rtc-battery","led-bmc","led-rear-enc-id0","led-rear-enc-fault0","","","","", /*I0-I7*/ "","","","","","","bmc-secure-boot","", @@ -2394,6 +2393,10 @@ status = "okay"; }; +&uhci { + status = "okay"; +}; + &emmc_controller { status = "okay"; }; diff --git a/dts/src/arm/aspeed-bmc-ibm-rainier.dts b/dts/src/arm/aspeed-bmc-ibm-rainier.dts index c479742198..528b49e2c0 100644 --- a/dts/src/arm/aspeed-bmc-ibm-rainier.dts +++ b/dts/src/arm/aspeed-bmc-ibm-rainier.dts @@ -102,9 +102,10 @@ ramoops@bc000000 { compatible = "ramoops"; - reg = <0xbc000000 0x180000>; /* 16 * (3 * 0x8000) */ + reg = <0xbc000000 0x200000>; /* 16 * (4 * 0x8000) */ record-size = <0x8000>; console-size = <0x8000>; + ftrace-size = <0x8000>; pmsg-size = <0x8000>; max-reason = <3>; /* KMSG_DUMP_EMERG */ }; @@ -239,6 +240,10 @@ status = "okay"; }; +&uhci { + status = "okay"; +}; + &gpio0 { gpio-line-names = /*A0-A7*/ "","","","","","","","", @@ -246,7 +251,7 @@ /*C0-C7*/ "","","","","","","","", /*D0-D7*/ "","","","","","","","", /*E0-E7*/ "","","","","","","","", - /*F0-F7*/ "","","","","","","factory-reset-toggle","", + /*F0-F7*/ "","","rtc-battery-voltage-read-enable","reset-cause-pinhole","","","factory-reset-toggle","", /*G0-G7*/ "","","","","","","","", /*H0-H7*/ "","bmc-ingraham0","rear-enc-id0","rear-enc-fault0","","","","", /*I0-I7*/ "","","","","","","bmc-secure-boot","", @@ -2360,30 +2365,6 @@ use-ncsi; }; -&fmc { - status = "okay"; - flash@0 { - status = "okay"; - m25p,fast-read; - label = "bmc"; - spi-max-frequency = <50000000>; -#include "openbmc-flash-layout-128.dtsi" - }; -}; - -&spi1 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_spi1_default>; - - flash@0 { - status = "okay"; - m25p,fast-read; - label = "pnor"; - spi-max-frequency = <100000000>; - }; -}; - &wdt1 { aspeed,reset-type = "none"; aspeed,external-signal; diff --git a/dts/src/arm/aspeed-bmc-opp-tacoma.dts b/dts/src/arm/aspeed-bmc-opp-tacoma.dts index e39f310d55..72b7a6639e 100644 --- a/dts/src/arm/aspeed-bmc-opp-tacoma.dts +++ b/dts/src/arm/aspeed-bmc-opp-tacoma.dts @@ -197,7 +197,6 @@ fsi-routing-gpios = <&gpio0 ASPEED_GPIO(Q, 7) GPIO_ACTIVE_HIGH>; fsi-mux-gpios = <&gpio0 ASPEED_GPIO(B, 0) GPIO_ACTIVE_HIGH>; - cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_LOW>; cfam@0,0 { reg = <0 0>; @@ -877,3 +876,14 @@ status = "okay"; memory-region = <&vga_memory>; }; + +&kcs2 { + status = "okay"; + aspeed,lpc-io-reg = <0xca8 0xcac>; +}; + +&kcs3 { + status = "okay"; + aspeed,lpc-io-reg = <0xca2>; + aspeed,lpc-interrupts = <11 IRQ_TYPE_LEVEL_LOW>; +}; diff --git a/dts/src/arm/aspeed-bmc-quanta-s6q.dts b/dts/src/arm/aspeed-bmc-quanta-s6q.dts new file mode 100644 index 0000000000..69e1bd2562 --- /dev/null +++ b/dts/src/arm/aspeed-bmc-quanta-s6q.dts @@ -0,0 +1,610 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +// Copyright 2022 Quanta Corp. +/dts-v1/; + +#include "aspeed-g6.dtsi" +#include <dt-bindings/gpio/aspeed-gpio.h> +#include <dt-bindings/i2c/i2c.h> + +/ { + model = "Quanta S6Q BMC"; + compatible = "quanta,s6q-bmc", "aspeed,ast2600"; + + aliases { + // bus 0 + i2c20 = &SMB_HOST_DB2000_3V3AUX_SCL; + i2c21 = &U12_PCA9546_CH1; + i2c22 = &SMB_HOST_DB800_B_SCL; + i2c23 = &SMB_HOST_DB800_C_SCL; + + // bus 1 + i2c24 = &SMB_M2_P0_1V8AUX_SCL; + i2c25 = &SMB_M2_P1_1V8AUX_SCL; + i2c26 = &SMB_CPU_PIROM_3V3AUX_SCL; + i2c27 = &SMB_TEMP_3V3AUX_SCL; + i2c28 = &SMB_IPMB_3V3AUX_SSDSB_SCL; + i2c29 = &SMB_IPMB_3V3AUX_SCL; + i2c31 = &SMB_FB_SCL; + + // bus 1 - Fan board + i2c32 = &SMB_IOEXP_SCL; + i2c33 = &SMB_PROGRAM_SCL; + i2c34 = &SMB_FB_SCL_CH2; + i2c35 = &SMB_FAN_SENSE_SCL; + + // bus 6 + i2c36 = &U197_PCA9546_CH0; + i2c37 = &U197_PCA9546_CH1; + i2c38 = &U197_PCA9546_CH2; + i2c39 = &U197_PCA9546_CH3; + + //bus 7 + i2c40 = &SMB_OCP_SFF_3V3AUX_SCL; //OCP1 + i2c41 = &SMB_OCP_LFF_3V3AUX_SCL; //OCP2 + }; + + chosen { + stdout-path = &uart5; + bootargs = "console=ttyS4,115200n8 earlycon"; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x80000000 0x40000000>; + }; + + iio-hwmon { + compatible = "iio-hwmon"; + io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>, + <&adc0 4>, <&adc0 5>, <&adc0 6>, <&adc0 7>, + <&adc1 0>, <&adc1 1>, <&adc1 2>, <&adc1 3>, + <&adc1 4>, <&adc1 5>, <&adc1 6>, <&adc1 7>; + }; + + leds { + compatible = "gpio-leds"; + + BMC_HEARTBEAT_N { + label="BMC_HEARTBEAT_N"; + gpios = <&gpio0 ASPEED_GPIO(P, 7) GPIO_ACTIVE_LOW>; + linux,default-trigger = "heartbeat"; + }; + + BMC_LED_STATUS_AMBER_N { + label="BMC_LED_STATUS_AMBER_N"; + gpios = <&gpio0 ASPEED_GPIO(S, 6) GPIO_ACTIVE_LOW>; + default-state = "off"; + }; + + FM_ID_LED_N { + label="FM_ID_LED_N"; + gpios = <&gpio0 ASPEED_GPIO(B, 5) GPIO_ACTIVE_LOW>; + default-state = "off"; + }; + }; +}; + +&gpio0 { + gpio-line-names = + /*A0 - A7*/ "", "", "", "", "", "", "", "", + /*B0 - B7*/ "", "", "", "", "", "", "", "", + /*C0 - C7*/ "", "", "", "", "", "", "", "", + /*D0 - D7*/ "", "", "", "", "", "", "", "", + /*E0 - E7*/ "", "", "", "", "", "", "", "", + /*F0 - F7*/ "PLTRST_N", "", "PWR_DEBUG_N", "", "", "", "", "", + /*G0 - G7*/ "", "", "", "", "", "", "", "", + /*H0 - H7*/ "", "", "", "", "", "", "", "", + /*I0 - I7*/ "", "", "", "", "", "", "", "", + /*J0 - J7*/ "", "", "", "", "", "", "", "", + /*K0 - K7*/ "", "", "", "", "", "", "", "", + /*L0 - L7*/ "", "", "", "", "PREQ_N", "TCK_MUX_SEL", "", "", + /*M0 - M7*/ "", "", "", "PWRGD_SYS_PWROK", "", "PRDY_N", "", "", + /*N0 - N7*/ "", "", "", "", "", "", "", "", + /*O0 - O7*/ "", "", "", "", "", "", "", "", + /*P0 - P7*/ "SYS_BMC_PWRBTN_R_N", "SYS_PWRBTN_N", "FM_MB_RST_BTN", "RST_BMC_RSTBTN_OUT_N", "", "", "", "", + /*Q0 - Q7*/ "", "", "", "", "", "", "", "", + /*R0 - R7*/ "", "", "", "", "", "", "", "", + /*S0 - S7*/ "", "", "", "FP_ID_BTN_SCM_N", "", "", "", "", + /*T0 - T7*/ "", "", "", "", "", "", "", "", + /*U0 - U7*/ "", "", "", "", "", "", "", "", + /*V0 - V7*/ "", "", "", "", "", "SMI", "", "", + /*W0 - W7*/ "", "", "", "", "", "", "", "", + /*X0 - X7*/ "", "", "", "", "", "", "", "", + /*Y0 - Y7*/ "", "", "", "", "", "", "", "", + /*Z0 - Z7*/ "FM_BMC_READY_N", "", "", "", "", "", "", "", + /*AA0 - AA7*/ "", "", "", "", "", "", "", "", + /*AB0 - AB7*/ "", "", "", "", "", "", "", "", + /*AC0 - AC7*/ "", "", "", "", "", "", "", ""; +}; + +&sgpiom0 { + status = "okay"; + ngpios = <128>; + bus-frequency = <48000>; + gpio-line-names = + /* SGPIO input lines */ + /*IOA0-IOA7*/ "","", "SIO_POWER_GOOD","OA1", "XDP_PRST_N","", "","", "FM_SLPS3_PLD_N","", "FM_SLPS4_PLD_N","", "FM_BIOS_POST_CMPLT_BMC_N","", "FM_ADR_TRIGGER_N","OA7", + /*IOB0-IOB7*/ "FM_ADR_COMPLETE","", "FM_PMBUS_ALERT_B_EN","", "PSU0_PRESENT_N","", "PSU1_PRESENT_N","", "PSU0_VIN_BUF_GOOD","", "PSU01_VIN_BUF_GOOD","", "PWRGD_PS0_PWROK_R","", "PWRGD_PS1_PWROK_R","", + /*IOC0-IOC7*/ "PWRGD_PS_PWROK_PLD_R","", "CHASSIS_INTRUSION","", "BMC_MFG_MODE","", "FM_BMC_EN_DET_R","", "FM_ME_BT_DONE","", "CPU1_PRESENCE","", "CPU2_PRESENCE","", "IRQ_PSYS_CRIT_N","", + /*IOD0-IOD7*/ "","", "CPU1_THERMTRIP","", "CPU2_THERMTRIP","", "CPU1_MEM_THERM_EVENT","", "CPU2_MEM_THERM_EVENT","", "CPU1_VRHOT","", "CPU2_VRHOT","", "","", + /*IOE0-IOE7*/ "","", "CPU1_MEM_VRHOT","", "CPU2_MEM_VRHOT","", "","", "PCH_BMC_THERMTRIP","", "","", "","", "","", + /*IOF0-IOF7*/ "CPU_ERR0","", "CPU_ERR1","", "CPU_ERR2","", "","", "","", "CPU_CATERR","", "","", "","", + /*IOG0-IOG7*/ "","", "","", "","", "","", "","", "","", "","", "","", + /*IOH0-IOH7*/ "","", "FP_ID_BTN_R1_N","", "FP_RST_BTN_N","", "","", "","", "FP_PWR_BTN_PLD_N_R","", "","", "","", + /*IOI0-IOI7*/ "","", "","", "","", "","", "","", "","", "","", "","", + /*IOJ0-IOJ7*/ "","", "","", "","", "","", "","", "","", "","", "","", + /*IOK0-IOK7*/ "","", "","", "","", "","", "","", "","", "","", "","", + /*IOL0-IOL7*/ "","", "","", "","", "","", "","", "","", "","", "","", + /*IOM0-IOM7*/ "","", "","", "","", "","", "","", "","", "","", "","", + /*ION0-ION7*/ "","BMC_SW_HEARTBEAT_N_R", "","FP_LED_FAULT_N", "","FP_ID_LED_N", "","FM_BMC_RSTBTN_OUT_N", "","FM_THERMTRIP_DLY_LVC1_R_N", "","", "","RST_PCA9548_SENSOR_PLD_N", "","USB_OC1_REAR_N", + /*IOO0-IOO7*/ "","IRQ_TPM_SPI_N", "","", "","IRQ_PCH_SCI_WHEA_R_N", "","IRQ_BMC_PCH_NMI_R", "","H_CPU_NMI_LVC1_R_N", "","", "","", "","FM_JTAG_BMC_PLD_MUX_SEL", + /*IOP0-IOP7*/ "IP0","OP0", "","", "","", "","", "","", "","", "","", "IP7","OP7"; +}; + +&adc0 { + vref = <2500>; + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default + &pinctrl_adc2_default &pinctrl_adc3_default + &pinctrl_adc4_default &pinctrl_adc5_default + &pinctrl_adc6_default &pinctrl_adc7_default>; +}; + +&adc1 { + vref = <2500>; + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_adc8_default &pinctrl_adc9_default + &pinctrl_adc10_default &pinctrl_adc11_default + &pinctrl_adc12_default &pinctrl_adc13_default + &pinctrl_adc14_default &pinctrl_adc15_default>; +}; + +&mdio2 { + status = "okay"; + + ethphy2: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0>; + }; +}; + +&mac2 { + status = "okay"; + + phy-mode = "rgmii"; + phy-handle = <ðphy2>; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rgmii3_default>; +}; + +&mac3 { + status = "okay"; + + phy-mode = "rmii"; + use-ncsi; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rmii4_default>; +}; + +&fmc { + status = "okay"; + + flash@0 { + status = "okay"; + m25p,fast-read; + label = "bmc"; + spi-max-frequency = <50000000>; +#include "openbmc-flash-layout-64.dtsi" + }; +}; + +&spi2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi2_default &pinctrl_spi2cs1_default + &pinctrl_spi2cs2_default>; + status = "okay"; + + flash@0 { + status = "okay"; + m25p,fast-read; + label = "spi2:0"; + spi-max-frequency = <50000000>; + }; +}; + +&kcs1 { + status = "okay"; + aspeed,lpc-io-reg = <0xCA0>; +}; + +&kcs2 { + status = "okay"; + aspeed,lpc-io-reg = <0xCA8>; +}; + +&kcs3 { + status = "okay"; + aspeed,lpc-io-reg = <0xCA2>; +}; + +&emmc_controller { + status = "okay"; +}; + +&emmc { + non-removable; + bus-width = <4>; + max-frequency = <100000000>; +}; + +&vhub { + status = "okay"; +}; + +&lpc_snoop { + status = "okay"; + snoop-ports = <0x80>; +}; + +&uart1 { + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&uart4 { + status = "okay"; +}; + +&uart5 { + status = "okay"; +}; + +&uart_routing { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + U34_PWR_ADC@48 { + compatible = "ti,ads7830"; + reg = <0x48>; + }; + + U35_PWR_ADC@4b { + compatible = "ti,ads7830"; + reg = <0x4b>; + }; + + i2c-switch@70 { + compatible = "nxp,pca9546"; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + i2c-mux-idle-disconnect; + + SMB_HOST_DB2000_3V3AUX_SCL: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + }; + + U12_PCA9546_CH1: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + + SMB_HOST_DB800_B_SCL: i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + }; + + SMB_HOST_DB800_C_SCL: i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + }; + }; +}; + +&i2c1 { + status = "okay"; + + i2c-switch@59 { + compatible = "nxp,pca9848"; + reg = <0x59>; + #address-cells = <1>; + #size-cells = <0>; + i2c-mux-idle-disconnect; + + SMB_M2_P0_1V8AUX_SCL: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + }; + + SMB_M2_P1_1V8AUX_SCL: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + + SMB_CPU_PIROM_3V3AUX_SCL: i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + }; + + SMB_TEMP_3V3AUX_SCL: i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + + U163_tmp75@48 { + compatible = "ti,tmp75"; + reg = <0x48>; + }; + U114_tmp75@49 { + compatible = "ti,tmp75"; + reg = <0x49>; + }; + }; + + SMB_IPMB_3V3AUX_SSDSB_SCL: i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + + U4_tmp75@4c { + compatible = "ti,tmp75"; + reg = <0x4c>; + }; + U73_tmp75@4d { + compatible = "ti,tmp75"; + reg = <0x4d>; + }; + }; + + SMB_IPMB_3V3AUX_SCL: i2c@5 { + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + + U190_fru@51 { + compatible = "atmel,24c128"; + reg = <0x51>; + pagesize = <32>; + }; + }; + + SMB_FB_SCL: i2c@7 { + #address-cells = <1>; + #size-cells = <0>; + reg = <7>; + + i2c-switch@77 { + compatible = "nxp,pca9546"; + reg = <0x77>; + #address-cells = <1>; + #size-cells = <0>; + i2c-mux-idle-disconnect; + + SMB_IOEXP_SCL: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + }; + + SMB_PROGRAM_SCL: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + + SMB_FB_SCL_CH2: i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + }; + + SMB_FAN_SENSE_SCL: i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + + Current_Meter_U2@45 { + compatible = "ti,ina219"; + reg = <0x45>; + shunt-resistor = <1000>; /* = 1 mOhm */ + }; + + Current_Meter_U3@44 { + compatible = "ti,ina219"; + reg = <0x44>; + shunt-resistor = <1000>; /* = 1 mOhm */ + }; + + TEMP_sensor_U2@4b { + compatible = "ti,tmp75"; + reg = <0x4b>; + }; + }; + }; + }; + }; +}; + +&i2c2 { + status = "okay"; + bus-frequency = <400000>; + + ipmb@10 { + compatible = "ipmb-dev"; + reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>; + i2c-protocol; + }; +}; + +&i2c3 { + status = "okay"; + + /* MB FRU (U173) @ 0xA2 */ + mb_fru: mb_fru@51 { + compatible = "atmel,24c128"; + reg = <0x51>; + pagesize = <32>; + }; + + /* FP_U1 Inlet */ + FP_U1_tmp75@4a { + compatible = "ti,tmp75"; + reg = <0x4a>; + }; + + FP_U4_fru@52 { + compatible = "atmel,24c02"; + reg = <0x52>; + pagesize = <16>; + }; +}; + +&i2c4 { + status = "okay"; +}; + +&i2c5 { + status = "okay"; +}; + +&i2c6 { + status = "okay"; + + i2c-switch@77 { + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x77>; + i2c-mux-idle-disconnect; + + U197_PCA9546_CH0: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + }; + + U197_PCA9546_CH1: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + cpu0_pvccin@60 { + compatible = "isil,raa229004"; + reg = <0x60>; + }; + + cpu0_pvccinfaon@61 { + compatible = "isil,isl69260"; + reg = <0x61>; + }; + + cpu0_pvccd_hv@63 { + compatible = "isil,isl69260"; + reg = <0x63>; + }; + }; + + U197_PCA9546_CH2: i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + + cpu1_pvccin@72 { + compatible = "isil,raa229004"; + reg = <0x72>; + }; + + cpu1_pvccinfaon@74 { + compatible = "isil,isl69260"; + reg = <0x74>; + }; + + cpu1_pvccd_hv@76 { + compatible = "isil,isl69260"; + reg = <0x76>; + }; + }; + + U197_PCA9546_CH3: i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + }; + }; +}; + +&i2c7 { + status = "okay"; + + i2c-switch@75 { + compatible = "nxp,pca9546"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x75>; + i2c-mux-idle-disconnect; + + SMB_OCP_SFF_3V3AUX_SCL: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + }; + + SMB_OCP_LFF_3V3AUX_SCL: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + }; +}; + +&i2c8 { + status = "okay"; +}; + +&i2c9 { + status = "okay"; +}; + +&i2c11 { + status = "okay"; +}; + +&i2c14 { + status = "okay"; + + /* SCM FRU (U19) @ 0xA2 */ + scm_fru: scm_fru@51 { + compatible = "atmel,24c128"; + reg = <0x51>; + pagesize = <32>; + }; + + scm_tmp75_u4@4a { + compatible = "ti,tmp75"; + reg = <0x4a>; + }; +}; + +&i2c15 { + status = "okay"; +}; diff --git a/dts/src/arm/aspeed-g4.dtsi b/dts/src/arm/aspeed-g4.dtsi index f14dace34c..fa8b581c3d 100644 --- a/dts/src/arm/aspeed-g4.dtsi +++ b/dts/src/arm/aspeed-g4.dtsi @@ -392,6 +392,17 @@ }; }; + peci0: peci-controller@1e78b000 { + compatible = "aspeed,ast2400-peci"; + reg = <0x1e78b000 0x60>; + interrupts = <15>; + clocks = <&syscon ASPEED_CLK_GATE_REFCLK>; + resets = <&syscon ASPEED_RESET_PECI>; + cmd-timeout-ms = <1000>; + clock-frequency = <1000000>; + status = "disabled"; + }; + uart2: serial@1e78d000 { compatible = "ns16550a"; reg = <0x1e78d000 0x20>; diff --git a/dts/src/arm/aspeed-g5.dtsi b/dts/src/arm/aspeed-g5.dtsi index 7495f93c50..4147b397c8 100644 --- a/dts/src/arm/aspeed-g5.dtsi +++ b/dts/src/arm/aspeed-g5.dtsi @@ -516,6 +516,17 @@ }; }; + peci0: peci-controller@1e78b000 { + compatible = "aspeed,ast2500-peci"; + reg = <0x1e78b000 0x60>; + interrupts = <15>; + clocks = <&syscon ASPEED_CLK_GATE_REFCLK>; + resets = <&syscon ASPEED_RESET_PECI>; + cmd-timeout-ms = <1000>; + clock-frequency = <1000000>; + status = "disabled"; + }; + uart2: serial@1e78d000 { compatible = "ns16550a"; reg = <0x1e78d000 0x20>; diff --git a/dts/src/arm/aspeed-g6.dtsi b/dts/src/arm/aspeed-g6.dtsi index c32e87fad4..3d5ce9da42 100644 --- a/dts/src/arm/aspeed-g6.dtsi +++ b/dts/src/arm/aspeed-g6.dtsi @@ -512,6 +512,17 @@ status = "disabled"; }; + peci0: peci-controller@1e78b000 { + compatible = "aspeed,ast2600-peci"; + reg = <0x1e78b000 0x100>; + interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&syscon ASPEED_CLK_GATE_REF0CLK>; + resets = <&syscon ASPEED_RESET_PECI>; + cmd-timeout-ms = <1000>; + clock-frequency = <1000000>; + status = "disabled"; + }; + lpc: lpc@1e789000 { compatible = "aspeed,ast2600-lpc-v2", "simple-mfd", "syscon"; reg = <0x1e789000 0x1000>; diff --git a/dts/src/arm/at91-sam9x60ek.dts b/dts/src/arm/at91-sam9x60ek.dts index b1068cca42..7719ea3d49 100644 --- a/dts/src/arm/at91-sam9x60ek.dts +++ b/dts/src/arm/at91-sam9x60ek.dts @@ -48,11 +48,11 @@ status = "okay"; }; - vdd_1v5: fixed-regulator-vdd_1v5@1 { + vdd_1v15: fixed-regulator-vdd_1v15@1 { compatible = "regulator-fixed"; - regulator-name = "VDD_1V5"; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; + regulator-name = "VDD_1V15"; + regulator-min-microvolt = <1150000>; + regulator-max-microvolt = <1150000>; regulator-always-on; status = "okay"; }; diff --git a/dts/src/arm/at91-sama7g5ek.dts b/dts/src/arm/at91-sama7g5ek.dts index ccf9e224da..08685a10ed 100644 --- a/dts/src/arm/at91-sama7g5ek.dts +++ b/dts/src/arm/at91-sama7g5ek.dts @@ -131,6 +131,18 @@ status = "okay"; }; +&can0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can0_default>; + status = "okay"; +}; + +&can1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can1_default>; + status = "okay"; +}; + &cpu0 { cpu-supply = <&vddcpu>; }; @@ -239,6 +251,7 @@ regulator-state-standby { regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; regulator-mode = <4>; }; @@ -279,6 +292,7 @@ regulator-state-standby { regulator-on-in-suspend; + regulator-suspend-voltage = <1150000>; regulator-mode = <4>; }; @@ -290,7 +304,7 @@ vddcpu: VDD_OTHER { regulator-name = "VDD_OTHER"; - regulator-min-microvolt = <1125000>; + regulator-min-microvolt = <1050000>; regulator-max-microvolt = <1850000>; regulator-initial-mode = <2>; regulator-allowed-modes = <2>, <4>; @@ -299,6 +313,7 @@ regulator-state-standby { regulator-on-in-suspend; + regulator-suspend-voltage = <1050000>; regulator-mode = <4>; }; @@ -315,6 +330,7 @@ regulator-always-on; regulator-state-standby { + regulator-suspend-voltage = <1800000>; regulator-on-in-suspend; }; @@ -329,6 +345,7 @@ regulator-max-microvolt = <3700000>; regulator-state-standby { + regulator-suspend-voltage = <1800000>; regulator-on-in-suspend; }; @@ -454,6 +471,19 @@ }; &pioA { + + pinctrl_can0_default: can0_default { + pinmux = <PIN_PD12__CANTX0>, + <PIN_PD13__CANRX0 >; + bias-disable; + }; + + pinctrl_can1_default: can1_default { + pinmux = <PIN_PD14__CANTX1>, + <PIN_PD15__CANRX1 >; + bias-disable; + }; + pinctrl_flx0_default: flx0_default { pinmux = <PIN_PE3__FLEXCOM0_IO0>, <PIN_PE4__FLEXCOM0_IO1>, diff --git a/dts/src/arm/bcm2711.dtsi b/dts/src/arm/bcm2711.dtsi index 21294f775a..89af57482b 100644 --- a/dts/src/arm/bcm2711.dtsi +++ b/dts/src/arm/bcm2711.dtsi @@ -459,12 +459,26 @@ #size-cells = <0>; enable-method = "brcm,bcm2836-smp"; // for ARM 32-bit + /* Source for d/i-cache-line-size and d/i-cache-sets + * https://developer.arm.com/documentation/100095/0003 + * /Level-1-Memory-System/About-the-L1-memory-system?lang=en + * Source for d/i-cache-size + * https://www.raspberrypi.com/documentation/computers + * /processors.html#bcm2711 + */ cpu0: cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a72"; reg = <0>; enable-method = "spin-table"; cpu-release-addr = <0x0 0x000000d8>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set + i-cache-size = <0xc000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; // 48KiB(size)/64(line-size)=768ways/3-way set + next-level-cache = <&l2>; }; cpu1: cpu@1 { @@ -473,6 +487,13 @@ reg = <1>; enable-method = "spin-table"; cpu-release-addr = <0x0 0x000000e0>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set + i-cache-size = <0xc000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; // 48KiB(size)/64(line-size)=768ways/3-way set + next-level-cache = <&l2>; }; cpu2: cpu@2 { @@ -481,6 +502,13 @@ reg = <2>; enable-method = "spin-table"; cpu-release-addr = <0x0 0x000000e8>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set + i-cache-size = <0xc000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; // 48KiB(size)/64(line-size)=768ways/3-way set + next-level-cache = <&l2>; }; cpu3: cpu@3 { @@ -489,6 +517,28 @@ reg = <3>; enable-method = "spin-table"; cpu-release-addr = <0x0 0x000000f0>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set + i-cache-size = <0xc000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; // 48KiB(size)/64(line-size)=768ways/3-way set + next-level-cache = <&l2>; + }; + + /* Source for d/i-cache-line-size and d/i-cache-sets + * https://developer.arm.com/documentation/100095/0003 + * /Level-2-Memory-System/About-the-L2-memory-system?lang=en + * Source for d/i-cache-size + * https://www.raspberrypi.com/documentation/computers + * /processors.html#bcm2711 + */ + l2: l2-cache0 { + compatible = "cache"; + cache-size = <0x100000>; + cache-line-size = <64>; + cache-sets = <1024>; // 1MiB(size)/64(line-size)=16384ways/16-way set + cache-level = <2>; }; }; diff --git a/dts/src/arm/bcm2835.dtsi b/dts/src/arm/bcm2835.dtsi index 0549686134..1c90e5a442 100644 --- a/dts/src/arm/bcm2835.dtsi +++ b/dts/src/arm/bcm2835.dtsi @@ -14,6 +14,23 @@ device_type = "cpu"; compatible = "arm,arm1176jzf-s"; reg = <0x0>; + /* Source for d/i-cache-line-size and d/i-cache-sets + * https://developer.arm.com/documentation/ddi0301 + * /h/level-one-memory-system/cache-organization?lang=en + * + * Source for d/i-cache-size + * https://forums.raspberrypi.com/viewtopic.php?t=98428 + * + * NOTE: The BCM2835 has a L2 cache but it is dedicated to the GPU + * It can be shared with the CPU through fw settings, + * but this is not recommended. + */ + d-cache-size = <0x4000>; + d-cache-line-size = <16>; + d-cache-sets = <256>; // 16KiB(size)/16(line-size)=1024ways/4-way set + i-cache-size = <0x4000>; + i-cache-line-size = <16>; + i-cache-sets = <256>; // 16KiB(size)/16(line-size)=1024ways/4-way set }; }; diff --git a/dts/src/arm/bcm2836.dtsi b/dts/src/arm/bcm2836.dtsi index b390006aef..534dacfc4d 100644 --- a/dts/src/arm/bcm2836.dtsi +++ b/dts/src/arm/bcm2836.dtsi @@ -41,11 +41,26 @@ #size-cells = <0>; enable-method = "brcm,bcm2836-smp"; + /* Source for d/i-cache-line-size and d/i-cache-sets + * https://developer.arm.com/documentation/ddi0464/f/L1-Memory-System + * /About-the-L1-memory-system?lang=en + * + * Source for d/i-cache-size + * https://forums.raspberrypi.com/viewtopic.php?t=98428 + */ + v7_cpu0: cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a7"; reg = <0xf00>; clock-frequency = <800000000>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set + i-cache-size = <0x8000>; + i-cache-line-size = <32>; + i-cache-sets = <512>; // 32KiB(size)/32(line-size)=1024ways/2-way set + next-level-cache = <&l2>; }; v7_cpu1: cpu@1 { @@ -53,6 +68,13 @@ compatible = "arm,cortex-a7"; reg = <0xf01>; clock-frequency = <800000000>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set + i-cache-size = <0x8000>; + i-cache-line-size = <32>; + i-cache-sets = <512>; // 32KiB(size)/32(line-size)=1024ways/2-way set + next-level-cache = <&l2>; }; v7_cpu2: cpu@2 { @@ -60,6 +82,13 @@ compatible = "arm,cortex-a7"; reg = <0xf02>; clock-frequency = <800000000>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set + i-cache-size = <0x8000>; + i-cache-line-size = <32>; + i-cache-sets = <512>; // 32KiB(size)/32(line-size)=1024ways/2-way set + next-level-cache = <&l2>; }; v7_cpu3: cpu@3 { @@ -67,6 +96,27 @@ compatible = "arm,cortex-a7"; reg = <0xf03>; clock-frequency = <800000000>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set + i-cache-size = <0x8000>; + i-cache-line-size = <32>; + i-cache-sets = <512>; // 32KiB(size)/32(line-size)=1024ways/2-way set + next-level-cache = <&l2>; + }; + + /* Source for cache-line-size + cache-sets + * https://developer.arm.com/documentation/ddi0464/f/L2-Memory-System + * /About-the-L2-Memory-system?lang=en + * Source for cache-size + * https://forums.raspberrypi.com/viewtopic.php?t=98428 + */ + l2: l2-cache0 { + compatible = "cache"; + cache-size = <0x80000>; + cache-line-size = <64>; + cache-sets = <1024>; // 512KiB(size)/64(line-size)=8192ways/8-way set + cache-level = <2>; }; }; }; diff --git a/dts/src/arm/bcm2837-rpi-zero-2-w.dts b/dts/src/arm/bcm2837-rpi-zero-2-w.dts new file mode 100644 index 0000000000..4a76856298 --- /dev/null +++ b/dts/src/arm/bcm2837-rpi-zero-2-w.dts @@ -0,0 +1,136 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2022 Stefan Wahren <stefan.wahren@i2se.com> + */ + +/dts-v1/; +#include "bcm2837.dtsi" +#include "bcm2836-rpi.dtsi" +#include "bcm283x-rpi-usb-otg.dtsi" +#include "bcm283x-rpi-wifi-bt.dtsi" + +/ { + compatible = "raspberrypi,model-zero-2-w", "brcm,bcm2837"; + model = "Raspberry Pi Zero 2 W"; + + memory@0 { + device_type = "memory"; + reg = <0 0x20000000>; + }; + + chosen { + /* 8250 auxiliary UART instead of pl011 */ + stdout-path = "serial1:115200n8"; + }; + + leds { + led-act { + gpios = <&gpio 29 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&bt { + shutdown-gpios = <&gpio 42 GPIO_ACTIVE_HIGH>; +}; + +&gpio { + /* + * This is based on the official GPU firmware DT blob. + * + * Legend: + * "NC" = not connected (no rail from the SoC) + * "FOO" = GPIO line named "FOO" on the schematic + * "FOO_N" = GPIO line named "FOO" on schematic, active low + */ + gpio-line-names = "ID_SDA", + "ID_SCL", + "SDA1", + "SCL1", + "GPIO_GCLK", + "GPIO5", + "GPIO6", + "SPI_CE1_N", + "SPI_CE0_N", + "SPI_MISO", + "SPI_MOSI", + "SPI_SCLK", + "GPIO12", + "GPIO13", + /* Serial port */ + "TXD0", + "RXD0", + "GPIO16", + "GPIO17", + "GPIO18", + "GPIO19", + "GPIO20", + "GPIO21", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "GPIO26", + "GPIO27", + "HDMI_HPD_N", + "STATUS_LED_N", + "NC", /* GPIO30 */ + "NC", /* GPIO31 */ + "NC", /* GPIO32 */ + "NC", /* GPIO33 */ + "NC", /* GPIO34 */ + "NC", /* GPIO35 */ + "NC", /* GPIO36 */ + "NC", /* GPIO37 */ + "NC", /* GPIO38 */ + "NC", /* GPIO39 */ + "CAM_GPIO0", /* GPIO40 */ + "WL_ON", /* GPIO41 */ + "BT_ON", /* GPIO42 */ + "WIFI_CLK", /* GPIO43 */ + "SDA0", /* GPIO44 */ + "SCL0", /* GPIO45 */ + "SMPS_SCL", + "SMPS_SDA", + /* Used by SD Card */ + "SD_CLK_R", + "SD_CMD_R", + "SD_DATA0_R", + "SD_DATA1_R", + "SD_DATA2_R", + "SD_DATA3_R"; + + pinctrl-0 = <&gpioout &alt0>; +}; + +&hdmi { + hpd-gpios = <&gpio 28 GPIO_ACTIVE_LOW>; + power-domains = <&power RPI_POWER_DOMAIN_HDMI>; + status = "okay"; +}; + +&sdhci { + pinctrl-0 = <&emmc_gpio34 &gpclk2_gpio43>; +}; + +&sdhost { + pinctrl-names = "default"; + pinctrl-0 = <&sdhost_gpio48>; + bus-width = <4>; + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_gpio32 &uart0_ctsrts_gpio30>; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_gpio14>; + status = "okay"; +}; + +&wifi_pwrseq { + reset-gpios = <&gpio 41 GPIO_ACTIVE_LOW>; +}; diff --git a/dts/src/arm/bcm2837.dtsi b/dts/src/arm/bcm2837.dtsi index 0199ec98cd..5dbdebc462 100644 --- a/dts/src/arm/bcm2837.dtsi +++ b/dts/src/arm/bcm2837.dtsi @@ -40,12 +40,26 @@ #size-cells = <0>; enable-method = "brcm,bcm2836-smp"; // for ARM 32-bit + /* Source for d/i-cache-line-size and d/i-cache-sets + * https://developer.arm.com/documentation/ddi0500/e/level-1-memory-system + * /about-the-l1-memory-system?lang=en + * + * Source for d/i-cache-size + * https://magpi.raspberrypi.com/articles/raspberry-pi-3-specs-benchmarks + */ cpu0: cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a53"; reg = <0>; enable-method = "spin-table"; cpu-release-addr = <0x0 0x000000d8>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set + i-cache-size = <0x8000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set + next-level-cache = <&l2>; }; cpu1: cpu@1 { @@ -54,6 +68,13 @@ reg = <1>; enable-method = "spin-table"; cpu-release-addr = <0x0 0x000000e0>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set + i-cache-size = <0x8000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set + next-level-cache = <&l2>; }; cpu2: cpu@2 { @@ -62,6 +83,13 @@ reg = <2>; enable-method = "spin-table"; cpu-release-addr = <0x0 0x000000e8>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set + i-cache-size = <0x8000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set + next-level-cache = <&l2>; }; cpu3: cpu@3 { @@ -70,6 +98,27 @@ reg = <3>; enable-method = "spin-table"; cpu-release-addr = <0x0 0x000000f0>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set + i-cache-size = <0x8000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set + next-level-cache = <&l2>; + }; + + /* Source for cache-line-size + cache-sets + * https://developer.arm.com/documentation/ddi0500 + * /e/level-2-memory-system/about-the-l2-memory-system?lang=en + * Source for cache-size + * https://datasheets.raspberrypi.com/cm/cm1-and-cm3-datasheet.pdf + */ + l2: l2-cache0 { + compatible = "cache"; + cache-size = <0x80000>; + cache-line-size = <64>; + cache-sets = <512>; // 512KiB(size)/64(line-size)=8192ways/16-way set + cache-level = <2>; }; }; }; diff --git a/dts/src/arm/bcm47094-asus-rt-ac88u.dts b/dts/src/arm/bcm47094-asus-rt-ac88u.dts index 249476fdad..82f9629f0a 100644 --- a/dts/src/arm/bcm47094-asus-rt-ac88u.dts +++ b/dts/src/arm/bcm47094-asus-rt-ac88u.dts @@ -93,6 +93,82 @@ gpios = <&chipcommon 4 GPIO_ACTIVE_LOW>; }; }; + + switch { + compatible = "realtek,rtl8365mb"; + /* 7 = MDIO (has input reads), 6 = MDC (clock, output only) */ + mdc-gpios = <&chipcommon 6 GPIO_ACTIVE_HIGH>; + mdio-gpios = <&chipcommon 7 GPIO_ACTIVE_HIGH>; + reset-gpios = <&chipcommon 10 GPIO_ACTIVE_LOW>; + realtek,disable-leds; + dsa,member = <1 0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "lan5"; + phy-handle = <ðphy0>; + }; + + port@1 { + reg = <1>; + label = "lan6"; + phy-handle = <ðphy1>; + }; + + port@2 { + reg = <2>; + label = "lan7"; + phy-handle = <ðphy2>; + }; + + port@3 { + reg = <3>; + label = "lan8"; + phy-handle = <ðphy3>; + }; + + port@6 { + reg = <6>; + label = "cpu"; + ethernet = <&sw0_p5>; + phy-mode = "rgmii"; + tx-internal-delay-ps = <2000>; + rx-internal-delay-ps = <2100>; + + fixed-link { + speed = <1000>; + full-duplex; + pause; + }; + }; + }; + + mdio { + compatible = "realtek,smi-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + ethphy0: ethernet-phy@0 { + reg = <0>; + }; + + ethphy1: ethernet-phy@1 { + reg = <1>; + }; + + ethphy2: ethernet-phy@2 { + reg = <2>; + }; + + ethphy3: ethernet-phy@3 { + reg = <3>; + }; + }; + }; }; &srab { diff --git a/dts/src/arm/bcm47094-luxul-xwr-3150-v1.dts b/dts/src/arm/bcm47094-luxul-xwr-3150-v1.dts index 24ae3c8a3e..9efcb24242 100644 --- a/dts/src/arm/bcm47094-luxul-xwr-3150-v1.dts +++ b/dts/src/arm/bcm47094-luxul-xwr-3150-v1.dts @@ -25,6 +25,9 @@ nvram@1eff0000 { compatible = "brcm,nvram"; reg = <0x1eff0000 0x10000>; + + et0macaddr: et0macaddr { + }; }; leds { @@ -72,6 +75,11 @@ }; }; +&gmac0 { + nvmem-cells = <&et0macaddr>; + nvmem-cell-names = "mac-address"; +}; + &usb3 { vcc-gpio = <&chipcommon 18 GPIO_ACTIVE_HIGH>; }; diff --git a/dts/src/arm/bcm958625-meraki-alamo.dtsi b/dts/src/arm/bcm958625-meraki-alamo.dtsi index ba01054a76..58b7d9fc75 100644 --- a/dts/src/arm/bcm958625-meraki-alamo.dtsi +++ b/dts/src/arm/bcm958625-meraki-alamo.dtsi @@ -57,10 +57,9 @@ led-4 { /* amber:power */ - function = LED_FUNCTION_POWER; + function = LED_FUNCTION_FAULT; color = <LED_COLOR_ID_AMBER>; gpios = <&gpioa 3 GPIO_ACTIVE_HIGH>; - default-state = "on"; }; led-5 { diff --git a/dts/src/arm/bcm958625-meraki-kingpin.dtsi b/dts/src/arm/bcm958625-meraki-kingpin.dtsi index 7c487c74fd..576cfc5256 100644 --- a/dts/src/arm/bcm958625-meraki-kingpin.dtsi +++ b/dts/src/arm/bcm958625-meraki-kingpin.dtsi @@ -106,10 +106,9 @@ led-a { /* amber:power */ - function = LED_FUNCTION_POWER; + function = LED_FUNCTION_FAULT; color = <LED_COLOR_ID_AMBER>; gpios = <&gpioa 0 GPIO_ACTIVE_LOW>; - default-state = "on"; }; led-b { diff --git a/dts/src/arm/bcm958625-meraki-mx6x-common.dtsi b/dts/src/arm/bcm958625-meraki-mx6x-common.dtsi index 6519b7c61a..b0854d881a 100644 --- a/dts/src/arm/bcm958625-meraki-mx6x-common.dtsi +++ b/dts/src/arm/bcm958625-meraki-mx6x-common.dtsi @@ -22,7 +22,7 @@ }; led-2 { - function = LED_FUNCTION_INDICATOR; + function = LED_FUNCTION_POWER; color = <LED_COLOR_ID_GREEN>; pwms = <&pwm 2 50000>; max-brightness = <255>; @@ -39,6 +39,8 @@ &amac2 { status = "okay"; + nvmem-cells = <&mac_address>; + nvmem-cell-names = "mac-address"; }; &ehci0 { @@ -53,6 +55,12 @@ reg = <0x50>; pagesize = <32>; read-only; + #address-cells = <1>; + #size-cells = <1>; + + mac_address: mac-address@66 { + reg = <0x66 0x6>; + }; }; }; diff --git a/dts/src/arm/dra7-l4.dtsi b/dts/src/arm/dra7-l4.dtsi index 956a26d52a..0a11bacffc 100644 --- a/dts/src/arm/dra7-l4.dtsi +++ b/dts/src/arm/dra7-l4.dtsi @@ -3482,8 +3482,7 @@ ti,timer-pwm; }; }; - - target-module@2c000 { /* 0x4882c000, ap 17 02.0 */ + timer15_target: target-module@2c000 { /* 0x4882c000, ap 17 02.0 */ compatible = "ti,sysc-omap4-timer", "ti,sysc"; reg = <0x2c000 0x4>, <0x2c010 0x4>; @@ -3511,7 +3510,7 @@ }; }; - target-module@2e000 { /* 0x4882e000, ap 19 14.0 */ + timer16_target: target-module@2e000 { /* 0x4882e000, ap 19 14.0 */ compatible = "ti,sysc-omap4-timer", "ti,sysc"; reg = <0x2e000 0x4>, <0x2e010 0x4>; diff --git a/dts/src/arm/dra7.dtsi b/dts/src/arm/dra7.dtsi index 42bff11765..97ce0c4f1d 100644 --- a/dts/src/arm/dra7.dtsi +++ b/dts/src/arm/dra7.dtsi @@ -1339,20 +1339,20 @@ }; /* Local timers, see ARM architected timer wrap erratum i940 */ -&timer3_target { +&timer15_target { ti,no-reset-on-init; ti,no-idle; timer@0 { - assigned-clocks = <&l4per_clkctrl DRA7_L4PER_TIMER3_CLKCTRL 24>; + assigned-clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER15_CLKCTRL 24>; assigned-clock-parents = <&timer_sys_clk_div>; }; }; -&timer4_target { +&timer16_target { ti,no-reset-on-init; ti,no-idle; timer@0 { - assigned-clocks = <&l4per_clkctrl DRA7_L4PER_TIMER4_CLKCTRL 24>; + assigned-clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER16_CLKCTRL 24>; assigned-clock-parents = <&timer_sys_clk_div>; }; }; diff --git a/dts/src/arm/en7523-evb.dts b/dts/src/arm/en7523-evb.dts new file mode 100644 index 0000000000..a8d8bb0419 --- /dev/null +++ b/dts/src/arm/en7523-evb.dts @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/dts-v1/; + +/* Bootloader installs ATF here */ +/memreserve/ 0x80000000 0x200000; + +#include "en7523.dtsi" + +/ { + model = "Airoha EN7523 Evaluation Board"; + compatible = "airoha,en7523-evb", "airoha,en7523"; + + aliases { + serial0 = &uart1; + }; + + chosen { + bootargs = "console=ttyS0,115200 earlycon"; + stdout-path = "serial0:115200n8"; + linux,usable-memory-range = <0x80200000 0x1fe00000>; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x80000000 0x20000000>; + }; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; diff --git a/dts/src/arm/en7523.dtsi b/dts/src/arm/en7523.dtsi new file mode 100644 index 0000000000..36597f587f --- /dev/null +++ b/dts/src/arm/en7523.dtsi @@ -0,0 +1,138 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) + +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/gpio/gpio.h> + +/ { + interrupt-parent = <&gic>; + #address-cells = <1>; + #size-cells = <1>; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + npu_binary@84000000 { + no-map; + reg = <0x84000000 0xA00000>; + }; + + npu_flag@84B0000 { + no-map; + reg = <0x84B00000 0x100000>; + }; + + npu_pkt@85000000 { + no-map; + reg = <0x85000000 0x1A00000>; + }; + + npu_phyaddr@86B00000 { + no-map; + reg = <0x86B00000 0x100000>; + }; + + npu_rxdesc@86D00000 { + no-map; + reg = <0x86D00000 0x100000>; + }; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu-map { + cluster0 { + core0 { + cpu = <&cpu0>; + }; + core1 { + cpu = <&cpu1>; + }; + }; + }; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x0>; + enable-method = "psci"; + clock-frequency = <80000000>; + next-level-cache = <&L2_0>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x1>; + enable-method = "psci"; + clock-frequency = <80000000>; + next-level-cache = <&L2_0>; + }; + + L2_0: l2-cache0 { + compatible = "cache"; + }; + }; + + gic: interrupt-controller@9000000 { + compatible = "arm,gic-v3"; + interrupt-controller; + #interrupt-cells = <3>; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x09000000 0x20000>, + <0x09080000 0x80000>, + <0x09400000 0x2000>, + <0x09500000 0x2000>, + <0x09600000 0x20000>; + interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupt-parent = <&gic>; + interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, + <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, + <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, + <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; + }; + + uart1: serial@1fbf0000 { + compatible = "ns16550"; + reg = <0x1fbf0000 0x30>; + reg-io-width = <4>; + reg-shift = <2>; + interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>; + clock-frequency = <1843200>; + status = "okay"; + }; + + gpio0: gpio@1fbf0200 { + compatible = "airoha,en7523-gpio"; + reg = <0x1fbf0204 0x4>, + <0x1fbf0200 0x4>, + <0x1fbf0220 0x4>, + <0x1fbf0214 0x4>; + gpio-controller; + #gpio-cells = <2>; + }; + + gpio1: gpio@1fbf0270 { + compatible = "airoha,en7523-gpio"; + reg = <0x1fbf0270 0x4>, + <0x1fbf0260 0x4>, + <0x1fbf0264 0x4>, + <0x1fbf0278 0x4>; + gpio-controller; + #gpio-cells = <2>; + }; +}; diff --git a/dts/src/arm/exynos3250-artik5.dtsi b/dts/src/arm/exynos3250-artik5.dtsi index 829c05b2c4..7b429622a2 100644 --- a/dts/src/arm/exynos3250-artik5.dtsi +++ b/dts/src/arm/exynos3250-artik5.dtsi @@ -356,7 +356,7 @@ }; &pinctrl_1 { - bten: bten { + bten: bten-pins { samsung,pins ="gpx1-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; @@ -364,7 +364,7 @@ samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_DOWN>; }; - wlanen: wlanen { + wlanen: wlanen-pins { samsung,pins = "gpx2-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; @@ -372,12 +372,12 @@ samsung,pin-val = <1>; }; - s2mps14_irq: s2mps14-irq { + s2mps14_irq: s2mps14-irq-pins { samsung,pins = "gpx3-5"; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; }; - bthostwake: bthostwake { + bthostwake: bthostwake-pins { samsung,pins = "gpx3-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; @@ -385,7 +385,7 @@ samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_NONE>; }; - btwake: btwake { + btwake: btwake-pins { samsung,pins = "gpx3-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; diff --git a/dts/src/arm/exynos3250-monk.dts b/dts/src/arm/exynos3250-monk.dts index 8b41a9d5e2..02a9dc479d 100644 --- a/dts/src/arm/exynos3250-monk.dts +++ b/dts/src/arm/exynos3250-monk.dts @@ -69,7 +69,7 @@ reg = <0x25>; wakeup-source; - muic: max77836-muic { + extcon { compatible = "maxim,max77836-muic"; }; diff --git a/dts/src/arm/exynos3250-pinctrl.dtsi b/dts/src/arm/exynos3250-pinctrl.dtsi index dff3c6e3aa..cc30d154ec 100644 --- a/dts/src/arm/exynos3250-pinctrl.dtsi +++ b/dts/src/arm/exynos3250-pinctrl.dtsi @@ -12,47 +12,22 @@ #include <dt-bindings/pinctrl/samsung.h> #define PIN_IN(_pin, _pull, _drv) \ - _pin { \ + pin- ## _pin { \ samsung,pins = #_pin; \ samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; \ samsung,pin-pud = <EXYNOS_PIN_PULL_ ##_pull>; \ samsung,pin-drv = <EXYNOS4_PIN_DRV_ ##_drv>; \ } -#define PIN_OUT(_pin, _drv) \ - _pin { \ - samsung,pins = #_pin; \ - samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; \ - samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; \ - samsung,pin-drv = <EXYNOS4_PIN_DRV_ ##_drv>; \ - } - -#define PIN_OUT_SET(_pin, _val, _drv) \ - _pin { \ - samsung,pins = #_pin; \ - samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; \ - samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; \ - samsung,pin-drv = <EXYNOS4_PIN_DRV_ ##_drv>; \ - samsung,pin-val = <_val>; \ - } - -#define PIN_CFG(_pin, _sel, _pull, _drv) \ - _pin { \ - samsung,pins = #_pin; \ - samsung,pin-function = <_sel>; \ - samsung,pin-pud = <EXYNOS_PIN_PULL_ ##_pull>; \ - samsung,pin-drv = <EXYNOS4_PIN_DRV_ ##_drv>; \ - } - #define PIN_SLP(_pin, _mode, _pull) \ - _pin { \ + pin- ## _pin { \ samsung,pins = #_pin; \ samsung,pin-con-pdn = <EXYNOS_PIN_PDN_ ##_mode>; \ samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_ ##_pull>; \ } &pinctrl_0 { - gpa0: gpa0 { + gpa0: gpa0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -60,7 +35,7 @@ #interrupt-cells = <2>; }; - gpa1: gpa1 { + gpa1: gpa1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -68,7 +43,7 @@ #interrupt-cells = <2>; }; - gpb: gpb { + gpb: gpb-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -76,7 +51,7 @@ #interrupt-cells = <2>; }; - gpc0: gpc0 { + gpc0: gpc0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -84,7 +59,7 @@ #interrupt-cells = <2>; }; - gpc1: gpc1 { + gpc1: gpc1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -92,7 +67,7 @@ #interrupt-cells = <2>; }; - gpd0: gpd0 { + gpd0: gpd0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -100,7 +75,7 @@ #interrupt-cells = <2>; }; - gpd1: gpd1 { + gpd1: gpd1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -108,84 +83,84 @@ #interrupt-cells = <2>; }; - uart0_data: uart0-data { + uart0_data: uart0-data-pins { samsung,pins = "gpa0-0", "gpa0-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - uart0_fctl: uart0-fctl { + uart0_fctl: uart0-fctl-pins { samsung,pins = "gpa0-2", "gpa0-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - uart1_data: uart1-data { + uart1_data: uart1-data-pins { samsung,pins = "gpa0-4", "gpa0-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - uart1_fctl: uart1-fctl { + uart1_fctl: uart1-fctl-pins { samsung,pins = "gpa0-6", "gpa0-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2c2_bus: i2c2-bus { + i2c2_bus: i2c2-bus-pins { samsung,pins = "gpa0-6", "gpa0-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - uart2_data: uart2-data { + uart2_data: uart2-data-pins { samsung,pins = "gpa1-0", "gpa1-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2c3_bus: i2c3-bus { + i2c3_bus: i2c3-bus-pins { samsung,pins = "gpa1-2", "gpa1-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - spi0_bus: spi0-bus { + spi0_bus: spi0-bus-pins { samsung,pins = "gpb-0", "gpb-2", "gpb-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2c4_bus: i2c4-bus { + i2c4_bus: i2c4-bus-pins { samsung,pins = "gpb-0", "gpb-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - spi1_bus: spi1-bus { + spi1_bus: spi1-bus-pins { samsung,pins = "gpb-4", "gpb-6", "gpb-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2c5_bus: i2c5-bus { + i2c5_bus: i2c5-bus-pins { samsung,pins = "gpb-2", "gpb-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2s2_bus: i2s2-bus { + i2s2_bus: i2s2-bus-pins { samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3", "gpc1-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; @@ -193,7 +168,7 @@ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - pcm2_bus: pcm2-bus { + pcm2_bus: pcm2-bus-pins { samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3", "gpc1-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; @@ -201,63 +176,63 @@ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2c6_bus: i2c6-bus { + i2c6_bus: i2c6-bus-pins { samsung,pins = "gpc1-3", "gpc1-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_4>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - pwm0_out: pwm0-out { + pwm0_out: pwm0-out-pins { samsung,pins = "gpd0-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - pwm1_out: pwm1-out { + pwm1_out: pwm1-out-pins { samsung,pins = "gpd0-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2c7_bus: i2c7-bus { + i2c7_bus: i2c7-bus-pins { samsung,pins = "gpd0-2", "gpd0-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - pwm2_out: pwm2-out { + pwm2_out: pwm2-out-pins { samsung,pins = "gpd0-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - pwm3_out: pwm3-out { + pwm3_out: pwm3-out-pins { samsung,pins = "gpd0-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2c0_bus: i2c0-bus { + i2c0_bus: i2c0-bus-pins { samsung,pins = "gpd1-0", "gpd1-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - mipi0_clk: mipi0-clk { + mipi0_clk: mipi0-clk-pins { samsung,pins = "gpd1-0", "gpd1-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2c1_bus: i2c1-bus { + i2c1_bus: i2c1-bus-pins { samsung,pins = "gpd1-2", "gpd1-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; @@ -266,22 +241,22 @@ }; &pinctrl_1 { - gpe0: gpe0 { + gpe0: gpe0-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpe1: gpe1 { + gpe1: gpe1-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpe2: gpe2 { + gpe2: gpe2-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpk0: gpk0 { + gpk0: gpk0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -289,7 +264,7 @@ #interrupt-cells = <2>; }; - gpk1: gpk1 { + gpk1: gpk1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -297,7 +272,7 @@ #interrupt-cells = <2>; }; - gpk2: gpk2 { + gpk2: gpk2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -305,7 +280,7 @@ #interrupt-cells = <2>; }; - gpl0: gpl0 { + gpl0: gpl0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -313,7 +288,7 @@ #interrupt-cells = <2>; }; - gpm0: gpm0 { + gpm0: gpm0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -321,7 +296,7 @@ #interrupt-cells = <2>; }; - gpm1: gpm1 { + gpm1: gpm1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -329,7 +304,7 @@ #interrupt-cells = <2>; }; - gpm2: gpm2 { + gpm2: gpm2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -337,7 +312,7 @@ #interrupt-cells = <2>; }; - gpm3: gpm3 { + gpm3: gpm3-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -345,7 +320,7 @@ #interrupt-cells = <2>; }; - gpm4: gpm4 { + gpm4: gpm4-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -353,7 +328,7 @@ #interrupt-cells = <2>; }; - gpx0: gpx0 { + gpx0: gpx0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -370,7 +345,7 @@ #interrupt-cells = <2>; }; - gpx1: gpx1 { + gpx1: gpx1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -387,7 +362,7 @@ #interrupt-cells = <2>; }; - gpx2: gpx2 { + gpx2: gpx2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -395,7 +370,7 @@ #interrupt-cells = <2>; }; - gpx3: gpx3 { + gpx3: gpx3-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -403,126 +378,126 @@ #interrupt-cells = <2>; }; - sd0_clk: sd0-clk { + sd0_clk: sd0-clk-pins { samsung,pins = "gpk0-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd0_cmd: sd0-cmd { + sd0_cmd: sd0-cmd-pins { samsung,pins = "gpk0-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd0_cd: sd0-cd { + sd0_cd: sd0-cd-pins { samsung,pins = "gpk0-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd0_rdqs: sd0-rdqs { + sd0_rdqs: sd0-rdqs-pins { samsung,pins = "gpk0-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd0_bus1: sd0-bus-width1 { + sd0_bus1: sd0-bus-width1-pins { samsung,pins = "gpk0-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd0_bus4: sd0-bus-width4 { + sd0_bus4: sd0-bus-width4-pins { samsung,pins = "gpk0-4", "gpk0-5", "gpk0-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd0_bus8: sd0-bus-width8 { + sd0_bus8: sd0-bus-width8-pins { samsung,pins = "gpl0-0", "gpl0-1", "gpl0-2", "gpl0-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd1_clk: sd1-clk { + sd1_clk: sd1-clk-pins { samsung,pins = "gpk1-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd1_cmd: sd1-cmd { + sd1_cmd: sd1-cmd-pins { samsung,pins = "gpk1-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd1_cd: sd1-cd { + sd1_cd: sd1-cd-pins { samsung,pins = "gpk1-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd1_bus1: sd1-bus-width1 { + sd1_bus1: sd1-bus-width1-pins { samsung,pins = "gpk1-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd1_bus4: sd1-bus-width4 { + sd1_bus4: sd1-bus-width4-pins { samsung,pins = "gpk1-4", "gpk1-5", "gpk1-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd2_clk: sd2-clk { + sd2_clk: sd2-clk-pins { samsung,pins = "gpk2-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd2_cmd: sd2-cmd { + sd2_cmd: sd2-cmd-pins { samsung,pins = "gpk2-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd2_cd: sd2-cd { + sd2_cd: sd2-cd-pins { samsung,pins = "gpk2-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd2_bus1: sd2-bus-width1 { + sd2_bus1: sd2-bus-width1-pins { samsung,pins = "gpk2-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd2_bus4: sd2-bus-width4 { + sd2_bus4: sd2-bus-width4-pins { samsung,pins = "gpk2-4", "gpk2-5", "gpk2-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - cam_port_b_io: cam-port-b-io { + cam_port_b_io: cam-port-b-io-pins { samsung,pins = "gpm0-0", "gpm0-1", "gpm0-2", "gpm0-3", "gpm0-4", "gpm0-5", "gpm0-6", "gpm0-7", "gpm1-0", "gpm1-1", "gpm2-0", "gpm2-1"; @@ -531,35 +506,35 @@ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - cam_port_b_clk_active: cam-port-b-clk-active { + cam_port_b_clk_active: cam-port-b-clk-active-pins { samsung,pins = "gpm2-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - cam_port_b_clk_idle: cam-port-b-clk-idle { + cam_port_b_clk_idle: cam-port-b-clk-idle-pins { samsung,pins = "gpm2-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - fimc_is_i2c0: fimc-is-i2c0 { + fimc_is_i2c0: fimc-is-i2c0-pins { samsung,pins = "gpm4-0", "gpm4-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - fimc_is_i2c1: fimc-is-i2c1 { + fimc_is_i2c1: fimc-is-i2c1-pins { samsung,pins = "gpm4-2", "gpm4-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - fimc_is_uart: fimc-is-uart { + fimc_is_uart: fimc-is-uart-pins { samsung,pins = "gpm3-5", "gpm3-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; diff --git a/dts/src/arm/exynos3250-rinato.dts b/dts/src/arm/exynos3250-rinato.dts index 5f7f8fedfb..6d2c7bb191 100644 --- a/dts/src/arm/exynos3250-rinato.dts +++ b/dts/src/arm/exynos3250-rinato.dts @@ -70,7 +70,7 @@ reg = <0x25>; wakeup-source; - muic: max77836-muic { + extcon { compatible = "maxim,max77836-muic"; }; diff --git a/dts/src/arm/exynos3250.dtsi b/dts/src/arm/exynos3250.dtsi index a10b789d8a..ae64431585 100644 --- a/dts/src/arm/exynos3250.dtsi +++ b/dts/src/arm/exynos3250.dtsi @@ -421,7 +421,7 @@ status = "disabled"; }; - pdma0: pdma@12680000 { + pdma0: dma-controller@12680000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x12680000 0x1000>; interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; @@ -432,7 +432,7 @@ #dma-requests = <32>; }; - pdma1: pdma@12690000 { + pdma1: dma-controller@12690000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x12690000 0x1000>; interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; diff --git a/dts/src/arm/exynos4.dtsi b/dts/src/arm/exynos4.dtsi index eab77a66ae..e81b3ee4e0 100644 --- a/dts/src/arm/exynos4.dtsi +++ b/dts/src/arm/exynos4.dtsi @@ -669,7 +669,7 @@ status = "disabled"; }; - pdma0: pdma@12680000 { + pdma0: dma-controller@12680000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x12680000 0x1000>; interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; @@ -680,7 +680,7 @@ #dma-requests = <32>; }; - pdma1: pdma@12690000 { + pdma1: dma-controller@12690000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x12690000 0x1000>; interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; @@ -691,7 +691,7 @@ #dma-requests = <32>; }; - mdma1: mdma@12850000 { + mdma1: dma-controller@12850000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x12850000 0x1000>; interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; diff --git a/dts/src/arm/exynos4210-i9100.dts b/dts/src/arm/exynos4210-i9100.dts index 33894054b8..3c0a18b308 100644 --- a/dts/src/arm/exynos4210-i9100.dts +++ b/dts/src/arm/exynos4210-i9100.dts @@ -672,26 +672,26 @@ pinctrl-names = "default"; pinctrl-0 = <&sleep0>; - sleep0: sleep-states { - gpa0-0 { + sleep0: sleep-state { + gpa0-0-pin { samsung,pins = "gpa0-0"; samsung,pin-con-pdn = <EXYNOS_PIN_PDN_INPUT>; samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_NONE>; }; - gpa0-1 { + gpa0-1-pin { samsung,pins = "gpa0-1"; samsung,pin-con-pdn = <EXYNOS_PIN_PDN_OUT0>; samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_NONE>; }; - gpa0-2 { + gpa0-2-pin { samsung,pins = "gpa0-2"; samsung,pin-con-pdn = <EXYNOS_PIN_PDN_INPUT>; samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_NONE>; }; - gpa0-3 { + gpa0-3-pin { samsung,pins = "gpa0-3"; samsung,pin-con-pdn = <EXYNOS_PIN_PDN_OUT1>; samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_NONE>; @@ -700,19 +700,19 @@ }; &pinctrl_1 { - mhl_int: mhl-int { + mhl_int: mhl-int-pins { samsung,pins = "gpf3-5"; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; }; - i2c_mhl_bus: i2c-mhl-bus { + i2c_mhl_bus: i2c-mhl-bus-pins { samsung,pins = "gpf0-4", "gpf0-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - usb_sel: usb-sel { + usb_sel: usb-sel-pins { samsung,pins = "gpl0-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; @@ -720,7 +720,7 @@ samsung,pin-val = <0>; }; - bt_en: bt-en { + bt_en: bt-en-pins { samsung,pins = "gpl0-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; @@ -728,7 +728,7 @@ samsung,pin-val = <0>; }; - bt_res: bt-res { + bt_res: bt-res-pins { samsung,pins = "gpl1-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; @@ -736,7 +736,7 @@ samsung,pin-val = <0>; }; - otg_gp: otg-gp { + otg_gp: otg-gp-pins { samsung,pins = "gpx3-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; @@ -744,23 +744,23 @@ samsung,pin-val = <0>; }; - mag_mhl_gpio: mag-mhl { + mag_mhl_gpio: mag-mhl-pins { samsung,pins = "gpd0-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; }; - max8997_irq: max8997-irq { + max8997_irq: max8997-irq-pins { samsung,pins = "gpx0-7"; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; }; - max17042_fuel_irq: max17042-fuel-irq { + max17042_fuel_irq: max17042-fuel-irq-pins { samsung,pins = "gpx2-3"; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; }; - tsp224_irq: tsp224-irq { + tsp224_irq: tsp224-irq-pins { samsung,pins = "gpx0-4"; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; }; diff --git a/dts/src/arm/exynos4210-origen.dts b/dts/src/arm/exynos4210-origen.dts index 435fda60e8..a08ce2f37e 100644 --- a/dts/src/arm/exynos4210-origen.dts +++ b/dts/src/arm/exynos4210-origen.dts @@ -316,7 +316,7 @@ }; &pinctrl_1 { - max8997_irq: max8997-irq { + max8997_irq: max8997-irq-pins { samsung,pins = "gpx0-3", "gpx0-4"; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; }; diff --git a/dts/src/arm/exynos4210-pinctrl.dtsi b/dts/src/arm/exynos4210-pinctrl.dtsi index 520c5934a8..6373009bb7 100644 --- a/dts/src/arm/exynos4210-pinctrl.dtsi +++ b/dts/src/arm/exynos4210-pinctrl.dtsi @@ -14,7 +14,7 @@ #include <dt-bindings/pinctrl/samsung.h> &pinctrl_0 { - gpa0: gpa0 { + gpa0: gpa0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -22,7 +22,7 @@ #interrupt-cells = <2>; }; - gpa1: gpa1 { + gpa1: gpa1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -30,7 +30,7 @@ #interrupt-cells = <2>; }; - gpb: gpb { + gpb: gpb-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -38,7 +38,7 @@ #interrupt-cells = <2>; }; - gpc0: gpc0 { + gpc0: gpc0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -46,7 +46,7 @@ #interrupt-cells = <2>; }; - gpc1: gpc1 { + gpc1: gpc1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -54,7 +54,7 @@ #interrupt-cells = <2>; }; - gpd0: gpd0 { + gpd0: gpd0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -62,7 +62,7 @@ #interrupt-cells = <2>; }; - gpd1: gpd1 { + gpd1: gpd1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -70,7 +70,7 @@ #interrupt-cells = <2>; }; - gpe0: gpe0 { + gpe0: gpe0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -78,7 +78,7 @@ #interrupt-cells = <2>; }; - gpe1: gpe1 { + gpe1: gpe1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -86,7 +86,7 @@ #interrupt-cells = <2>; }; - gpe2: gpe2 { + gpe2: gpe2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -94,7 +94,7 @@ #interrupt-cells = <2>; }; - gpe3: gpe3 { + gpe3: gpe3-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -102,7 +102,7 @@ #interrupt-cells = <2>; }; - gpe4: gpe4 { + gpe4: gpe4-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -110,7 +110,7 @@ #interrupt-cells = <2>; }; - gpf0: gpf0 { + gpf0: gpf0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -118,7 +118,7 @@ #interrupt-cells = <2>; }; - gpf1: gpf1 { + gpf1: gpf1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -126,7 +126,7 @@ #interrupt-cells = <2>; }; - gpf2: gpf2 { + gpf2: gpf2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -134,7 +134,7 @@ #interrupt-cells = <2>; }; - gpf3: gpf3 { + gpf3: gpf3-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -142,112 +142,112 @@ #interrupt-cells = <2>; }; - uart0_data: uart0-data { + uart0_data: uart0-data-pins { samsung,pins = "gpa0-0", "gpa0-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - uart0_fctl: uart0-fctl { + uart0_fctl: uart0-fctl-pins { samsung,pins = "gpa0-2", "gpa0-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - uart1_data: uart1-data { + uart1_data: uart1-data-pins { samsung,pins = "gpa0-4", "gpa0-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - uart1_fctl: uart1-fctl { + uart1_fctl: uart1-fctl-pins { samsung,pins = "gpa0-6", "gpa0-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2c2_bus: i2c2-bus { + i2c2_bus: i2c2-bus-pins { samsung,pins = "gpa0-6", "gpa0-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - uart2_data: uart2-data { + uart2_data: uart2-data-pins { samsung,pins = "gpa1-0", "gpa1-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - uart2_fctl: uart2-fctl { + uart2_fctl: uart2-fctl-pins { samsung,pins = "gpa1-2", "gpa1-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - uart_audio_a: uart-audio-a { + uart_audio_a: uart-audio-a-pins { samsung,pins = "gpa1-0", "gpa1-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_4>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2c3_bus: i2c3-bus { + i2c3_bus: i2c3-bus-pins { samsung,pins = "gpa1-2", "gpa1-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - uart3_data: uart3-data { + uart3_data: uart3-data-pins { samsung,pins = "gpa1-4", "gpa1-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - uart_audio_b: uart-audio-b { + uart_audio_b: uart-audio-b-pins { samsung,pins = "gpa1-4", "gpa1-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_4>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - spi0_bus: spi0-bus { + spi0_bus: spi0-bus-pins { samsung,pins = "gpb-0", "gpb-2", "gpb-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2c4_bus: i2c4-bus { + i2c4_bus: i2c4-bus-pins { samsung,pins = "gpb-2", "gpb-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - spi1_bus: spi1-bus { + spi1_bus: spi1-bus-pins { samsung,pins = "gpb-4", "gpb-6", "gpb-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2c5_bus: i2c5-bus { + i2c5_bus: i2c5-bus-pins { samsung,pins = "gpb-6", "gpb-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2s1_bus: i2s1-bus { + i2s1_bus: i2s1-bus-pins { samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3", "gpc0-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; @@ -255,7 +255,7 @@ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - pcm1_bus: pcm1-bus { + pcm1_bus: pcm1-bus-pins { samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3", "gpc0-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; @@ -263,7 +263,7 @@ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - ac97_bus: ac97-bus { + ac97_bus: ac97-bus-pins { samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3", "gpc0-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_4>; @@ -271,7 +271,7 @@ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2s2_bus: i2s2-bus { + i2s2_bus: i2s2-bus-pins { samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3", "gpc1-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; @@ -279,7 +279,7 @@ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - pcm2_bus: pcm2-bus { + pcm2_bus: pcm2-bus-pins { samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3", "gpc1-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; @@ -287,105 +287,105 @@ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - spdif_bus: spdif-bus { + spdif_bus: spdif-bus-pins { samsung,pins = "gpc1-0", "gpc1-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_4>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2c6_bus: i2c6-bus { + i2c6_bus: i2c6-bus-pins { samsung,pins = "gpc1-3", "gpc1-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_4>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - spi2_bus: spi2-bus { + spi2_bus: spi2-bus-pins { samsung,pins = "gpc1-1", "gpc1-2", "gpc1-3", "gpc1-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_5>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2c7_bus: i2c7-bus { + i2c7_bus: i2c7-bus-pins { samsung,pins = "gpd0-2", "gpd0-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2c0_bus: i2c0-bus { + i2c0_bus: i2c0-bus-pins { samsung,pins = "gpd1-0", "gpd1-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2c1_bus: i2c1-bus { + i2c1_bus: i2c1-bus-pins { samsung,pins = "gpd1-2", "gpd1-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - pwm0_out: pwm0-out { + pwm0_out: pwm0-out-pins { samsung,pins = "gpd0-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - pwm1_out: pwm1-out { + pwm1_out: pwm1-out-pins { samsung,pins = "gpd0-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - pwm2_out: pwm2-out { + pwm2_out: pwm2-out-pins { samsung,pins = "gpd0-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - pwm3_out: pwm3-out { + pwm3_out: pwm3-out-pins { samsung,pins = "gpd0-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - lcd_ctrl: lcd-ctrl { + lcd_ctrl: lcd-ctrl-pins { samsung,pins = "gpd0-0", "gpd0-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - lcd_sync: lcd-sync { + lcd_sync: lcd-sync-pins { samsung,pins = "gpf0-0", "gpf0-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - lcd_en: lcd-en { + lcd_en: lcd-en-pins { samsung,pins = "gpe3-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - lcd_clk: lcd-clk { + lcd_clk: lcd-clk-pins { samsung,pins = "gpf0-0", "gpf0-1", "gpf0-2", "gpf0-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - lcd_data16: lcd-data-width16 { + lcd_data16: lcd-data-width16-pins { samsung,pins = "gpf0-7", "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3", "gpf1-6", "gpf1-7", "gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3", "gpf2-7", @@ -395,7 +395,7 @@ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - lcd_data18: lcd-data-width18 { + lcd_data18: lcd-data-width18-pins { samsung,pins = "gpf0-6", "gpf0-7", "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3", "gpf1-6", "gpf1-7", "gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3", @@ -406,7 +406,7 @@ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - lcd_data24: lcd-data-width24 { + lcd_data24: lcd-data-width24-pins { samsung,pins = "gpf0-4", "gpf0-5", "gpf0-6", "gpf0-7", "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3", "gpf1-4", "gpf1-5", "gpf1-6", "gpf1-7", @@ -420,7 +420,7 @@ }; &pinctrl_1 { - gpj0: gpj0 { + gpj0: gpj0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -428,7 +428,7 @@ #interrupt-cells = <2>; }; - gpj1: gpj1 { + gpj1: gpj1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -436,7 +436,7 @@ #interrupt-cells = <2>; }; - gpk0: gpk0 { + gpk0: gpk0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -444,7 +444,7 @@ #interrupt-cells = <2>; }; - gpk1: gpk1 { + gpk1: gpk1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -452,7 +452,7 @@ #interrupt-cells = <2>; }; - gpk2: gpk2 { + gpk2: gpk2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -460,7 +460,7 @@ #interrupt-cells = <2>; }; - gpk3: gpk3 { + gpk3: gpk3-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -468,7 +468,7 @@ #interrupt-cells = <2>; }; - gpl0: gpl0 { + gpl0: gpl0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -476,7 +476,7 @@ #interrupt-cells = <2>; }; - gpl1: gpl1 { + gpl1: gpl1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -484,7 +484,7 @@ #interrupt-cells = <2>; }; - gpl2: gpl2 { + gpl2: gpl2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -492,42 +492,42 @@ #interrupt-cells = <2>; }; - gpy0: gpy0 { + gpy0: gpy0-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpy1: gpy1 { + gpy1: gpy1-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpy2: gpy2 { + gpy2: gpy2-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpy3: gpy3 { + gpy3: gpy3-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpy4: gpy4 { + gpy4: gpy4-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpy5: gpy5 { + gpy5: gpy5-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpy6: gpy6 { + gpy6: gpy6-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpx0: gpx0 { + gpx0: gpx0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -544,7 +544,7 @@ #interrupt-cells = <2>; }; - gpx1: gpx1 { + gpx1: gpx1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -561,7 +561,7 @@ #interrupt-cells = <2>; }; - gpx2: gpx2 { + gpx2: gpx2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -569,7 +569,7 @@ #interrupt-cells = <2>; }; - gpx3: gpx3 { + gpx3: gpx3-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -577,238 +577,238 @@ #interrupt-cells = <2>; }; - sd0_clk: sd0-clk { + sd0_clk: sd0-clk-pins { samsung,pins = "gpk0-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd0_cmd: sd0-cmd { + sd0_cmd: sd0-cmd-pins { samsung,pins = "gpk0-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd0_cd: sd0-cd { + sd0_cd: sd0-cd-pins { samsung,pins = "gpk0-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd0_bus1: sd0-bus-width1 { + sd0_bus1: sd0-bus-width1-pins { samsung,pins = "gpk0-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd0_bus4: sd0-bus-width4 { + sd0_bus4: sd0-bus-width4-pins { samsung,pins = "gpk0-3", "gpk0-4", "gpk0-5", "gpk0-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd0_bus8: sd0-bus-width8 { + sd0_bus8: sd0-bus-width8-pins { samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd4_clk: sd4-clk { + sd4_clk: sd4-clk-pins { samsung,pins = "gpk0-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd4_cmd: sd4-cmd { + sd4_cmd: sd4-cmd-pins { samsung,pins = "gpk0-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd4_cd: sd4-cd { + sd4_cd: sd4-cd-pins { samsung,pins = "gpk0-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd4_bus1: sd4-bus-width1 { + sd4_bus1: sd4-bus-width1-pins { samsung,pins = "gpk0-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd4_bus4: sd4-bus-width4 { + sd4_bus4: sd4-bus-width4-pins { samsung,pins = "gpk0-3", "gpk0-4", "gpk0-5", "gpk0-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd4_bus8: sd4-bus-width8 { + sd4_bus8: sd4-bus-width8-pins { samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd1_clk: sd1-clk { + sd1_clk: sd1-clk-pins { samsung,pins = "gpk1-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd1_cmd: sd1-cmd { + sd1_cmd: sd1-cmd-pins { samsung,pins = "gpk1-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd1_cd: sd1-cd { + sd1_cd: sd1-cd-pins { samsung,pins = "gpk1-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd1_bus1: sd1-bus-width1 { + sd1_bus1: sd1-bus-width1-pins { samsung,pins = "gpk1-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd1_bus4: sd1-bus-width4 { + sd1_bus4: sd1-bus-width4-pins { samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd2_clk: sd2-clk { + sd2_clk: sd2-clk-pins { samsung,pins = "gpk2-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd2_cmd: sd2-cmd { + sd2_cmd: sd2-cmd-pins { samsung,pins = "gpk2-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd2_cd: sd2-cd { + sd2_cd: sd2-cd-pins { samsung,pins = "gpk2-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd2_bus1: sd2-bus-width1 { + sd2_bus1: sd2-bus-width1-pins { samsung,pins = "gpk2-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd2_bus4: sd2-bus-width4 { + sd2_bus4: sd2-bus-width4-pins { samsung,pins = "gpk2-3", "gpk2-4", "gpk2-5", "gpk2-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd2_bus8: sd2-bus-width8 { + sd2_bus8: sd2-bus-width8-pins { samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd3_clk: sd3-clk { + sd3_clk: sd3-clk-pins { samsung,pins = "gpk3-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd3_cmd: sd3-cmd { + sd3_cmd: sd3-cmd-pins { samsung,pins = "gpk3-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd3_cd: sd3-cd { + sd3_cd: sd3-cd-pins { samsung,pins = "gpk3-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd3_bus1: sd3-bus-width1 { + sd3_bus1: sd3-bus-width1-pins { samsung,pins = "gpk3-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd3_bus4: sd3-bus-width4 { + sd3_bus4: sd3-bus-width4-pins { samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - eint0: ext-int0 { + eint0: ext-int0-pins { samsung,pins = "gpx0-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_F>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - eint8: ext-int8 { + eint8: ext-int8-pins { samsung,pins = "gpx1-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_F>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - eint15: ext-int15 { + eint15: ext-int15-pins { samsung,pins = "gpx1-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_F>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - eint16: ext-int16 { + eint16: ext-int16-pins { samsung,pins = "gpx2-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_F>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - eint31: ext-int31 { + eint31: ext-int31-pins { samsung,pins = "gpx3-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_F>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - cam_port_a_io: cam-port-a-io { + cam_port_a_io: cam-port-a-io-pins { samsung,pins = "gpj0-0", "gpj0-1", "gpj0-2", "gpj0-3", "gpj0-4", "gpj0-5", "gpj0-6", "gpj0-7", "gpj1-0", "gpj1-1", "gpj1-2", "gpj1-4"; @@ -817,21 +817,21 @@ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - cam_port_a_clk_active: cam-port-a-clk-active { + cam_port_a_clk_active: cam-port-a-clk-active-pins { samsung,pins = "gpj1-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - cam_port_a_clk_idle: cam-port-a-clk-idle { + cam_port_a_clk_idle: cam-port-a-clk-idle-pins { samsung,pins = "gpj1-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - hdmi_cec: hdmi-cec { + hdmi_cec: hdmi-cec-pins { samsung,pins = "gpx3-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; @@ -840,12 +840,12 @@ }; &pinctrl_2 { - gpz: gpz { + gpz: gpz-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - i2s0_bus: i2s0-bus { + i2s0_bus: i2s0-bus-pins { samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3", "gpz-4", "gpz-5", "gpz-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; @@ -853,7 +853,7 @@ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - pcm0_bus: pcm0-bus { + pcm0_bus: pcm0-bus-pins { samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3", "gpz-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; diff --git a/dts/src/arm/exynos4210-smdkv310.dts b/dts/src/arm/exynos4210-smdkv310.dts index d5797a67bf..a5dfd7fd49 100644 --- a/dts/src/arm/exynos4210-smdkv310.dts +++ b/dts/src/arm/exynos4210-smdkv310.dts @@ -152,14 +152,14 @@ }; &pinctrl_1 { - keypad_rows: keypad-rows { + keypad_rows: keypad-rows-pins { samsung,pins = "gpx2-0", "gpx2-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - keypad_cols: keypad-cols { + keypad_cols: keypad-cols-pins { samsung,pins = "gpx1-0", "gpx1-1", "gpx1-2", "gpx1-3", "gpx1-4", "gpx1-5", "gpx1-6", "gpx1-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; diff --git a/dts/src/arm/exynos4210-trats.dts b/dts/src/arm/exynos4210-trats.dts index 9c4ff75213..01f44d95f6 100644 --- a/dts/src/arm/exynos4210-trats.dts +++ b/dts/src/arm/exynos4210-trats.dts @@ -464,19 +464,19 @@ }; &pinctrl_1 { - bt_shutdown: bt-shutdown { + bt_shutdown: bt-shutdown-pins { samsung,pins = "gpl1-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; }; - bt_host_wakeup: bt-host-wakeup { + bt_host_wakeup: bt-host-wakeup-pins { samsung,pins = "gpx2-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; }; - bt_device_wakeup: bt-device-wakeup { + bt_device_wakeup: bt-device-wakeup-pins { samsung,pins = "gpx3-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; diff --git a/dts/src/arm/exynos4210-universal_c210.dts b/dts/src/arm/exynos4210-universal_c210.dts index 9f93e7464a..138d606d58 100644 --- a/dts/src/arm/exynos4210-universal_c210.dts +++ b/dts/src/arm/exynos4210-universal_c210.dts @@ -533,37 +533,37 @@ }; &pinctrl_1 { - bt_shutdown: bt-shutdown { + bt_shutdown: bt-shutdown-pins { samsung,pins = "gpe1-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; }; - bt_host_wakeup: bt-host-wakeup { + bt_host_wakeup: bt-host-wakeup-pins { samsung,pins = "gpx2-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; }; - bt_device_wakeup: bt-device-wakeup { + bt_device_wakeup: bt-device-wakeup-pins { samsung,pins = "gpx3-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; }; - lp3974_irq: lp3974-irq { + lp3974_irq: lp3974-irq-pins { samsung,pins = "gpx0-7", "gpx2-7"; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; }; - hdmi_hpd: hdmi-hpd { + hdmi_hpd: hdmi-hpd-pins { samsung,pins = "gpx3-7"; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; }; }; &pinctrl_0 { - i2c_ddc_bus: i2c-ddc-bus { + i2c_ddc_bus: i2c-ddc-bus-pins { samsung,pins = "gpe4-2", "gpe4-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; @@ -659,7 +659,7 @@ }; &soc { - mdma0: mdma@12840000 { + mdma0: dma-controller@12840000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x12840000 0x1000>; interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; diff --git a/dts/src/arm/exynos4210.dtsi b/dts/src/arm/exynos4210.dtsi index 7e7d65ce65..2c25cc3793 100644 --- a/dts/src/arm/exynos4210.dtsi +++ b/dts/src/arm/exynos4210.dtsi @@ -527,8 +527,6 @@ compatible = "samsung,exynos4210-tmu"; clocks = <&clock CLK_TMU_APBIF>; clock-names = "tmu_apbif"; - samsung,tmu_gain = <15>; - samsung,tmu_reference_voltage = <7>; }; #include "exynos4210-pinctrl.dtsi" diff --git a/dts/src/arm/exynos4412-galaxy-s3.dtsi b/dts/src/arm/exynos4412-galaxy-s3.dtsi index c14e37dc3a..03dffc690b 100644 --- a/dts/src/arm/exynos4412-galaxy-s3.dtsi +++ b/dts/src/arm/exynos4412-galaxy-s3.dtsi @@ -151,13 +151,13 @@ }; &pinctrl_0 { - camera_flash_host: camera-flash-host { + camera_flash_host: camera-flash-host-pins { samsung,pins = "gpj1-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-val = <0>; }; - camera_flash_isp: camera-flash-isp { + camera_flash_isp: camera-flash-isp-pins { samsung,pins = "gpj1-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-val = <1>; diff --git a/dts/src/arm/exynos4412-itop-elite.dts b/dts/src/arm/exynos4412-itop-elite.dts index 47431307cb..a9406280b9 100644 --- a/dts/src/arm/exynos4412-itop-elite.dts +++ b/dts/src/arm/exynos4412-itop-elite.dts @@ -192,7 +192,7 @@ }; &pinctrl_1 { - ether-reset { + ether-reset-pins { samsung,pins = "gpc0-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; diff --git a/dts/src/arm/exynos4412-itop-scp-core.dtsi b/dts/src/arm/exynos4412-itop-scp-core.dtsi index b3726d4d7d..a67cb61e3c 100644 --- a/dts/src/arm/exynos4412-itop-scp-core.dtsi +++ b/dts/src/arm/exynos4412-itop-scp-core.dtsi @@ -484,7 +484,7 @@ }; &pinctrl_1 { - hsic_reset: hsic-reset { + hsic_reset: hsic-reset-pins { samsung,pins = "gpm2-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; diff --git a/dts/src/arm/exynos4412-midas.dtsi b/dts/src/arm/exynos4412-midas.dtsi index 968c794365..23f50c9be5 100644 --- a/dts/src/arm/exynos4412-midas.dtsi +++ b/dts/src/arm/exynos4412-midas.dtsi @@ -987,19 +987,19 @@ pinctrl-names = "default"; pinctrl-0 = <&sleep0>; - mhl_int: mhl-int { + mhl_int: mhl-int-pins { samsung,pins = "gpf3-5"; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; }; - i2c_mhl_bus: i2c-mhl-bus { + i2c_mhl_bus: i2c-mhl-bus-pins { samsung,pins = "gpf0-4", "gpf0-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - sleep0: sleep-states { + sleep0: sleep-state { PIN_SLP(gpa0-0, INPUT, NONE); PIN_SLP(gpa0-1, OUT0, NONE); PIN_SLP(gpa0-2, INPUT, NONE); @@ -1102,52 +1102,52 @@ pinctrl-names = "default"; pinctrl-0 = <&sleep1>; - gpio_keys: gpio-keys { + gpio_keys: gpio-keys-pins { samsung,pins = "gpx0-1", "gpx2-2", "gpx2-7", "gpx3-3"; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; }; - bt_shutdown: bt-shutdown { + bt_shutdown: bt-shutdown-pins { samsung,pins = "gpl0-6"; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; }; - bt_host_wakeup: bt-host-wakeup { + bt_host_wakeup: bt-host-wakeup-pins { samsung,pins = "gpx2-6"; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; }; - bt_device_wakeup: bt-device-wakeup { + bt_device_wakeup: bt-device-wakeup-pins { samsung,pins = "gpx3-1"; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; }; - max77686_irq: max77686-irq { + max77686_irq: max77686-irq-pins { samsung,pins = "gpx0-7"; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; }; - max77693_irq: max77693-irq { + max77693_irq: max77693-irq-pins { samsung,pins = "gpx1-5"; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; }; - max77693_fuel_irq: max77693-fuel-irq { + max77693_fuel_irq: max77693-fuel-irq-pins { samsung,pins = "gpx2-3"; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; }; - sdhci2_cd: sdhci2-cd-irq { + sdhci2_cd: sdhci2-cd-irq-pins { samsung,pins = "gpx3-4"; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; }; - hdmi_hpd: hdmi-hpd { + hdmi_hpd: hdmi-hpd-pins { samsung,pins = "gpx3-7"; samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; }; - sleep1: sleep-states { + sleep1: sleep-state { PIN_SLP(gpk0-0, PREV, NONE); PIN_SLP(gpk0-1, PREV, NONE); PIN_SLP(gpk0-2, OUT0, NONE); @@ -1300,7 +1300,7 @@ pinctrl-names = "default"; pinctrl-0 = <&sleep2>; - sleep2: sleep-states { + sleep2: sleep-state { PIN_SLP(gpz-0, INPUT, DOWN); PIN_SLP(gpz-1, INPUT, DOWN); PIN_SLP(gpz-2, INPUT, DOWN); @@ -1315,7 +1315,7 @@ pinctrl-names = "default"; pinctrl-0 = <&sleep3>; - sleep3: sleep-states { + sleep3: sleep-state { PIN_SLP(gpv0-0, INPUT, DOWN); PIN_SLP(gpv0-1, INPUT, DOWN); PIN_SLP(gpv0-2, INPUT, DOWN); diff --git a/dts/src/arm/exynos4412-odroid-common.dtsi b/dts/src/arm/exynos4412-odroid-common.dtsi index 5b1d4591b3..e7669b9e9e 100644 --- a/dts/src/arm/exynos4412-odroid-common.dtsi +++ b/dts/src/arm/exynos4412-odroid-common.dtsi @@ -172,24 +172,24 @@ }; &pinctrl_1 { - gpio_power_key: power-key { + gpio_power_key: power-key-pins { samsung,pins = "gpx1-3"; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; }; - max77686_irq: max77686-irq { + max77686_irq: max77686-irq-pins { samsung,pins = "gpx3-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - hdmi_hpd: hdmi-hpd { + hdmi_hpd: hdmi-hpd-pins { samsung,pins = "gpx3-7"; samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; }; - emmc_rstn: emmc-rstn { + emmc_rstn: emmc-rstn-pins { samsung,pins = "gpk1-2"; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; }; diff --git a/dts/src/arm/exynos4412-odroidx.dts b/dts/src/arm/exynos4412-odroidx.dts index 440135d0ff..a9fada51eb 100644 --- a/dts/src/arm/exynos4412-odroidx.dts +++ b/dts/src/arm/exynos4412-odroidx.dts @@ -112,7 +112,7 @@ }; &pinctrl_1 { - gpio_home_key: home-key { + gpio_home_key: home-key-pins { samsung,pins = "gpx2-2"; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; }; diff --git a/dts/src/arm/exynos4412-origen.dts b/dts/src/arm/exynos4412-origen.dts index e6aec5faca..6db09dba07 100644 --- a/dts/src/arm/exynos4412-origen.dts +++ b/dts/src/arm/exynos4412-origen.dts @@ -506,14 +506,14 @@ }; &pinctrl_1 { - keypad_rows: keypad-rows { + keypad_rows: keypad-rows-pins { samsung,pins = "gpx2-0", "gpx2-1", "gpx2-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - keypad_cols: keypad-cols { + keypad_cols: keypad-cols-pins { samsung,pins = "gpx1-0", "gpx1-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; diff --git a/dts/src/arm/exynos4412-p4note.dtsi b/dts/src/arm/exynos4412-p4note.dtsi index 22c3086e00..97f131b101 100644 --- a/dts/src/arm/exynos4412-p4note.dtsi +++ b/dts/src/arm/exynos4412-p4note.dtsi @@ -16,6 +16,7 @@ #include <dt-bindings/input/linux-event-codes.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/pinctrl/samsung.h> +#include <dt-bindings/power/summit,smb347-charger.h> / { compatible = "samsung,p4note", "samsung,exynos4412", "samsung,exynos4"; @@ -114,6 +115,17 @@ clock-names = "ext_clock"; }; + battery_cell: battery-cell { + compatible = "simple-battery"; + device-chemistry = "lithium-ion"; + constant-charge-current-max-microamp = <2200000>; + precharge-current-microamp = <250000>; + charge-term-current-microamp = <250000>; + constant-charge-voltage-max-microvolt = <4200000>; + + power-supplies = <&power_supply>; + }; + i2c-gpio-1 { compatible = "i2c-gpio"; sda-gpios = <&gpy2 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; @@ -182,6 +194,28 @@ }; }; }; + + i2c-gpio-4 { + compatible = "i2c-gpio"; + sda-gpios = <&gpm2 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + scl-gpios = <&gpm2 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + + i2c-gpio,delay-us = <2>; + #address-cells = <1>; + #size-cells = <0>; + + power_supply: charger@6 { + compatible = "summit,smb347"; + reg = <0x6>; + summit,enable-usb-charging; + summit,enable-charge-control = <SMB3XX_CHG_ENABLE_SW>; + summit,fast-voltage-threshold-microvolt = <2600000>; + summit,chip-temperature-threshold-celsius = <130>; + summit,usb-current-limit-microamp = <1800000>; + + monitored-battery = <&battery_cell>; + }; + }; }; &adc { @@ -641,19 +675,19 @@ pinctrl-names = "default"; pinctrl-0 = <&sleep0>; - tsp_reg_gpio_2: tsp-reg-gpio-2 { + tsp_reg_gpio_2: tsp-reg-gpio-2-pins { samsung,pins = "gpb-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; }; - tsp_reg_gpio_3: tsp-reg-gpio-3 { + tsp_reg_gpio_3: tsp-reg-gpio-3-pins { samsung,pins = "gpb-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; }; - sleep0: sleep-states { + sleep0: sleep-state { PIN_SLP(gpa0-0, INPUT, NONE); PIN_SLP(gpa0-1, OUT0, NONE); PIN_SLP(gpa0-2, INPUT, NONE); @@ -755,19 +789,19 @@ pinctrl-names = "default"; pinctrl-0 = <&sleep1>; - sd3_wifi: sd3-wifi { + sd3_wifi: sd3-wifi-pins { samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; }; - bt_shutdown: bt-shutdown { + bt_shutdown: bt-shutdown-pins { samsung,pins = "gpl0-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; }; - uart_sel: uart-sel { + uart_sel: uart-sel-pins { samsung,pins = "gpl2-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; @@ -775,82 +809,82 @@ /* 0 = CP, 1 = AP (serial output) */ }; - tsp_rst: tsp-rst { + tsp_rst: tsp-rst-pins { samsung,pins = "gpm0-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; }; - tsp_irq: tsp-irq { + tsp_irq: tsp-irq-pins { samsung,pins = "gpm2-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_F>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; }; - wifi_reset: wifi-reset { + wifi_reset: wifi-reset-pins { samsung,pins = "gpm3-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; }; - tsp_reg_gpio_1: tsp-reg-gpio-1 { + tsp_reg_gpio_1: tsp-reg-gpio-1-pins { samsung,pins = "gpm4-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; }; - ak8975_irq: ak8975-irq { + ak8975_irq: ak8975-irq-pins { samsung,pins = "gpm4-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_F>; samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; }; - stmpe_adc_irq: stmpe-adc-irq { + stmpe_adc_irq: stmpe-adc-irq-pins { samsung,pins = "gpx0-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; }; - max77686_irq: max77686-irq { + max77686_irq: max77686-irq-pins { samsung,pins = "gpx0-7"; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; }; - gpio_keys: gpio-keys { + gpio_keys: gpio-keys-pins { samsung,pins = "gpx2-2", "gpx2-7", "gpx3-3"; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; }; - fuel_alert_irq: fuel-alert-irq { + fuel_alert_irq: fuel-alert-irq-pins { samsung,pins = "gpx2-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; }; - wifi_host_wake: wifi-host-wake { + wifi_host_wake: wifi-host-wake-pins { samsung,pins = "gpx2-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_F>; samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; }; - bt_host_wakeup: bt-host-wakeup { + bt_host_wakeup: bt-host-wakeup-pins { samsung,pins = "gpx2-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; }; - bt_device_wakeup: bt-device-wakeup { + bt_device_wakeup: bt-device-wakeup-pins { samsung,pins = "gpx3-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; }; - sdhci2_cd: sdhci2-cd { + sdhci2_cd: sdhci2-cd-pins { samsung,pins = "gpx3-4"; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; }; - sleep1: sleep-states { + sleep1: sleep-state { PIN_SLP(gpk0-0, PREV, NONE); PIN_SLP(gpk0-1, PREV, NONE); PIN_SLP(gpk0-2, PREV, NONE); @@ -1004,7 +1038,7 @@ pinctrl-names = "default"; pinctrl-0 = <&sleep2>; - sleep2: sleep-states { + sleep2: sleep-state { PIN_SLP(gpz-0, INPUT, DOWN); PIN_SLP(gpz-1, INPUT, DOWN); PIN_SLP(gpz-2, INPUT, DOWN); @@ -1019,7 +1053,7 @@ pinctrl-names = "default"; pinctrl-0 = <&sleep3>; - sleep3: sleep-states { + sleep3: sleep-state { PIN_SLP(gpv0-0, INPUT, DOWN); PIN_SLP(gpv0-1, INPUT, DOWN); PIN_SLP(gpv0-2, INPUT, DOWN); diff --git a/dts/src/arm/exynos4412-pinctrl.dtsi b/dts/src/arm/exynos4412-pinctrl.dtsi index d7d5fdc230..88b8afd556 100644 --- a/dts/src/arm/exynos4412-pinctrl.dtsi +++ b/dts/src/arm/exynos4412-pinctrl.dtsi @@ -19,7 +19,7 @@ } &pinctrl_0 { - gpa0: gpa0 { + gpa0: gpa0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -27,7 +27,7 @@ #interrupt-cells = <2>; }; - gpa1: gpa1 { + gpa1: gpa1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -35,7 +35,7 @@ #interrupt-cells = <2>; }; - gpb: gpb { + gpb: gpb-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -43,7 +43,7 @@ #interrupt-cells = <2>; }; - gpc0: gpc0 { + gpc0: gpc0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -51,7 +51,7 @@ #interrupt-cells = <2>; }; - gpc1: gpc1 { + gpc1: gpc1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -59,7 +59,7 @@ #interrupt-cells = <2>; }; - gpd0: gpd0 { + gpd0: gpd0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -67,7 +67,7 @@ #interrupt-cells = <2>; }; - gpd1: gpd1 { + gpd1: gpd1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -75,7 +75,7 @@ #interrupt-cells = <2>; }; - gpf0: gpf0 { + gpf0: gpf0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -83,7 +83,7 @@ #interrupt-cells = <2>; }; - gpf1: gpf1 { + gpf1: gpf1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -91,7 +91,7 @@ #interrupt-cells = <2>; }; - gpf2: gpf2 { + gpf2: gpf2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -99,7 +99,7 @@ #interrupt-cells = <2>; }; - gpf3: gpf3 { + gpf3: gpf3-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -107,7 +107,7 @@ #interrupt-cells = <2>; }; - gpj0: gpj0 { + gpj0: gpj0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -115,7 +115,7 @@ #interrupt-cells = <2>; }; - gpj1: gpj1 { + gpj1: gpj1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -123,112 +123,112 @@ #interrupt-cells = <2>; }; - uart0_data: uart0-data { + uart0_data: uart0-data-pins { samsung,pins = "gpa0-0", "gpa0-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - uart0_fctl: uart0-fctl { + uart0_fctl: uart0-fctl-pins { samsung,pins = "gpa0-2", "gpa0-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - uart1_data: uart1-data { + uart1_data: uart1-data-pins { samsung,pins = "gpa0-4", "gpa0-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - uart1_fctl: uart1-fctl { + uart1_fctl: uart1-fctl-pins { samsung,pins = "gpa0-6", "gpa0-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2c2_bus: i2c2-bus { + i2c2_bus: i2c2-bus-pins { samsung,pins = "gpa0-6", "gpa0-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - uart2_data: uart2-data { + uart2_data: uart2-data-pins { samsung,pins = "gpa1-0", "gpa1-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - uart2_fctl: uart2-fctl { + uart2_fctl: uart2-fctl-pins { samsung,pins = "gpa1-2", "gpa1-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - uart_audio_a: uart-audio-a { + uart_audio_a: uart-audio-a-pins { samsung,pins = "gpa1-0", "gpa1-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_4>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2c3_bus: i2c3-bus { + i2c3_bus: i2c3-bus-pins { samsung,pins = "gpa1-2", "gpa1-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - uart3_data: uart3-data { + uart3_data: uart3-data-pins { samsung,pins = "gpa1-4", "gpa1-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - uart_audio_b: uart-audio-b { + uart_audio_b: uart-audio-b-pins { samsung,pins = "gpa1-4", "gpa1-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_4>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - spi0_bus: spi0-bus { + spi0_bus: spi0-bus-pins { samsung,pins = "gpb-0", "gpb-2", "gpb-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2c4_bus: i2c4-bus { + i2c4_bus: i2c4-bus-pins { samsung,pins = "gpb-0", "gpb-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - spi1_bus: spi1-bus { + spi1_bus: spi1-bus-pins { samsung,pins = "gpb-4", "gpb-6", "gpb-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2c5_bus: i2c5-bus { + i2c5_bus: i2c5-bus-pins { samsung,pins = "gpb-2", "gpb-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2s1_bus: i2s1-bus { + i2s1_bus: i2s1-bus-pins { samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3", "gpc0-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; @@ -236,7 +236,7 @@ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - pcm1_bus: pcm1-bus { + pcm1_bus: pcm1-bus-pins { samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3", "gpc0-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; @@ -244,7 +244,7 @@ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - ac97_bus: ac97-bus { + ac97_bus: ac97-bus-pins { samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3", "gpc0-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_4>; @@ -252,7 +252,7 @@ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2s2_bus: i2s2-bus { + i2s2_bus: i2s2-bus-pins { samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3", "gpc1-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; @@ -260,7 +260,7 @@ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - pcm2_bus: pcm2-bus { + pcm2_bus: pcm2-bus-pins { samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3", "gpc1-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; @@ -268,105 +268,105 @@ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - spdif_bus: spdif-bus { + spdif_bus: spdif-bus-pins { samsung,pins = "gpc1-0", "gpc1-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_4>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2c6_bus: i2c6-bus { + i2c6_bus: i2c6-bus-pins { samsung,pins = "gpc1-3", "gpc1-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_4>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - spi2_bus: spi2-bus { + spi2_bus: spi2-bus-pins { samsung,pins = "gpc1-1", "gpc1-3", "gpc1-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_5>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - pwm0_out: pwm0-out { + pwm0_out: pwm0-out-pins { samsung,pins = "gpd0-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - pwm1_out: pwm1-out { + pwm1_out: pwm1-out-pins { samsung,pins = "gpd0-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - lcd_ctrl: lcd-ctrl { + lcd_ctrl: lcd-ctrl-pins { samsung,pins = "gpd0-0", "gpd0-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2c7_bus: i2c7-bus { + i2c7_bus: i2c7-bus-pins { samsung,pins = "gpd0-2", "gpd0-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - pwm2_out: pwm2-out { + pwm2_out: pwm2-out-pins { samsung,pins = "gpd0-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - pwm3_out: pwm3-out { + pwm3_out: pwm3-out-pins { samsung,pins = "gpd0-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2c0_bus: i2c0-bus { + i2c0_bus: i2c0-bus-pins { samsung,pins = "gpd1-0", "gpd1-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - mipi0_clk: mipi0-clk { + mipi0_clk: mipi0-clk-pins { samsung,pins = "gpd1-0", "gpd1-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2c1_bus: i2c1-bus { + i2c1_bus: i2c1-bus-pins { samsung,pins = "gpd1-2", "gpd1-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - mipi1_clk: mipi1-clk { + mipi1_clk: mipi1-clk-pins { samsung,pins = "gpd1-2", "gpd1-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - lcd_clk: lcd-clk { + lcd_clk: lcd-clk-pins { samsung,pins = "gpf0-0", "gpf0-1", "gpf0-2", "gpf0-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - lcd_data16: lcd-data-width16 { + lcd_data16: lcd-data-width16-pins { samsung,pins = "gpf0-7", "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3", "gpf1-6", "gpf1-7", "gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3", "gpf2-7", @@ -376,7 +376,7 @@ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - lcd_data18: lcd-data-width18 { + lcd_data18: lcd-data-width18-pins { samsung,pins = "gpf0-6", "gpf0-7", "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3", "gpf1-6", "gpf1-7", "gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3", @@ -387,7 +387,7 @@ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - lcd_data24: lcd-data-width24 { + lcd_data24: lcd-data-width24-pins { samsung,pins = "gpf0-4", "gpf0-5", "gpf0-6", "gpf0-7", "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3", "gpf1-4", "gpf1-5", "gpf1-6", "gpf1-7", @@ -399,14 +399,14 @@ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - lcd_ldi: lcd-ldi { + lcd_ldi: lcd-ldi-pins { samsung,pins = "gpf3-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - cam_port_a_io: cam-port-a-io { + cam_port_a_io: cam-port-a-io-pins { samsung,pins = "gpj0-0", "gpj0-1", "gpj0-2", "gpj0-3", "gpj0-4", "gpj0-5", "gpj0-6", "gpj0-7", "gpj1-0", "gpj1-1", "gpj1-2", "gpj1-4"; @@ -415,14 +415,14 @@ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - cam_port_a_clk_active: cam-port-a-clk-active { + cam_port_a_clk_active: cam-port-a-clk-active-pins { samsung,pins = "gpj1-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - cam_port_a_clk_idle: cam-port-a-clk-idle { + cam_port_a_clk_idle: cam-port-a-clk-idle-pins { samsung,pins = "gpj1-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; @@ -431,7 +431,7 @@ }; &pinctrl_1 { - gpk0: gpk0 { + gpk0: gpk0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -439,7 +439,7 @@ #interrupt-cells = <2>; }; - gpk1: gpk1 { + gpk1: gpk1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -447,7 +447,7 @@ #interrupt-cells = <2>; }; - gpk2: gpk2 { + gpk2: gpk2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -455,7 +455,7 @@ #interrupt-cells = <2>; }; - gpk3: gpk3 { + gpk3: gpk3-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -463,7 +463,7 @@ #interrupt-cells = <2>; }; - gpl0: gpl0 { + gpl0: gpl0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -471,7 +471,7 @@ #interrupt-cells = <2>; }; - gpl1: gpl1 { + gpl1: gpl1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -479,7 +479,7 @@ #interrupt-cells = <2>; }; - gpl2: gpl2 { + gpl2: gpl2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -487,7 +487,7 @@ #interrupt-cells = <2>; }; - gpm0: gpm0 { + gpm0: gpm0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -495,7 +495,7 @@ #interrupt-cells = <2>; }; - gpm1: gpm1 { + gpm1: gpm1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -503,7 +503,7 @@ #interrupt-cells = <2>; }; - gpm2: gpm2 { + gpm2: gpm2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -511,7 +511,7 @@ #interrupt-cells = <2>; }; - gpm3: gpm3 { + gpm3: gpm3-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -519,7 +519,7 @@ #interrupt-cells = <2>; }; - gpm4: gpm4 { + gpm4: gpm4-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -527,42 +527,42 @@ #interrupt-cells = <2>; }; - gpy0: gpy0 { + gpy0: gpy0-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpy1: gpy1 { + gpy1: gpy1-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpy2: gpy2 { + gpy2: gpy2-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpy3: gpy3 { + gpy3: gpy3-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpy4: gpy4 { + gpy4: gpy4-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpy5: gpy5 { + gpy5: gpy5-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpy6: gpy6 { + gpy6: gpy6-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpx0: gpx0 { + gpx0: gpx0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -579,7 +579,7 @@ #interrupt-cells = <2>; }; - gpx1: gpx1 { + gpx1: gpx1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -596,7 +596,7 @@ #interrupt-cells = <2>; }; - gpx2: gpx2 { + gpx2: gpx2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -604,7 +604,7 @@ #interrupt-cells = <2>; }; - gpx3: gpx3 { + gpx3: gpx3-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -612,203 +612,203 @@ #interrupt-cells = <2>; }; - sd0_clk: sd0-clk { + sd0_clk: sd0-clk-pins { samsung,pins = "gpk0-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd0_cmd: sd0-cmd { + sd0_cmd: sd0-cmd-pins { samsung,pins = "gpk0-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd0_cd: sd0-cd { + sd0_cd: sd0-cd-pins { samsung,pins = "gpk0-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd0_bus1: sd0-bus-width1 { + sd0_bus1: sd0-bus-width1-pins { samsung,pins = "gpk0-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd0_bus4: sd0-bus-width4 { + sd0_bus4: sd0-bus-width4-pins { samsung,pins = "gpk0-3", "gpk0-4", "gpk0-5", "gpk0-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd0_bus8: sd0-bus-width8 { + sd0_bus8: sd0-bus-width8-pins { samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd4_clk: sd4-clk { + sd4_clk: sd4-clk-pins { samsung,pins = "gpk0-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd4_cmd: sd4-cmd { + sd4_cmd: sd4-cmd-pins { samsung,pins = "gpk0-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd4_cd: sd4-cd { + sd4_cd: sd4-cd-pins { samsung,pins = "gpk0-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd4_bus1: sd4-bus-width1 { + sd4_bus1: sd4-bus-width1-pins { samsung,pins = "gpk0-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd4_bus4: sd4-bus-width4 { + sd4_bus4: sd4-bus-width4-pins { samsung,pins = "gpk0-3", "gpk0-4", "gpk0-5", "gpk0-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd4_bus8: sd4-bus-width8 { + sd4_bus8: sd4-bus-width8-pins { samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_4>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd1_clk: sd1-clk { + sd1_clk: sd1-clk-pins { samsung,pins = "gpk1-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd1_cmd: sd1-cmd { + sd1_cmd: sd1-cmd-pins { samsung,pins = "gpk1-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd1_cd: sd1-cd { + sd1_cd: sd1-cd-pins { samsung,pins = "gpk1-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd1_bus1: sd1-bus-width1 { + sd1_bus1: sd1-bus-width1-pins { samsung,pins = "gpk1-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd1_bus4: sd1-bus-width4 { + sd1_bus4: sd1-bus-width4-pins { samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd2_clk: sd2-clk { + sd2_clk: sd2-clk-pins { samsung,pins = "gpk2-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd2_cmd: sd2-cmd { + sd2_cmd: sd2-cmd-pins { samsung,pins = "gpk2-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd2_cd: sd2-cd { + sd2_cd: sd2-cd-pins { samsung,pins = "gpk2-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd2_bus1: sd2-bus-width1 { + sd2_bus1: sd2-bus-width1-pins { samsung,pins = "gpk2-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd2_bus4: sd2-bus-width4 { + sd2_bus4: sd2-bus-width4-pins { samsung,pins = "gpk2-3", "gpk2-4", "gpk2-5", "gpk2-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd2_bus8: sd2-bus-width8 { + sd2_bus8: sd2-bus-width8-pins { samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd3_clk: sd3-clk { + sd3_clk: sd3-clk-pins { samsung,pins = "gpk3-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd3_cmd: sd3-cmd { + sd3_cmd: sd3-cmd-pins { samsung,pins = "gpk3-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd3_cd: sd3-cd { + sd3_cd: sd3-cd-pins { samsung,pins = "gpk3-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd3_bus1: sd3-bus-width1 { + sd3_bus1: sd3-bus-width1-pins { samsung,pins = "gpk3-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd3_bus4: sd3-bus-width4 { + sd3_bus4: sd3-bus-width4-pins { samsung,pins = "gpk3-3", "gpk3-4", "gpk3-5", "gpk3-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - cam_port_b_io: cam-port-b-io { + cam_port_b_io: cam-port-b-io-pins { samsung,pins = "gpm0-0", "gpm0-1", "gpm0-2", "gpm0-3", "gpm0-4", "gpm0-5", "gpm0-6", "gpm0-7", "gpm1-0", "gpm1-1", "gpm2-0", "gpm2-1"; @@ -817,77 +817,77 @@ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - cam_port_b_clk_active: cam-port-b-clk-active { + cam_port_b_clk_active: cam-port-b-clk-active-pins { samsung,pins = "gpm2-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - cam_port_b_clk_idle: cam-port-b-clk-idle { + cam_port_b_clk_idle: cam-port-b-clk-idle-pins { samsung,pins = "gpm2-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - eint0: ext-int0 { + eint0: ext-int0-pins { samsung,pins = "gpx0-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_F>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - eint8: ext-int8 { + eint8: ext-int8-pins { samsung,pins = "gpx1-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_F>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - eint15: ext-int15 { + eint15: ext-int15-pins { samsung,pins = "gpx1-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_F>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - eint16: ext-int16 { + eint16: ext-int16-pins { samsung,pins = "gpx2-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_F>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - eint31: ext-int31 { + eint31: ext-int31-pins { samsung,pins = "gpx3-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_F>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - fimc_is_i2c0: fimc-is-i2c0 { + fimc_is_i2c0: fimc-is-i2c0-pins { samsung,pins = "gpm4-0", "gpm4-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - fimc_is_i2c1: fimc-is-i2c1 { + fimc_is_i2c1: fimc-is-i2c1-pins { samsung,pins = "gpm4-2", "gpm4-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - fimc_is_uart: fimc-is-uart { + fimc_is_uart: fimc-is-uart-pins { samsung,pins = "gpm3-5", "gpm3-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - hdmi_cec: hdmi-cec { + hdmi_cec: hdmi-cec-pins { samsung,pins = "gpx3-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; @@ -896,7 +896,7 @@ }; &pinctrl_2 { - gpz: gpz { + gpz: gpz-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -904,7 +904,7 @@ #interrupt-cells = <2>; }; - i2s0_bus: i2s0-bus { + i2s0_bus: i2s0-bus-pins { samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3", "gpz-4", "gpz-5", "gpz-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; @@ -912,7 +912,7 @@ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - pcm0_bus: pcm0-bus { + pcm0_bus: pcm0-bus-pins { samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3", "gpz-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; @@ -922,7 +922,7 @@ }; &pinctrl_3 { - gpv0: gpv0 { + gpv0: gpv0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -930,7 +930,7 @@ #interrupt-cells = <2>; }; - gpv1: gpv1 { + gpv1: gpv1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -938,7 +938,7 @@ #interrupt-cells = <2>; }; - gpv2: gpv2 { + gpv2: gpv2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -946,7 +946,7 @@ #interrupt-cells = <2>; }; - gpv3: gpv3 { + gpv3: gpv3-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -954,7 +954,7 @@ #interrupt-cells = <2>; }; - gpv4: gpv4 { + gpv4: gpv4-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -962,7 +962,7 @@ #interrupt-cells = <2>; }; - c2c_bus: c2c-bus { + c2c_bus: c2c-bus-pins { samsung,pins = "gpv0-0", "gpv0-1", "gpv0-2", "gpv0-3", "gpv0-4", "gpv0-5", "gpv0-6", "gpv0-7", "gpv1-0", "gpv1-1", "gpv1-2", "gpv1-3", diff --git a/dts/src/arm/exynos4412-smdk4412.dts b/dts/src/arm/exynos4412-smdk4412.dts index cc99b955af..a40ff39497 100644 --- a/dts/src/arm/exynos4412-smdk4412.dts +++ b/dts/src/arm/exynos4412-smdk4412.dts @@ -133,14 +133,14 @@ }; &pinctrl_1 { - keypad_rows: keypad-rows { + keypad_rows: keypad-rows-pins { samsung,pins = "gpx2-0", "gpx2-1", "gpx2-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - keypad_cols: keypad-cols { + keypad_cols: keypad-cols-pins { samsung,pins = "gpx1-0", "gpx1-1", "gpx1-2", "gpx1-3", "gpx1-4", "gpx1-5", "gpx1-6", "gpx1-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; diff --git a/dts/src/arm/exynos4412.dtsi b/dts/src/arm/exynos4412.dtsi index d3802046c8..aa0b61b599 100644 --- a/dts/src/arm/exynos4412.dtsi +++ b/dts/src/arm/exynos4412.dtsi @@ -813,7 +813,7 @@ interrupt-parent = <&combiner>; interrupts = <2 4>; reg = <0x100C0000 0x100>; - clocks = <&clock 383>; + clocks = <&clock CLK_TMU_APBIF>; clock-names = "tmu_apbif"; status = "disabled"; }; diff --git a/dts/src/arm/exynos5250-arndale.dts b/dts/src/arm/exynos5250-arndale.dts index 3583095fbb..f7795f2d0f 100644 --- a/dts/src/arm/exynos5250-arndale.dts +++ b/dts/src/arm/exynos5250-arndale.dts @@ -590,7 +590,7 @@ }; &pinctrl_0 { - s5m8767_irq: s5m8767-irq { + s5m8767_irq: s5m8767-irq-pins { samsung,pins = "gpx3-2"; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; }; @@ -632,3 +632,8 @@ #size-cells = <0>; }; }; + +&usbdrd { + vdd10-supply = <&ldo15_reg>; + vdd33-supply = <&ldo12_reg>; +}; diff --git a/dts/src/arm/exynos5250-pinctrl.dtsi b/dts/src/arm/exynos5250-pinctrl.dtsi index d31a68672b..918947a389 100644 --- a/dts/src/arm/exynos5250-pinctrl.dtsi +++ b/dts/src/arm/exynos5250-pinctrl.dtsi @@ -12,7 +12,7 @@ #include <dt-bindings/pinctrl/samsung.h> &pinctrl_0 { - gpa0: gpa0 { + gpa0: gpa0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -20,7 +20,7 @@ #interrupt-cells = <2>; }; - gpa1: gpa1 { + gpa1: gpa1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -28,7 +28,7 @@ #interrupt-cells = <2>; }; - gpa2: gpa2 { + gpa2: gpa2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -36,7 +36,7 @@ #interrupt-cells = <2>; }; - gpb0: gpb0 { + gpb0: gpb0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -44,7 +44,7 @@ #interrupt-cells = <2>; }; - gpb1: gpb1 { + gpb1: gpb1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -52,7 +52,7 @@ #interrupt-cells = <2>; }; - gpb2: gpb2 { + gpb2: gpb2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -60,7 +60,7 @@ #interrupt-cells = <2>; }; - gpb3: gpb3 { + gpb3: gpb3-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -68,7 +68,7 @@ #interrupt-cells = <2>; }; - gpc0: gpc0 { + gpc0: gpc0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -76,7 +76,7 @@ #interrupt-cells = <2>; }; - gpc1: gpc1 { + gpc1: gpc1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -84,7 +84,7 @@ #interrupt-cells = <2>; }; - gpc2: gpc2 { + gpc2: gpc2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -92,7 +92,7 @@ #interrupt-cells = <2>; }; - gpc3: gpc3 { + gpc3: gpc3-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -100,7 +100,7 @@ #interrupt-cells = <2>; }; - gpd0: gpd0 { + gpd0: gpd0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -108,7 +108,7 @@ #interrupt-cells = <2>; }; - gpd1: gpd1 { + gpd1: gpd1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -116,42 +116,42 @@ #interrupt-cells = <2>; }; - gpy0: gpy0 { + gpy0: gpy0-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpy1: gpy1 { + gpy1: gpy1-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpy2: gpy2 { + gpy2: gpy2-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpy3: gpy3 { + gpy3: gpy3-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpy4: gpy4 { + gpy4: gpy4-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpy5: gpy5 { + gpy5: gpy5-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpy6: gpy6 { + gpy6: gpy6-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpc4: gpc4 { + gpc4: gpc4-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -159,7 +159,7 @@ #interrupt-cells = <2>; }; - gpx0: gpx0 { + gpx0: gpx0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -170,7 +170,7 @@ <26 0>, <26 1>, <27 0>, <27 1>; }; - gpx1: gpx1 { + gpx1: gpx1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -181,7 +181,7 @@ <30 0>, <30 1>, <31 0>, <31 1>; }; - gpx2: gpx2 { + gpx2: gpx2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -189,7 +189,7 @@ #interrupt-cells = <2>; }; - gpx3: gpx3 { + gpx3: gpx3-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -197,104 +197,104 @@ #interrupt-cells = <2>; }; - uart0_data: uart0-data { + uart0_data: uart0-data-pins { samsung,pins = "gpa0-0", "gpa0-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - uart0_fctl: uart0-fctl { + uart0_fctl: uart0-fctl-pins { samsung,pins = "gpa0-2", "gpa0-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2c2_bus: i2c2-bus { + i2c2_bus: i2c2-bus-pins { samsung,pins = "gpa0-6", "gpa0-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2c2_hs_bus: i2c2-hs-bus { + i2c2_hs_bus: i2c2-hs-bus-pins { samsung,pins = "gpa0-6", "gpa0-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_4>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2c2_gpio_bus: i2c2-gpio-bus { + i2c2_gpio_bus: i2c2-gpio-bus-pins { samsung,pins = "gpa0-6", "gpa0-7"; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - uart2_data: uart2-data { + uart2_data: uart2-data-pins { samsung,pins = "gpa1-0", "gpa1-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - uart2_fctl: uart2-fctl { + uart2_fctl: uart2-fctl-pins { samsung,pins = "gpa1-2", "gpa1-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2c3_bus: i2c3-bus { + i2c3_bus: i2c3-bus-pins { samsung,pins = "gpa1-2", "gpa1-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2c3_hs_bus: i2c3-hs-bus { + i2c3_hs_bus: i2c3-hs-bus-pins { samsung,pins = "gpa1-2", "gpa1-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_4>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - uart3_data: uart3-data { - samsung,pins = "gpa1-4", "gpa1-4"; + uart3_data: uart3-data-pins { + samsung,pins = "gpa1-4", "gpa1-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - spi0_bus: spi0-bus { + spi0_bus: spi0-bus-pins { samsung,pins = "gpa2-0", "gpa2-2", "gpa2-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2c4_bus: i2c4-bus { + i2c4_bus: i2c4-bus-pins { samsung,pins = "gpa2-0", "gpa2-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2c5_bus: i2c5-bus { + i2c5_bus: i2c5-bus-pins { samsung,pins = "gpa2-2", "gpa2-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - spi1_bus: spi1-bus { + spi1_bus: spi1-bus-pins { samsung,pins = "gpa2-4", "gpa2-6", "gpa2-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2s1_bus: i2s1-bus { + i2s1_bus: i2s1-bus-pins { samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3", "gpb0-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; @@ -302,7 +302,7 @@ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - pcm1_bus: pcm1-bus { + pcm1_bus: pcm1-bus-pins { samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3", "gpb0-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; @@ -310,7 +310,7 @@ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - ac97_bus: ac97-bus { + ac97_bus: ac97-bus-pins { samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3", "gpb0-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_4>; @@ -318,7 +318,7 @@ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2s2_bus: i2s2-bus { + i2s2_bus: i2s2-bus-pins { samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3", "gpb1-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; @@ -326,7 +326,7 @@ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - pcm2_bus: pcm2-bus { + pcm2_bus: pcm2-bus-pins { samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3", "gpb1-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; @@ -334,280 +334,280 @@ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - spdif_bus: spdif-bus { + spdif_bus: spdif-bus-pins { samsung,pins = "gpb1-0", "gpb1-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_4>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - spi2_bus: spi2-bus { + spi2_bus: spi2-bus-pins { samsung,pins = "gpb1-1", "gpb1-3", "gpb1-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_5>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2c6_bus: i2c6-bus { + i2c6_bus: i2c6-bus-pins { samsung,pins = "gpb1-3", "gpb1-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_4>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - pwm0_out: pwm0-out { + pwm0_out: pwm0-out-pins { samsung,pins = "gpb2-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - pwm1_out: pwm1-out { + pwm1_out: pwm1-out-pins { samsung,pins = "gpb2-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - pwm2_out: pwm2-out { + pwm2_out: pwm2-out-pins { samsung,pins = "gpb2-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - pwm3_out: pwm3-out { + pwm3_out: pwm3-out-pins { samsung,pins = "gpb2-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2c7_bus: i2c7-bus { + i2c7_bus: i2c7-bus-pins { samsung,pins = "gpb2-2", "gpb2-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2c0_bus: i2c0-bus { + i2c0_bus: i2c0-bus-pins { samsung,pins = "gpb3-0", "gpb3-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2c1_bus: i2c1-bus { + i2c1_bus: i2c1-bus-pins { samsung,pins = "gpb3-2", "gpb3-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2c0_hs_bus: i2c0-hs-bus { + i2c0_hs_bus: i2c0-hs-bus-pins { samsung,pins = "gpb3-0", "gpb3-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_4>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2c1_hs_bus: i2c1-hs-bus { + i2c1_hs_bus: i2c1-hs-bus-pins { samsung,pins = "gpb3-2", "gpb3-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_4>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - sd0_clk: sd0-clk { + sd0_clk: sd0-clk-pins { samsung,pins = "gpc0-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd0_cmd: sd0-cmd { + sd0_cmd: sd0-cmd-pins { samsung,pins = "gpc0-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd0_cd: sd0-cd { + sd0_cd: sd0-cd-pins { samsung,pins = "gpc0-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd0_bus1: sd0-bus-width1 { + sd0_bus1: sd0-bus-width1-pins { samsung,pins = "gpc0-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd0_bus4: sd0-bus-width4 { + sd0_bus4: sd0-bus-width4-pins { samsung,pins = "gpc0-3", "gpc0-4", "gpc0-5", "gpc0-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd0_bus8: sd0-bus-width8 { + sd0_bus8: sd0-bus-width8-pins { samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd1_clk: sd1-clk { + sd1_clk: sd1-clk-pins { samsung,pins = "gpc2-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd1_cmd: sd1-cmd { + sd1_cmd: sd1-cmd-pins { samsung,pins = "gpc2-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd1_cd: sd1-cd { + sd1_cd: sd1-cd-pins { samsung,pins = "gpc2-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd1_bus1: sd1-bus-width1 { + sd1_bus1: sd1-bus-width1-pins { samsung,pins = "gpc2-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd1_bus4: sd1-bus-width4 { + sd1_bus4: sd1-bus-width4-pins { samsung,pins = "gpc2-3", "gpc2-4", "gpc2-5", "gpc2-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd2_clk: sd2-clk { + sd2_clk: sd2-clk-pins { samsung,pins = "gpc3-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd2_cmd: sd2-cmd { + sd2_cmd: sd2-cmd-pins { samsung,pins = "gpc3-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd2_cd: sd2-cd { + sd2_cd: sd2-cd-pins { samsung,pins = "gpc3-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd2_bus1: sd2-bus-width1 { + sd2_bus1: sd2-bus-width1-pins { samsung,pins = "gpc3-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd2_bus4: sd2-bus-width4 { + sd2_bus4: sd2-bus-width4-pins { samsung,pins = "gpc3-3", "gpc3-4", "gpc3-5", "gpc3-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd2_bus8: sd2-bus-width8 { + sd2_bus8: sd2-bus-width8-pins { samsung,pins = "gpc4-3", "gpc4-4", "gpc4-5", "gpc4-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd3_clk: sd3-clk { + sd3_clk: sd3-clk-pins { samsung,pins = "gpc4-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd3_cmd: sd3-cmd { + sd3_cmd: sd3-cmd-pins { samsung,pins = "gpc4-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd3_cd: sd3-cd { + sd3_cd: sd3-cd-pins { samsung,pins = "gpc4-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd3_bus1: sd3-bus-width1 { + sd3_bus1: sd3-bus-width1-pins { samsung,pins = "gpc4-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd3_bus4: sd3-bus-width4 { + sd3_bus4: sd3-bus-width4-pins { samsung,pins = "gpc4-3", "gpc4-4", "gpc4-5", "gpc4-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - uart1_data: uart1-data { + uart1_data: uart1-data-pins { samsung,pins = "gpd0-0", "gpd0-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - uart1_fctl: uart1-fctl { + uart1_fctl: uart1-fctl-pins { samsung,pins = "gpd0-2", "gpd0-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - dp_hpd: dp_hpd { + dp_hpd: dp-hpd-pins { samsung,pins = "gpx0-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - hdmi_cec: hdmi-cec { + hdmi_cec: hdmi-cec-pins { samsung,pins = "gpx3-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - hdmi_hpd: hdmi-hpd { + hdmi_hpd: hdmi-hpd-pins { samsung,pins = "gpx3-7"; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; }; }; &pinctrl_1 { - gpe0: gpe0 { + gpe0: gpe0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -615,7 +615,7 @@ #interrupt-cells = <2>; }; - gpe1: gpe1 { + gpe1: gpe1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -623,7 +623,7 @@ #interrupt-cells = <2>; }; - gpf0: gpf0 { + gpf0: gpf0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -631,7 +631,7 @@ #interrupt-cells = <2>; }; - gpf1: gpf1 { + gpf1: gpf1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -639,7 +639,7 @@ #interrupt-cells = <2>; }; - gpg0: gpg0 { + gpg0: gpg0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -647,7 +647,7 @@ #interrupt-cells = <2>; }; - gpg1: gpg1 { + gpg1: gpg1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -655,7 +655,7 @@ #interrupt-cells = <2>; }; - gpg2: gpg2 { + gpg2: gpg2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -663,7 +663,7 @@ #interrupt-cells = <2>; }; - gph0: gph0 { + gph0: gph0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -671,7 +671,7 @@ #interrupt-cells = <2>; }; - gph1: gph1 { + gph1: gph1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -679,7 +679,7 @@ #interrupt-cells = <2>; }; - cam_gpio_a: cam-gpio-a { + cam_gpio_a: cam-gpio-a-pins { samsung,pins = "gpe0-0", "gpe0-1", "gpe0-2", "gpe0-3", "gpe0-4", "gpe0-5", "gpe0-6", "gpe0-7", "gpe1-0", "gpe1-1"; @@ -688,7 +688,7 @@ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - cam_gpio_b: cam-gpio-b { + cam_gpio_b: cam-gpio-b-pins { samsung,pins = "gpf0-0", "gpf0-1", "gpf0-2", "gpf0-3", "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; @@ -696,42 +696,42 @@ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - cam_i2c2_bus: cam-i2c2-bus { + cam_i2c2_bus: cam-i2c2-bus-pins { samsung,pins = "gpe0-6", "gpe1-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_4>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - cam_spi1_bus: cam-spi1-bus { + cam_spi1_bus: cam-spi1-bus-pins { samsung,pins = "gpe0-4", "gpe0-5", "gpf0-2", "gpf0-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_4>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - cam_i2c1_bus: cam-i2c1-bus { + cam_i2c1_bus: cam-i2c1-bus-pins { samsung,pins = "gpf0-2", "gpf0-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - cam_i2c0_bus: cam-i2c0-bus { + cam_i2c0_bus: cam-i2c0-bus-pins { samsung,pins = "gpf0-0", "gpf0-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - cam_spi0_bus: cam-spi0-bus { + cam_spi0_bus: cam-spi0-bus-pins { samsung,pins = "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - cam_bayrgb_bus: cam-bayrgb-bus { + cam_bayrgb_bus: cam-bayrgb-bus-pins { samsung,pins = "gpg0-0", "gpg0-1", "gpg0-2", "gpg0-3", "gpg0-4", "gpg0-5", "gpg0-6", "gpg0-7", "gpg1-0", "gpg1-1", "gpg1-2", "gpg1-3", @@ -742,7 +742,7 @@ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - cam_port_a: cam-port-a { + cam_port_a: cam-port-a-pins { samsung,pins = "gph0-0", "gph0-1", "gph0-2", "gph0-3", "gph1-0", "gph1-1", "gph1-2", "gph1-3", "gph1-4", "gph1-5", "gph1-6", "gph1-7"; @@ -753,7 +753,7 @@ }; &pinctrl_2 { - gpv0: gpv0 { + gpv0: gpv0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -761,7 +761,7 @@ #interrupt-cells = <2>; }; - gpv1: gpv1 { + gpv1: gpv1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -769,7 +769,7 @@ #interrupt-cells = <2>; }; - gpv2: gpv2 { + gpv2: gpv2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -777,7 +777,7 @@ #interrupt-cells = <2>; }; - gpv3: gpv3 { + gpv3: gpv3-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -785,7 +785,7 @@ #interrupt-cells = <2>; }; - gpv4: gpv4 { + gpv4: gpv4-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -793,7 +793,7 @@ #interrupt-cells = <2>; }; - c2c_rxd: c2c-rxd { + c2c_rxd: c2c-rxd-pins { samsung,pins = "gpv0-0", "gpv0-1", "gpv0-2", "gpv0-3", "gpv0-4", "gpv0-5", "gpv0-6", "gpv0-7", "gpv1-0", "gpv1-1", "gpv1-2", "gpv1-3", @@ -803,7 +803,7 @@ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - c2c_txd: c2c-txd { + c2c_txd: c2c-txd-pins { samsung,pins = "gpv2-0", "gpv2-1", "gpv2-2", "gpv2-3", "gpv2-4", "gpv2-5", "gpv2-6", "gpv2-7", "gpv3-0", "gpv3-1", "gpv3-2", "gpv3-3", @@ -815,7 +815,7 @@ }; &pinctrl_3 { - gpz: gpz { + gpz: gpz-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -823,7 +823,7 @@ #interrupt-cells = <2>; }; - i2s0_bus: i2s0-bus { + i2s0_bus: i2s0-bus-pins { samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3", "gpz-4", "gpz-5", "gpz-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; diff --git a/dts/src/arm/exynos5250-smdk5250.dts b/dts/src/arm/exynos5250-smdk5250.dts index 39bbe18145..21fbbf3d86 100644 --- a/dts/src/arm/exynos5250-smdk5250.dts +++ b/dts/src/arm/exynos5250-smdk5250.dts @@ -118,6 +118,9 @@ status = "okay"; ddc = <&i2c_2>; hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>; + vdd-supply = <&ldo8_reg>; + vdd_osc-supply = <&ldo10_reg>; + vdd_pll-supply = <&ldo8_reg>; }; &i2c_0 { @@ -410,10 +413,15 @@ }; &pinctrl_0 { - max77686_irq: max77686-irq { + max77686_irq: max77686-irq-pins { samsung,pins = "gpx3-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_F>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; }; + +&usbdrd { + vdd10-supply = <&ldo15_reg>; + vdd33-supply = <&ldo12_reg>; +}; diff --git a/dts/src/arm/exynos5250-snow-common.dtsi b/dts/src/arm/exynos5250-snow-common.dtsi index 2335c46873..c15ecfc407 100644 --- a/dts/src/arm/exynos5250-snow-common.dtsi +++ b/dts/src/arm/exynos5250-snow-common.dtsi @@ -587,63 +587,63 @@ }; &pinctrl_0 { - wifi_en: wifi-en { + wifi_en: wifi-en-pins { samsung,pins = "gpx0-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - wifi_rst: wifi-rst { + wifi_rst: wifi-rst-pins { samsung,pins = "gpx0-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - power_key_irq: power-key-irq { + power_key_irq: power-key-irq-pins { samsung,pins = "gpx1-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_F>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - ec_irq: ec-irq { + ec_irq: ec-irq-pins { samsung,pins = "gpx1-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - tps65090_irq: tps65090-irq { + tps65090_irq: tps65090-irq-pins { samsung,pins = "gpx2-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - usb3_vbus_en: usb3-vbus-en { + usb3_vbus_en: usb3-vbus-en-pins { samsung,pins = "gpx2-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - max77686_irq: max77686-irq { + max77686_irq: max77686-irq-pins { samsung,pins = "gpx3-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - lid_irq: lid-irq { + lid_irq: lid-irq-pins { samsung,pins = "gpx3-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_F>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - hdmi_hpd_irq: hdmi-hpd-irq { + hdmi_hpd_irq: hdmi-hpd-irq-pins { samsung,pins = "gpx3-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; @@ -652,14 +652,14 @@ }; &pinctrl_1 { - arb_their_claim: arb-their-claim { + arb_their_claim: arb-their-claim-pins { samsung,pins = "gpe0-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - arb_our_claim: arb-our-claim { + arb_our_claim: arb-our-claim-pins { samsung,pins = "gpf0-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; @@ -698,6 +698,11 @@ cs-gpios = <&gpa2 5 GPIO_ACTIVE_HIGH>; }; +&usbdrd { + vdd10-supply = <&ldo15_reg>; + vdd33-supply = <&ldo12_reg>; +}; + &usbdrd_dwc3 { dr_mode = "host"; }; diff --git a/dts/src/arm/exynos5250-snow-rev5.dts b/dts/src/arm/exynos5250-snow-rev5.dts index f8ca61df69..0a47597d6f 100644 --- a/dts/src/arm/exynos5250-snow-rev5.dts +++ b/dts/src/arm/exynos5250-snow-rev5.dts @@ -47,7 +47,7 @@ }; &pinctrl_0 { - max98090_irq: max98090-irq { + max98090_irq: max98090-irq-pins { samsung,pins = "gpx0-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; diff --git a/dts/src/arm/exynos5250-snow.dts b/dts/src/arm/exynos5250-snow.dts index a630bc654a..906aa7aae7 100644 --- a/dts/src/arm/exynos5250-snow.dts +++ b/dts/src/arm/exynos5250-snow.dts @@ -43,7 +43,7 @@ }; &pinctrl_0 { - max98095_en: max98095-en { + max98095_en: max98095-en-pins { samsung,pins = "gpx1-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; diff --git a/dts/src/arm/exynos5250-spring.dts b/dts/src/arm/exynos5250-spring.dts index e0feedcf54..24609bb201 100644 --- a/dts/src/arm/exynos5250-spring.dts +++ b/dts/src/arm/exynos5250-spring.dts @@ -451,63 +451,63 @@ }; &pinctrl_0 { - s5m8767_dvs: s5m8767-dvs { + s5m8767_dvs: s5m8767-dvs-pins { samsung,pins = "gpd1-0", "gpd1-1", "gpd1-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - dp_hpd_gpio: dp-hpd { + dp_hpd_gpio: dp-hpd-pins { samsung,pins = "gpc3-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - trackpad_irq: trackpad-irq { + trackpad_irq: trackpad-irq-pins { samsung,pins = "gpx1-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_F>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - power_key_irq: power-key-irq { + power_key_irq: power-key-irq-pins { samsung,pins = "gpx1-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_F>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - ec_irq: ec-irq { + ec_irq: ec-irq-pins { samsung,pins = "gpx1-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - s5m8767_ds: s5m8767-ds { + s5m8767_ds: s5m8767-ds-pins { samsung,pins = "gpx2-3", "gpx2-4", "gpx2-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - s5m8767_irq: s5m8767-irq { + s5m8767_irq: s5m8767-irq-pins { samsung,pins = "gpx3-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - lid_irq: lid-irq { + lid_irq: lid-irq-pins { samsung,pins = "gpx3-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_F>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - hdmi_hpd_irq: hdmi-hpd-irq { + hdmi_hpd_irq: hdmi-hpd-irq-pins { samsung,pins = "gpx3-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; @@ -516,7 +516,7 @@ }; &pinctrl_1 { - hsic_reset: hsic-reset { + hsic_reset: hsic-reset-pins { samsung,pins = "gpe1-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; @@ -553,4 +553,9 @@ num-cs = <1>; }; +&usbdrd { + vdd10-supply = <&ldo15_reg>; + vdd33-supply = <&ldo12_reg>; +}; + #include "cros-ec-keyboard.dtsi" diff --git a/dts/src/arm/exynos5250.dtsi b/dts/src/arm/exynos5250.dtsi index 139778928b..5baaa7eb71 100644 --- a/dts/src/arm/exynos5250.dtsi +++ b/dts/src/arm/exynos5250.dtsi @@ -496,8 +496,7 @@ status = "disabled"; reg = <0x12d20000 0x100>; interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&pdma0 5 - &pdma0 4>; + dmas = <&pdma0 5>, <&pdma0 4>; dma-names = "tx", "rx"; #address-cells = <1>; #size-cells = <0>; @@ -512,8 +511,7 @@ status = "disabled"; reg = <0x12d30000 0x100>; interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&pdma1 5 - &pdma1 4>; + dmas = <&pdma1 5>, <&pdma1 4>; dma-names = "tx", "rx"; #address-cells = <1>; #size-cells = <0>; @@ -528,8 +526,7 @@ status = "disabled"; reg = <0x12d40000 0x100>; interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&pdma0 7 - &pdma0 6>; + dmas = <&pdma0 7>, <&pdma0 6>; dma-names = "tx", "rx"; #address-cells = <1>; #size-cells = <0>; @@ -637,7 +634,7 @@ #sound-dai-cells = <1>; }; - usb_dwc3 { + usbdrd: usb3 { compatible = "samsung,exynos5250-dwusb3"; clocks = <&clock CLK_USB3>; clock-names = "usbdrd30"; @@ -695,7 +692,7 @@ samsung,pmureg-phandle = <&pmu_system_controller>; }; - pdma0: pdma@121a0000 { + pdma0: dma-controller@121a0000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x121A0000 0x1000>; interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; @@ -706,7 +703,7 @@ #dma-requests = <32>; }; - pdma1: pdma@121b0000 { + pdma1: dma-controller@121b0000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x121B0000 0x1000>; interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; @@ -717,7 +714,7 @@ #dma-requests = <32>; }; - mdma0: mdma@10800000 { + mdma0: dma-controller@10800000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x10800000 0x1000>; interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; @@ -728,7 +725,7 @@ #dma-requests = <1>; }; - mdma1: mdma@11c10000 { + mdma1: dma-controller@11c10000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x11C10000 0x1000>; interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>; diff --git a/dts/src/arm/exynos5260-pinctrl.dtsi b/dts/src/arm/exynos5260-pinctrl.dtsi index 17e2f3e0d7..150607f810 100644 --- a/dts/src/arm/exynos5260-pinctrl.dtsi +++ b/dts/src/arm/exynos5260-pinctrl.dtsi @@ -12,7 +12,7 @@ #include <dt-bindings/pinctrl/samsung.h> &pinctrl_0 { - gpa0: gpa0 { + gpa0: gpa0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -20,7 +20,7 @@ #interrupt-cells = <2>; }; - gpa1: gpa1 { + gpa1: gpa1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -28,7 +28,7 @@ #interrupt-cells = <2>; }; - gpa2: gpa2 { + gpa2: gpa2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -36,7 +36,7 @@ #interrupt-cells = <2>; }; - gpb0: gpb0 { + gpb0: gpb0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -44,7 +44,7 @@ #interrupt-cells = <2>; }; - gpb1: gpb1 { + gpb1: gpb1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -52,7 +52,7 @@ #interrupt-cells = <2>; }; - gpb2: gpb2 { + gpb2: gpb2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -60,7 +60,7 @@ #interrupt-cells = <2>; }; - gpb3: gpb3 { + gpb3: gpb3-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -68,7 +68,7 @@ #interrupt-cells = <2>; }; - gpb4: gpb4 { + gpb4: gpb4-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -76,7 +76,7 @@ #interrupt-cells = <2>; }; - gpb5: gpb5 { + gpb5: gpb5-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -84,7 +84,7 @@ #interrupt-cells = <2>; }; - gpd0: gpd0 { + gpd0: gpd0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -92,7 +92,7 @@ #interrupt-cells = <2>; }; - gpd1: gpd1 { + gpd1: gpd1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -100,7 +100,7 @@ #interrupt-cells = <2>; }; - gpd2: gpd2 { + gpd2: gpd2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -108,7 +108,7 @@ #interrupt-cells = <2>; }; - gpe0: gpe0 { + gpe0: gpe0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -116,7 +116,7 @@ #interrupt-cells = <2>; }; - gpe1: gpe1 { + gpe1: gpe1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -124,7 +124,7 @@ #interrupt-cells = <2>; }; - gpf0: gpf0 { + gpf0: gpf0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -132,7 +132,7 @@ #interrupt-cells = <2>; }; - gpf1: gpf1 { + gpf1: gpf1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -140,7 +140,7 @@ #interrupt-cells = <2>; }; - gpk0: gpk0 { + gpk0: gpk0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -148,7 +148,7 @@ #interrupt-cells = <2>; }; - gpx0: gpx0 { + gpx0: gpx0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -164,7 +164,7 @@ #interrupt-cells = <2>; }; - gpx1: gpx1 { + gpx1: gpx1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -180,7 +180,7 @@ #interrupt-cells = <2>; }; - gpx2: gpx2 { + gpx2: gpx2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -188,7 +188,7 @@ #interrupt-cells = <2>; }; - gpx3: gpx3 { + gpx3: gpx3-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -196,63 +196,63 @@ #interrupt-cells = <2>; }; - uart0_data: uart0-data { + uart0_data: uart0-data-pins { samsung,pins = "gpa0-0", "gpa0-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>; }; - uart0_fctl: uart0-fctl { + uart0_fctl: uart0-fctl-pins { samsung,pins = "gpa0-2", "gpa0-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>; }; - uart1_data: uart1-data { + uart1_data: uart1-data-pins { samsung,pins = "gpa1-0", "gpa1-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>; }; - uart1_fctl: uart1-fctl { + uart1_fctl: uart1-fctl-pins { samsung,pins = "gpa1-2", "gpa1-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>; }; - uart2_data: uart2-data { + uart2_data: uart2-data-pins { samsung,pins = "gpa1-4", "gpa1-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>; }; - spi0_bus: spi0-bus { + spi0_bus: spi0-bus-pins { samsung,pins = "gpa2-0", "gpa2-2", "gpa2-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>; }; - spi1_bus: spi1-bus { + spi1_bus: spi1-bus-pins { samsung,pins = "gpa2-4", "gpa2-6", "gpa2-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>; }; - usb3_vbus0_en: usb3-vbus0-en { + usb3_vbus0_en: usb3-vbus0-en-pins { samsung,pins = "gpa2-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>; }; - i2s1_bus: i2s1-bus { + i2s1_bus: i2s1-bus-pins { samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3", "gpb0-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; @@ -260,7 +260,7 @@ samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>; }; - pcm1_bus: pcm1-bus { + pcm1_bus: pcm1-bus-pins { samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3", "gpb0-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; @@ -268,105 +268,105 @@ samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>; }; - spdif1_bus: spdif1-bus { + spdif1_bus: spdif1-bus-pins { samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_4>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>; }; - spi2_bus: spi2-bus { + spi2_bus: spi2-bus-pins { samsung,pins = "gpb1-0", "gpb1-2", "gpb1-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>; }; - i2c0_hs_bus: i2c0-hs-bus { + i2c0_hs_bus: i2c0-hs-bus-pins { samsung,pins = "gpb3-0", "gpb3-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>; }; - i2c1_hs_bus: i2c1-hs-bus { + i2c1_hs_bus: i2c1-hs-bus-pins { samsung,pins = "gpb3-2", "gpb3-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>; }; - i2c2_hs_bus: i2c2-hs-bus { + i2c2_hs_bus: i2c2-hs-bus-pins { samsung,pins = "gpb3-4", "gpb3-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>; }; - i2c3_hs_bus: i2c3-hs-bus { + i2c3_hs_bus: i2c3-hs-bus-pins { samsung,pins = "gpb3-6", "gpb3-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>; }; - i2c4_bus: i2c4-bus { + i2c4_bus: i2c4-bus-pins { samsung,pins = "gpb4-0", "gpb4-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>; }; - i2c5_bus: i2c5-bus { + i2c5_bus: i2c5-bus-pins { samsung,pins = "gpb4-2", "gpb4-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>; }; - i2c6_bus: i2c6-bus { + i2c6_bus: i2c6-bus-pins { samsung,pins = "gpb4-4", "gpb4-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>; }; - i2c7_bus: i2c7-bus { + i2c7_bus: i2c7-bus-pins { samsung,pins = "gpb4-6", "gpb4-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>; }; - i2c8_bus: i2c8-bus { + i2c8_bus: i2c8-bus-pins { samsung,pins = "gpb5-0", "gpb5-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>; }; - i2c9_bus: i2c9-bus { + i2c9_bus: i2c9-bus-pins { samsung,pins = "gpb5-2", "gpb5-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>; }; - i2c10_bus: i2c10-bus { + i2c10_bus: i2c10-bus-pins { samsung,pins = "gpb5-4", "gpb5-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>; }; - i2c11_bus: i2c11-bus { + i2c11_bus: i2c11-bus-pins { samsung,pins = "gpb5-6", "gpb5-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>; }; - cam_gpio_a: cam-gpio-a { + cam_gpio_a: cam-gpio-a-pins { samsung,pins = "gpe0-0", "gpe0-1", "gpe0-2", "gpe0-3", "gpe0-4", "gpe0-5", "gpe0-6", "gpe0-7", "gpe1-0", "gpe1-1"; @@ -375,7 +375,7 @@ samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>; }; - cam_gpio_b: cam-gpio-b { + cam_gpio_b: cam-gpio-b-pins { samsung,pins = "gpf0-0", "gpf0-1", "gpf0-2", "gpf0-3", "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; @@ -383,28 +383,28 @@ samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>; }; - cam_i2c1_bus: cam-i2c1-bus { + cam_i2c1_bus: cam-i2c1-bus-pins { samsung,pins = "gpf0-2", "gpf0-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>; }; - cam_i2c0_bus: cam-i2c0-bus { + cam_i2c0_bus: cam-i2c0-bus-pins { samsung,pins = "gpf0-0", "gpf0-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>; }; - cam_spi0_bus: cam-spi0-bus { + cam_spi0_bus: cam-spi0-bus-pins { samsung,pins = "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>; }; - cam_spi1_bus: cam-spi1-bus { + cam_spi1_bus: cam-spi1-bus-pins { samsung,pins = "gpf1-4", "gpf1-5", "gpf1-6", "gpf1-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; @@ -413,7 +413,7 @@ }; &pinctrl_1 { - gpc0: gpc0 { + gpc0: gpc0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -421,7 +421,7 @@ #interrupt-cells = <2>; }; - gpc1: gpc1 { + gpc1: gpc1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -429,7 +429,7 @@ #interrupt-cells = <2>; }; - gpc2: gpc2 { + gpc2: gpc2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -437,7 +437,7 @@ #interrupt-cells = <2>; }; - gpc3: gpc3 { + gpc3: gpc3-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -445,7 +445,7 @@ #interrupt-cells = <2>; }; - gpc4: gpc4 { + gpc4: gpc4-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -453,112 +453,112 @@ #interrupt-cells = <2>; }; - sd0_clk: sd0-clk { + sd0_clk: sd0-clk-pins { samsung,pins = "gpc0-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV6>; }; - sd0_cmd: sd0-cmd { + sd0_cmd: sd0-cmd-pins { samsung,pins = "gpc0-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV6>; }; - sd0_bus1: sd0-bus-width1 { + sd0_bus1: sd0-bus-width1-pins { samsung,pins = "gpc0-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV6>; }; - sd0_bus4: sd0-bus-width4 { + sd0_bus4: sd0-bus-width4-pins { samsung,pins = "gpc0-3", "gpc0-4", "gpc0-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV6>; }; - sd0_bus8: sd0-bus-width8 { + sd0_bus8: sd0-bus-width8-pins { samsung,pins = "gpc3-0", "gpc3-1", "gpc3-2", "gpc3-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV6>; }; - sd0_rdqs: sd0-rdqs { + sd0_rdqs: sd0-rdqs-pins { samsung,pins = "gpc0-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV6>; }; - sd1_clk: sd1-clk { + sd1_clk: sd1-clk-pins { samsung,pins = "gpc1-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV6>; }; - sd1_cmd: sd1-cmd { + sd1_cmd: sd1-cmd-pins { samsung,pins = "gpc1-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV6>; }; - sd1_bus1: sd1-bus-width1 { + sd1_bus1: sd1-bus-width1-pins { samsung,pins = "gpc1-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV6>; }; - sd1_bus4: sd1-bus-width4 { + sd1_bus4: sd1-bus-width4-pins { samsung,pins = "gpc1-3", "gpc1-4", "gpc1-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV6>; }; - sd1_bus8: sd1-bus-width8 { + sd1_bus8: sd1-bus-width8-pins { samsung,pins = "gpc4-0", "gpc4-1", "gpc4-2", "gpc4-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV6>; }; - sd2_clk: sd2-clk { + sd2_clk: sd2-clk-pins { samsung,pins = "gpc2-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV6>; }; - sd2_cmd: sd2-cmd { + sd2_cmd: sd2-cmd-pins { samsung,pins = "gpc2-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV6>; }; - sd2_cd: sd2-cd { + sd2_cd: sd2-cd-pins { samsung,pins = "gpc2-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV6>; }; - sd2_bus1: sd2-bus-width1 { + sd2_bus1: sd2-bus-width1-pins { samsung,pins = "gpc2-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV6>; }; - sd2_bus4: sd2-bus-width4 { + sd2_bus4: sd2-bus-width4-pins { samsung,pins = "gpc2-4", "gpc2-5", "gpc2-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; @@ -567,7 +567,7 @@ }; &pinctrl_2 { - gpz0: gpz0 { + gpz0: gpz0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -575,7 +575,7 @@ #interrupt-cells = <2>; }; - gpz1: gpz1 { + gpz1: gpz1-gpio-bank { gpio-controller; #gpio-cells = <2>; diff --git a/dts/src/arm/exynos5260-xyref5260.dts b/dts/src/arm/exynos5260-xyref5260.dts index 0dc2ec16aa..3c3b751d43 100644 --- a/dts/src/arm/exynos5260-xyref5260.dts +++ b/dts/src/arm/exynos5260-xyref5260.dts @@ -29,6 +29,27 @@ #clock-cells = <0>; }; + ioclk_pcm: clock-pcm-ext { + compatible = "fixed-clock"; + clock-frequency = <2048000>; + clock-output-names = "ioclk_pcm_extclk"; + #clock-cells = <0>; + }; + + ioclk_i2s: clock-i2s-cd { + compatible = "fixed-clock"; + clock-frequency = <147456000>; + clock-output-names = "ioclk_i2s_cdclk"; + #clock-cells = <0>; + }; + + ioclk_spdif: clock-spdif-ext { + compatible = "fixed-clock"; + clock-frequency = <49152000>; + clock-output-names = "ioclk_spdif_extclk"; + #clock-cells = <0>; + }; + xrtcxti: xrtcxti { compatible = "fixed-clock"; clock-frequency = <32768>; @@ -38,7 +59,7 @@ }; &pinctrl_0 { - hdmi_hpd_irq: hdmi-hpd-irq { + hdmi_hpd_irq: hdmi-hpd-irq-pins { samsung,pins = "gpx3-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; diff --git a/dts/src/arm/exynos5260.dtsi b/dts/src/arm/exynos5260.dtsi index 524d244050..56271e7c45 100644 --- a/dts/src/arm/exynos5260.dtsi +++ b/dts/src/arm/exynos5260.dtsi @@ -113,78 +113,206 @@ compatible = "samsung,exynos5260-clock-top"; reg = <0x10010000 0x10000>; #clock-cells = <1>; + clocks = <&fin_pll>, + <&clock_mif MIF_DOUT_MEM_PLL>, + <&clock_mif MIF_DOUT_BUS_PLL>, + <&clock_mif MIF_DOUT_MEDIA_PLL>; + clock-names = "fin_pll", + "dout_mem_pll", + "dout_bus_pll", + "dout_media_pll"; }; clock_peri: clock-controller@10200000 { compatible = "samsung,exynos5260-clock-peri"; reg = <0x10200000 0x10000>; #clock-cells = <1>; + clocks = <&fin_pll>, + <&ioclk_pcm>, + <&ioclk_i2s>, + <&ioclk_spdif>, + <&fin_pll>, + <&clock_top TOP_DOUT_ACLK_PERI_66>, + <&clock_top TOP_DOUT_SCLK_PERI_UART0>, + <&clock_top TOP_DOUT_SCLK_PERI_UART1>, + <&clock_top TOP_DOUT_SCLK_PERI_UART2>, + <&clock_top TOP_DOUT_SCLK_PERI_SPI0_B>, + <&clock_top TOP_DOUT_SCLK_PERI_SPI1_B>, + <&clock_top TOP_DOUT_SCLK_PERI_SPI2_B>, + <&clock_top TOP_DOUT_ACLK_PERI_AUD>; + clock-names = "fin_pll", + "ioclk_pcm_extclk", + "ioclk_i2s_cdclk", + "ioclk_spdif_extclk", + "phyclk_hdmi_phy_ref_cko", + "dout_aclk_peri_66", + "dout_sclk_peri_uart0", + "dout_sclk_peri_uart1", + "dout_sclk_peri_uart2", + "dout_sclk_peri_spi0_b", + "dout_sclk_peri_spi1_b", + "dout_sclk_peri_spi2_b", + "dout_aclk_peri_aud"; }; clock_egl: clock-controller@10600000 { compatible = "samsung,exynos5260-clock-egl"; reg = <0x10600000 0x10000>; #clock-cells = <1>; + clocks = <&fin_pll>, + <&clock_mif MIF_DOUT_BUS_PLL>; + clock-names = "fin_pll", + "dout_bus_pll"; }; clock_kfc: clock-controller@10700000 { compatible = "samsung,exynos5260-clock-kfc"; reg = <0x10700000 0x10000>; #clock-cells = <1>; + clocks = <&fin_pll>, + <&clock_mif MIF_DOUT_MEDIA_PLL>; + clock-names = "fin_pll", + "dout_media_pll"; }; clock_g2d: clock-controller@10a00000 { compatible = "samsung,exynos5260-clock-g2d"; reg = <0x10A00000 0x10000>; #clock-cells = <1>; + clocks = <&fin_pll>, + <&clock_top TOP_DOUT_ACLK_G2D_333>; + clock-names = "fin_pll", + "dout_aclk_g2d_333"; }; clock_mif: clock-controller@10ce0000 { compatible = "samsung,exynos5260-clock-mif"; reg = <0x10CE0000 0x10000>; #clock-cells = <1>; + clocks = <&fin_pll>; + clock-names = "fin_pll"; }; clock_mfc: clock-controller@11090000 { compatible = "samsung,exynos5260-clock-mfc"; reg = <0x11090000 0x10000>; #clock-cells = <1>; + clocks = <&fin_pll>, + <&clock_top TOP_DOUT_ACLK_MFC_333>; + clock-names = "fin_pll", + "dout_aclk_mfc_333"; }; clock_g3d: clock-controller@11830000 { compatible = "samsung,exynos5260-clock-g3d"; reg = <0x11830000 0x10000>; #clock-cells = <1>; + clocks = <&fin_pll>; + clock-names = "fin_pll"; }; clock_fsys: clock-controller@122e0000 { compatible = "samsung,exynos5260-clock-fsys"; reg = <0x122E0000 0x10000>; #clock-cells = <1>; + clocks = <&fin_pll>, + <&fin_pll>, + <&fin_pll>, + <&fin_pll>, + <&fin_pll>, + <&fin_pll>, + <&clock_top TOP_DOUT_ACLK_FSYS_200>; + clock-names = "fin_pll", + "phyclk_usbhost20_phy_phyclock", + "phyclk_usbhost20_phy_freeclk", + "phyclk_usbhost20_phy_clk48mohci", + "phyclk_usbdrd30_udrd30_pipe_pclk", + "phyclk_usbdrd30_udrd30_phyclock", + "dout_aclk_fsys_200"; }; clock_aud: clock-controller@128c0000 { compatible = "samsung,exynos5260-clock-aud"; reg = <0x128C0000 0x10000>; #clock-cells = <1>; + clocks = <&fin_pll>, + <&clock_top TOP_FOUT_AUD_PLL>, + <&ioclk_i2s>, + <&ioclk_pcm>; + clock-names = "fin_pll", + "fout_aud_pll", + "ioclk_i2s_cdclk", + "ioclk_pcm_extclk"; }; clock_isp: clock-controller@133c0000 { compatible = "samsung,exynos5260-clock-isp"; reg = <0x133C0000 0x10000>; #clock-cells = <1>; + clocks = <&fin_pll>, + <&clock_top TOP_DOUT_ACLK_ISP1_266>, + <&clock_top TOP_DOUT_ACLK_ISP1_400>, + <&clock_top TOP_MOUT_ACLK_ISP1_266>; + clock-names = "fin_pll", + "dout_aclk_isp1_266", + "dout_aclk_isp1_400", + "mout_aclk_isp1_266"; }; clock_gscl: clock-controller@13f00000 { compatible = "samsung,exynos5260-clock-gscl"; reg = <0x13F00000 0x10000>; #clock-cells = <1>; + clocks = <&fin_pll>, + <&clock_top TOP_DOUT_ACLK_GSCL_400>, + <&clock_top TOP_DOUT_ACLK_GSCL_333>; + clock-names = "fin_pll", + "dout_aclk_gscl_400", + "dout_aclk_gscl_333"; }; clock_disp: clock-controller@14550000 { compatible = "samsung,exynos5260-clock-disp"; reg = <0x14550000 0x10000>; #clock-cells = <1>; + clocks = <&fin_pll>, + <&fin_pll>, + <&fin_pll>, + <&fin_pll>, + <&fin_pll>, + <&fin_pll>, + <&fin_pll>, + <&fin_pll>, + <&fin_pll>, + <&fin_pll>, + <&fin_pll>, + <&fin_pll>, + <&fin_pll>, + <&fin_pll>, + <&ioclk_spdif>, + <&clock_top TOP_DOUT_ACLK_PERI_AUD>, + <&clock_top TOP_DOUT_ACLK_DISP_222>, + <&clock_top TOP_DOUT_SCLK_DISP_PIXEL>, + <&clock_top TOP_DOUT_ACLK_DISP_333>; + clock-names = "fin_pll", + "phyclk_dptx_phy_ch3_txd_clk", + "phyclk_dptx_phy_ch2_txd_clk", + "phyclk_dptx_phy_ch1_txd_clk", + "phyclk_dptx_phy_ch0_txd_clk", + "phyclk_hdmi_phy_tmds_clko", + "phyclk_hdmi_phy_ref_clko", + "phyclk_hdmi_phy_pixel_clko", + "phyclk_hdmi_link_o_tmds_clkhi", + "phyclk_mipi_dphy_4l_m_txbyte_clkhs", + "phyclk_dptx_phy_o_ref_clk_24m", + "phyclk_dptx_phy_clk_div2", + "phyclk_mipi_dphy_4l_m_rxclkesc0", + "phyclk_hdmi_phy_ref_cko", + "ioclk_spdif_extclk", + "dout_aclk_peri_aud", + "dout_aclk_disp_222", + "dout_sclk_disp_pixel", + "dout_aclk_disp_333"; }; gic: interrupt-controller@10481000 { diff --git a/dts/src/arm/exynos5410-odroidxu.dts b/dts/src/arm/exynos5410-odroidxu.dts index 884fef5583..e54a339185 100644 --- a/dts/src/arm/exynos5410-odroidxu.dts +++ b/dts/src/arm/exynos5410-odroidxu.dts @@ -188,8 +188,7 @@ interrupt-parent = <&gpx0>; interrupts = <4 IRQ_TYPE_NONE>; pinctrl-names = "default"; - pinctrl-0 = <&max77802_irq>, <&pmic_dvs_1>, <&pmic_dvs_2>, - <&pmic_dvs_3>; + pinctrl-0 = <&max77802_irq>, <&pmic_dvs_1>, <&pmic_dvs_2>; wakeup-source; #clock-cells = <1>; @@ -394,10 +393,6 @@ regulator-always-on; }; - ldo16_reg: LDO16 { - regulator-name = "ldo16"; - }; - ldo17_reg: LDO17 { regulator-name = "cam_sensor_core"; regulator-min-microvolt = <1200000>; @@ -427,10 +422,6 @@ regulator-max-microvolt = <2850000>; }; - ldo22_reg: LDO22 { - regulator-name = "ldo22"; - }; - ldo23_reg: LDO23 { regulator-name = "dp_p3v3"; regulator-min-microvolt = <3300000>; @@ -477,10 +468,6 @@ regulator-always-on; }; - ldo31_reg: LDO31 { - regulator-name = "ldo31"; - }; - /* On revisions with ti,ina231 this is sensor VS */ ldo32_reg: LDO32 { regulator-name = "vs_power_meter"; @@ -548,14 +535,14 @@ }; &pinctrl_0 { - emmc_nrst_pin: emmc-nrst { + emmc_nrst_pin: emmc-nrst-pins { samsung,pins = "gpd1-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - sd2_wp: sd2-wp { + sd2_wp: sd2-wp-pins { samsung,pins = "gpm5-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; /* Pin is floating so be sure to disable write-protect */ @@ -563,21 +550,14 @@ samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; }; - pmic_dvs_3: pmic-dvs-3 { - samsung,pins = "gpx0-0"; - samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; - samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; - samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; - }; - - pmic_dvs_2: pmic-dvs-2 { - samsung,pins = "gpx0-1"; + pmic_dvs_2: pmic-dvs-2-pins { + samsung,pins = "gpx0-0", "gpx0-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - pmic_dvs_1: pmic-dvs-1 { + pmic_dvs_1: pmic-dvs-1-pins { samsung,pins = "gpx0-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; @@ -585,7 +565,7 @@ samsung,pin-val = <1>; }; - max77802_irq: max77802-irq { + max77802_irq: max77802-irq-pins { samsung,pins = "gpx0-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_F>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; diff --git a/dts/src/arm/exynos5410-pinctrl.dtsi b/dts/src/arm/exynos5410-pinctrl.dtsi index 9599ba8ba7..6c7814b437 100644 --- a/dts/src/arm/exynos5410-pinctrl.dtsi +++ b/dts/src/arm/exynos5410-pinctrl.dtsi @@ -9,7 +9,7 @@ #include <dt-bindings/pinctrl/samsung.h> &pinctrl_0 { - gpa0: gpa0 { + gpa0: gpa0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -17,7 +17,7 @@ #interrupt-cells = <2>; }; - gpa1: gpa1 { + gpa1: gpa1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -25,7 +25,7 @@ #interrupt-cells = <2>; }; - gpa2: gpa2 { + gpa2: gpa2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -33,7 +33,7 @@ #interrupt-cells = <2>; }; - gpb0: gpb0 { + gpb0: gpb0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -41,7 +41,7 @@ #interrupt-cells = <2>; }; - gpb1: gpb1 { + gpb1: gpb1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -49,7 +49,7 @@ #interrupt-cells = <2>; }; - gpb2: gpb2 { + gpb2: gpb2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -57,7 +57,7 @@ #interrupt-cells = <2>; }; - gpb3: gpb3 { + gpb3: gpb3-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -65,7 +65,7 @@ #interrupt-cells = <2>; }; - gpc0: gpc0 { + gpc0: gpc0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -73,7 +73,7 @@ #interrupt-cells = <2>; }; - gpc3: gpc3 { + gpc3: gpc3-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -81,7 +81,7 @@ #interrupt-cells = <2>; }; - gpc1: gpc1 { + gpc1: gpc1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -89,7 +89,7 @@ #interrupt-cells = <2>; }; - gpc2: gpc2 { + gpc2: gpc2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -97,12 +97,12 @@ #interrupt-cells = <2>; }; - gpm5: gpm5 { + gpm5: gpm5-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpd1: gpd1 { + gpd1: gpd1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -110,7 +110,7 @@ #interrupt-cells = <2>; }; - gpe0: gpe0 { + gpe0: gpe0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -118,7 +118,7 @@ #interrupt-cells = <2>; }; - gpe1: gpe1 { + gpe1: gpe1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -126,7 +126,7 @@ #interrupt-cells = <2>; }; - gpf0: gpf0 { + gpf0: gpf0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -134,7 +134,7 @@ #interrupt-cells = <2>; }; - gpf1: gpf1 { + gpf1: gpf1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -142,7 +142,7 @@ #interrupt-cells = <2>; }; - gpg0: gpg0 { + gpg0: gpg0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -150,7 +150,7 @@ #interrupt-cells = <2>; }; - gpg1: gpg1 { + gpg1: gpg1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -158,7 +158,7 @@ #interrupt-cells = <2>; }; - gpg2: gpg2 { + gpg2: gpg2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -166,7 +166,7 @@ #interrupt-cells = <2>; }; - gph0: gph0 { + gph0: gph0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -174,7 +174,7 @@ #interrupt-cells = <2>; }; - gph1: gph1 { + gph1: gph1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -182,52 +182,52 @@ #interrupt-cells = <2>; }; - gpm7: gpm7 { + gpm7: gpm7-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpy0: gpy0 { + gpy0: gpy0-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpy1: gpy1 { + gpy1: gpy1-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpy2: gpy2 { + gpy2: gpy2-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpy3: gpy3 { + gpy3: gpy3-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpy4: gpy4 { + gpy4: gpy4-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpy5: gpy5 { + gpy5: gpy5-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpy6: gpy6 { + gpy6: gpy6-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpy7: gpy7 { + gpy7: gpy7-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpx0: gpx0 { + gpx0: gpx0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -244,7 +244,7 @@ <27 1>; }; - gpx1: gpx1 { + gpx1: gpx1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -261,7 +261,7 @@ <31 1>; }; - gpx2: gpx2 { + gpx2: gpx2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -269,7 +269,7 @@ #interrupt-cells = <2>; }; - gpx3: gpx3 { + gpx3: gpx3-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -277,210 +277,210 @@ #interrupt-cells = <2>; }; - uart0_data: uart0-data { + uart0_data: uart0-data-pins { samsung,pins = "gpa0-0", "gpa0-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - uart0_fctl: uart0-fctl { + uart0_fctl: uart0-fctl-pins { samsung,pins = "gpa0-2", "gpa0-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - uart1_data: uart1-data { + uart1_data: uart1-data-pins { samsung,pins = "gpa0-4", "gpa0-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - uart1_fctl: uart1-fctl { + uart1_fctl: uart1-fctl-pins { samsung,pins = "gpa0-6", "gpa0-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - i2c2_bus: i2c2-bus { + i2c2_bus: i2c2-bus-pins { samsung,pins = "gpa0-6", "gpa0-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - uart2_data: uart2-data { + uart2_data: uart2-data-pins { samsung,pins = "gpa1-0", "gpa1-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - uart2_fctl: uart2-fctl { + uart2_fctl: uart2-fctl-pins { samsung,pins = "gpa1-2", "gpa1-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - i2c3_bus: i2c3-bus { + i2c3_bus: i2c3-bus-pins { samsung,pins = "gpa1-2", "gpa1-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - uart3_data: uart3-data { + uart3_data: uart3-data-pins { samsung,pins = "gpa1-4", "gpa1-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - i2c4_hs_bus: i2c4-hs-bus { + i2c4_hs_bus: i2c4-hs-bus-pins { samsung,pins = "gpa2-0", "gpa2-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - i2c5_hs_bus: i2c5-hs-bus { + i2c5_hs_bus: i2c5-hs-bus-pins { samsung,pins = "gpa2-2", "gpa2-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - i2c6_hs_bus: i2c6-hs-bus { + i2c6_hs_bus: i2c6-hs-bus-pins { samsung,pins = "gpb1-3", "gpb1-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_4>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - pwm0_out: pwm0-out { + pwm0_out: pwm0-out-pins { samsung,pins = "gpb2-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - pwm1_out: pwm1-out { + pwm1_out: pwm1-out-pins { samsung,pins = "gpb2-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - pwm2_out: pwm2-out { + pwm2_out: pwm2-out-pins { samsung,pins = "gpb2-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - pwm3_out: pwm3-out { + pwm3_out: pwm3-out-pins { samsung,pins = "gpb2-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - i2c7_hs_bus: i2c7-hs-bus { + i2c7_hs_bus: i2c7-hs-bus-pins { samsung,pins = "gpb2-2", "gpb2-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - i2c0_bus: i2c0-bus { + i2c0_bus: i2c0-bus-pins { samsung,pins = "gpb3-0", "gpb3-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - i2c1_bus: i2c1-bus { + i2c1_bus: i2c1-bus-pins { samsung,pins = "gpb3-2", "gpb3-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - sd0_clk: sd0-clk { + sd0_clk: sd0-clk-pins { samsung,pins = "gpc0-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; }; - sd0_cmd: sd0-cmd { + sd0_cmd: sd0-cmd-pins { samsung,pins = "gpc0-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; }; - sd0_cd: sd0-cd { + sd0_cd: sd0-cd-pins { samsung,pins = "gpc0-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; }; - sd0_bus1: sd0-bus-width1 { + sd0_bus1: sd0-bus-width1-pins { samsung,pins = "gpc0-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; }; - sd0_bus4: sd0-bus-width4 { + sd0_bus4: sd0-bus-width4-pins { samsung,pins = "gpc0-4", "gpc0-5", "gpc0-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; }; - sd2_clk: sd2-clk { + sd2_clk: sd2-clk-pins { samsung,pins = "gpc2-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; }; - sd2_cmd: sd2-cmd { + sd2_cmd: sd2-cmd-pins { samsung,pins = "gpc2-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; }; - sd2_cd: sd2-cd { + sd2_cd: sd2-cd-pins { samsung,pins = "gpc2-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; }; - sd2_bus1: sd2-bus-width1 { + sd2_bus1: sd2-bus-width1-pins { samsung,pins = "gpc2-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; }; - sd2_bus4: sd2-bus-width4 { + sd2_bus4: sd2-bus-width4-pins { samsung,pins = "gpc2-4", "gpc2-5", "gpc2-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; }; - sd0_bus8: sd0-bus-width8 { + sd0_bus8: sd0-bus-width8-pins { samsung,pins = "gpc3-0", "gpc3-1", "gpc3-2", "gpc3-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; @@ -489,7 +489,7 @@ }; &pinctrl_1 { - gpj0: gpj0 { + gpj0: gpj0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -497,7 +497,7 @@ #interrupt-cells = <2>; }; - gpj1: gpj1 { + gpj1: gpj1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -505,7 +505,7 @@ #interrupt-cells = <2>; }; - gpj2: gpj2 { + gpj2: gpj2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -513,7 +513,7 @@ #interrupt-cells = <2>; }; - gpj3: gpj3 { + gpj3: gpj3-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -521,7 +521,7 @@ #interrupt-cells = <2>; }; - gpj4: gpj4 { + gpj4: gpj4-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -529,7 +529,7 @@ #interrupt-cells = <2>; }; - gpk0: gpk0 { + gpk0: gpk0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -537,7 +537,7 @@ #interrupt-cells = <2>; }; - gpk1: gpk1 { + gpk1: gpk1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -545,7 +545,7 @@ #interrupt-cells = <2>; }; - gpk2: gpk2 { + gpk2: gpk2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -553,7 +553,7 @@ #interrupt-cells = <2>; }; - gpk3: gpk3 { + gpk3: gpk3-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -561,28 +561,28 @@ #interrupt-cells = <2>; }; - usb3_1_oc: usb3-1-oc { + usb3_1_oc: usb3-1-oc-pins { samsung,pins = "gpk2-4", "gpk2-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - usb3_1_vbusctrl: usb3-1-vbusctrl { + usb3_1_vbusctrl: usb3-1-vbusctrl-pins { samsung,pins = "gpk2-6", "gpk2-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - usb3_0_oc: usb3-0-oc { + usb3_0_oc: usb3-0-oc-pins { samsung,pins = "gpk3-0", "gpk3-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - usb3_0_vbusctrl: usb3-0-vbusctrl { + usb3_0_vbusctrl: usb3-0-vbusctrl-pins { samsung,pins = "gpk3-2", "gpk3-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; @@ -591,7 +591,7 @@ }; &pinctrl_2 { - gpv0: gpv0 { + gpv0: gpv0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -599,7 +599,7 @@ #interrupt-cells = <2>; }; - gpv1: gpv1 { + gpv1: gpv1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -607,7 +607,7 @@ #interrupt-cells = <2>; }; - gpv2: gpv2 { + gpv2: gpv2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -615,7 +615,7 @@ #interrupt-cells = <2>; }; - gpv3: gpv3 { + gpv3: gpv3-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -623,7 +623,7 @@ #interrupt-cells = <2>; }; - gpv4: gpv4 { + gpv4: gpv4-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -633,7 +633,7 @@ }; &pinctrl_3 { - gpz: gpz { + gpz: gpz-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -641,7 +641,7 @@ #interrupt-cells = <2>; }; - audi2s0_bus: audi2s0-bus { + audi2s0_bus: audi2s0-bus-pins { samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3", "gpz-4"; samsung,pin-function = <2>; diff --git a/dts/src/arm/exynos5410-smdk5410.dts b/dts/src/arm/exynos5410-smdk5410.dts index 2a3ade77a2..b8f953c41c 100644 --- a/dts/src/arm/exynos5410-smdk5410.dts +++ b/dts/src/arm/exynos5410-smdk5410.dts @@ -41,6 +41,19 @@ reg = <0x02037000 0x1000>; }; + vdd10_usb3: voltage-regulator-0 { + compatible = "regulator-fixed"; + regulator-name = "VDD10_USB3"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + }; + + vdd33_usb3: voltage-regulator-0 { + compatible = "regulator-fixed"; + regulator-name = "VDD33_USB3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; }; &mmc_0 { @@ -66,14 +79,14 @@ }; &pinctrl_0 { - srom_ctl: srom-ctl { + srom_ctl: srom-ctl-pins { samsung,pins = "gpy0-3", "gpy0-4", "gpy0-5", "gpy1-0", "gpy1-1", "gpy1-2", "gpy1-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - srom_ebi: srom-ebi { + srom_ebi: srom-ebi-pins { samsung,pins = "gpy3-0", "gpy3-1", "gpy3-2", "gpy3-3", "gpy3-4", "gpy3-5", "gpy3-6", "gpy3-7", "gpy5-0", "gpy5-1", "gpy5-2", "gpy5-3", @@ -121,3 +134,13 @@ &serial_2 { status = "okay"; }; + +&usbdrd3_0 { + vdd10-supply = <&vdd10_usb3>; + vdd33-supply = <&vdd33_usb3>; +}; + +&usbdrd3_1 { + vdd10-supply = <&vdd10_usb3>; + vdd33-supply = <&vdd33_usb3>; +}; diff --git a/dts/src/arm/exynos5410.dtsi b/dts/src/arm/exynos5410.dtsi index 584ce62361..4d797a9abb 100644 --- a/dts/src/arm/exynos5410.dtsi +++ b/dts/src/arm/exynos5410.dtsi @@ -189,7 +189,7 @@ interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; }; - pdma0: pdma@121a0000 { + pdma0: dma-controller@121a0000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x121a0000 0x1000>; interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; @@ -200,7 +200,7 @@ #dma-requests = <32>; }; - pdma1: pdma@121b0000 { + pdma1: dma-controller@121b0000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x121b0000 0x1000>; interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; diff --git a/dts/src/arm/exynos5420-arndale-octa.dts b/dts/src/arm/exynos5420-arndale-octa.dts index dfc7f14f57..946b791faf 100644 --- a/dts/src/arm/exynos5420-arndale-octa.dts +++ b/dts/src/arm/exynos5420-arndale-octa.dts @@ -808,7 +808,7 @@ }; &pinctrl_0 { - s2mps11_irq: s2mps11-irq { + s2mps11_irq: s2mps11-irq-pins { samsung,pins = "gpx3-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_F>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; @@ -825,3 +825,13 @@ &usbdrd_dwc3_1 { dr_mode = "host"; }; + +&usbdrd3_0 { + vdd10-supply = <&ldo11_reg>; + vdd33-supply = <&ldo9_reg>; +}; + +&usbdrd3_1 { + vdd10-supply = <&ldo11_reg>; + vdd33-supply = <&ldo9_reg>; +}; diff --git a/dts/src/arm/exynos5420-chagall-wifi.dts b/dts/src/arm/exynos5420-chagall-wifi.dts new file mode 100644 index 0000000000..1319344a2c --- /dev/null +++ b/dts/src/arm/exynos5420-chagall-wifi.dts @@ -0,0 +1,75 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Samsung's Exynos5420 Chagall WiFi board device tree source + * + * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * Copyright (c) 2022 Henrik Grimler + */ + +/dts-v1/; +#include "exynos5420-galaxy-tab-common.dtsi" + +/ { + model = "Samsung Chagall WiFi based on Exynos5420"; + compatible = "samsung,chagall-wifi", "samsung,exynos5420", \ + "samsung,exynos5"; +}; + +&ldo15_reg { + /* Unused */ + regulator-name = "VDD_LDO15"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; +}; + +&ldo17_reg { + regulator-name = "VDD_IRLED_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3350000>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; +}; + +&ldo28_reg { + /* Unused */ + regulator-name = "VDD_LDO28"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; +}; + +&ldo29_reg { + regulator-name = "VDD_TCON_1V8"; + regulator-min-microvolt = <1900000>; + regulator-max-microvolt = <1900000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; +}; + +&ldo31_reg { + regulator-name = "VDD_GRIP_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; +}; + +&ldo32_reg { + regulator-name = "VDD_TSP_1V8"; + regulator-min-microvolt = <1900000>; + regulator-max-microvolt = <1900000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; +}; diff --git a/dts/src/arm/exynos5420-galaxy-tab-common.dtsi b/dts/src/arm/exynos5420-galaxy-tab-common.dtsi new file mode 100644 index 0000000000..d19bc3d266 --- /dev/null +++ b/dts/src/arm/exynos5420-galaxy-tab-common.dtsi @@ -0,0 +1,691 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Base DT for Samsung's family of tablets based on Exynos5420. + * + * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * Copyright (c) 2022 Henrik Grimler + */ + +/dts-v1/; +#include "exynos5420.dtsi" +#include "exynos5420-cpus.dtsi" +#include <dt-bindings/input/input.h> +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/clock/samsung,s2mps11.h> + +/ { + chassis-type = "tablet"; + + /* + * To successfully boot the mainline kernel with the stock + * bootloader (SBOOT), the tlb needs to be flushed after the + * page table pointer has been updated in __common_mmu_cache_on. + * The same hack is also needed to boot exynos4412-i9300 with + * stock bootloader, and probably other Samsung devices of + * similar age. See + * https://lore.kernel.org/all/1355276466-18295-1-git-send-email-arve@android.com + * for more details. + */ + + chosen { + stdout-path = "serial2:115200n8"; + }; + + memory@20000000 { + device_type = "memory"; + reg = <0x20000000 0xc0000000>; + }; + + firmware@2073000 { + compatible = "samsung,secure-firmware"; + reg = <0x02073000 0x1000>; + }; + + fixed-rate-clocks { + oscclk { + compatible = "samsung,exynos5420-oscclk"; + clock-frequency = <24000000>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + + key-power { + debounce-interval = <10>; + gpios = <&gpx2 2 GPIO_ACTIVE_LOW>; + label = "Power"; + linux,code = <KEY_POWER>; + wakeup-source; + }; + + key-home { + debounce-interval = <10>; + gpios = <&gpx0 5 GPIO_ACTIVE_LOW>; + label = "Home"; + linux,code = <KEY_HOME>; + wakeup-source; + }; + + key-volume-up { + debounce-interval = <10>; + gpios = <&gpx0 2 GPIO_ACTIVE_LOW>; + label = "Volume Up"; + linux,code = <KEY_VOLUMEUP>; + }; + + key-volume-down { + debounce-interval = <10>; + gpios = <&gpx0 3 GPIO_ACTIVE_LOW>; + label = "Volume Down"; + linux,code = <KEY_VOLUMEDOWN>; + }; + }; +}; + +&cci { + /* CCI is disabled in hardware */ + status = "disabled"; +}; + +&cpu0 { + cpu-supply = <&buck2_reg>; +}; + +&cpu4 { + cpu-supply = <&buck6_reg>; +}; + +&gpu { + status = "okay"; + mali-supply = <&buck4_reg>; +}; + +&hsi2c_7 { + status = "okay"; + + pmic@66 { + compatible = "samsung,s2mps11-pmic"; + reg = <0x66>; + + interrupt-parent = <&gpx3>; + interrupts = <2 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&s2mps11_irq>; + + s2mps11_osc: clocks { + compatible = "samsung,s2mps11-clk"; + #clock-cells = <1>; + clock-output-names = "s2mps11_ap", "s2mps11_cp", + "s2mps11_bt"; + }; + + regulators { + buck1_reg: BUCK1 { + regulator-name = "VDD_MIF_1V1"; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1300000>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + buck2_reg: BUCK2 { + regulator-name = "VDD_ARM_1V0"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + buck3_reg: BUCK3 { + regulator-name = "VDD_INT_1V0"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1400000>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + buck4_reg: BUCK4 { + regulator-name = "VDD_G3D_1V0"; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1400000>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + buck5_reg: BUCK5 { + regulator-name = "VDD_MEM_1V2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + + }; + + buck6_reg: BUCK6 { + regulator-name = "VDD_KFC_1V0"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + buck7_reg: BUCK7 { + regulator-name = "VIN_LLDO_1V4"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + }; + + buck8_reg: BUCK8 { + regulator-name = "VIN_MLDO_2V0"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2100000>; + regulator-always-on; + }; + + buck9_reg: BUCK9 { + regulator-name = "VIN_HLDO_3V5"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3500000>; + regulator-always-on; + }; + + buck10_reg: BUCK10 { + regulator-name = "VDD_CAM_ISP_1V0"; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <3550000>; + }; + + ldo1_reg: LDO1 { + regulator-name = "VDD_ALIVE_1.0V"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + }; + + ldo2_reg: LDO2 { + regulator-name = "VDD_APIO_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + ldo3_reg: LDO3 { + regulator-name = "VDD_APIO_MMC01_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo4_reg: LDO4 { + regulator-name = "VDD_ADC_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + ldo5_reg: LDO5 { + /* Unused */ + regulator-name = "VDD_LDO5"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + ldo6_reg: LDO6 { + regulator-name = "VDD_MIPI_1V0"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo7_reg: LDO7 { + regulator-name = "VDD_MIPI_PLL_ABB1_18V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo8_reg: LDO8 { + /* Unused */ + regulator-name = "VDD_LDO8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + ldo9_reg: LDO9 { + regulator-name = "VDD_UOTG_3V0"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + ldo10_reg: LDO10 { + regulator-name = "VDDQ_PRE_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + ldo11_reg: LDO11 { + regulator-name = "VDD_HSIC_1V0"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + ldo12_reg: LDO12 { + regulator-name = "VDD_HSIC_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + ldo13_reg: LDO13 { + regulator-name = "VDD_APIO_MMC2_2V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2800000>; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo14_reg: LDO14 { + regulator-name = "VDD_MOTOR_3V0"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo15_reg: LDO15 { + regulator-name = "VDD_LDO15"; + /* + * LDO15 varies between devices and is + * specified in the device dts + */ + }; + + ldo16_reg: LDO16 { + regulator-name = "VDD_AP_2V8"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + ldo17_reg: LDO17 { + regulator-name = "VDD_LDO17"; + /* + * LDO17 varies between devices and is + * specified in the device dts + */ + }; + + ldo18_reg: LDO18 { + /* Unused */ + regulator-name = "VDD_LDO18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + ldo19_reg: LDO19 { + regulator-name = "VDD_VTF_2V8"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo20_reg: LDO20 { + regulator-name = "VDD_CAM1_CAM_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo21_reg: LDO21 { + regulator-name = "VDD_CAM_IO_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo22_reg: LDO22 { + regulator-name = "VDD_CAM0_S_CORE_1V1"; + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1200000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo23_reg: LDO23 { + regulator-name = "VDD_MIFS_1V1"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1100000>; + regulator-always-on; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + ldo24_reg: LDO24 { + regulator-name = "VDD_TSP_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo25_reg: LDO25 { + /* Unused */ + regulator-name = "VDD_LDO25"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3950000>; + }; + + ldo26_reg: LDO26 { + regulator-name = "VDD_CAM0_AF_2V8"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo27_reg: LDO27 { + regulator-name = "VDD_G3DS_1V0"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + ldo28_reg: LDO28 { + regulator-name = "VDD_LDO28"; + /* + * LDO28 varies between devices and is + * specified in the device dts + */ + }; + + ldo29_reg: LDO29 { + regulator-name = "VDD_LDO29"; + /* + * LDO29 varies between devices and is + * specified in the device dts + */ + }; + + ldo30_reg: LDO30 { + regulator-name = "VDD_TOUCH_1V8"; + regulator-min-microvolt = <1900000>; + regulator-max-microvolt = <1900000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo31_reg: LDO31 { + regulator-name = "VDD_LDO31"; + /* + * LDO31 varies between devices and is + * specified in the device dts + */ + }; + + ldo32_reg: LDO32 { + regulator-name = "VDD_LDO32"; + /* + * LDO32 varies between devices and is + * specified in the device dts + */ + }; + + ldo33_reg: LDO33 { + regulator-name = "VDD_MHL_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo34_reg: LDO34 { + regulator-name = "VDD_MHL_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo35_reg: LDO35 { + regulator-name = "VDD_SIL_1V2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo36_reg: LDO36 { + /* Unused */ + regulator-name = "VDD_LDO36"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3950000>; + }; + + ldo37_reg: LDO37 { + /* Unused */ + regulator-name = "VDD_LDO37"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3950000>; + }; + + ldo38_reg: LDO38 { + regulator-name = "VDD_KEY_LED_3V3"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; +}; + +&mixer { + status = "okay"; +}; + +/* Internal storage */ +&mmc_0 { + status = "okay"; + bus-width = <8>; + cap-mmc-highspeed; + card-detect-delay = <200>; + mmc-hs200-1_8v; + non-removable; + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8>; + pinctrl-names = "default"; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-ddr-timing = <0 2>; + samsung,dw-mshc-sdr-timing = <0 4>; + vqmmc-supply = <&ldo3_reg>; +}; + +/* External sdcard */ +&mmc_2 { + status = "okay"; + bus-width = <4>; + cap-sd-highspeed; + card-detect-delay = <200>; + cd-gpios = <&gpx2 4 GPIO_ACTIVE_LOW>; + pinctrl-0 = <&sd2_clk &sd2_cmd &mmc2_cd &sd2_bus1 &sd2_bus4>; + pinctrl-names = "default"; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-ddr-timing = <0 2>; + samsung,dw-mshc-sdr-timing = <0 4>; + sd-uhs-sdr50; + vmmc-supply = <&ldo19_reg>; + vqmmc-supply = <&ldo13_reg>; +}; + +&pinctrl_0 { + mmc2_cd: mmc2-cd-pins { + samsung,pins = "gpx2-4"; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + s2mps11_irq: s2mps11-irq-pins { + samsung,pins = "gpx3-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_F>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; +}; + +&rtc { + status = "okay"; + clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>; + clock-names = "rtc", "rtc_src"; +}; + +&tmu_cpu0 { + vtmu-supply = <&ldo10_reg>; +}; + +&tmu_cpu1 { + vtmu-supply = <&ldo10_reg>; +}; + +&tmu_cpu2 { + vtmu-supply = <&ldo10_reg>; +}; + +&tmu_cpu3 { + vtmu-supply = <&ldo10_reg>; +}; + +&tmu_gpu { + vtmu-supply = <&ldo10_reg>; +}; + +&usbdrd_dwc3_0 { + dr_mode = "peripheral"; +}; + +&usbdrd_dwc3_1 { + dr_mode = "peripheral"; +}; + +&usbdrd3_0 { + vdd33-supply = <&ldo9_reg>; + vdd10-supply = <&ldo11_reg>; +}; + +&usbdrd3_1 { + vdd33-supply = <&ldo9_reg>; + vdd10-supply = <&ldo11_reg>; +}; diff --git a/dts/src/arm/exynos5420-klimt-wifi.dts b/dts/src/arm/exynos5420-klimt-wifi.dts new file mode 100644 index 0000000000..011787b1bb --- /dev/null +++ b/dts/src/arm/exynos5420-klimt-wifi.dts @@ -0,0 +1,75 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Samsung's Exynos5420 Klimt WiFi board device tree source + * + * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * Copyright (c) 2022 Henrik Grimler + */ + +/dts-v1/; +#include "exynos5420-galaxy-tab-common.dtsi" + +/ { + model = "Samsung Klimt WiFi based on Exynos5420"; + compatible = "samsung,klimt-wifi", "samsung,exynos5420", \ + "samsung,exynos5"; +}; + +&ldo15_reg { + /* Unused */ + regulator-name = "VDD_LDO15"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; +}; + +&ldo17_reg { + regulator-name = "VDD_VCI_3V0"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; +}; + +&ldo28_reg { + regulator-name = "VDD3_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; +}; + +&ldo29_reg { + regulator-name = "VDDR_1V6"; + regulator-min-microvolt = <1600000>; + regulator-max-microvolt = <1600000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; +}; + +&ldo31_reg { + /* Unused */ + regulator-name = "VDD_LDO31"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; +}; + +&ldo32_reg { + regulator-name = "VDD_TSP_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; +}; + +&mmc_2 { + sd-uhs-sdr104; +}; diff --git a/dts/src/arm/exynos5420-peach-pit.dts b/dts/src/arm/exynos5420-peach-pit.dts index e76fb104db..d6434ec860 100644 --- a/dts/src/arm/exynos5420-peach-pit.dts +++ b/dts/src/arm/exynos5420-peach-pit.dts @@ -212,7 +212,7 @@ interrupts = <1 IRQ_TYPE_NONE>; pinctrl-names = "default"; pinctrl-0 = <&max77802_irq>, <&pmic_selb>, - <&pmic_dvs_1>, <&pmic_dvs_2>, <&pmic_dvs_3>; + <&pmic_dvs_1>, <&pmic_dvs_2>; wakeup-source; reg = <0x9>; #clock-cells = <1>; @@ -774,14 +774,14 @@ pinctrl-names = "default"; pinctrl-0 = <&mask_tpm_reset>; - wifi_en: wifi-en { + wifi_en: wifi-en-pins { samsung,pins = "gpx0-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - max98090_irq: max98090-irq { + max98090_irq: max98090-irq-pins { samsung,pins = "gpx0-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; @@ -789,7 +789,7 @@ }; /* We need GPX0_6 to be low at sleep time; just keep it low always */ - mask_tpm_reset: mask-tpm-reset { + mask_tpm_reset: mask-tpm-reset-pins { samsung,pins = "gpx0-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; @@ -797,70 +797,70 @@ samsung,pin-val = <0>; }; - tpm_irq: tpm-irq { + tpm_irq: tpm-irq-pins { samsung,pins = "gpx1-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - trackpad_irq: trackpad-irq { + trackpad_irq: trackpad-irq-pins { samsung,pins = "gpx1-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_F>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - power_key_irq: power-key-irq { + power_key_irq: power-key-irq-pins { samsung,pins = "gpx1-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - ec_irq: ec-irq { + ec_irq: ec-irq-pins { samsung,pins = "gpx1-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - tps65090_irq: tps65090-irq { + tps65090_irq: tps65090-irq-pins { samsung,pins = "gpx2-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - dp_hpd_gpio: dp_hpd_gpio { + dp_hpd_gpio: dp-hpd-gpio-pins { samsung,pins = "gpx2-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - max77802_irq: max77802-irq { + max77802_irq: max77802-irq-pins { samsung,pins = "gpx3-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - lid_irq: lid-irq { + lid_irq: lid-irq-pins { samsung,pins = "gpx3-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_F>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - hdmi_hpd_irq: hdmi-hpd-irq { + hdmi_hpd_irq: hdmi-hpd-irq-pins { samsung,pins = "gpx3-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - pmic_dvs_1: pmic-dvs-1 { + pmic_dvs_1: pmic-dvs-1-pins { samsung,pins = "gpy7-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; @@ -868,74 +868,67 @@ }; }; -&pinctrl_1 { - /* Adjust WiFi drive strengths lower for EMI */ - sd1_clk: sd1-clk { - samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>; - }; +/* pinctrl_1 */ +/* Adjust WiFi drive strengths lower for EMI */ +&sd1_bus1 { + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>; +}; - sd1_cmd: sd1-cmd { - samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>; - }; +&sd1_bus4 { + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>; +}; - sd1_bus1: sd1-bus-width1 { - samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>; - }; +&sd1_bus8 { + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>; +}; - sd1_bus4: sd1-bus-width4 { - samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>; - }; +&sd1_clk { + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>; +}; - sd1_bus8: sd1-bus-width8 { - samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>; - }; +&sd1_cmd { + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>; }; &pinctrl_2 { - pmic_dvs_2: pmic-dvs-2 { - samsung,pins = "gpj4-2"; + pmic_dvs_2: pmic-dvs-2-pins { + samsung,pins = "gpj4-2", "gpj4-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; +}; - pmic_dvs_3: pmic-dvs-3 { - samsung,pins = "gpj4-3"; - samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; - samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; - samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; - }; +/* pinctrl_3*/ +/* Drive SPI lines at x2 for better integrity */ +&spi2_bus { + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>; }; &pinctrl_3 { - /* Drive SPI lines at x2 for better integrity */ - spi2-bus { - samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>; - }; - /* Drive SPI chip select at x2 for better integrity */ - ec_spi_cs: ec-spi-cs { + ec_spi_cs: ec-spi-cs-pins { samsung,pins = "gpb1-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>; }; - usb300_vbus_en: usb300-vbus-en { + usb300_vbus_en: usb300-vbus-en-pins { samsung,pins = "gph0-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - usb301_vbus_en: usb301-vbus-en { + usb301_vbus_en: usb301-vbus-en-pins { samsung,pins = "gph0-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - pmic_selb: pmic-selb { + pmic_selb: pmic-selb-pins { samsung,pins = "gph0-2", "gph0-3", "gph0-4", "gph0-5", "gph0-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; @@ -1090,6 +1083,16 @@ vtmu-supply = <&ldo10_reg>; }; +&usbdrd3_0 { + vdd10-supply = <&ldo15_reg>; + vdd33-supply = <&ldo12_reg>; +}; + +&usbdrd3_1 { + vdd10-supply = <&ldo15_reg>; + vdd33-supply = <&ldo12_reg>; +}; + &usbdrd_dwc3_0 { dr_mode = "host"; }; diff --git a/dts/src/arm/exynos5420-pinctrl.dtsi b/dts/src/arm/exynos5420-pinctrl.dtsi index b82af7c896..546ba274f4 100644 --- a/dts/src/arm/exynos5420-pinctrl.dtsi +++ b/dts/src/arm/exynos5420-pinctrl.dtsi @@ -12,7 +12,7 @@ #include <dt-bindings/pinctrl/samsung.h> &pinctrl_0 { - gpy7: gpy7 { + gpy7: gpy7-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -20,7 +20,7 @@ #interrupt-cells = <2>; }; - gpx0: gpx0 { + gpx0: gpx0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -31,7 +31,7 @@ <26 0>, <26 1>, <27 0>, <27 1>; }; - gpx1: gpx1 { + gpx1: gpx1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -42,7 +42,7 @@ <30 0>, <30 1>, <31 0>, <31 1>; }; - gpx2: gpx2 { + gpx2: gpx2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -50,7 +50,7 @@ #interrupt-cells = <2>; }; - gpx3: gpx3 { + gpx3: gpx3-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -58,14 +58,14 @@ #interrupt-cells = <2>; }; - dp_hpd: dp_hpd { + dp_hpd: dp-hpd-pins { samsung,pins = "gpx0-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - hdmi_cec: hdmi-cec { + hdmi_cec: hdmi-cec-pins { samsung,pins = "gpx3-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; @@ -74,7 +74,7 @@ }; &pinctrl_1 { - gpc0: gpc0 { + gpc0: gpc0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -82,7 +82,7 @@ #interrupt-cells = <2>; }; - gpc1: gpc1 { + gpc1: gpc1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -90,7 +90,7 @@ #interrupt-cells = <2>; }; - gpc2: gpc2 { + gpc2: gpc2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -98,7 +98,7 @@ #interrupt-cells = <2>; }; - gpc3: gpc3 { + gpc3: gpc3-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -106,7 +106,7 @@ #interrupt-cells = <2>; }; - gpc4: gpc4 { + gpc4: gpc4-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -114,7 +114,7 @@ #interrupt-cells = <2>; }; - gpd1: gpd1 { + gpd1: gpd1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -122,175 +122,175 @@ #interrupt-cells = <2>; }; - gpy0: gpy0 { + gpy0: gpy0-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpy1: gpy1 { + gpy1: gpy1-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpy2: gpy2 { + gpy2: gpy2-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpy3: gpy3 { + gpy3: gpy3-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpy4: gpy4 { + gpy4: gpy4-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpy5: gpy5 { + gpy5: gpy5-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpy6: gpy6 { + gpy6: gpy6-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - sd0_clk: sd0-clk { + sd0_clk: sd0-clk-pins { samsung,pins = "gpc0-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; }; - sd0_cmd: sd0-cmd { + sd0_cmd: sd0-cmd-pins { samsung,pins = "gpc0-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; }; - sd0_cd: sd0-cd { + sd0_cd: sd0-cd-pins { samsung,pins = "gpc0-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; }; - sd0_bus1: sd0-bus-width1 { + sd0_bus1: sd0-bus-width1-pins { samsung,pins = "gpc0-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; }; - sd0_bus4: sd0-bus-width4 { + sd0_bus4: sd0-bus-width4-pins { samsung,pins = "gpc0-4", "gpc0-5", "gpc0-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; }; - sd0_bus8: sd0-bus-width8 { + sd0_bus8: sd0-bus-width8-pins { samsung,pins = "gpc3-0", "gpc3-1", "gpc3-2", "gpc3-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; }; - sd0_rclk: sd0-rclk { + sd0_rclk: sd0-rclk-pins { samsung,pins = "gpc0-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; }; - sd1_clk: sd1-clk { + sd1_clk: sd1-clk-pins { samsung,pins = "gpc1-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; }; - sd1_cmd: sd1-cmd { + sd1_cmd: sd1-cmd-pins { samsung,pins = "gpc1-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; }; - sd1_cd: sd1-cd { + sd1_cd: sd1-cd-pins { samsung,pins = "gpc1-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; }; - sd1_int: sd1-int { + sd1_int: sd1-int-pins { samsung,pins = "gpd1-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - sd1_bus1: sd1-bus-width1 { + sd1_bus1: sd1-bus-width1-pins { samsung,pins = "gpc1-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; }; - sd1_bus4: sd1-bus-width4 { + sd1_bus4: sd1-bus-width4-pins { samsung,pins = "gpc1-4", "gpc1-5", "gpc1-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; }; - sd1_bus8: sd1-bus-width8 { + sd1_bus8: sd1-bus-width8-pins { samsung,pins = "gpd1-4", "gpd1-5", "gpd1-6", "gpd1-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; }; - sd2_clk: sd2-clk { + sd2_clk: sd2-clk-pins { samsung,pins = "gpc2-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; }; - sd2_cmd: sd2-cmd { + sd2_cmd: sd2-cmd-pins { samsung,pins = "gpc2-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; }; - sd2_cd: sd2-cd { + sd2_cd: sd2-cd-pins { samsung,pins = "gpc2-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; }; - sd2_bus1: sd2-bus-width1 { + sd2_bus1: sd2-bus-width1-pins { samsung,pins = "gpc2-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; }; - sd2_bus4: sd2-bus-width4 { + sd2_bus4: sd2-bus-width4-pins { samsung,pins = "gpc2-4", "gpc2-5", "gpc2-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; }; - sd2_wp: sd2-wp { + sd2_wp: sd2-wp-pins { samsung,pins = "gpc4-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; @@ -299,7 +299,7 @@ }; &pinctrl_2 { - gpe0: gpe0 { + gpe0: gpe0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -307,7 +307,7 @@ #interrupt-cells = <2>; }; - gpe1: gpe1 { + gpe1: gpe1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -315,7 +315,7 @@ #interrupt-cells = <2>; }; - gpf0: gpf0 { + gpf0: gpf0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -323,7 +323,7 @@ #interrupt-cells = <2>; }; - gpf1: gpf1 { + gpf1: gpf1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -331,7 +331,7 @@ #interrupt-cells = <2>; }; - gpg0: gpg0 { + gpg0: gpg0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -339,7 +339,7 @@ #interrupt-cells = <2>; }; - gpg1: gpg1 { + gpg1: gpg1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -347,7 +347,7 @@ #interrupt-cells = <2>; }; - gpg2: gpg2 { + gpg2: gpg2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -355,7 +355,7 @@ #interrupt-cells = <2>; }; - gpj4: gpj4 { + gpj4: gpj4-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -363,7 +363,7 @@ #interrupt-cells = <2>; }; - cam_gpio_a: cam-gpio-a { + cam_gpio_a: cam-gpio-a-pins { samsung,pins = "gpe0-0", "gpe0-1", "gpe0-2", "gpe0-3", "gpe0-4", "gpe0-5", "gpe0-6", "gpe0-7", "gpe1-0", "gpe1-1"; @@ -372,7 +372,7 @@ samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - cam_gpio_b: cam-gpio-b { + cam_gpio_b: cam-gpio-b-pins { samsung,pins = "gpf0-0", "gpf0-1", "gpf0-2", "gpf0-3", "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; @@ -380,42 +380,42 @@ samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - cam_i2c2_bus: cam-i2c2-bus { + cam_i2c2_bus: cam-i2c2-bus-pins { samsung,pins = "gpf0-4", "gpf0-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - cam_spi1_bus: cam-spi1-bus { + cam_spi1_bus: cam-spi1-bus-pins { samsung,pins = "gpe0-4", "gpe0-5", "gpf0-2", "gpf0-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_4>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - cam_i2c1_bus: cam-i2c1-bus { + cam_i2c1_bus: cam-i2c1-bus-pins { samsung,pins = "gpf0-2", "gpf0-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - cam_i2c0_bus: cam-i2c0-bus { + cam_i2c0_bus: cam-i2c0-bus-pins { samsung,pins = "gpf0-0", "gpf0-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - cam_spi0_bus: cam-spi0-bus { + cam_spi0_bus: cam-spi0-bus-pins { samsung,pins = "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - cam_bayrgb_bus: cam-bayrgb-bus { + cam_bayrgb_bus: cam-bayrgb-bus-pins { samsung,pins = "gpg0-0", "gpg0-1", "gpg0-2", "gpg0-3", "gpg0-4", "gpg0-5", "gpg0-6", "gpg0-7", "gpg1-0", "gpg1-1", "gpg1-2", "gpg1-3", @@ -428,7 +428,7 @@ }; &pinctrl_3 { - gpa0: gpa0 { + gpa0: gpa0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -436,7 +436,7 @@ #interrupt-cells = <2>; }; - gpa1: gpa1 { + gpa1: gpa1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -444,7 +444,7 @@ #interrupt-cells = <2>; }; - gpa2: gpa2 { + gpa2: gpa2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -452,7 +452,7 @@ #interrupt-cells = <2>; }; - gpb0: gpb0 { + gpb0: gpb0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -460,7 +460,7 @@ #interrupt-cells = <2>; }; - gpb1: gpb1 { + gpb1: gpb1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -468,7 +468,7 @@ #interrupt-cells = <2>; }; - gpb2: gpb2 { + gpb2: gpb2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -476,7 +476,7 @@ #interrupt-cells = <2>; }; - gpb3: gpb3 { + gpb3: gpb3-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -484,7 +484,7 @@ #interrupt-cells = <2>; }; - gpb4: gpb4 { + gpb4: gpb4-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -492,7 +492,7 @@ #interrupt-cells = <2>; }; - gph0: gph0 { + gph0: gph0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -500,98 +500,98 @@ #interrupt-cells = <2>; }; - uart0_data: uart0-data { + uart0_data: uart0-data-pins { samsung,pins = "gpa0-0", "gpa0-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - uart0_fctl: uart0-fctl { + uart0_fctl: uart0-fctl-pins { samsung,pins = "gpa0-2", "gpa0-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - uart1_data: uart1-data { + uart1_data: uart1-data-pins { samsung,pins = "gpa0-4", "gpa0-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - uart1_fctl: uart1-fctl { + uart1_fctl: uart1-fctl-pins { samsung,pins = "gpa0-6", "gpa0-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - i2c2_bus: i2c2-bus { + i2c2_bus: i2c2-bus-pins { samsung,pins = "gpa0-6", "gpa0-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - uart2_data: uart2-data { + uart2_data: uart2-data-pins { samsung,pins = "gpa1-0", "gpa1-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - uart2_fctl: uart2-fctl { + uart2_fctl: uart2-fctl-pins { samsung,pins = "gpa1-2", "gpa1-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - i2c3_bus: i2c3-bus { + i2c3_bus: i2c3-bus-pins { samsung,pins = "gpa1-2", "gpa1-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - uart3_data: uart3-data { + uart3_data: uart3-data-pins { samsung,pins = "gpa1-4", "gpa1-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - spi0_bus: spi0-bus { + spi0_bus: spi0-bus-pins { samsung,pins = "gpa2-0", "gpa2-1", "gpa2-2", "gpa2-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - spi1_bus: spi1-bus { + spi1_bus: spi1-bus-pins { samsung,pins = "gpa2-4", "gpa2-6", "gpa2-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - i2c4_hs_bus: i2c4-hs-bus { + i2c4_hs_bus: i2c4-hs-bus-pins { samsung,pins = "gpa2-0", "gpa2-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - i2c5_hs_bus: i2c5-hs-bus { + i2c5_hs_bus: i2c5-hs-bus-pins { samsung,pins = "gpa2-2", "gpa2-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - i2s1_bus: i2s1-bus { + i2s1_bus: i2s1-bus-pins { samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3", "gpb0-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; @@ -599,7 +599,7 @@ samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - pcm1_bus: pcm1-bus { + pcm1_bus: pcm1-bus-pins { samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3", "gpb0-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; @@ -607,7 +607,7 @@ samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - i2s2_bus: i2s2-bus { + i2s2_bus: i2s2-bus-pins { samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3", "gpb1-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; @@ -615,7 +615,7 @@ samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - pcm2_bus: pcm2-bus { + pcm2_bus: pcm2-bus-pins { samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3", "gpb1-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; @@ -623,91 +623,91 @@ samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - spdif_bus: spdif-bus { + spdif_bus: spdif-bus-pins { samsung,pins = "gpb1-0", "gpb1-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_4>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - spi2_bus: spi2-bus { + spi2_bus: spi2-bus-pins { samsung,pins = "gpb1-1", "gpb1-3", "gpb1-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_5>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - i2c6_hs_bus: i2c6-hs-bus { + i2c6_hs_bus: i2c6-hs-bus-pins { samsung,pins = "gpb1-3", "gpb1-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_4>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - pwm0_out: pwm0-out { + pwm0_out: pwm0-out-pins { samsung,pins = "gpb2-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - pwm1_out: pwm1-out { + pwm1_out: pwm1-out-pins { samsung,pins = "gpb2-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - pwm2_out: pwm2-out { + pwm2_out: pwm2-out-pins { samsung,pins = "gpb2-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - pwm3_out: pwm3-out { + pwm3_out: pwm3-out-pins { samsung,pins = "gpb2-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - i2c7_hs_bus: i2c7-hs-bus { + i2c7_hs_bus: i2c7-hs-bus-pins { samsung,pins = "gpb2-2", "gpb2-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - i2c0_bus: i2c0-bus { + i2c0_bus: i2c0-bus-pins { samsung,pins = "gpb3-0", "gpb3-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - i2c1_bus: i2c1-bus { + i2c1_bus: i2c1-bus-pins { samsung,pins = "gpb3-2", "gpb3-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - i2c8_hs_bus: i2c8-hs-bus { + i2c8_hs_bus: i2c8-hs-bus-pins { samsung,pins = "gpb3-4", "gpb3-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - i2c9_hs_bus: i2c9-hs-bus { + i2c9_hs_bus: i2c9-hs-bus-pins { samsung,pins = "gpb3-6", "gpb3-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - i2c10_hs_bus: i2c10-hs-bus { + i2c10_hs_bus: i2c10-hs-bus-pins { samsung,pins = "gpb4-0", "gpb4-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; @@ -716,7 +716,7 @@ }; &pinctrl_4 { - gpz: gpz { + gpz: gpz-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -724,7 +724,7 @@ #interrupt-cells = <2>; }; - i2s0_bus: i2s0-bus { + i2s0_bus: i2s0-bus-pins { samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3", "gpz-4", "gpz-5", "gpz-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; diff --git a/dts/src/arm/exynos5420-smdk5420.dts b/dts/src/arm/exynos5420-smdk5420.dts index a4f0e3ffed..4d7b6d9008 100644 --- a/dts/src/arm/exynos5420-smdk5420.dts +++ b/dts/src/arm/exynos5420-smdk5420.dts @@ -124,6 +124,9 @@ hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&hdmi_hpd_irq>; + vdd-supply = <&ldo6_reg>; + vdd_osc-supply = <&ldo7_reg>; + vdd_pll-supply = <&ldo6_reg>; }; &hsi2c_4 { @@ -377,7 +380,7 @@ }; &pinctrl_0 { - hdmi_hpd_irq: hdmi-hpd-irq { + hdmi_hpd_irq: hdmi-hpd-irq-pins { samsung,pins = "gpx3-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; @@ -386,14 +389,14 @@ }; &pinctrl_2 { - usb300_vbus_en: usb300-vbus-en { + usb300_vbus_en: usb300-vbus-en-pins { samsung,pins = "gpg0-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - usb301_vbus_en: usb301-vbus-en { + usb301_vbus_en: usb301-vbus-en-pins { samsung,pins = "gpg1-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; @@ -407,6 +410,16 @@ clock-names = "rtc", "rtc_src"; }; +&usbdrd3_0 { + vdd10-supply = <&ldo11_reg>; + vdd33-supply = <&ldo9_reg>; +}; + +&usbdrd3_1 { + vdd10-supply = <&ldo11_reg>; + vdd33-supply = <&ldo9_reg>; +}; + &usbdrd_phy0 { vbus-supply = <&usb300_vbus_reg>; }; diff --git a/dts/src/arm/exynos5420.dtsi b/dts/src/arm/exynos5420.dtsi index e23e8ffb09..21b6087050 100644 --- a/dts/src/arm/exynos5420.dtsi +++ b/dts/src/arm/exynos5420.dtsi @@ -302,8 +302,8 @@ clocks = <&clock CLK_PCLK_PPMU_DREX0_0>; clock-names = "ppmu"; events { - ppmu_event3_dmc0_0: ppmu-event3-dmc0_0 { - event-name = "ppmu-event3-dmc0_0"; + ppmu_event3_dmc0_0: ppmu-event3-dmc0-0 { + event-name = "ppmu-event3-dmc0-0"; }; }; }; @@ -314,8 +314,8 @@ clocks = <&clock CLK_PCLK_PPMU_DREX0_1>; clock-names = "ppmu"; events { - ppmu_event3_dmc0_1: ppmu-event3-dmc0_1 { - event-name = "ppmu-event3-dmc0_1"; + ppmu_event3_dmc0_1: ppmu-event3-dmc0-1 { + event-name = "ppmu-event3-dmc0-1"; }; }; }; @@ -326,8 +326,8 @@ clocks = <&clock CLK_PCLK_PPMU_DREX1_0>; clock-names = "ppmu"; events { - ppmu_event3_dmc1_0: ppmu-event3-dmc1_0 { - event-name = "ppmu-event3-dmc1_0"; + ppmu_event3_dmc1_0: ppmu-event3-dmc1-0 { + event-name = "ppmu-event3-dmc1-0"; }; }; }; @@ -338,8 +338,8 @@ clocks = <&clock CLK_PCLK_PPMU_DREX1_1>; clock-names = "ppmu"; events { - ppmu_event3_dmc1_1: ppmu-event3-dmc1_1 { - event-name = "ppmu-event3-dmc1_1"; + ppmu_event3_dmc1_1: ppmu-event3-dmc1-1 { + event-name = "ppmu-event3-dmc1-1"; }; }; }; @@ -430,7 +430,7 @@ power-domains = <&mau_pd>; }; - adma: adma@3880000 { + adma: dma-controller@3880000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x03880000 0x1000>; interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; @@ -442,7 +442,7 @@ power-domains = <&mau_pd>; }; - pdma0: pdma@121a0000 { + pdma0: dma-controller@121a0000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x121A0000 0x1000>; interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; @@ -453,7 +453,7 @@ #dma-requests = <32>; }; - pdma1: pdma@121b0000 { + pdma1: dma-controller@121b0000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x121B0000 0x1000>; interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; @@ -464,7 +464,7 @@ #dma-requests = <32>; }; - mdma0: mdma@10800000 { + mdma0: dma-controller@10800000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x10800000 0x1000>; interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; @@ -475,7 +475,7 @@ #dma-requests = <1>; }; - mdma1: mdma@11c10000 { + mdma1: dma-controller@11c10000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x11C10000 0x1000>; interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>; diff --git a/dts/src/arm/exynos5422-odroid-core.dtsi b/dts/src/arm/exynos5422-odroid-core.dtsi index e7958dbecf..2f65dcf6ba 100644 --- a/dts/src/arm/exynos5422-odroid-core.dtsi +++ b/dts/src/arm/exynos5422-odroid-core.dtsi @@ -358,7 +358,7 @@ tCKESR-min-tck = <2>; tMRD-min-tck = <5>; - timings_samsung_K3QF2F20DB_800mhz: lpddr3-timings@800000000 { + timings_samsung_K3QF2F20DB_800mhz: timings@800000000 { compatible = "jedec,lpddr3-timings"; /* workaround: 'reg' shows max-freq */ reg = <800000000>; @@ -999,7 +999,7 @@ }; &pinctrl_0 { - s2mps11_irq: s2mps11-irq { + s2mps11_irq: s2mps11-irq-pins { samsung,pins = "gpx0-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_F>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; diff --git a/dts/src/arm/exynos5422-odroidxu3-common.dtsi b/dts/src/arm/exynos5422-odroidxu3-common.dtsi index e35af40a55..a6961ff240 100644 --- a/dts/src/arm/exynos5422-odroidxu3-common.dtsi +++ b/dts/src/arm/exynos5422-odroidxu3-common.dtsi @@ -480,14 +480,14 @@ }; &pinctrl_0 { - power_key: power-key { + power_key: power-key-pins { samsung,pins = "gpx0-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - hdmi_hpd_irq: hdmi-hpd-irq { + hdmi_hpd_irq: hdmi-hpd-irq-pins { samsung,pins = "gpx3-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; @@ -496,7 +496,7 @@ }; &pinctrl_1 { - emmc_nrst_pin: emmc-nrst { + emmc_nrst_pin: emmc-nrst-pins { samsung,pins = "gpd1-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; diff --git a/dts/src/arm/exynos5800-peach-pi.dts b/dts/src/arm/exynos5800-peach-pi.dts index 77013ee586..4ee7628197 100644 --- a/dts/src/arm/exynos5800-peach-pi.dts +++ b/dts/src/arm/exynos5800-peach-pi.dts @@ -221,7 +221,7 @@ interrupts = <1 IRQ_TYPE_NONE>; pinctrl-names = "default"; pinctrl-0 = <&max77802_irq>, <&pmic_selb>, - <&pmic_dvs_1>, <&pmic_dvs_2>, <&pmic_dvs_3>; + <&pmic_dvs_1>, <&pmic_dvs_2>; wakeup-source; reg = <0x9>; #clock-cells = <1>; @@ -756,14 +756,14 @@ pinctrl-names = "default"; pinctrl-0 = <&mask_tpm_reset>; - wifi_en: wifi-en { + wifi_en: wifi-en-pins { samsung,pins = "gpx0-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - max98091_irq: max98091-irq { + max98091_irq: max98091-irq-pins { samsung,pins = "gpx0-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; @@ -771,7 +771,7 @@ }; /* We need GPX0_6 to be low at sleep time; just keep it low always */ - mask_tpm_reset: mask-tpm-reset { + mask_tpm_reset: mask-tpm-reset-pins { samsung,pins = "gpx0-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; @@ -779,70 +779,70 @@ samsung,pin-val = <0>; }; - tpm_irq: tpm-irq { + tpm_irq: tpm-irq-pins { samsung,pins = "gpx1-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - trackpad_irq: trackpad-irq { + trackpad_irq: trackpad-irq-pins { samsung,pins = "gpx1-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_F>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - power_key_irq: power-key-irq { + power_key_irq: power-key-irq-pins { samsung,pins = "gpx1-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - ec_irq: ec-irq { + ec_irq: ec-irq-pins { samsung,pins = "gpx1-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - tps65090_irq: tps65090-irq { + tps65090_irq: tps65090-irq-pins { samsung,pins = "gpx2-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - dp_hpd_gpio: dp_hpd_gpio { + dp_hpd_gpio: dp-hpd-gpio-pins { samsung,pins = "gpx2-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - max77802_irq: max77802-irq { + max77802_irq: max77802-irq-pins { samsung,pins = "gpx3-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - lid_irq: lid-irq { + lid_irq: lid-irq-pins { samsung,pins = "gpx3-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_F>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - hdmi_hpd_irq: hdmi-hpd-irq { + hdmi_hpd_irq: hdmi-hpd-irq-pins { samsung,pins = "gpx3-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - pmic_dvs_1: pmic-dvs-1 { + pmic_dvs_1: pmic-dvs-1-pins { samsung,pins = "gpy7-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; @@ -850,74 +850,67 @@ }; }; -&pinctrl_1 { - /* Adjust WiFi drive strengths lower for EMI */ - sd1_clk: sd1-clk { - samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>; - }; +/* pinctrl_1 */ +/* Adjust WiFi drive strengths lower for EMI */ +&sd1_bus1 { + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>; +}; - sd1_cmd: sd1-cmd { - samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>; - }; +&sd1_bus4 { + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>; +}; - sd1_bus1: sd1-bus-width1 { - samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>; - }; +&sd1_bus8 { + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>; +}; - sd1_bus4: sd1-bus-width4 { - samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>; - }; +&sd1_clk { + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>; +}; - sd1_bus8: sd1-bus-width8 { - samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>; - }; +&sd1_cmd { + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>; }; &pinctrl_2 { - pmic_dvs_2: pmic-dvs-2 { - samsung,pins = "gpj4-2"; + pmic_dvs_2: pmic-dvs-2-pins { + samsung,pins = "gpj4-2", "gpj4-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; +}; - pmic_dvs_3: pmic-dvs-3 { - samsung,pins = "gpj4-3"; - samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; - samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; - samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; - }; +/* pinctrl_3*/ +/* Drive SPI lines at x2 for better integrity */ +&spi2_bus { + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>; }; &pinctrl_3 { - /* Drive SPI lines at x2 for better integrity */ - spi2-bus { - samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>; - }; - /* Drive SPI chip select at x2 for better integrity */ - ec_spi_cs: ec-spi-cs { + ec_spi_cs: ec-spi-cs-pins { samsung,pins = "gpb1-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>; }; - usb300_vbus_en: usb300-vbus-en { + usb300_vbus_en: usb300-vbus-en-pins { samsung,pins = "gph0-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - usb301_vbus_en: usb301-vbus-en { + usb301_vbus_en: usb301-vbus-en-pins { samsung,pins = "gph0-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; - pmic_selb: pmic-selb { + pmic_selb: pmic-selb-pins { samsung,pins = "gph0-2", "gph0-3", "gph0-4", "gph0-5", "gph0-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; @@ -1072,6 +1065,16 @@ vtmu-supply = <&ldo10_reg>; }; +&usbdrd3_0 { + vdd10-supply = <&ldo15_reg>; + vdd33-supply = <&ldo12_reg>; +}; + +&usbdrd3_1 { + vdd10-supply = <&ldo15_reg>; + vdd33-supply = <&ldo12_reg>; +}; + &usbdrd_dwc3_0 { dr_mode = "host"; }; diff --git a/dts/src/arm/imx28-tx28.dts b/dts/src/arm/imx28-tx28.dts index 9e5651c7ea..6d7b044fec 100644 --- a/dts/src/arm/imx28-tx28.dts +++ b/dts/src/arm/imx28-tx28.dts @@ -338,7 +338,7 @@ }; ds1339: rtc@68 { - compatible = "mxim,ds1339"; + compatible = "dallas,ds1339"; reg = <0x68>; trickle-resistor-ohms = <250>; trickle-diode-disable; diff --git a/dts/src/arm/imx28.dtsi b/dts/src/arm/imx28.dtsi index 84d0176d51..130b4145af 100644 --- a/dts/src/arm/imx28.dtsi +++ b/dts/src/arm/imx28.dtsi @@ -110,6 +110,8 @@ interrupt-names = "bch"; clocks = <&clks 50>; clock-names = "gpmi_io"; + assigned-clocks = <&clks 13>; + assigned-clock-parents = <&clks 10>; dmas = <&dma_apbh 4>; dma-names = "rx-tx"; status = "disabled"; diff --git a/dts/src/arm/imx51-ts4800.dts b/dts/src/arm/imx51-ts4800.dts index 6ecb83e7f3..85654d6baf 100644 --- a/dts/src/arm/imx51-ts4800.dts +++ b/dts/src/arm/imx51-ts4800.dts @@ -102,7 +102,7 @@ pinctrl-0 = <&pinctrl_i2c2>; status = "okay"; - rtc: m41t00@68 { + rtc: rtc@68 { compatible = "st,m41t00"; reg = <0x68>; }; diff --git a/dts/src/arm/imx53-m53menlo.dts b/dts/src/arm/imx53-m53menlo.dts index 4f88e96d81..d5c68d1ea7 100644 --- a/dts/src/arm/imx53-m53menlo.dts +++ b/dts/src/arm/imx53-m53menlo.dts @@ -53,6 +53,31 @@ }; }; + lvds-decoder { + compatible = "ti,ds90cf364a", "lvds-decoder"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + lvds_decoder_in: endpoint { + remote-endpoint = <&lvds0_out>; + }; + }; + + port@1 { + reg = <1>; + + lvds_decoder_out: endpoint { + remote-endpoint = <&panel_in>; + }; + }; + }; + }; + panel { compatible = "edt,etm0700g0dh6"; pinctrl-0 = <&pinctrl_display_gpio>; @@ -61,7 +86,7 @@ port { panel_in: endpoint { - remote-endpoint = <&lvds0_out>; + remote-endpoint = <&lvds_decoder_out>; }; }; }; @@ -450,7 +475,7 @@ reg = <2>; lvds0_out: endpoint { - remote-endpoint = <&panel_in>; + remote-endpoint = <&lvds_decoder_in>; }; }; }; diff --git a/dts/src/arm/imx53-tx53.dtsi b/dts/src/arm/imx53-tx53.dtsi index 81c2726a32..8712e98514 100644 --- a/dts/src/arm/imx53-tx53.dtsi +++ b/dts/src/arm/imx53-tx53.dtsi @@ -241,7 +241,7 @@ clock-frequency = <400000>; status = "okay"; - rtc1: ds1339@68 { + rtc1: rtc@68 { compatible = "dallas,ds1339"; reg = <0x68>; pinctrl-names = "default"; diff --git a/dts/src/arm/imx6dl-plym2m.dts b/dts/src/arm/imx6dl-plym2m.dts index 60fe5f1466..c4ce23d8ac 100644 --- a/dts/src/arm/imx6dl-plym2m.dts +++ b/dts/src/arm/imx6dl-plym2m.dts @@ -50,6 +50,11 @@ }; }; + iio-hwmon { + compatible = "iio-hwmon"; + io-channels = <&vdiv_vaccu>; + }; + leds { compatible = "gpio-leds"; pinctrl-names = "default"; @@ -101,6 +106,64 @@ regulator-min-microvolt = <12000000>; regulator-max-microvolt = <12000000>; }; + + thermal-zones { + chassis-thermal { + polling-delay = <20000>; + polling-delay-passive = <0>; + thermal-sensors = <&tsens0>; + }; + + touch-thermal0 { + polling-delay = <20000>; + polling-delay-passive = <0>; + thermal-sensors = <&touch_temp0>; + }; + + touch-thermal1 { + polling-delay = <20000>; + polling-delay-passive = <0>; + thermal-sensors = <&touch_temp1>; + }; + }; + + touchscreen { + compatible = "resistive-adc-touch"; + io-channels = <&adc_ts 1>, <&adc_ts 3>, <&adc_ts 4>, + <&adc_ts 5>; + io-channel-names = "y", "z1", "z2", "x"; + touchscreen-min-pressure = <64687>; + touchscreen-inverted-x; + touchscreen-inverted-y; + touchscreen-x-plate-ohms = <300>; + touchscreen-y-plate-ohms = <800>; + }; + + touch_temp0: touch-temperature-sensor0 { + compatible = "generic-adc-thermal"; + #thermal-sensor-cells = <0>; + io-channels = <&adc_ts 0>; + io-channel-names = "sensor-channel"; + temperature-lookup-table = < (-40000) 736 + 85000 474>; + }; + + touch_temp1: touch-temperature-sensor1 { + compatible = "generic-adc-thermal"; + #thermal-sensor-cells = <0>; + io-channels = <&adc_ts 7>; + io-channel-names = "sensor-channel"; + temperature-lookup-table = < (-40000) 826 + 85000 609>; + }; + + vdiv_vaccu: voltage-divider-vaccu { + compatible = "voltage-divider"; + io-channels = <&adc_ts 2>; + output-ohms = <2500>; + full-ohms = <64000>; + #io-channel-cells = <0>; + }; }; &can1 { @@ -129,26 +192,61 @@ pinctrl-0 = <&pinctrl_ecspi2>; status = "okay"; - touchscreen@0 { - compatible = "ti,tsc2046"; + adc_ts: adc@0 { + compatible = "ti,tsc2046e-adc"; reg = <0>; pinctrl-0 = <&pinctrl_tsc2046>; pinctrl-names ="default"; - spi-max-frequency = <100000>; - interrupts-extended = <&gpio3 20 IRQ_TYPE_EDGE_FALLING>; - pendown-gpio = <&gpio3 20 GPIO_ACTIVE_LOW>; + spi-max-frequency = <1000000>; + interrupts-extended = <&gpio3 20 IRQ_TYPE_LEVEL_LOW>; + #io-channel-cells = <1>; - touchscreen-inverted-x; - touchscreen-inverted-y; - touchscreen-max-pressure = <4095>; + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + settling-time-us = <300>; + oversampling-ratio = <5>; + }; - ti,vref-delay-usecs = /bits/ 16 <100>; - ti,x-plate-ohms = /bits/ 16 <800>; - ti,y-plate-ohms = /bits/ 16 <300>; - ti,debounce-max = /bits/ 16 <3>; - ti,debounce-tol = /bits/ 16 <70>; - ti,debounce-rep = /bits/ 16 <3>; - wakeup-source; + channel@1 { + reg = <1>; + settling-time-us = <700>; + oversampling-ratio = <5>; + }; + + channel@2 { + reg = <2>; + settling-time-us = <300>; + oversampling-ratio = <5>; + }; + + channel@3 { + reg = <3>; + settling-time-us = <700>; + oversampling-ratio = <5>; + }; + + channel@4 { + reg = <4>; + settling-time-us = <700>; + oversampling-ratio = <5>; + }; + + channel@5 { + reg = <5>; + settling-time-us = <700>; + oversampling-ratio = <5>; + }; + + /* channel 6 is not connected */ + + channel@7 { + reg = <7>; + settling-time-us = <300>; + oversampling-ratio = <5>; + }; }; }; @@ -233,9 +331,10 @@ pinctrl-0 = <&pinctrl_i2c3>; status = "okay"; - temperature-sensor@70 { + tsens0: temperature-sensor@70 { compatible = "ti,tmp103"; reg = <0x70>; + #thermal-sensor-cells = <0>; }; }; diff --git a/dts/src/arm/imx6dl-prtvt7.dts b/dts/src/arm/imx6dl-prtvt7.dts index 190d26642b..b86deebef7 100644 --- a/dts/src/arm/imx6dl-prtvt7.dts +++ b/dts/src/arm/imx6dl-prtvt7.dts @@ -6,6 +6,7 @@ /dts-v1/; #include "imx6dl.dtsi" #include "imx6qdl-prti6q.dtsi" +#include <dt-bindings/display/sdtv-standards.h> #include <dt-bindings/input/input.h> #include <dt-bindings/leds/common.h> #include <dt-bindings/sound/fsl-imx-audmux.h> @@ -28,6 +29,35 @@ power-supply = <®_bl_12v0>; }; + display { + compatible = "fsl,imx-parallel-display"; + pinctrl-0 = <&pinctrl_ipu1_disp>; + pinctrl-names = "default"; + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + display_in: endpoint { + remote-endpoint = <&ipu1_di0_disp0>; + }; + }; + + port@1 { + reg = <1>; + + display_out: endpoint { + remote-endpoint = <&panel_in>; + }; + }; + }; + + iio-hwmon { + compatible = "iio-hwmon"; + io-channels = <&vdiv_vaccu>; + }; + keys { compatible = "gpio-keys"; autorepeat; @@ -135,6 +165,30 @@ }; }; + panel { + compatible = "innolux,g070y2-t02"; + backlight = <&backlight_lcd>; + power-supply = <®_3v3>; + + port { + panel_in: endpoint { + remote-endpoint = <&display_out>; + }; + }; + }; + + connector { + compatible = "composite-video-connector"; + label = "Composite0"; + sdtv-standards = <SDTV_STD_PAL_B>; + + port { + comp0_out: endpoint { + remote-endpoint = <&tvp5150_comp0_in>; + }; + }; + }; + reg_bl_12v0: regulator-bl-12v0 { compatible = "regulator-fixed"; pinctrl-names = "default"; @@ -146,6 +200,13 @@ enable-active-high; }; + reg_3v3: regulator-3v3 { + compatible = "regulator-fixed"; + regulator-name = "3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + reg_1v8: regulator-1v8 { compatible = "regulator-fixed"; regulator-name = "1v8"; @@ -179,6 +240,64 @@ frame-master; }; }; + + thermal-zones { + chassis-thermal { + polling-delay = <20000>; + polling-delay-passive = <0>; + thermal-sensors = <&tsens0>; + }; + + touch-thermal0 { + polling-delay = <20000>; + polling-delay-passive = <0>; + thermal-sensors = <&touch_temp0>; + }; + + touch-thermal1 { + polling-delay = <20000>; + polling-delay-passive = <0>; + thermal-sensors = <&touch_temp1>; + }; + }; + + touchscreen { + compatible = "resistive-adc-touch"; + io-channels = <&adc_ts 1>, <&adc_ts 3>, <&adc_ts 4>, + <&adc_ts 5>; + io-channel-names = "y", "z1", "z2", "x"; + touchscreen-min-pressure = <64687>; + touchscreen-inverted-x; + touchscreen-inverted-y; + touchscreen-x-plate-ohms = <300>; + touchscreen-y-plate-ohms = <800>; + }; + + touch_temp0: touch-temperature-sensor0 { + compatible = "generic-adc-thermal"; + #thermal-sensor-cells = <0>; + io-channels = <&adc_ts 0>; + io-channel-names = "sensor-channel"; + temperature-lookup-table = < (-40000) 736 + 85000 474>; + }; + + touch_temp1: touch-temperature-sensor1 { + compatible = "generic-adc-thermal"; + #thermal-sensor-cells = <0>; + io-channels = <&adc_ts 7>; + io-channel-names = "sensor-channel"; + temperature-lookup-table = < (-40000) 826 + 85000 609>; + }; + + vdiv_vaccu: voltage-divider-vaccu { + compatible = "voltage-divider"; + io-channels = <&adc_ts 2>; + output-ohms = <2500>; + full-ohms = <64000>; + #io-channel-cells = <0>; + }; }; &audmux { @@ -221,22 +340,41 @@ pinctrl-0 = <&pinctrl_ecspi2>; status = "okay"; - touchscreen@0 { - compatible = "ti,tsc2046"; + adc_ts: adc@0 { + compatible = "ti,tsc2046e-adc"; reg = <0>; pinctrl-0 = <&pinctrl_tsc>; pinctrl-names ="default"; - spi-max-frequency = <100000>; - interrupts-extended = <&gpio3 20 IRQ_TYPE_EDGE_FALLING>; - pendown-gpio = <&gpio3 20 GPIO_ACTIVE_LOW>; - touchscreen-max-pressure = <4095>; - ti,vref-delay-usecs = /bits/ 16 <100>; - ti,x-plate-ohms = /bits/ 16 <800>; - ti,y-plate-ohms = /bits/ 16 <300>; - ti,debounce-max = /bits/ 16 <3>; - ti,debounce-tol = /bits/ 16 <70>; - ti,debounce-rep = /bits/ 16 <3>; - wakeup-source; + spi-max-frequency = <1000000>; + interrupts-extended = <&gpio3 20 IRQ_TYPE_LEVEL_LOW>; + #io-channel-cells = <1>; + + #address-cells = <1>; + #size-cells = <0>; + + channel@1 { + reg = <1>; + settling-time-us = <700>; + oversampling-ratio = <5>; + }; + + channel@3 { + reg = <3>; + settling-time-us = <700>; + oversampling-ratio = <5>; + }; + + channel@4 { + reg = <4>; + settling-time-us = <700>; + oversampling-ratio = <5>; + }; + + channel@5 { + reg = <5>; + settling-time-us = <700>; + oversampling-ratio = <5>; + }; }; }; @@ -252,6 +390,31 @@ VDDIO-supply = <®_3v3>; VDDD-supply = <®_1v8>; }; + + video@5c { + compatible = "ti,tvp5150"; + reg = <0x5c>; + + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + tvp5150_comp0_in: endpoint { + remote-endpoint = <&comp0_out>; + }; + }; + + /* Output port 2 is video output pad */ + port@2 { + reg = <2>; + + tvp5151_to_ipu1_csi0_mux: endpoint { + remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>; + }; + }; + }; }; &i2c3 { @@ -260,6 +423,12 @@ reg = <0x51>; }; + tsens0: temperature-sensor@70 { + compatible = "ti,tmp103"; + reg = <0x70>; + #thermal-sensor-cells = <0>; + }; + gpio_pca: gpio@74 { compatible = "nxp,pca9539"; reg = <0x74>; @@ -275,6 +444,14 @@ status = "okay"; }; +&ipu1_di0_disp0 { + remote-endpoint = <&display_in>; +}; + +&ipu1_csi0_mux_from_parallel_sensor { + remote-endpoint = <&tvp5151_to_ipu1_csi0_mux>; +}; + &pwm1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm1>; diff --git a/dts/src/arm/imx6dl-victgo.dts b/dts/src/arm/imx6dl-victgo.dts index d37ba4ed84..227c952543 100644 --- a/dts/src/arm/imx6dl-victgo.dts +++ b/dts/src/arm/imx6dl-victgo.dts @@ -66,6 +66,11 @@ }; }; + iio-hwmon { + compatible = "iio-hwmon"; + io-channels = <&vdiv_vaccu>, <&vdiv_hitch_pos>; + }; + leds { compatible = "gpio-leds"; pinctrl-names = "default"; @@ -181,6 +186,72 @@ frame-master; }; }; + + thermal-zones { + chassis-thermal { + polling-delay = <20000>; + polling-delay-passive = <0>; + thermal-sensors = <&tsens0>; + }; + + touch-thermal0 { + polling-delay = <20000>; + polling-delay-passive = <0>; + thermal-sensors = <&touch_temp0>; + }; + + touch-thermal1 { + polling-delay = <20000>; + polling-delay-passive = <0>; + thermal-sensors = <&touch_temp1>; + }; + }; + + touchscreen { + compatible = "resistive-adc-touch"; + io-channels = <&adc_ts 1>, <&adc_ts 3>, <&adc_ts 4>, + <&adc_ts 5>; + io-channel-names = "y", "z1", "z2", "x"; + touchscreen-min-pressure = <64687>; + touchscreen-inverted-x; + touchscreen-inverted-y; + touchscreen-x-plate-ohms = <300>; + touchscreen-y-plate-ohms = <800>; + }; + + touch_temp0: touch-temperature-sensor0 { + compatible = "generic-adc-thermal"; + #thermal-sensor-cells = <0>; + io-channels = <&adc_ts 0>; + io-channel-names = "sensor-channel"; + temperature-lookup-table = < (-40000) 736 + 85000 474>; + }; + + touch_temp1: touch-temperature-sensor1 { + compatible = "generic-adc-thermal"; + #thermal-sensor-cells = <0>; + io-channels = <&adc_ts 7>; + io-channel-names = "sensor-channel"; + temperature-lookup-table = < (-40000) 826 + 85000 609>; + }; + + vdiv_vaccu: voltage-divider-vaccu { + compatible = "voltage-divider"; + io-channels = <&adc_ts 2>; + output-ohms = <2500>; + full-ohms = <64000>; + #io-channel-cells = <0>; + }; + + vdiv_hitch_pos: voltage-divider-hitch-pos { + compatible = "voltage-divider"; + io-channels = <&adc_ts 6>; + output-ohms = <3300>; + full-ohms = <13300>; + #io-channel-cells = <0>; + }; }; &audmux { @@ -244,22 +315,41 @@ pinctrl-0 = <&pinctrl_ecspi2>; status = "okay"; - touchscreen@0 { - compatible = "ti,tsc2046"; + adc_ts: adc@0 { + compatible = "ti,tsc2046e-adc"; reg = <0>; - pinctrl-names = "default"; pinctrl-0 = <&pinctrl_touchscreen>; - spi-max-frequency = <200000>; - interrupts-extended = <&gpio5 8 IRQ_TYPE_EDGE_FALLING>; - pendown-gpio = <&gpio5 8 GPIO_ACTIVE_LOW>; - touchscreen-size-x = <800>; - touchscreen-size-y = <480>; - touchscreen-inverted-y; - touchscreen-max-pressure = <4095>; - ti,vref-delay-usecs = /bits/ 16 <100>; - ti,x-plate-ohms = /bits/ 16 <800>; - ti,y-plate-ohms = /bits/ 16 <300>; - wakeup-source; + pinctrl-names ="default"; + spi-max-frequency = <1000000>; + interrupts-extended = <&gpio5 8 IRQ_TYPE_LEVEL_LOW>; + #io-channel-cells = <1>; + + #address-cells = <1>; + #size-cells = <0>; + + channel@1 { + reg = <1>; + settling-time-us = <700>; + oversampling-ratio = <5>; + }; + + channel@3 { + reg = <3>; + settling-time-us = <700>; + oversampling-ratio = <5>; + }; + + channel@4 { + reg = <4>; + settling-time-us = <700>; + oversampling-ratio = <5>; + }; + + channel@5 { + reg = <5>; + settling-time-us = <700>; + oversampling-ratio = <5>; + }; }; }; @@ -446,9 +536,10 @@ reg = <0x51>; }; - temperature-sensor@70 { + tsens0: temperature-sensor@70 { compatible = "ti,tmp103"; reg = <0x70>; + #thermal-sensor-cells = <0>; }; }; diff --git a/dts/src/arm/imx6q-tbs2910.dts b/dts/src/arm/imx6q-tbs2910.dts index 343364d3e4..8daef65d5b 100644 --- a/dts/src/arm/imx6q-tbs2910.dts +++ b/dts/src/arm/imx6q-tbs2910.dts @@ -159,7 +159,7 @@ pinctrl-0 = <&pinctrl_i2c3>; status = "okay"; - rtc: ds1307@68 { + rtc: rtc@68 { compatible = "dallas,ds1307"; reg = <0x68>; }; diff --git a/dts/src/arm/imx6qdl-dhcom-pdk2.dtsi b/dts/src/arm/imx6qdl-dhcom-pdk2.dtsi index dc89b554e6..fe72650295 100644 --- a/dts/src/arm/imx6qdl-dhcom-pdk2.dtsi +++ b/dts/src/arm/imx6qdl-dhcom-pdk2.dtsi @@ -4,7 +4,10 @@ * Copyright (C) 2018 Marek Vasut <marex@denx.de> */ +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> #include <dt-bindings/leds/common.h> +#include <dt-bindings/pwm/pwm.h> / { chosen { diff --git a/dts/src/arm/imx6qdl-mba6.dtsi b/dts/src/arm/imx6qdl-mba6.dtsi index daf76345b1..f4dca20669 100644 --- a/dts/src/arm/imx6qdl-mba6.dtsi +++ b/dts/src/arm/imx6qdl-mba6.dtsi @@ -17,6 +17,7 @@ mmc1 = &usdhc2; /delete-property/ mmc2; /delete-property/ mmc3; + rtc0 = &rtc0; }; chosen { @@ -39,18 +40,21 @@ label = "s6"; linux,code = <KEY_F6>; gpios = <&gpio7 13 GPIO_ACTIVE_LOW>; + wakeup-source; }; button2 { label = "s7"; linux,code = <KEY_F7>; gpios = <&gpio7 12 GPIO_ACTIVE_LOW>; + wakeup-source; }; button3 { label = "s8"; linux,code = <KEY_F8>; gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; + wakeup-source; }; }; @@ -82,6 +86,8 @@ reg_pcie: regulator-pcie { compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_regpcie>; regulator-name = "supply-pcie"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; @@ -392,7 +398,6 @@ pinctrl_hog: hoggrp { fsl,pins = < - /* LCD.CONTRAST -> Rev 0100 only, not used on Rev.0200*/ MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x0001b099 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x0001b099 @@ -433,8 +438,6 @@ MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x001b0f0 /* #PCIE.WAKE */ MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x001b0f0 /* #PCIE.RST */ MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x001b0f0 /* #PCIE.DIS */ - /* HYS = 1, DSE = 110, PUE+PKE, SPEED = HIGH (11)*/ - MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x00130f0 /* PCIE.PWR_EN */ >; }; @@ -459,6 +462,13 @@ >; }; + pinctrl_regpcie: regpciegrp { + fsl,pins = < + /* HYS = 1, DSE = 110, PUE+PKE, SPEED = HIGH (11)*/ + MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x00130f0 /* PCIE.PWR_EN */ + >; + }; + pinctrl_uart2: uart2grp { fsl,pins = < MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b099 diff --git a/dts/src/arm/imx6qdl-mba6a.dtsi b/dts/src/arm/imx6qdl-mba6a.dtsi index a61f2705a3..df8fa169e9 100644 --- a/dts/src/arm/imx6qdl-mba6a.dtsi +++ b/dts/src/arm/imx6qdl-mba6a.dtsi @@ -6,12 +6,6 @@ * Author: Markus Niebel <Markus.Niebel@tq-group.com> */ -/ { - aliases { - rtc0 = &rtc0; - }; -}; - &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>, <&pinctrl_enet_fix>; diff --git a/dts/src/arm/imx6qdl-mba6b.dtsi b/dts/src/arm/imx6qdl-mba6b.dtsi index 9f9f7037c9..7d1cd7454c 100644 --- a/dts/src/arm/imx6qdl-mba6b.dtsi +++ b/dts/src/arm/imx6qdl-mba6b.dtsi @@ -6,12 +6,6 @@ * Author: Markus Niebel <Markus.Niebel@tq-group.com> */ -/ { - aliases { - rtc0 = &rtc0; - }; -}; - &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; @@ -19,8 +13,11 @@ &i2c1 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1>; + pinctrl-1 = <&pinctrl_i2c1_recovery>; + scl-gpios = <&gpio5 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio5 26 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; status = "okay"; }; diff --git a/dts/src/arm/imx6qdl-phytec-pfla02.dtsi b/dts/src/arm/imx6qdl-phytec-pfla02.dtsi index f3236204cb..1f2ba6f625 100644 --- a/dts/src/arm/imx6qdl-phytec-pfla02.dtsi +++ b/dts/src/arm/imx6qdl-phytec-pfla02.dtsi @@ -205,6 +205,19 @@ regulator-always-on; }; }; + + da9063_rtc: rtc { + compatible = "dlg,da9063-rtc"; + }; + + da9063_wdog: watchdog { + compatible = "dlg,da9063-watchdog"; + }; + + onkey { + compatible = "dlg,da9063-onkey"; + status = "disabled"; + }; }; }; diff --git a/dts/src/arm/imx6qdl-phytec-phycore-som.dtsi b/dts/src/arm/imx6qdl-phytec-phycore-som.dtsi index 94b254bfd0..28a8053846 100644 --- a/dts/src/arm/imx6qdl-phytec-phycore-som.dtsi +++ b/dts/src/arm/imx6qdl-phytec-phycore-som.dtsi @@ -116,6 +116,16 @@ dlg,use-sw-pm; }; + thermal { + compatible = "dlg,da9062-thermal"; + status = "disabled"; + }; + + gpio { + compatible = "dlg,da9062-gpio"; + status = "disabled"; + }; + regulators { vdd_arm: buck1 { regulator-name = "vdd_arm"; diff --git a/dts/src/arm/imx6qdl-tqma6.dtsi b/dts/src/arm/imx6qdl-tqma6.dtsi index 51a3a5392c..344ea935c7 100644 --- a/dts/src/arm/imx6qdl-tqma6.dtsi +++ b/dts/src/arm/imx6qdl-tqma6.dtsi @@ -52,6 +52,13 @@ >; }; + pinctrl_i2c1_recovery: i2c1recoverygrp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26 0x4001b899 + MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27 0x4001b899 + >; + }; + pinctrl_i2c3: i2c3grp { fsl,pins = < MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b899 @@ -59,6 +66,13 @@ >; }; + pinctrl_i2c3_recovery: i2c3recoverygrp { + fsl,pins = < + MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x4001b899 + MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x4001b899 + >; + }; + pinctrl_pmic: pmicgrp { fsl,pins = < MX6QDL_PAD_NANDF_RB0__GPIO6_IO10 0x1b099 /* PMIC irq */ diff --git a/dts/src/arm/imx6qdl-tqma6a.dtsi b/dts/src/arm/imx6qdl-tqma6a.dtsi index bfb67da64b..7dc3f0005b 100644 --- a/dts/src/arm/imx6qdl-tqma6a.dtsi +++ b/dts/src/arm/imx6qdl-tqma6a.dtsi @@ -4,6 +4,8 @@ * Copyright 2013-2017 Markus Niebel <Markus.Niebel@tq-group.com> */ +#include <dt-bindings/gpio/gpio.h> + &fec { interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>, <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>; @@ -11,8 +13,11 @@ }; &i2c1 { - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1>; + pinctrl-1 = <&pinctrl_i2c1_recovery>; + scl-gpios = <&gpio5 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio5 26 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; clock-frequency = <100000>; status = "okay"; diff --git a/dts/src/arm/imx6qdl-tqma6b.dtsi b/dts/src/arm/imx6qdl-tqma6b.dtsi index 49c472285c..dd09257664 100644 --- a/dts/src/arm/imx6qdl-tqma6b.dtsi +++ b/dts/src/arm/imx6qdl-tqma6b.dtsi @@ -4,9 +4,14 @@ * Copyright 2013-2017 Markus Niebel <Markus.Niebel@tq-group.com> */ +#include <dt-bindings/gpio/gpio.h> + &i2c3 { - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c3>; + pinctrl-1 = <&pinctrl_i2c3_recovery>; + scl-gpios = <&gpio1 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; clock-frequency = <100000>; status = "okay"; diff --git a/dts/src/arm/imx6qdl-tx6-mb7.dtsi b/dts/src/arm/imx6qdl-tx6-mb7.dtsi index 410972e1dc..99ec7a838f 100644 --- a/dts/src/arm/imx6qdl-tx6-mb7.dtsi +++ b/dts/src/arm/imx6qdl-tx6-mb7.dtsi @@ -85,7 +85,7 @@ }; &i2c3 { - rtc: mcp7940x@6f { + rtc: rtc@6f { compatible = "microchip,mcp7940x"; reg = <0x6f>; }; diff --git a/dts/src/arm/imx6qdl-vicut1.dtsi b/dts/src/arm/imx6qdl-vicut1.dtsi index b9e305774f..1ac7e13249 100644 --- a/dts/src/arm/imx6qdl-vicut1.dtsi +++ b/dts/src/arm/imx6qdl-vicut1.dtsi @@ -126,15 +126,6 @@ regulator-max-microvolt = <3300000>; }; - reg_h1_vbus: regulator-h1-vbus { - compatible = "regulator-fixed"; - regulator-name = "h1-vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - reg_otg_vbus: regulator-otg-vbus { compatible = "regulator-fixed"; regulator-name = "otg-vbus"; @@ -212,6 +203,8 @@ &can1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_can1>; + termination-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>; + termination-ohms = <150>; status = "okay"; }; @@ -492,7 +485,6 @@ }; &usbh1 { - vbus-supply = <®_h1_vbus>; pinctrl-names = "default"; phy_type = "utmi"; dr_mode = "host"; diff --git a/dts/src/arm/imx6qp-sabresd.dts b/dts/src/arm/imx6qp-sabresd.dts index 480e73183f..f69eec18d8 100644 --- a/dts/src/arm/imx6qp-sabresd.dts +++ b/dts/src/arm/imx6qp-sabresd.dts @@ -50,8 +50,12 @@ }; }; +&vgen3_reg { + regulator-always-on; +}; + &pcie { - status = "disabled"; + status = "okay"; }; &sata { diff --git a/dts/src/arm/imx6sx-udoo-neo.dtsi b/dts/src/arm/imx6sx-udoo-neo.dtsi index ee64565509..35861bbea9 100644 --- a/dts/src/arm/imx6sx-udoo-neo.dtsi +++ b/dts/src/arm/imx6sx-udoo-neo.dtsi @@ -183,6 +183,27 @@ status = "okay"; }; +&i2c3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + clock-frequency = <100000>; + status = "okay"; + + hdmi-transmitter@70 { + compatible = "nxp,tda998x"; + reg = <0x70>; + interrupts-extended = <&gpio3 27 IRQ_TYPE_LEVEL_LOW>; + + ports { + port { + hdmi: endpoint { + remote-endpoint = <&lcdc>; + }; + }; + }; + }; +}; + &i2c4 { /* Onboard Motion sensors */ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c4>; @@ -190,6 +211,18 @@ status = "disabled"; }; +&lcdif1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lcd>; + status = "okay"; + + port { + lcdc: endpoint { + remote-endpoint = <&hdmi>; + }; + }; +}; + &iomuxc { pinctrl_bt_reg: btreggrp { fsl,pins = @@ -227,12 +260,53 @@ <MX6SX_PAD_GPIO1_IO02__I2C2_SCL 0x4001b8b1>; }; + pinctrl_i2c3: i2c3grp { + fsl,pins = + <MX6SX_PAD_KEY_ROW4__I2C3_SDA 0x4001b8b1>, + <MX6SX_PAD_KEY_COL4__I2C3_SCL 0x4001b8b1>; + }; + pinctrl_i2c4: i2c4grp { fsl,pins = <MX6SX_PAD_USB_H_DATA__I2C4_SDA 0x4001b8b1>, <MX6SX_PAD_USB_H_STROBE__I2C4_SCL 0x4001b8b1>; }; + pinctrl_lcd: lcdgrp { + fsl,pins = < + MX6SX_PAD_LCD1_DATA00__LCDIF1_DATA_0 0x4001b0b0 + MX6SX_PAD_LCD1_DATA01__LCDIF1_DATA_1 0x4001b0b0 + MX6SX_PAD_LCD1_DATA02__LCDIF1_DATA_2 0x4001b0b0 + MX6SX_PAD_LCD1_DATA03__LCDIF1_DATA_3 0x4001b0b0 + MX6SX_PAD_LCD1_DATA04__LCDIF1_DATA_4 0x4001b0b0 + MX6SX_PAD_LCD1_DATA05__LCDIF1_DATA_5 0x4001b0b0 + MX6SX_PAD_LCD1_DATA06__LCDIF1_DATA_6 0x4001b0b0 + MX6SX_PAD_LCD1_DATA07__LCDIF1_DATA_7 0x4001b0b0 + MX6SX_PAD_LCD1_DATA08__LCDIF1_DATA_8 0x4001b0b0 + MX6SX_PAD_LCD1_DATA09__LCDIF1_DATA_9 0x4001b0b0 + MX6SX_PAD_LCD1_DATA10__LCDIF1_DATA_10 0x4001b0b0 + MX6SX_PAD_LCD1_DATA11__LCDIF1_DATA_11 0x4001b0b0 + MX6SX_PAD_LCD1_DATA12__LCDIF1_DATA_12 0x4001b0b0 + MX6SX_PAD_LCD1_DATA13__LCDIF1_DATA_13 0x4001b0b0 + MX6SX_PAD_LCD1_DATA14__LCDIF1_DATA_14 0x4001b0b0 + MX6SX_PAD_LCD1_DATA15__LCDIF1_DATA_15 0x4001b0b0 + MX6SX_PAD_LCD1_DATA16__LCDIF1_DATA_16 0x4001b0b0 + MX6SX_PAD_LCD1_DATA17__LCDIF1_DATA_17 0x4001b0b0 + MX6SX_PAD_LCD1_DATA18__LCDIF1_DATA_18 0x4001b0b0 + MX6SX_PAD_LCD1_DATA19__LCDIF1_DATA_19 0x4001b0b0 + MX6SX_PAD_LCD1_DATA20__LCDIF1_DATA_20 0x4001b0b0 + MX6SX_PAD_LCD1_DATA21__LCDIF1_DATA_21 0x4001b0b0 + MX6SX_PAD_LCD1_DATA22__LCDIF1_DATA_22 0x4001b0b0 + MX6SX_PAD_LCD1_DATA23__LCDIF1_DATA_23 0x4001b0b0 + MX6SX_PAD_LCD1_CLK__LCDIF1_CLK 0x4001b0b0 + MX6SX_PAD_LCD1_ENABLE__LCDIF1_ENABLE 0x4001b0b0 + MX6SX_PAD_LCD1_VSYNC__LCDIF1_VSYNC 0x4001b0b0 + MX6SX_PAD_LCD1_HSYNC__LCDIF1_HSYNC 0x4001b0b0 + MX6SX_PAD_LCD1_RESET__GPIO3_IO_27 0x4001b0b0 + >; + }; + + pinctrl_uart1: uart1grp { fsl,pins = <MX6SX_PAD_GPIO1_IO04__UART1_DCE_TX 0x1b0b1>, diff --git a/dts/src/arm/imx6ul-tx6ul-mainboard.dts b/dts/src/arm/imx6ul-tx6ul-mainboard.dts index 97686097a8..92ac0edcb6 100644 --- a/dts/src/arm/imx6ul-tx6ul-mainboard.dts +++ b/dts/src/arm/imx6ul-tx6ul-mainboard.dts @@ -119,7 +119,7 @@ /delete-node/ codec@a; /delete-node/ touchscreen@48; - rtc: mcp7940x@6f { + rtc: rtc@6f { compatible = "microchip,mcp7940x"; reg = <0x6f>; }; diff --git a/dts/src/arm/imx7-colibri-aster.dtsi b/dts/src/arm/imx7-colibri-aster.dtsi index 139188eb9f..b770fc9379 100644 --- a/dts/src/arm/imx7-colibri-aster.dtsi +++ b/dts/src/arm/imx7-colibri-aster.dtsi @@ -103,7 +103,7 @@ }; /* M41T0M6 real time clock on carrier board */ - rtc: m41t0m6@68 { + rtc: rtc@68 { compatible = "st,m41t0"; reg = <0x68>; }; diff --git a/dts/src/arm/imx7-colibri-eval-v3.dtsi b/dts/src/arm/imx7-colibri-eval-v3.dtsi index 3caf450735..3b9df8c82a 100644 --- a/dts/src/arm/imx7-colibri-eval-v3.dtsi +++ b/dts/src/arm/imx7-colibri-eval-v3.dtsi @@ -129,7 +129,7 @@ }; /* M41T0M6 real time clock on carrier board */ - rtc: m41t0m6@68 { + rtc: rtc@68 { compatible = "st,m41t0"; reg = <0x68>; }; diff --git a/dts/src/arm/imx7-colibri.dtsi b/dts/src/arm/imx7-colibri.dtsi index 62b771c1d5..f1c60b0cb1 100644 --- a/dts/src/arm/imx7-colibri.dtsi +++ b/dts/src/arm/imx7-colibri.dtsi @@ -40,7 +40,7 @@ dailink_master: simple-audio-card,codec { sound-dai = <&codec>; - clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>; + clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>; }; }; }; @@ -293,7 +293,7 @@ compatible = "fsl,sgtl5000"; #sound-dai-cells = <0>; reg = <0x0a>; - clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>; + clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sai1_mclk>; VDDA-supply = <®_module_3v3_avdd>; diff --git a/dts/src/arm/imx7-mba7.dtsi b/dts/src/arm/imx7-mba7.dtsi index 49086c6b6a..3df6dff773 100644 --- a/dts/src/arm/imx7-mba7.dtsi +++ b/dts/src/arm/imx7-mba7.dtsi @@ -302,7 +302,7 @@ tlv320aic32x4: audio-codec@18 { compatible = "ti,tlv320aic32x4"; reg = <0x18>; - clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>; + clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>; clock-names = "mclk"; ldoin-supply = <®_audio_3v3>; iov-supply = <®_audio_3v3>; diff --git a/dts/src/arm/imx7d-nitrogen7.dts b/dts/src/arm/imx7d-nitrogen7.dts index e0751e6ba3..a31de90013 100644 --- a/dts/src/arm/imx7d-nitrogen7.dts +++ b/dts/src/arm/imx7d-nitrogen7.dts @@ -288,7 +288,7 @@ codec: wm8960@1a { compatible = "wlf,wm8960"; reg = <0x1a>; - clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>; + clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>; clock-names = "mclk"; wlf,shared-lrclk; }; diff --git a/dts/src/arm/imx7d-pico-hobbit.dts b/dts/src/arm/imx7d-pico-hobbit.dts index 7b2198a937..d917dc4f2f 100644 --- a/dts/src/arm/imx7d-pico-hobbit.dts +++ b/dts/src/arm/imx7d-pico-hobbit.dts @@ -31,7 +31,7 @@ dailink_master: simple-audio-card,codec { sound-dai = <&sgtl5000>; - clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>; + clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>; }; }; }; @@ -41,7 +41,7 @@ #sound-dai-cells = <0>; reg = <0x0a>; compatible = "fsl,sgtl5000"; - clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>; + clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>; VDDA-supply = <®_2p5v>; VDDIO-supply = <®_vref_1v8>; }; diff --git a/dts/src/arm/imx7d-pico-pi.dts b/dts/src/arm/imx7d-pico-pi.dts index 70bea95c06..f263e391e2 100644 --- a/dts/src/arm/imx7d-pico-pi.dts +++ b/dts/src/arm/imx7d-pico-pi.dts @@ -31,7 +31,7 @@ dailink_master: simple-audio-card,codec { sound-dai = <&sgtl5000>; - clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>; + clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>; }; }; }; @@ -41,7 +41,7 @@ #sound-dai-cells = <0>; reg = <0x0a>; compatible = "fsl,sgtl5000"; - clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>; + clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>; VDDA-supply = <®_2p5v>; VDDIO-supply = <®_vref_1v8>; }; diff --git a/dts/src/arm/imx7d-sdb.dts b/dts/src/arm/imx7d-sdb.dts index 7813ef960f..f053f51227 100644 --- a/dts/src/arm/imx7d-sdb.dts +++ b/dts/src/arm/imx7d-sdb.dts @@ -385,14 +385,14 @@ codec: wm8960@1a { compatible = "wlf,wm8960"; reg = <0x1a>; - clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>; + clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>; clock-names = "mclk"; wlf,shared-lrclk; wlf,hp-cfg = <2 2 3>; wlf,gpio-cfg = <1 3>; assigned-clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_SRC>, <&clks IMX7D_PLL_AUDIO_POST_DIV>, - <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>; + <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>; assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>; assigned-clock-rates = <0>, <884736000>, <12288000>; }; diff --git a/dts/src/arm/imx7d.dtsi b/dts/src/arm/imx7d.dtsi index b7735979b7..f8cba47536 100644 --- a/dts/src/arm/imx7d.dtsi +++ b/dts/src/arm/imx7d.dtsi @@ -113,6 +113,49 @@ <0x31004000 0x2000>, <0x31006000 0x2000>; }; + + pcie: pcie@33800000 { + compatible = "fsl,imx7d-pcie"; + reg = <0x33800000 0x4000>, + <0x4ff00000 0x80000>; + reg-names = "dbi", "config"; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x00 0xff>; + ranges = <0x81000000 0 0 0x4ff80000 0 0x00010000>, /* downstream I/O */ + <0x82000000 0 0x40000000 0x40000000 0 0x0ff00000>; /* non-prefetchable memory */ + num-lanes = <1>; + interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "msi"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; + /* + * Reference manual lists pci irqs incorrectly + * Real hardware ordering is same as imx6: D+MSI, C, B, A + */ + interrupt-map = <0 0 0 1 &intc GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 2 &intc GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 3 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 4 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMX7D_PCIE_CTRL_ROOT_CLK>, + <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>, + <&clks IMX7D_PCIE_PHY_ROOT_CLK>; + clock-names = "pcie", "pcie_bus", "pcie_phy"; + assigned-clocks = <&clks IMX7D_PCIE_CTRL_ROOT_SRC>, + <&clks IMX7D_PCIE_PHY_ROOT_SRC>; + assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_250M_CLK>, + <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>; + + fsl,max-link-speed = <2>; + power-domains = <&pgc_pcie_phy>; + resets = <&src IMX7_RESET_PCIEPHY>, + <&src IMX7_RESET_PCIE_CTRL_APPS_EN>, + <&src IMX7_RESET_PCIE_CTRL_APPS_TURNOFF>; + reset-names = "pciephy", "apps", "turnoff"; + fsl,imx7d-pcie-phy = <&pcie_phy>; + status = "disabled"; + }; }; }; @@ -162,49 +205,6 @@ fsl,stop-mode = <&gpr 0x10 4>; status = "disabled"; }; - - pcie: pcie@33800000 { - compatible = "fsl,imx7d-pcie"; - reg = <0x33800000 0x4000>, - <0x4ff00000 0x80000>; - reg-names = "dbi", "config"; - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - bus-range = <0x00 0xff>; - ranges = <0x81000000 0 0 0x4ff80000 0 0x00010000>, /* downstream I/O */ - <0x82000000 0 0x40000000 0x40000000 0 0x0ff00000>; /* non-prefetchable memory */ - num-lanes = <1>; - interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "msi"; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0x7>; - /* - * Reference manual lists pci irqs incorrectly - * Real hardware ordering is same as imx6: D+MSI, C, B, A - */ - interrupt-map = <0 0 0 1 &intc GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, - <0 0 0 2 &intc GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, - <0 0 0 3 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, - <0 0 0 4 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX7D_PCIE_CTRL_ROOT_CLK>, - <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>, - <&clks IMX7D_PCIE_PHY_ROOT_CLK>; - clock-names = "pcie", "pcie_bus", "pcie_phy"; - assigned-clocks = <&clks IMX7D_PCIE_CTRL_ROOT_SRC>, - <&clks IMX7D_PCIE_PHY_ROOT_SRC>; - assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_250M_CLK>, - <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>; - - fsl,max-link-speed = <2>; - power-domains = <&pgc_pcie_phy>; - resets = <&src IMX7_RESET_PCIEPHY>, - <&src IMX7_RESET_PCIE_CTRL_APPS_EN>, - <&src IMX7_RESET_PCIE_CTRL_APPS_TURNOFF>; - reset-names = "pciephy", "apps", "turnoff"; - fsl,imx7d-pcie-phy = <&pcie_phy>; - status = "disabled"; - }; }; &ca_funnel_in_ports { diff --git a/dts/src/arm/imx7s-warp.dts b/dts/src/arm/imx7s-warp.dts index 4f1edef06c..e8734d218b 100644 --- a/dts/src/arm/imx7s-warp.dts +++ b/dts/src/arm/imx7s-warp.dts @@ -75,7 +75,7 @@ dailink_master: simple-audio-card,codec { sound-dai = <&codec>; - clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>; + clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>; }; }; }; @@ -232,7 +232,7 @@ #sound-dai-cells = <0>; reg = <0x0a>; compatible = "fsl,sgtl5000"; - clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>; + clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sai1_mclk>; VDDA-supply = <&vgen4_reg>; diff --git a/dts/src/arm/imx7s.dtsi b/dts/src/arm/imx7s.dtsi index 52a9aeecdb..5af6d58666 100644 --- a/dts/src/arm/imx7s.dtsi +++ b/dts/src/arm/imx7s.dtsi @@ -76,6 +76,22 @@ clock-latency = <61036>; /* two CLK32 periods */ clocks = <&clks IMX7D_CLK_ARM>; cpu-idle-states = <&cpu_sleep_wait>; + operating-points-v2 = <&cpu0_opp_table>; + #cooling-cells = <2>; + nvmem-cells = <&fuse_grade>; + nvmem-cell-names = "speed_grade"; + }; + }; + + cpu0_opp_table: opp-table { + compatible = "operating-points-v2"; + opp-shared; + + opp-792000000 { + opp-hz = /bits/ 64 <792000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <150000>; + opp-supported-hw = <0xf>, <0xf>; }; }; diff --git a/dts/src/arm/imxrt1050-pinfunc.h b/dts/src/arm/imxrt1050-pinfunc.h new file mode 100644 index 0000000000..22c14a3262 --- /dev/null +++ b/dts/src/arm/imxrt1050-pinfunc.h @@ -0,0 +1,993 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ +/* + * Copyright (C) 2019 + * Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com> + */ + +#ifndef _DT_BINDINGS_PINCTRL_IMXRT1050_PINFUNC_H +#define _DT_BINDINGS_PINCTRL_IMXRT1050_PINFUNC_H + +#define IMX_PAD_SION 0x40000000 + +/* + * The pin function ID is a tuple of + * <mux_reg conf_reg input_reg mux_mode input_val> + */ + +#define MXRT1050_IOMUXC_GPIO_EMC_00_SEMC_DA00 0x014 0x204 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_00_FLEXPWM4_PWM0_A 0x014 0x204 0x494 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_00_LPSPI2_SCK 0x014 0x204 0x500 0x2 0x1 +#define MXRT1050_IOMUXC_GPIO_EMC_00_XBAR_INOUT2 0x014 0x204 0x60C 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_00_FLEXIO1_D00 0x014 0x204 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_00_GPIO4_IO00 0x014 0x204 0x000 0x5 0x0 + +#define MXRT1050_IOMUXC_GPIO_EMC_01_SEMC_DA01 0x018 0x208 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_01_FLEXPWM4_PWM0_B 0x018 0x208 0x000 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_01_LPSPI2_PCS0 0x018 0x208 0x4FC 0x2 0x1 +#define MXRT1050_IOMUXC_GPIO_EMC_01_XBAR_INOUT3 0x018 0x208 0x610 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_01_FLEXIO1_D01 0x018 0x208 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_01_GPIO4_IO01 0x018 0x208 0x000 0x5 0x0 + +#define MXRT1050_IOMUXC_GPIO_EMC_02_SEMC_DA02 0x01C 0x20C 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_02_FLEXPWM4_PWM1_A 0x01C 0x20C 0x498 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_02_LPSPI2_SDO 0x01C 0x20C 0x508 0x2 0x1 +#define MXRT1050_IOMUXC_GPIO_EMC_02_XBAR_INOUT4 0x01C 0x20C 0x614 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_02_FLEXIO1_D02 0x01C 0x20C 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_02_GPIO4_IO02 0x01C 0x20C 0x000 0x5 0x0 + +#define MXRT1050_IOMUXC_GPIO_EMC_03_SEMC_DA03 0x020 0x210 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_03_FLEXPWM4_PWM1_B 0x020 0x210 0x000 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_03_LPSPI2_SDI 0x020 0x210 0x504 0x2 0x1 +#define MXRT1050_IOMUXC_GPIO_EMC_03_XBAR_INOUT5 0x020 0x210 0x618 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_03_FLEXIO1_D03 0x020 0x210 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_03_GPIO4_IO03 0x020 0x210 0x000 0x5 0x0 + +#define MXRT1050_IOMUXC_GPIO_EMC_04_SEMC_DA04 0x024 0x214 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_04_FLEXPWM4_PWM2_A 0x024 0x214 0x49C 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_04_SAI2_TX_DATA 0x024 0x214 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_04_XBAR_INOUT6 0x024 0x214 0x61C 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_04_FLEXIO1_D04 0x024 0x214 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_04_GPIO4_IO04 0x024 0x214 0x000 0x5 0x0 + +#define MXRT1050_IOMUXC_GPIO_EMC_05_SEMC_DA05 0x028 0x218 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_05_FLEXPWM4_PWM2_B 0x028 0x218 0x000 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_05_SAI2_TX_SYNC 0x028 0x218 0x5C4 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_05_XBAR_INOUT7 0x028 0x218 0x620 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_05_FLEXIO1_D05 0x028 0x218 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_05_GPIO4_IO05 0x028 0x218 0x000 0x5 0x0 + +#define MXRT1050_IOMUXC_GPIO_EMC_06_SEMC_DA06 0x02C 0x21C 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_06_FLEXPWM2_PWM0_A 0x02C 0x21C 0x478 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_06_SAI2_TX_BCLK 0x02C 0x21C 0x5C0 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_06_XBAR_INOUT8 0x02C 0x21C 0x624 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_06_FLEXIO1_D06 0x02C 0x21C 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_06_GPIO4_IO06 0x02C 0x21C 0x000 0x5 0x0 + +#define MXRT1050_IOMUXC_GPIO_EMC_07_SEMC_DA07 0x030 0x220 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_07_FLEXPWM2_PWM0_B 0x030 0x220 0x488 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_07_SAI2_MCLK 0x030 0x220 0x5B0 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_07_XBAR_INOUT9 0x030 0x220 0x628 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_07_FLEXIO1_D07 0x030 0x220 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_07_GPIO4_IO07 0x030 0x220 0x000 0x5 0x0 + +#define MXRT1050_IOMUXC_GPIO_EMC_08_SEMC_DM00 0x034 0x224 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_08_FLEXPWM2_PWM1_A 0x034 0x224 0x47C 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_08_SAI2_RX_DATA 0x034 0x224 0x5B8 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_08_XBAR_INOUT17 0x034 0x224 0x62C 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_08_FLEXIO1_D08 0x034 0x224 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_08_GPIO4_IO08 0x034 0x224 0x000 0x5 0x0 + +#define MXRT1050_IOMUXC_GPIO_EMC_09_SEMC_ADDR00 0x038 0x228 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_09_FLEXPWM2_PWM1_B 0x038 0x228 0x48C 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_09_SAI2_RX_SYNC 0x038 0x228 0x5BC 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_09_FLEXCAN2_TX 0x038 0x228 0x000 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_09_FLEXIO1_D09 0x038 0x228 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_09_GPIO4_IO09 0x038 0x228 0x000 0x5 0x0 + +#define MXRT1050_IOMUXC_GPIO_EMC_10_SEMC_ADDR01 0x03C 0x22C 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_10_FLEXPWM2_PWM2_A 0x03C 0x22C 0x480 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_10_SAI2_RX_BCLK 0x03C 0x22C 0x5B4 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_10_FLEXCAN2_RX 0x03C 0x22C 0x450 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_10_FLEXIO1_D10 0x03C 0x22C 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_10_GPIO4_IO10 0x03C 0x22C 0x000 0x5 0x0 + +#define MXRT1050_IOMUXC_GPIO_EMC_11_SEMC_ADDR02 0x040 0x230 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_11_FLEXPWM2_PWM2_B 0x040 0x230 0x490 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_11_LPI2C4_SDA 0x040 0x230 0x4E8 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_11_USDHC2_RESET_B 0x040 0x230 0x000 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_11_FLEXIO1_D11 0x040 0x230 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_11_GPIO4_IO11 0x040 0x230 0x000 0x5 0x0 + +#define MXRT1050_IOMUXC_GPIO_EMC_12_SEMC_ADDR03 0x044 0x234 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_12_XBAR_INOUT24 0x044 0x234 0x640 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_12_LPI2C4_SCL 0x044 0x234 0x4E4 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_12_USDHC2_WP 0x044 0x234 0x5D8 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_12_FLEXPWM1_PWM3_A 0x044 0x234 0x454 0x4 0x1 +#define MXRT1050_IOMUXC_GPIO_EMC_12_GPIO4_IO12 0x044 0x234 0x000 0x5 0x0 + +#define MXRT1050_IOMUXC_GPIO_EMC_13_SEMC_ADDR04 0x048 0x238 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_13_XBAR_INOUT25 0x048 0x238 0x650 0x1 0x1 +#define MXRT1050_IOMUXC_GPIO_EMC_13_LPUART3_TXD 0x048 0x238 0x53C 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_13_MQS_RIGHT 0x048 0x238 0x000 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_13_FLEXPWM1_PWM3_B 0x048 0x238 0x464 0x4 0x1 +#define MXRT1050_IOMUXC_GPIO_EMC_13_GPIO4_IO13 0x048 0x238 0x000 0x5 0x0 + +#define MXRT1050_IOMUXC_GPIO_EMC_14_SEMC_ADDR05 0x04C 0x23C 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_14_XBAR_INOUT19 0x04C 0x23C 0x654 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_14_LPUART3_RXD 0x04C 0x23C 0x538 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_14_MQS_LEFT 0x04C 0x23C 0x000 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_14_LPSPI2_PCS1 0x04C 0x23C 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_14_GPIO4_IO14 0x04C 0x23C 0x000 0x5 0x0 + +#define MXRT1050_IOMUXC_GPIO_EMC_15_SEMC_ADDR06 0x050 0x240 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_15_XBAR_INOUT20 0x050 0x240 0x634 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_15_LPUART3_CTS_B 0x050 0x240 0x534 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_15_SPDIF_OUT 0x050 0x240 0x000 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_15_TMR3_TIMER0 0x050 0x240 0x57C 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_15_GPIO4_IO15 0x050 0x240 0x000 0x5 0x0 + +#define MXRT1050_IOMUXC_GPIO_EMC_16_SEMC_ADDR07 0x054 0x244 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_16_XBAR_INOUT21 0x054 0x244 0x658 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_16_LPUART3_RTS_B 0x054 0x244 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_16_SPDIF_IN 0x054 0x244 0x5C8 0x3 0x1 +#define MXRT1050_IOMUXC_GPIO_EMC_16_TMR3_TIMER1 0x054 0x244 0x580 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_16_GPIO4_IO16 0x054 0x244 0x000 0x5 0x0 + +#define MXRT1050_IOMUXC_GPIO_EMC_17_SEMC_ADDR08 0x058 0x248 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_17_FLEXPWM4_PWM3_A 0x058 0x248 0x4A0 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_17_LPUART4_CTS_B 0x058 0x248 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_17_FLEXCAN1_TX 0x058 0x248 0x000 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_17_TMR3_TIMER2 0x058 0x248 0x584 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_17_GPIO4_IO17 0x058 0x248 0x000 0x5 0x0 + +#define MXRT1050_IOMUXC_GPIO_EMC_18_SEMC_ADDR09 0x05C 0x24C 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_18_FLEXPWM4_PWM3_B 0x05C 0x24C 0x000 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_18_LPUART4_RTS_B 0x05C 0x24C 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_18_FLEXCAN1_RX 0x05C 0x24C 0x44C 0x3 0x1 +#define MXRT1050_IOMUXC_GPIO_EMC_18_TMR3_TIMER3 0x05C 0x24C 0x588 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_18_GPIO4_IO18 0x05C 0x24C 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_18_SNVS_VIO_5_CTL 0x05C 0x24C 0x000 0x6 0x0 + +#define MXRT1050_IOMUXC_GPIO_EMC_19_SEMC_ADDR11 0x060 0x250 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_19_FLEXPWM2_PWM3_A 0x060 0x250 0x000 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_19_LPUART4_TXD 0x060 0x250 0x544 0x2 0x1 +#define MXRT1050_IOMUXC_GPIO_EMC_19_ENET_RX_DATA01 0x060 0x250 0x438 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_19_TMR2_TIMER0 0x060 0x250 0x56C 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_19_GPIO4_IO19 0x060 0x250 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_19_SNVS_VIO_5 0x060 0x250 0x000 0x6 0x0 + +#define MXRT1050_IOMUXC_GPIO_EMC_20_SEMC_ADDR12 0x064 0x254 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_20_FLEXPWM2_PWM3_B 0x064 0x254 0x484 0x1 0x1 +#define MXRT1050_IOMUXC_GPIO_EMC_20_LPUART4_RXD 0x064 0x254 0x540 0x2 0x1 +#define MXRT1050_IOMUXC_GPIO_EMC_20_ENET_RX_DATA00 0x064 0x254 0x434 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_20_TMR2_TIMER0 0x064 0x254 0x570 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_20_GPIO4_IO20 0x064 0x254 0x000 0x5 0x0 + +#define MXRT1050_IOMUXC_GPIO_EMC_21_SEMC_BA0 0x068 0x258 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_21_FLEXPWM3_PWM3_A 0x068 0x258 0x000 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_21_LPI2C3_SDA 0x068 0x258 0x4E0 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_21_ENET_TX_DATA01 0x068 0x258 0x000 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_21_TMR2_TIMER2 0x068 0x258 0x574 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_21_GPIO4_IO21 0x068 0x258 0x000 0x5 0x0 + +#define MXRT1050_IOMUXC_GPIO_EMC_22_SEMC_BA1 0x06C 0x25C 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_22_FLEXPWM3_PWM3_B 0x06C 0x25C 0x000 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_22_LPI2C3_SCL 0x06C 0x25C 0x4DC 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_22_ENET_TX_DATA00 0x06C 0x25C 0x000 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_22_TMR2_TIMER3 0x06C 0x25C 0x578 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_22_GPIO4_IO22 0x06C 0x25C 0x000 0x5 0x0 + +#define MXRT1050_IOMUXC_GPIO_EMC_23_SEMC_ADDR10 0x070 0x260 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_23_FLEXPWM1_PWM0_A 0x070 0x260 0x458 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_23_LPUART5_TXD 0x070 0x260 0x54C 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_23_ENET_RX_EN 0x070 0x260 0x43C 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_23_GPT1_CAPTURE2 0x070 0x260 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_23_GPIO4_IO23 0x070 0x260 0x000 0x5 0x0 + +#define MXRT1050_IOMUXC_GPIO_EMC_24_SEMC_CAS 0x074 0x264 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_24_FLEXPWM1_PWM0_B 0x074 0x264 0x000 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_24_LPUART5_RXD 0x074 0x264 0x548 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_24_ENET_TX_EN 0x074 0x264 0x000 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_24_GPT1_CAPTURE1 0x074 0x264 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_24_GPIO4_IO24 0x074 0x264 0x000 0x5 0x0 + +#define MXRT1050_IOMUXC_GPIO_EMC_25_SEMC_RAS 0x078 0x268 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_25_FLEXPWM1_PWM1_A 0x078 0x268 0x45C 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_25_LPUART6_TXD 0x078 0x268 0x554 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_25_ENET_TX_CLK 0x078 0x268 0x448 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_25_ENET_REF_CLK 0x078 0x268 0x42C 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_25_GPIO4_IO25 0x078 0x268 0x000 0x5 0x0 + +#define MXRT1050_IOMUXC_GPIO_EMC_26_SEMC_CLK 0x07C 0x26C 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_26_FLEXPWM1_PWM1_B 0x07C 0x26C 0x46C 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_26_LPUART6_RXD 0x07C 0x26C 0x550 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_26_ENET_RX_ER 0x07C 0x26C 0x440 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_26_FLEXIO1_D12 0x07C 0x26C 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_26_GPIO4_IO26 0x07C 0x26C 0x000 0x5 0x0 + +#define MXRT1050_IOMUXC_GPIO_EMC_27_SEMC_CKE 0x080 0x270 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_27_FLEXPWM1_PWM2_A 0x080 0x270 0x460 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_27_LPUART5_RTS_B 0x080 0x270 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_27_LPSPI1_SCK 0x080 0x270 0x4F0 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_27_FLEXIO1_D13 0x080 0x270 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_27_GPIO4_IO27 0x080 0x270 0x000 0x5 0x0 + +#define MXRT1050_IOMUXC_GPIO_EMC_28_SEMC_WE 0x084 0x274 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_28_FLEXPWM1_PWM2_B 0x084 0x274 0x470 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_28_LPUART5_CTS_B 0x084 0x274 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_28_LPSPI1_SDO 0x084 0x274 0x4F8 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_28_FLEXIO1_D14 0x084 0x274 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_28_GPIO4_IO28 0x084 0x274 0x000 0x5 0x0 + +#define MXRT1050_IOMUXC_GPIO_EMC_29_SEMC_CS0 0x088 0x278 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_29_FLEXPWM3_PWM0_A 0x088 0x278 0x000 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_29_LPUART6_RTS_B 0x088 0x278 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_29_LPSPI1_SDI 0x088 0x278 0x4F4 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_29_FLEXIO1_D15 0x088 0x278 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_29_GPIO4_IO29 0x088 0x278 0x000 0x5 0x0 + +#define MXRT1050_IOMUXC_GPIO_EMC_30_SEMC_DA08 0x08C 0x27C 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_30_FLEXPWM3_PWM0_B 0x08C 0x27C 0x000 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_30_LPUART6_CTS_B 0x08C 0x27C 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_30_LPSPI1_PCS0 0x08C 0x27C 0x4EC 0x3 0x1 +#define MXRT1050_IOMUXC_GPIO_EMC_30_CSI_DATA23 0x08C 0x27C 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_30_GPIO4_IO30 0x08C 0x27C 0x000 0x5 0x0 + +#define MXRT1050_IOMUXC_GPIO_EMC_31_SEMC_DA09 0x090 0x280 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_31_FLEXPWM3_PWM1_A 0x090 0x280 0x000 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_31_LPUART7_TXD 0x090 0x280 0x55C 0x2 0x1 +#define MXRT1050_IOMUXC_GPIO_EMC_31_LPSPI1_PCS1 0x090 0x280 0x000 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_31_CSI_DATA22 0x090 0x280 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_31_GPIO4_IO31 0x090 0x280 0x000 0x5 0x0 + +#define MXRT1050_IOMUXC_GPIO_EMC_32_SEMC_DA10 0x094 0x284 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_32_FLEXPWM3_PWM1_B 0x094 0x284 0x000 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_32_LPUART7_RXD 0x094 0x284 0x558 0x2 0x1 +#define MXRT1050_IOMUXC_GPIO_EMC_32_CCM_PMIC_READY 0x094 0x284 0x3FC 0x3 0x4 +#define MXRT1050_IOMUXC_GPIO_EMC_32_CSI_DATA21 0x094 0x284 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_32_GPIO3_IO18 0x094 0x284 0x000 0x5 0x0 + +#define MXRT1050_IOMUXC_GPIO_EMC_33_SEMC_DA11 0x098 0x288 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_33_FLEXPWM3_PWM2_A 0x098 0x288 0x000 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_33_USDHC1_RESET_B 0x098 0x288 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_33_SAI3_RX_DATA 0x098 0x288 0x000 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_33_CSI_DATA20 0x098 0x288 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_33_GPIO3_IO19 0x098 0x288 0x000 0x5 0x0 + +#define MXRT1050_IOMUXC_GPIO_EMC_34_SEMC_DA12 0x09C 0x28C 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_34_FLEXPWM3_PWM2_B 0x09C 0x28C 0x000 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_34_USDHC1_VSELECT 0x09C 0x28C 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_34_SAI3_RX_SYNC 0x09C 0x28C 0x000 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_34_CSI_DATA19 0x09C 0x28C 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_34_GPIO3_IO20 0x09C 0x28C 0x000 0x5 0x0 + +#define MXRT1050_IOMUXC_GPIO_EMC_35_SEMC_DA13 0x0A0 0x290 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_35_XBAR_INOUT18 0x0A0 0x290 0x630 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_35_GPT1_COMPARE1 0x0A0 0x290 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_35_SAI3_RX_BCLK 0x0A0 0x290 0x000 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_35_CSI_DATA18 0x0A0 0x290 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_35_GPIO3_IO21 0x0A0 0x290 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_35_USDHC1_CD_B 0x0A0 0x290 0x5D4 0x6 0x0 + +#define MXRT1050_IOMUXC_GPIO_EMC_36_SEMC_DA14 0x0A4 0x294 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_36_XBAR_INOUT22 0x0A4 0x294 0x638 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_36_GPT1_COMPARE2 0x0A4 0x294 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_36_SAI3_TX_DATA 0x0A4 0x294 0x000 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_36_CSI_DATA17 0x0A4 0x294 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_36_GPIO3_IO22 0x0A4 0x294 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_36_USDHC1_WP 0x0A4 0x294 0x5D8 0x6 0x1 + +#define MXRT1050_IOMUXC_GPIO_EMC_37_SEMC_DA15 0x0A8 0x298 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_37_XBAR_INOUT23 0x0A8 0x298 0x63C 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_37_GPT1_COMPARE3 0x0A8 0x298 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_37_SAI3_MCLK 0x0A8 0x298 0x000 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_37_CSI_DATA16 0x0A8 0x298 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_37_GPIO3_IO23 0x0A8 0x298 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_37_USDHC2_WP 0x0A8 0x298 0x608 0x6 0x0 + +#define MXRT1050_IOMUXC_GPIO_EMC_38_SEMC_DM01 0x0AC 0x29C 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_38_FLEXPWM1_PWM3_A 0x0AC 0x29C 0x454 0x1 0x2 +#define MXRT1050_IOMUXC_GPIO_EMC_38_LPUART8_TXD 0x0AC 0x29C 0x564 0x2 0x2 +#define MXRT1050_IOMUXC_GPIO_EMC_38_SAI3_TX_BCLK 0x0AC 0x29C 0x000 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_38_CSI_FIELD 0x0AC 0x29C 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_38_GPIO3_IO24 0x0AC 0x29C 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_38_USDHC2_VSELECT 0x0AC 0x29C 0x000 0x6 0x0 + +#define MXRT1050_IOMUXC_GPIO_EMC_39_SEMC_DQS 0x0B0 0x2A0 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_39_FLEXPWM1_PWM3_B 0x0B0 0x2A0 0x464 0x1 0x2 +#define MXRT1050_IOMUXC_GPIO_EMC_39_LPUART8_RXD 0x0B0 0x2A0 0x560 0x2 0x2 +#define MXRT1050_IOMUXC_GPIO_EMC_39_SAI3_TX_SYNC 0x0B0 0x2A0 0x000 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_39_WDOG1_B 0x0B0 0x2A0 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_39_GPIO3_IO25 0x0B0 0x2A0 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_39_USDHC2_CD_B 0x0B0 0x2A0 0x5E0 0x6 0x1 + +#define MXRT1050_IOMUXC_GPIO_EMC_40_SEMC_RDY 0x0B4 0x2A4 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_40_GPT2_CAPTURE2 0x0B4 0x2A4 0x000 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_40_LPSPI1_PCS2 0x0B4 0x2A4 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_40_USB_OTG2_OC 0x0B4 0x2A4 0x5CC 0x3 0x1 +#define MXRT1050_IOMUXC_GPIO_EMC_40_ENET_MDC 0x0B4 0x2A4 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_40_GPIO3_IO26 0x0B4 0x2A4 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_40_USDHC2_RESET_B 0x0B4 0x2A4 0x000 0x6 0x0 + +#define MXRT1050_IOMUXC_GPIO_EMC_41_SEMC_CSX0 0x0B8 0x2A8 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_41_GPT2_CAPTURE1 0x0B8 0x2A8 0x000 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_41_LPSPI1_PCS3 0x0B8 0x2A8 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_41_USB_OTG2_PWR 0x0B8 0x2A8 0x000 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_41_ENET_MDIO 0x0B8 0x2A8 0x430 0x4 0x1 +#define MXRT1050_IOMUXC_GPIO_EMC_41_GPIO3_IO27 0x0B8 0x2A8 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_EMC_41_USDHC2_VSELECT 0x0B8 0x2A8 0x000 0x6 0x0 + +#define MXRT1050_IOMUXC_GPIO_AD_B0_00_FLEXPWM2_PWM3_A 0x0BC 0x2AC 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_00_XBAR_INOUT14 0x0BC 0x2AC 0x644 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_00_REF_CLK_32K 0x0BC 0x2AC 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_00_USB_OTG2_ID 0x0BC 0x2AC 0x3F8 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_00_LPI2C1_SCLS 0x0BC 0x2AC 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_00_GPIO1_IO00 0x0BC 0x2AC 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_00_USDHC1_RESET_B 0x0BC 0x2AC 0x000 0x6 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_00_LPSPI3_SCK 0x0BC 0x2AC 0x510 0x7 0x0 + +#define MXRT1050_IOMUXC_GPIO_AD_B0_01_FLEXPWM2_PWM3_B 0x0C0 0x2B0 0x484 0x0 0x2 +#define MXRT1050_IOMUXC_GPIO_AD_B0_01_XBAR_INOUT15 0x0C0 0x2B0 0x648 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_01_REF_CLK_24M 0x0C0 0x2B0 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_01_USB_OTG1_ID 0x0C0 0x2B0 0x3F4 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_01_LPI2C1_SDAS 0x0C0 0x2B0 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_01_GPIO1_IO01 0x0C0 0x2B0 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_01_EWM_OUT_B 0x0C0 0x2B0 0x000 0x6 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_01_LPSPI3_SDO 0x0C0 0x2B0 0x518 0x7 0x1 + +#define MXRT1050_IOMUXC_GPIO_AD_B0_02_FLEXCAN2_TX 0x0C4 0x2B4 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_02_XBAR_INOUT16 0x0C4 0x2B4 0x64C 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_02_LPUART6_TXD 0x0C4 0x2B4 0x554 0x2 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B0_02_USB_OTG1_PWR 0x0C4 0x2B4 0x000 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_02_FLEXPWM1_PWM0_X 0x0C4 0x2B4 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_02_GPIO1_IO02 0x0C4 0x2B4 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_02_LPI2C1_HREQ 0x0C4 0x2B4 0x000 0x6 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_02_LPSPI3_SDI 0x0C4 0x2B4 0x514 0x7 0x1 + +#define MXRT1050_IOMUXC_GPIO_AD_B0_03_FLEXCAN2_RX 0x0C8 0x2B8 0x450 0x0 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B0_03_XBAR_INOUT17 0x0C8 0x2B8 0x62C 0x1 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B0_03_LPUART6_RXD 0x0C8 0x2B8 0x550 0x2 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B0_03_USB_OTG1_OC 0x0C8 0x2B8 0x5D0 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_03_FLEXPWM1_PWM1_X 0x0C8 0x2B8 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_03_GPIO1_IO03 0x0C8 0x2B8 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_03_REF_CLK_24M 0x0C8 0x2B8 0x000 0x6 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_03_LPSPI3_PCS0 0x0C8 0x2B8 0x50C 0x7 0x0 + +#define MXRT1050_IOMUXC_GPIO_AD_B0_04_SRC_BOOT_MODE00 0x0CC 0x2BC 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_04_MQS_RIGHT 0x0CC 0x2BC 0x000 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_04_ENET_TX_DATA03 0x0CC 0x2BC 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_04_SAI2_TX_SYNC 0x0CC 0x2BC 0x5C4 0x3 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B0_04_CSI_DATA09 0x0CC 0x2BC 0x41C 0x4 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B0_04_GPIO1_IO04 0x0CC 0x2BC 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_04_PIT_TRIGGER00 0x0CC 0x2BC 0x000 0x6 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_04_LPSPI3_PCS1 0x0CC 0x2BC 0x000 0x7 0x0 + +#define MXRT1050_IOMUXC_GPIO_AD_B0_05_SRC_BOOT_MODE01 0x0D0 0x2C0 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_05_MQS_LEFT 0x0D0 0x2C0 0x000 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_05_ENET_TX_DATA02 0x0D0 0x2C0 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_05_SAI2_TX_BCLK 0x0D0 0x2C0 0x5C0 0x3 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B0_05_CSI_DATA08 0x0D0 0x2C0 0x418 0x4 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B0_05_GPIO1_IO05 0x0D0 0x2C0 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_05_XBAR_INOUT17 0x0D0 0x2C0 0x62C 0x6 0x2 +#define MXRT1050_IOMUXC_GPIO_AD_B0_05_LPSPI3_PCS2 0x0D0 0x2C0 0x000 0x7 0x0 + +#define MXRT1050_IOMUXC_GPIO_AD_B0_06_JTAG_TMS 0x0D4 0x2C4 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_06_GPT2_COMPARE1 0x0D4 0x2C4 0x000 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_06_ENET_RX_CLK 0x0D4 0x2C4 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_06_SAI2_RX_BCLK 0x0D4 0x2C4 0x5B4 0x3 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B0_06_CSI_DATA07 0x0D4 0x2C4 0x414 0x4 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B0_06_GPIO1_IO06 0x0D4 0x2C4 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_06_XBAR_INOUT18 0x0D4 0x2C4 0x630 0x6 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B0_06_LPSPI3_PCS3 0x0D4 0x2C4 0x000 0x7 0x0 + +#define MXRT1050_IOMUXC_GPIO_AD_B0_07_JTAG_TCK 0x0D8 0x2C8 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_07_GPT2_COMPARE2 0x0D8 0x2C8 0x000 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_07_ENET_TX_ER 0x0D8 0x2C8 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_07_SAI2_RX_SYNC 0x0D8 0x2C8 0x5BC 0x3 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B0_07_CSI_DATA06 0x0D8 0x2C8 0x410 0x4 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B0_07_GPIO1_IO07 0x0D8 0x2C8 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_07_XBAR_INOUT19 0x0D8 0x2C8 0x654 0x6 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B0_07_ENET_1588_EVENT3_OUT 0x0D8 0x2C8 0x000 0x7 0x0 + +#define MXRT1050_IOMUXC_GPIO_AD_B0_08_JTAG_MOD 0x0DC 0x2CC 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_08_GPT2_COMPARE3 0x0DC 0x2CC 0x000 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_08_ENET_RX_DATA03 0x0DC 0x2CC 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_08_SAI2_RX_DATA 0x0DC 0x2CC 0x5B8 0x3 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B0_08_CSI_DATA05 0x0DC 0x2CC 0x40C 0x4 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B0_08_GPIO1_IO08 0x0DC 0x2CC 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_08_XBAR_INOUT20 0x0DC 0x2CC 0x634 0x6 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B0_08_ENET_1588_EVENT3_IN 0x0DC 0x2CC 0x000 0x7 0x0 + +#define MXRT1050_IOMUXC_GPIO_AD_B0_09_JTAG_TDI 0x0E0 0x2D0 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_09_FLEXPWM2_PWM3_A 0x0E0 0x2D0 0x000 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_09_ENET_RX_DATA02 0x0E0 0x2D0 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_09_SAI2_TX_DATA 0x0E0 0x2D0 0x000 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_09_CSI_DATA04 0x0E0 0x2D0 0x408 0x4 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B0_09_GPIO1_IO09 0x0E0 0x2D0 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_09_XBAR_INOUT21 0x0E0 0x2D0 0x658 0x6 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B0_09_GPT2_CLK 0x0E0 0x2D0 0x000 0x7 0x0 + +#define MXRT1050_IOMUXC_GPIO_AD_B0_10_JTAG_TDO 0x0E4 0x2D4 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_10_FLEXPWM1_PWM3_A 0x0E4 0x2D4 0x454 0x1 0x3 +#define MXRT1050_IOMUXC_GPIO_AD_B0_10_ENET_CRS 0x0E4 0x2D4 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_10_SAI2_MCLK 0x0E4 0x2D4 0x5B0 0x3 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B0_10_CSI_DATA03 0x0E4 0x2D4 0x404 0x4 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B0_10_GPIO1_IO10 0x0E4 0x2D4 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_10_XBAR_INOUT22 0x0E4 0x2D4 0x638 0x6 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B0_10_ENET_1588_EVENT0_OUT 0x0E4 0x2D4 0x000 0x7 0x0 + +#define MXRT1050_IOMUXC_GPIO_AD_B0_11_JTAG_TRSTB 0x0E8 0x2D8 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_11_FLEXPWM1_PWM3_B 0x0E8 0x2D8 0x464 0x1 0x3 +#define MXRT1050_IOMUXC_GPIO_AD_B0_11_ENET_COL 0x0E8 0x2D8 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_11_WDOG1_B 0x0E8 0x2D8 0x000 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_11_CSI_DATA02 0x0E8 0x2D8 0x400 0x4 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B0_11_GPIO1_IO11 0x0E8 0x2D8 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_11_XBAR_INOUT23 0x0E8 0x2D8 0x63C 0x6 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B0_11_ENET_1588_EVENT0_IN 0x0E8 0x2D8 0x444 0x7 0x1 + +#define MXRT1050_IOMUXC_GPIO_AD_B0_12_LPI2C4_SCL 0x0EC 0x2DC 0x4E4 0x0 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B0_12_CCM_PMIC_READY 0x0EC 0x2DC 0x3FC 0x1 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B0_12_LPUART1_TXD 0x0EC 0x2DC 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_12_WDOG2_B 0x0EC 0x2DC 0x000 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_12_FLEXPWM1_PWM2_X 0x0EC 0x2DC 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_12_GPIO1_IO12 0x0EC 0x2DC 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_12_ENET_1588_EVENT1_OUT 0x0EC 0x2DC 0x000 0x6 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_12_NMI 0x0EC 0x2DC 0x568 0x7 0x0 + +#define MXRT1050_IOMUXC_GPIO_AD_B0_13_LPI2C4_SDA 0x0F0 0x2E0 0x4E8 0x0 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B0_13_GPT1_CLK 0x0F0 0x2E0 0x000 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_13_LPUART1_RXD 0x0F0 0x2E0 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_13_EWM_OUT_B 0x0F0 0x2E0 0x000 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_13_FLEXPWM1_PWM3_X 0x0F0 0x2E0 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_13_GPIO1_IO13 0x0F0 0x2E0 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_13_ENET_1588_EVENT1_IN 0x0F0 0x2E0 0x000 0x6 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_13_REF_CLK_24M 0x0F0 0x2E0 0x000 0x7 0x0 + +#define MXRT1050_IOMUXC_GPIO_AD_B0_14_USB_OTG2_OC 0x0F4 0x2E4 0x5CC 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_14_XBAR_INOUT24 0x0F4 0x2E4 0x640 0x1 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B0_14_LPUART1_CTS_B 0x0F4 0x2E4 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_14_ENET_1588_EVENT0_OUT 0x0F4 0x2E4 0x000 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_14_CSI_VSYNC 0x0F4 0x2E4 0x428 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_14_GPIO1_IO14 0x0F4 0x2E4 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_14_FLEXCAN2_TX 0x0F4 0x2E4 0x000 0x6 0x0 + +#define MXRT1050_IOMUXC_GPIO_AD_B0_15_USB_OTG2_PWR 0x0F8 0x2E8 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_15_XBAR_INOUT25 0x0F8 0x2E8 0x650 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_15_LPUART1_RTS_B 0x0F8 0x2E8 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_15_ENET_1588_EVENT0_IN 0x0F8 0x2E8 0x444 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_15_CSI_HSYNC 0x0F8 0x2E8 0x420 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_15_GPIO1_IO15 0x0F8 0x2E8 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B0_15_FLEXCAN2_RX 0x0F8 0x2E8 0x450 0x6 0x2 +#define MXRT1050_IOMUXC_GPIO_AD_B0_15_WDOG1_WDOG_RST_B_DEB 0x0F8 0x2E8 0x000 0x7 0x0 + +#define MXRT1050_IOMUXC_GPIO_AD_B1_00_USB_OTG2_ID 0x0FC 0x2EC 0x3F8 0x0 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_00_TMR3_TIMER0 0x0FC 0x2EC 0x57C 0x1 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_00_LPUART2_CTS_B 0x0FC 0x2EC 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_00_LPI2C1_SCL 0x0FC 0x2EC 0x4CC 0x3 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_00_WDOG1_B 0x0FC 0x2EC 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_00_GPIO1_IO16 0x0FC 0x2EC 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_00_USDHC1_WP 0x0FC 0x2EC 0x5D8 0x6 0x2 +#define MXRT1050_IOMUXC_GPIO_AD_B1_00_KPP_ROW07 0x0FC 0x2EC 0x000 0x7 0x0 + +#define MXRT1050_IOMUXC_GPIO_AD_B1_01_USB_OTG1_PWR 0x100 0x2F0 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_01_TMR3_TIMER1 0x100 0x2F0 0x580 0x1 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_01_LPUART2_RTS_B 0x100 0x2F0 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_01_LPI2C1_SDA 0x100 0x2F0 0x4D0 0x3 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_01_CCM_PMIC_READY 0x100 0x2F0 0x3FC 0x4 0x2 +#define MXRT1050_IOMUXC_GPIO_AD_B1_01_GPIO1_IO17 0x100 0x2F0 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_01_USDHC1_VSELECT 0x100 0x2F0 0x000 0x6 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_01_KPP_COL07 0x100 0x2F0 0x000 0x7 0x0 + +#define MXRT1050_IOMUXC_GPIO_AD_B1_02_USB_OTG1_ID 0x104 0x2F4 0x3F4 0x0 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_02_TMR3_TIMER2 0x104 0x2F4 0x584 0x1 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_02_LPUART2_TXD 0x104 0x2F4 0x530 0x2 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_02_SPDIF_OUT 0x104 0x2F4 0x000 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_02_ENET_1588_EVENT2_OUT 0x104 0x2F4 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_02_GPIO1_IO18 0x104 0x2F4 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_02_USDHC1_CD_B 0x104 0x2F4 0x5D4 0x6 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_02_KPP_ROW06 0x104 0x2F4 0x000 0x7 0x0 + +#define MXRT1050_IOMUXC_GPIO_AD_B1_03_USB_OTG1_OC 0x108 0x2F8 0x5D0 0x0 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_03_TMR3_TIMER3 0x108 0x2F8 0x588 0x1 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_03_LPUART2_RXD 0x108 0x2F8 0x52C 0x2 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_03_SPDIF_IN 0x108 0x2F8 0x5C8 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_03_ENET_1588_EVENT2_IN 0x108 0x2F8 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_03_GPIO1_IO19 0x108 0x2F8 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_03_USDHC2_CD_B 0x108 0x2F8 0x5E0 0x6 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_03_KPP_COL06 0x108 0x2F8 0x000 0x7 0x0 + +#define MXRT1050_IOMUXC_GPIO_AD_B1_04_FLEXSPI_B_DATA3 0x10C 0x2FC 0x4C4 0x0 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_04_ENET_MDC 0x10C 0x2FC 0x000 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_04_LPUART3_CTS_B 0x10C 0x2FC 0x534 0x2 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_04_SPDIF_SR_CLK 0x10C 0x2FC 0x000 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_04_CSI_PIXCLK 0x10C 0x2FC 0x424 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_04_GPIO1_IO20 0x10C 0x2FC 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_04_USDHC2_DATA0 0x10C 0x2FC 0x5E8 0x6 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_04_KPP_ROW05 0x10C 0x2FC 0x000 0x7 0x0 + +#define MXRT1050_IOMUXC_GPIO_AD_B1_05_FLEXSPI_B_DATA2 0x110 0x300 0x4C0 0x0 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_05_ENET_MDIO 0x110 0x300 0x430 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_05_LPUART3_RTS_B 0x110 0x300 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_05_SPDIF_OUT 0x110 0x300 0x000 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_05_CSI_MCLK 0x110 0x300 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_05_GPIO1_IO21 0x110 0x300 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_05_USDHC2_DATA1 0x110 0x300 0x5EC 0x6 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_05_KPP_COL05 0x110 0x300 0x000 0x7 0x0 + +#define MXRT1050_IOMUXC_GPIO_AD_B1_06_FLEXSPI_B_DATA1 0x114 0x304 0x4BC 0x0 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_06_LPI2C3_SDA 0x114 0x304 0x4E0 0x1 0x2 +#define MXRT1050_IOMUXC_GPIO_AD_B1_06_LPUART3_TXD 0x114 0x304 0x53C 0x2 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_06_SPDIF_LOCK 0x114 0x304 0x000 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_06_CSI_VSYNC 0x114 0x304 0x428 0x4 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_06_GPIO1_IO22 0x114 0x304 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_06_USDHC2_DATA2 0x114 0x304 0x5F0 0x6 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_06_KPP_ROW04 0x114 0x304 0x000 0x7 0x0 + +#define MXRT1050_IOMUXC_GPIO_AD_B1_07_FLEXSPI_B_DATA0 0x118 0x308 0x4B8 0x0 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_07_LPI2C3_SCL 0x118 0x308 0x4DC 0x1 0x2 +#define MXRT1050_IOMUXC_GPIO_AD_B1_07_LPUART3_RXD 0x118 0x308 0x538 0x2 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_07_SPDIF_EXT_CLK 0x118 0x308 0x000 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_07_CSI_HSYNC 0x118 0x308 0x420 0x4 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_07_GPIO1_IO23 0x118 0x308 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_07_USDHC2_DATA3 0x118 0x308 0x5F4 0x6 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_07_KPP_COL04 0x118 0x308 0x000 0x7 0x0 + +#define MXRT1050_IOMUXC_GPIO_AD_B1_08_FLEXSPI_A_SS1_B 0x11C 0x30C 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_08_FLEXPWM4_PWM0_A 0x11C 0x30C 0x494 0x1 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_08_FLEXCAN1_TX 0x11C 0x30C 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_08_CCM_PMIC_READY 0x11C 0x30C 0x3FC 0x3 0x3 +#define MXRT1050_IOMUXC_GPIO_AD_B1_08_CSI_DATA09 0x11C 0x30C 0x41C 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_08_GPIO1_IO24 0x11C 0x30C 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_08_USDHC2_CMD 0x11C 0x30C 0x5E4 0x6 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_08_KPP_ROW03 0x11C 0x30C 0x000 0x7 0x0 + +#define MXRT1050_IOMUXC_GPIO_AD_B1_09_FLEXSPI_A_DQS 0x120 0x310 0x4A4 0x0 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_09_FLEXPWM4_PWM1_A 0x120 0x310 0x498 0x1 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_09_FLEXCAN1_RX 0x120 0x310 0x44C 0x2 0x2 +#define MXRT1050_IOMUXC_GPIO_AD_B1_09_SAI1_MCLK 0x120 0x310 0x58C 0x3 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_09_CSI_DATA08 0x120 0x310 0x418 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_09_GPIO1_IO25 0x120 0x310 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_09_USDHC2_CLK 0x120 0x310 0x5DC 0x6 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_09_KPP_COL03 0x120 0x310 0x000 0x7 0x0 + +#define MXRT1050_IOMUXC_GPIO_AD_B1_10_FLEXSPI_A_DATA3 0x124 0x314 0x4B4 0x0 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_10_WDOG1_B 0x124 0x314 0x000 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_10_LPUART8_TXD 0x124 0x314 0x564 0x2 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_10_SAI1_RX_SYNC 0x124 0x314 0x5A4 0x3 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_10_CSI_DATA07 0x124 0x314 0x414 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_10_GPIO1_IO26 0x124 0x314 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_10_USDHC2_WP 0x124 0x314 0x608 0x6 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_10_KPP_ROW02 0x124 0x314 0x000 0x7 0x0 + +#define MXRT1050_IOMUXC_GPIO_AD_B1_11_FLEXSPI_A_DATA2 0x128 0x318 0x4B0 0x0 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_11_EWM_OUT_B 0x128 0x318 0x000 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_11_LPUART8_RXD 0x128 0x318 0x560 0x2 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_11_SAI1_RX_BCLK 0x128 0x318 0x590 0x3 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_11_CSI_DATA06 0x128 0x318 0x410 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_11_GPIO1_IO27 0x128 0x318 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_11_USDHC2_RESET_B 0x128 0x318 0x000 0x6 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_11_KPP_COL02 0x128 0x318 0x000 0x7 0x0 + +#define MXRT1050_IOMUXC_GPIO_AD_B1_12_FLEXSPI_A_DATA1 0x12C 0x31C 0x4AC 0x0 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_12_ACMP1_OUT 0x12C 0x31C 0x000 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_12_LPSPI3_PCS0 0x12C 0x31C 0x50C 0x2 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_12_SAI1_RX_DATA00 0x12C 0x31C 0x594 0x3 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_12_CSI_DATA05 0x12C 0x31C 0x40C 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_12_GPIO1_IO28 0x12C 0x31C 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_12_USDHC2_DATA4 0x12C 0x31C 0x5F8 0x6 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_12_KPP_ROW01 0x12C 0x31C 0x000 0x7 0x0 + +#define MXRT1050_IOMUXC_GPIO_AD_B1_13_FLEXSPI_A_DATA0 0x130 0x320 0x4A8 0x0 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_13_ACMP2_OUT 0x130 0x320 0x000 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_13_LPSPI3_SDI 0x130 0x320 0x514 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_13_SAI1_TX_DATA00 0x130 0x320 0x000 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_13_CSI_DATA04 0x130 0x320 0x408 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_13_GPIO1_IO29 0x130 0x320 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_13_USDHC2_DATA5 0x130 0x320 0x5FC 0x6 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_13_KPP_COL01 0x130 0x320 0x000 0x7 0x0 + +#define MXRT1050_IOMUXC_GPIO_AD_B1_14_FLEXSPI_A_SCLK 0x134 0x324 0x4C8 0x0 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_14_ACMP3_OUT 0x134 0x324 0x000 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_14_LPSPI3_SDO 0x134 0x324 0x518 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_14_SAI1_TX_BCLK 0x134 0x324 0x5A8 0x3 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_14_CSI_DATA03 0x134 0x324 0x404 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_14_GPIO1_IO30 0x134 0x324 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_14_USDHC2_DATA6 0x134 0x324 0x600 0x6 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_14_KPP_ROW00 0x134 0x324 0x000 0x7 0x0 + +#define MXRT1050_IOMUXC_GPIO_AD_B1_15_FLEXSPI_A_SS0_B 0x138 0x328 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_15_ACMP4_OUT 0x138 0x328 0x000 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_15_LPSPI3_SCK 0x138 0x328 0x510 0x2 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_15_SAI1_TX_SYNC 0x138 0x328 0x5AC 0x3 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_15_CSI_DATA02 0x138 0x328 0x400 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_15_GPIO1_IO31 0x138 0x328 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_AD_B1_15_USDHC2_DATA7 0x138 0x328 0x604 0x6 0x1 +#define MXRT1050_IOMUXC_GPIO_AD_B1_15_KPP_COL00 0x138 0x328 0x000 0x7 0x0 + +#define MXRT1050_IOMUXC_GPIO_B0_00_LCD_CLK 0x13C 0x32C 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_00_TMR1_TIMER0 0x13C 0x32C 0x000 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_00_MQS_RIGHT 0x13C 0x32C 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_00_LPSPI4_PCS0 0x13C 0x32C 0x51C 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_00_FLEXIO2_D00 0x13C 0x32C 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_00_GPIO2_IO00 0x13C 0x32C 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_00_SEMC_CSX1 0x13C 0x32C 0x000 0x6 0x0 + +#define MXRT1050_IOMUXC_GPIO_B0_01_LCD_ENABLE 0x140 0x330 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_01_TMR1_TIMER1 0x140 0x330 0x000 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_01_MQS_LEFT 0x140 0x330 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_01_LPSPI4_SDI 0x140 0x330 0x524 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_01_FLEXIO2_D01 0x140 0x330 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_01_GPIO2_IO01 0x140 0x330 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_01_SEMC_CSX2 0x140 0x330 0x000 0x6 0x0 + +#define MXRT1050_IOMUXC_GPIO_B0_02_LCD_HSYNC 0x144 0x334 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_02_TMR1_TIMER2 0x144 0x334 0x000 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_02_FLEXCAN1_TX 0x144 0x334 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_02_LPSPI4_SDO 0x144 0x334 0x528 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_02_FLEXIO2_D02 0x144 0x334 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_02_GPIO2_IO02 0x144 0x334 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_02_SEMC_CSX3 0x144 0x334 0x000 0x6 0x0 + +#define MXRT1050_IOMUXC_GPIO_B0_03_LCD_VSYNC 0x148 0x338 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_03_TMR2_TIMER0 0x148 0x338 0x56C 0x1 0x1 +#define MXRT1050_IOMUXC_GPIO_B0_03_FLEXCAN1_RX 0x148 0x338 0x44C 0x2 0x3 +#define MXRT1050_IOMUXC_GPIO_B0_03_LPSPI4_SCK 0x148 0x338 0x520 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_03_FLEXIO2_D03 0x148 0x338 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_03_GPIO2_IO03 0x148 0x338 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_03_WDOG2_RESET_B_DEB 0x148 0x338 0x000 0x6 0x0 + +#define MXRT1050_IOMUXC_GPIO_B0_04_LCD_DATA00 0x14C 0x33C 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_04_TMR2_TIMER1 0x14C 0x33C 0x570 0x1 0x1 +#define MXRT1050_IOMUXC_GPIO_B0_04_LPI2C2_SCL 0x14C 0x33C 0x4D4 0x2 0x1 +#define MXRT1050_IOMUXC_GPIO_B0_04_ARM_TRACE00 0x14C 0x33C 0x000 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_04_FLEXIO2_D04 0x14C 0x33C 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_04_GPIO2_IO04 0x14C 0x33C 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_04_SRC_BT_CFG00 0x14C 0x33C 0x000 0x6 0x0 + +#define MXRT1050_IOMUXC_GPIO_B0_05_LCD_DATA01 0x150 0x340 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_05_TMR2_TIMER2 0x150 0x340 0x574 0x1 0x1 +#define MXRT1050_IOMUXC_GPIO_B0_05_LPI2C2_SDA 0x150 0x340 0x4D8 0x2 0x1 +#define MXRT1050_IOMUXC_GPIO_B0_05_ARM_TRACE01 0x150 0x340 0x000 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_05_FLEXIO2_D05 0x150 0x340 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_05_GPIO2_IO05 0x150 0x340 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_05_SRC_BT_CFG01 0x150 0x340 0x000 0x6 0x0 + +#define MXRT1050_IOMUXC_GPIO_B0_06_LCD_DATA02 0x154 0x344 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_06_TMR3_TIMER0 0x154 0x344 0x57C 0x1 0x2 +#define MXRT1050_IOMUXC_GPIO_B0_06_FLEXPWM2_PWM0_A 0x154 0x344 0x478 0x2 0x1 +#define MXRT1050_IOMUXC_GPIO_B0_06_ARM_TRACE02 0x154 0x344 0x000 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_06_FLEXIO2_D06 0x154 0x344 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_06_GPIO2_IO06 0x154 0x344 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_06_SRC_BT_CFG02 0x154 0x344 0x000 0x6 0x0 + +#define MXRT1050_IOMUXC_GPIO_B0_07_LCD_DATA03 0x158 0x348 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_07_TMR3_TIMER1 0x158 0x348 0x580 0x1 0x2 +#define MXRT1050_IOMUXC_GPIO_B0_07_FLEXPWM2_PWM0_B 0x158 0x348 0x488 0x2 0x1 +#define MXRT1050_IOMUXC_GPIO_B0_07_ARM_TRACE03 0x158 0x348 0x000 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_07_FLEXIO2_D07 0x158 0x348 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_07_GPIO2_IO07 0x158 0x348 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_07_SRC_BT_CFG03 0x158 0x348 0x000 0x6 0x0 + +#define MXRT1050_IOMUXC_GPIO_B0_08_LCD_DATA04 0x15C 0x34C 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_08_TMR3_TIMER2 0x15C 0x34C 0x584 0x1 0x2 +#define MXRT1050_IOMUXC_GPIO_B0_08_FLEXPWM2_PWM1_A 0x15C 0x34C 0x47C 0x2 0x1 +#define MXRT1050_IOMUXC_GPIO_B0_08_LPUART3_TXD 0x15C 0x34C 0x53C 0x3 0x2 +#define MXRT1050_IOMUXC_GPIO_B0_08_FLEXIO2_D08 0x15C 0x34C 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_08_GPIO2_IO08 0x15C 0x34C 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_08_SRC_BT_CFG04 0x15C 0x34C 0x000 0x6 0x0 + +#define MXRT1050_IOMUXC_GPIO_B0_09_LCD_DATA05 0x160 0x350 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_09_TMR4_TIMER0 0x160 0x350 0x000 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_09_FLEXPWM2_PWM1_B 0x160 0x350 0x48C 0x2 0x1 +#define MXRT1050_IOMUXC_GPIO_B0_09_LPUART3_RXD 0x160 0x350 0x538 0x3 0x2 +#define MXRT1050_IOMUXC_GPIO_B0_09_FLEXIO2_D09 0x160 0x350 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_09_GPIO2_IO09 0x160 0x350 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_09_SRC_BT_CFG05 0x160 0x350 0x000 0x6 0x0 + +#define MXRT1050_IOMUXC_GPIO_B0_10_LCD_DATA06 0x164 0x354 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_10_TMR4_TIMER1 0x164 0x354 0x000 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_10_FLEXPWM2_PWM2_A 0x164 0x354 0x480 0x2 0x1 +#define MXRT1050_IOMUXC_GPIO_B0_10_SAI1_TX_DATA03 0x164 0x354 0x598 0x3 0x1 +#define MXRT1050_IOMUXC_GPIO_B0_10_FLEXIO2_D10 0x164 0x354 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_10_GPIO2_IO10 0x164 0x354 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_10_SRC_BT_CFG06 0x164 0x354 0x000 0x6 0x0 + +#define MXRT1050_IOMUXC_GPIO_B0_11_LCD_DATA07 0x168 0x358 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_11_TMR4_TIMER2 0x168 0x358 0x000 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_11_FLEXPWM2_PWM2_B 0x168 0x358 0x490 0x2 0x1 +#define MXRT1050_IOMUXC_GPIO_B0_11_SAI1_TX_DATA02 0x168 0x358 0x59C 0x3 0x1 +#define MXRT1050_IOMUXC_GPIO_B0_11_FLEXIO2_D11 0x168 0x358 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_11_GPIO2_IO11 0x168 0x358 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_11_SRC_BT_CFG07 0x168 0x358 0x000 0x6 0x0 + +#define MXRT1050_IOMUXC_GPIO_B0_12_LCD_DATA08 0x16C 0x35C 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_12_XBAR_INOUT10 0x16C 0x35C 0x000 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_12_ARM_TRACE_CLK 0x16C 0x35C 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_12_SAI1_TX_DATA01 0x16C 0x35C 0x5A0 0x3 0x1 +#define MXRT1050_IOMUXC_GPIO_B0_12_FLEXIO2_D12 0x16C 0x35C 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_12_GPIO2_IO12 0x16C 0x35C 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_12_SRC_BT_CFG08 0x16C 0x35C 0x000 0x6 0x0 + +#define MXRT1050_IOMUXC_GPIO_B0_13_LCD_DATA09 0x170 0x360 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_13_XBAR_INOUT11 0x170 0x360 0x000 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_13_ARM_TRACE_SWO 0x170 0x360 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_13_SAI1_MCLK 0x170 0x360 0x58C 0x3 0x2 +#define MXRT1050_IOMUXC_GPIO_B0_13_FLEXIO2_D13 0x170 0x360 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_13_GPIO2_IO13 0x170 0x360 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_13_SRC_BT_CFG09 0x170 0x360 0x000 0x6 0x0 + +#define MXRT1050_IOMUXC_GPIO_B0_14_LCD_DATA10 0x174 0x364 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_14_XBAR_INOUT12 0x174 0x364 0x000 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_14_ARM_CM7_TXEV 0x174 0x364 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_14_SAI1_RX_SYNC 0x174 0x364 0x5A4 0x3 0x2 +#define MXRT1050_IOMUXC_GPIO_B0_14_FLEXIO2_D14 0x174 0x364 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_14_GPIO2_IO14 0x174 0x364 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_14_SRC_BT_CFG10 0x174 0x364 0x000 0x6 0x0 + +#define MXRT1050_IOMUXC_GPIO_B0_15_LCD_DATA11 0x178 0x368 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_15_XBAR_INOUT13 0x178 0x368 0x000 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_15_ARM_CM7_RXEV 0x178 0x368 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_15_SAI1_RX_BCLK 0x178 0x368 0x590 0x3 0x2 +#define MXRT1050_IOMUXC_GPIO_B0_15_FLEXIO2_D15 0x178 0x368 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_15_GPIO2_IO15 0x178 0x368 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_B0_15_SRC_BT_CFG11 0x178 0x368 0x000 0x6 0x0 + +#define MXRT1050_IOMUXC_GPIO_B1_00_LCD_DATA12 0x17C 0x36C 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_00_XBAR_INOUT14 0x17C 0x36C 0x644 0x1 0x1 +#define MXRT1050_IOMUXC_GPIO_B1_00_LPUART4_TXD 0x17C 0x36C 0x544 0x2 0x2 +#define MXRT1050_IOMUXC_GPIO_B1_00_SAI1_RX_DATA00 0x17C 0x36C 0x594 0x3 0x2 +#define MXRT1050_IOMUXC_GPIO_B1_00_FLEXIO2_D16 0x17C 0x36C 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_00_GPIO2_IO16 0x17C 0x36C 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_00_FLEXPWM1_PWM3_A 0x17C 0x36C 0x454 0x6 0x4 + +#define MXRT1050_IOMUXC_GPIO_B1_01_LCD_DATA13 0x180 0x370 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_01_XBAR_INOUT15 0x180 0x370 0x648 0x1 0x1 +#define MXRT1050_IOMUXC_GPIO_B1_01_LPUART4_RXD 0x180 0x370 0x540 0x2 0x2 +#define MXRT1050_IOMUXC_GPIO_B1_01_SAI1_TX_DATA00 0x180 0x370 0x000 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_01_FLEXIO2_D17 0x180 0x370 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_01_GPIO2_IO17 0x180 0x370 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_01_FLEXPWM1_PWM3_B 0x180 0x370 0x464 0x6 0x4 + +#define MXRT1050_IOMUXC_GPIO_B1_02_LCD_DATA14 0x184 0x374 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_02_XBAR_INOUT16 0x184 0x374 0x64C 0x1 0x1 +#define MXRT1050_IOMUXC_GPIO_B1_02_LPSPI4_PCS2 0x184 0x374 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_02_SAI1_TX_BCLK 0x184 0x374 0x5A8 0x3 0x2 +#define MXRT1050_IOMUXC_GPIO_B1_02_FLEXIO2_D18 0x184 0x374 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_02_GPIO2_IO18 0x184 0x374 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_02_FLEXPWM2_PWM3_A 0x184 0x374 0x000 0x6 0x0 + +#define MXRT1050_IOMUXC_GPIO_B1_03_LCD_DATA15 0x188 0x378 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_03_XBAR_INOUT17 0x188 0x378 0x62C 0x1 0x3 +#define MXRT1050_IOMUXC_GPIO_B1_03_LPSPI4_PCS1 0x188 0x378 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_03_SAI1_TX_SYNC 0x188 0x378 0x5AC 0x3 0x2 +#define MXRT1050_IOMUXC_GPIO_B1_03_FLEXIO2_D19 0x188 0x378 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_03_GPIO2_IO19 0x188 0x378 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_03_FLEXPWM2_PWM3_B 0x188 0x378 0x484 0x6 0x3 + +#define MXRT1050_IOMUXC_GPIO_B1_04_LCD_DATA16 0x18C 0x37C 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_04_LPSPI4_PCS0 0x18C 0x37C 0x51C 0x1 0x1 +#define MXRT1050_IOMUXC_GPIO_B1_04_CSI_DATA15 0x18C 0x37C 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_04_ENET_RX_DATA00 0x18C 0x37C 0x434 0x3 0x1 +#define MXRT1050_IOMUXC_GPIO_B1_04_FLEXIO2_D20 0x18C 0x37C 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_04_GPIO2_IO20 0x18C 0x37C 0x000 0x5 0x0 + +#define MXRT1050_IOMUXC_GPIO_B1_05_LCD_DATA17 0x190 0x380 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_05_LPSPI4_SDI 0x190 0x380 0x524 0x1 0x1 +#define MXRT1050_IOMUXC_GPIO_B1_05_CSI_DATA14 0x190 0x380 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_05_ENET_RX_DATA01 0x190 0x380 0x438 0x3 0x1 +#define MXRT1050_IOMUXC_GPIO_B1_05_FLEXIO2_D21 0x190 0x380 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_05_GPIO2_IO21 0x190 0x380 0x000 0x5 0x0 + +#define MXRT1050_IOMUXC_GPIO_B1_06_LCD_DATA18 0x194 0x384 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_06_LPSPI4_SDO 0x194 0x384 0x528 0x1 0x1 +#define MXRT1050_IOMUXC_GPIO_B1_06_CSI_DATA13 0x194 0x384 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_06_ENET_RX_EN 0x194 0x384 0x43C 0x3 0x1 +#define MXRT1050_IOMUXC_GPIO_B1_06_FLEXIO2_D22 0x194 0x384 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_06_GPIO2_IO22 0x194 0x384 0x000 0x5 0x0 + +#define MXRT1050_IOMUXC_GPIO_B1_07_LCD_DATA19 0x198 0x388 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_07_LPSPI4_SCK 0x198 0x388 0x520 0x1 0x1 +#define MXRT1050_IOMUXC_GPIO_B1_07_CSI_DATA12 0x198 0x388 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_07_ENET_TX_DATA00 0x198 0x388 0x000 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_07_FLEXIO2_D23 0x198 0x388 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_07_GPIO2_IO23 0x198 0x388 0x000 0x5 0x0 + +#define MXRT1050_IOMUXC_GPIO_B1_08_LCD_DATA20 0x19C 0x38C 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_08_TMR1_TIMER3 0x19C 0x38C 0x000 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_08_CSI_DATA11 0x19C 0x38C 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_08_ENET_TX_DATA01 0x19C 0x38C 0x000 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_08_FLEXIO2_D24 0x19C 0x38C 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_08_GPIO2_IO24 0x19C 0x38C 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_08_FLEXCAN2_TX 0x19C 0x38C 0x000 0x6 0x0 + +#define MXRT1050_IOMUXC_GPIO_B1_09_LCD_DATA21 0x1A0 0x390 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_09_TMR2_TIMER3 0x1A0 0x390 0x578 0x1 0x1 +#define MXRT1050_IOMUXC_GPIO_B1_09_CSI_DATA10 0x1A0 0x390 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_09_ENET_TX_EN 0x1A0 0x390 0x000 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_09_FLEXIO2_D25 0x1A0 0x390 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_09_GPIO2_IO25 0x1A0 0x390 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_09_FLEXCAN2_RX 0x1A0 0x390 0x450 0x6 0x3 + +#define MXRT1050_IOMUXC_GPIO_B1_10_LCD_DATA22 0x1A4 0x394 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_10_TMR3_TIMER3 0x1A4 0x394 0x588 0x1 0x2 +#define MXRT1050_IOMUXC_GPIO_B1_10_CSI_DATA00 0x1A4 0x394 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_10_ENET_TX_CLK 0x1A4 0x394 0x448 0x3 0x1 +#define MXRT1050_IOMUXC_GPIO_B1_10_FLEXIO2_D26 0x1A4 0x394 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_10_GPIO2_IO26 0x1A4 0x394 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_10_ENET_REF_CLK 0x1A4 0x394 0x42C 0x6 0x1 + +#define MXRT1050_IOMUXC_GPIO_B1_11_LCD_DATA23 0x1A8 0x398 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_11_TMR4_TIMER3 0x1A8 0x398 0x000 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_11_CSI_DATA01 0x1A8 0x398 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_11_ENET_RX_ER 0x1A8 0x398 0x440 0x3 0x1 +#define MXRT1050_IOMUXC_GPIO_B1_11_FLEXIO2_D27 0x1A8 0x398 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_11_GPIO2_IO27 0x1A8 0x398 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_11_LPSPI4_PCS3 0x1A8 0x398 0x000 0x6 0x0 + +#define MXRT1050_IOMUXC_GPIO_B1_12_LPUART5_TXD 0x1AC 0x39C 0x54C 0x1 0x1 +#define MXRT1050_IOMUXC_GPIO_B1_12_CSI_PIXCLK 0x1AC 0x39C 0x424 0x2 0x1 +#define MXRT1050_IOMUXC_GPIO_B1_12_ENET_1588_EVENT0_IN 0x1AC 0x39C 0x444 0x3 0x2 +#define MXRT1050_IOMUXC_GPIO_B1_12_FLEXIO2_D28 0x1AC 0x39C 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_12_GPIO2_IO28 0x1AC 0x39C 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_12_USDHC1_CD_B 0x1AC 0x39C 0x5D4 0x6 0x2 + +#define MXRT1050_IOMUXC_GPIO_B1_13_WDOG1_B 0x1B0 0x3A0 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_13_LPUART5_RXD 0x1B0 0x3A0 0x548 0x1 0x1 +#define MXRT1050_IOMUXC_GPIO_B1_13_CSI_VSYNC 0x1B0 0x3A0 0x428 0x2 0x2 +#define MXRT1050_IOMUXC_GPIO_B1_13_ENET_1588_EVENT0_OUT 0x1B0 0x3A0 0x000 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_13_FLEXIO2_D29 0x1B0 0x3A0 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_13_GPIO2_IO29 0x1B0 0x3A0 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_13_USDHC1_WP 0x1B0 0x3A0 0x5D8 0x6 0x3 + +#define MXRT1050_IOMUXC_GPIO_B1_14_ENET_MDC 0x1B4 0x3A4 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_14_FLEXPWM4_PWM2_A 0x1B4 0x3A4 0x49C 0x1 0x1 +#define MXRT1050_IOMUXC_GPIO_B1_14_CSI_HSYNC 0x1B4 0x3A4 0x420 0x2 0x2 +#define MXRT1050_IOMUXC_GPIO_B1_14_XBAR_INOUT02 0x1B4 0x3A4 0x60C 0x3 0x1 +#define MXRT1050_IOMUXC_GPIO_B1_14_FLEXIO2_D30 0x1B4 0x3A4 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_14_GPIO2_IO30 0x1B4 0x3A4 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_14_USDHC1_VSELECT 0x1B4 0x3A4 0x000 0x6 0x0 + +#define MXRT1050_IOMUXC_GPIO_B1_15_ENET_MDIO 0x1B8 0x3A8 0x430 0x0 0x2 +#define MXRT1050_IOMUXC_GPIO_B1_15_FLEXPWM4_PWM3_A 0x1B8 0x3A8 0x4A0 0x1 0x1 +#define MXRT1050_IOMUXC_GPIO_B1_15_CSI_MCLK 0x1B8 0x3A8 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_15_XBAR_INOUT03 0x1B8 0x3A8 0x610 0x3 0x1 +#define MXRT1050_IOMUXC_GPIO_B1_15_FLEXIO2_D31 0x1B8 0x3A8 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_15_GPIO2_IO31 0x1B8 0x3A8 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_B1_15_USDHC1_RESET_B 0x1B8 0x3A8 0x000 0x6 0x0 + +#define MXRT1050_IOMUXC_GPIO_SD_B0_00_USDHC1_CMD 0x1BC 0x3AC 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B0_00_FLEXPWM1_PWM0_A 0x1BC 0x3AC 0x458 0x1 0x1 +#define MXRT1050_IOMUXC_GPIO_SD_B0_00_LPI2C3_SCL 0x1BC 0x3AC 0x4DC 0x2 0x1 +#define MXRT1050_IOMUXC_GPIO_SD_B0_00_XBAR_INOUT04 0x1BC 0x3AC 0x614 0x3 0x1 +#define MXRT1050_IOMUXC_GPIO_SD_B0_00_LPSPI1_SCK 0x1BC 0x3AC 0x4F0 0x4 0x1 +#define MXRT1050_IOMUXC_GPIO_SD_B0_00_GPIO3_IO12 0x1BC 0x3AC 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B0_00_FLEXSPI_A_SS1_B 0x1BC 0x3AC 0x000 0x6 0x0 + +#define MXRT1050_IOMUXC_GPIO_SD_B0_01_USDHC1_CLK 0x1C0 0x3B0 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B0_01_FLEXPWM1_PWM0_B 0x1C0 0x3B0 0x000 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B0_01_LPI2C3_SDA 0x1C0 0x3B0 0x4E0 0x2 0x1 +#define MXRT1050_IOMUXC_GPIO_SD_B0_01_XBAR_INOUT05 0x1C0 0x3B0 0x618 0x3 0x1 +#define MXRT1050_IOMUXC_GPIO_SD_B0_01_LPSPI1_PCS0 0x1C0 0x3B0 0x4EC 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B0_01_GPIO3_IO13 0x1C0 0x3B0 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B0_01_FLEXSPI_B_SS1_B 0x1C0 0x3B0 0x000 0x6 0x0 + +#define MXRT1050_IOMUXC_GPIO_SD_B0_02_USDHC1_DATA0 0x1C4 0x3B4 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B0_02_FLEXPWM1_PWM1_A 0x1C4 0x3B4 0x45C 0x1 0x1 +#define MXRT1050_IOMUXC_GPIO_SD_B0_02_LPUART8_CTS_B 0x1C4 0x3B4 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B0_02_XBAR_INOUT06 0x1C4 0x3B4 0x61C 0x3 0x1 +#define MXRT1050_IOMUXC_GPIO_SD_B0_02_LPSPI1_SDO 0x1C4 0x3B4 0x4F8 0x4 0x1 +#define MXRT1050_IOMUXC_GPIO_SD_B0_02_GPIO3_IO14 0x1C4 0x3B4 0x000 0x5 0x0 + +#define MXRT1050_IOMUXC_GPIO_SD_B0_03_USDHC1_DATA1 0x1C8 0x3B8 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B0_03_FLEXPWM1_PWM1_B 0x1C8 0x3B8 0x46C 0x1 0x1 +#define MXRT1050_IOMUXC_GPIO_SD_B0_03_LPUART8_RTS_B 0x1C8 0x3B8 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B0_03_XBAR_INOUT07 0x1C8 0x3B8 0x620 0x3 0x1 +#define MXRT1050_IOMUXC_GPIO_SD_B0_03_LPSPI1_SDI 0x1C8 0x3B8 0x4F4 0x4 0x1 +#define MXRT1050_IOMUXC_GPIO_SD_B0_03_GPIO3_IO15 0x1C8 0x3B8 0x000 0x5 0x0 + +#define MXRT1050_IOMUXC_GPIO_SD_B0_04_USDHC1_DATA2 0x1CC 0x3BC 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B0_04_FLEXPWM1_PWM2_A 0x1CC 0x3BC 0x460 0x1 0x1 +#define MXRT1050_IOMUXC_GPIO_SD_B0_04_LPUART8_TXD 0x1CC 0x3BC 0x564 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B0_04_XBAR_INOUT08 0x1CC 0x3BC 0x624 0x3 0x1 +#define MXRT1050_IOMUXC_GPIO_SD_B0_04_FLEXSPI_B_SS0_B 0x1CC 0x3BC 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B0_04_GPIO3_IO16 0x1CC 0x3BC 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B0_04_CCM_CLKO1 0x1CC 0x3BC 0x000 0x6 0x0 + +#define MXRT1050_IOMUXC_GPIO_SD_B0_05_USDHC1_DATA3 0x1D0 0x3C0 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B0_05_FLEXPWM1_PWM2_B 0x1D0 0x3C0 0x470 0x1 0x1 +#define MXRT1050_IOMUXC_GPIO_SD_B0_05_LPUART8_RXD 0x1D0 0x3C0 0x560 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B0_05_XBAR_INOUT09 0x1D0 0x3C0 0x628 0x3 0x1 +#define MXRT1050_IOMUXC_GPIO_SD_B0_05_FLEXSPI_B_DQS 0x1D0 0x3C0 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B0_05_GPIO3_IO17 0x1D0 0x3C0 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B0_05_CCM_CLKO2 0x1D0 0x3C0 0x000 0x6 0x0 + +#define MXRT1050_IOMUXC_GPIO_SD_B1_00_USDHC2_DATA3 0x1D4 0x3C4 0x5F4 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_00_FLEXSPI_B_DATA3 0x1D4 0x3C4 0x4C4 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_00_FLEXPWM1_PWM3_A 0x1D4 0x3C4 0x454 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_00_SAI1_TX_DATA03 0x1D4 0x3C4 0x598 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_00_LPUART4_TXD 0x1D4 0x3C4 0x544 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_00_GPIO3_IO00 0x1D4 0x3C4 0x000 0x5 0x0 + +#define MXRT1050_IOMUXC_GPIO_SD_B1_01_USDHC2_DATA2 0x1D8 0x3C8 0x5F0 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_01_FLEXSPI_B_DATA2 0x1D8 0x3C8 0x4C0 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_01_FLEXPWM1_PWM3_B 0x1D8 0x3C8 0x464 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_01_SAI1_TX_DATA02 0x1D8 0x3C8 0x59C 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_01_LPUART4_RXD 0x1D8 0x3C8 0x540 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_01_GPIO3_IO01 0x1D8 0x3C8 0x000 0x5 0x0 + +#define MXRT1050_IOMUXC_GPIO_SD_B1_02_USDHC2_DATA1 0x1DC 0x3CC 0x5EC 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_02_FLEXSPI_B_DATA1 0x1DC 0x3CC 0x4BC 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_02_FLEXPWM2_PWM3_A 0x1DC 0x3CC 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_02_SAI1_TX_DATA01 0x1DC 0x3CC 0x5A0 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_02_FLEXCAN1_TX 0x1DC 0x3CC 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_02_GPIO3_IO02 0x1DC 0x3CC 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_02_CCM_WAIT 0x1DC 0x3CC 0x000 0x6 0x0 + +#define MXRT1050_IOMUXC_GPIO_SD_B1_03_USDHC2_DATA0 0x1E0 0x3D0 0x5E8 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_03_FLEXSPI_B_DATA0 0x1E0 0x3D0 0x4B8 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_03_FLEXPWM2_PWM3_B 0x1E0 0x3D0 0x484 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_03_SAI1_MCLK 0x1E0 0x3D0 0x58C 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_03_FLEXCAN1_RX 0x1E0 0x3D0 0x44C 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_03_GPIO3_IO03 0x1E0 0x3D0 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_03_CCM_PMIC_READY 0x1E0 0x3D0 0x3FC 0x6 0x0 + +#define MXRT1050_IOMUXC_GPIO_SD_B1_04_USDHC2_CLK 0x1E4 0x3D4 0x5DC 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_04_FLEXSPI_B_SCLK 0x1E4 0x3D4 0x000 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_04_LPI2C1_SCL 0x1E4 0x3D4 0x4CC 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_04_SAI1_RX_SYNC 0x1E4 0x3D4 0x5A4 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_04_FLEXCAN1_A_SS1_B 0x1E4 0x3D4 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_04_GPIO3_IO04 0x1E4 0x3D4 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_04_CCM_STOP 0x1E4 0x3D4 0x000 0x6 0x0 + +#define MXRT1050_IOMUXC_GPIO_SD_B1_05_USDHC2_CMD 0x1E8 0x3D8 0x5E4 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_05_FLEXSPI_A_DQS 0x1E8 0x3D8 0x4A4 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_05_LPI2C1_SDA 0x1E8 0x3D8 0x4D0 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_05_SAI1_RX_BCLK 0x1E8 0x3D8 0x590 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_05_FLEXCAN1_B_SS0_B 0x1E8 0x3D8 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_05_GPIO3_IO05 0x1E8 0x3D8 0x000 0x5 0x0 + +#define MXRT1050_IOMUXC_GPIO_SD_B1_06_USDHC2_RESET_B 0x1EC 0x3DC 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_06_FLEXSPI_A_SS0_B 0x1EC 0x3DC 0x000 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_06_LPUART7_CTS_B 0x1EC 0x3DC 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_06_SAI1_RX_DATA00 0x1EC 0x3DC 0x594 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_06_LPSPI2_PCS0 0x1EC 0x3DC 0x4FC 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_06_GPIO3_IO06 0x1EC 0x3DC 0x000 0x5 0x0 + +#define MXRT1050_IOMUXC_GPIO_SD_B1_07_SEMC_CSX1 0x1F0 0x3E0 0x000 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_07_FLEXSPI_A_SCLK 0x1F0 0x3E0 0x4C8 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_07_LPUART7_RTS_B 0x1F0 0x3E0 0x000 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_07_SAI1_TX_DATA00 0x1F0 0x3E0 0x000 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_07_LPSPI2_SCK 0x1F0 0x3E0 0x500 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_07_GPIO3_IO07 0x1F0 0x3E0 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_07_CCM_REF_EN_B 0x1F0 0x3E0 0x000 0x6 0x0 + +#define MXRT1050_IOMUXC_GPIO_SD_B1_08_USDHC2_DATA4 0x1F4 0x3E4 0x5F8 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_08_FLEXSPI_A_DATA0 0x1F4 0x3E4 0x4A8 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_08_LPUART7_TXD 0x1F4 0x3E4 0x55C 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_08_SAI1_TX_BLCK 0x1F4 0x3E4 0x5A8 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_08_LPSPI2_SDO 0x1F4 0x3E4 0x508 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_08_GPIO3_IO08 0x1F4 0x3E4 0x000 0x5 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_08_SEMC_CSX2 0x1F4 0x3E4 0x000 0x6 0x0 + +#define MXRT1050_IOMUXC_GPIO_SD_B1_09_USDHC2_DATA5 0x1F8 0x3E8 0x5FC 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_09_FLEXSPI_A_DATA1 0x1F8 0x3E8 0x4AC 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_09_LPUART7_RXD 0x1F8 0x3E8 0x558 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_09_SAI1_TX_SYNC 0x1F8 0x3E8 0x5AC 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_09_LPSPI2_SDI 0x1F8 0x3E8 0x504 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_09_GPIO3_IO09 0x1F8 0x3E8 0x000 0x5 0x0 + +#define MXRT1050_IOMUXC_GPIO_SD_B1_10_USDHC2_DATA6 0x1FC 0x3EC 0x600 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_10_FLEXSPI_A_DATA2 0x1FC 0x3EC 0x4B0 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_10_LPUART2_RXD 0x1FC 0x3EC 0x52C 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_10_LPI2C2_SDA 0x1FC 0x3EC 0x4D8 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_10_LPSPI2_PCS2 0x1FC 0x3EC 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_10_GPIO3_IO10 0x1FC 0x3EC 0x000 0x5 0x0 + +#define MXRT1050_IOMUXC_GPIO_SD_B1_11_USDHC2_DATA7 0x200 0x3F0 0x604 0x0 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_11_FLEXSPI_A_DATA3 0x200 0x3F0 0x4B4 0x1 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_11_LPUART2_TXD 0x200 0x3F0 0x530 0x2 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_11_LPI2C2_SCL 0x200 0x3F0 0x4D4 0x3 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_11_LPSPI2_PCS3 0x200 0x3F0 0x000 0x4 0x0 +#define MXRT1050_IOMUXC_GPIO_SD_B1_11_GPIO3_IO11 0x200 0x3F0 0x000 0x5 0x0 + +#endif /* _DT_BINDINGS_PINCTRL_IMXRT1050_PINFUNC_H */ diff --git a/dts/src/arm/intel-ixp42x-gateway-7001.dts b/dts/src/arm/intel-ixp42x-gateway-7001.dts index a1c03c965f..b7cbc90e1c 100644 --- a/dts/src/arm/intel-ixp42x-gateway-7001.dts +++ b/dts/src/arm/intel-ixp42x-gateway-7001.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: ISC /* - * Device Tree file for Gateway 7001 AP + * Device Tree file for Gateway 7001 AP based on IXP422 * Derived from boardfiles written by Imre Kaloz */ @@ -29,7 +29,6 @@ aliases { /* second UART is the primary console */ serial0 = &uart1; - serial1 = &uart0; }; soc { diff --git a/dts/src/arm/intel-ixp42x-netgear-wg302v2.dts b/dts/src/arm/intel-ixp42x-netgear-wg302v1.dts index a57009436e..df2ca6d95e 100644 --- a/dts/src/arm/intel-ixp42x-netgear-wg302v2.dts +++ b/dts/src/arm/intel-ixp42x-netgear-wg302v1.dts @@ -10,26 +10,26 @@ #include <dt-bindings/input/input.h> / { - model = "Netgear WG302 v2"; - compatible = "netgear,wg302v2", "intel,ixp42x"; + model = "Netgear WG302 v1"; + compatible = "netgear,wg302v1", "intel,ixp42x"; #address-cells = <1>; #size-cells = <1>; memory@0 { - /* 16 MB SDRAM according to OpenWrt database */ + /* 32 MB SDRAM according to boot arguments */ device_type = "memory"; - reg = <0x00000000 0x01000000>; + reg = <0x00000000 0x02000000>; }; chosen { - bootargs = "console=ttyS0,115200n8 root=/dev/sda1 rw rootwait"; - stdout-path = "uart1:115200n8"; + /* The RedBoot comes up in 9600 baud so let's keep this */ + bootargs = "console=ttyS0,9600n8"; + stdout-path = "uart1:9600n8"; }; aliases { /* These are switched around */ serial0 = &uart1; - serial1 = &uart0; }; soc { @@ -38,18 +38,17 @@ compatible = "intel,ixp4xx-flash", "cfi-flash"; bank-width = <2>; /* - * 32 MB of Flash in 128 0x20000 sized blocks - * mapped in at CS0 and CS1 + * 8 MB of Flash in 64 0x20000 sized blocks + * mapped in at CS0. */ - reg = <0 0x00000000 0x2000000>; + reg = <0 0x00000000 0x800000>; /* Configure expansion bus to allow writes */ intel,ixp4xx-eb-write-enable = <1>; partitions { compatible = "redboot-fis"; - /* CHECKME: guess this is Redboot FIS */ - fis-index-block = <0xff>; + fis-index-block = <0x3f>; }; }; }; @@ -82,14 +81,14 @@ queue-rx = <&qmgr 3>; queue-txready = <&qmgr 20>; phy-mode = "rgmii"; - phy-handle = <&phy8>; + phy-handle = <&phy30>; mdio { #address-cells = <1>; #size-cells = <0>; - phy8: ethernet-phy@8 { - reg = <8>; + phy30: ethernet-phy@30 { + reg = <30>; }; }; }; diff --git a/dts/src/arm/intel-ixp42x.dtsi b/dts/src/arm/intel-ixp42x.dtsi index d0e0f8afb7..84cee8ec3a 100644 --- a/dts/src/arm/intel-ixp42x.dtsi +++ b/dts/src/arm/intel-ixp42x.dtsi @@ -9,7 +9,7 @@ soc { bus@c4000000 { compatible = "intel,ixp42x-expansion-bus-controller", "syscon"; - reg = <0xc4000000 0x28>; + reg = <0xc4000000 0x30>; }; pci@c0000000 { diff --git a/dts/src/arm/iwg20d-q7-common.dtsi b/dts/src/arm/iwg20d-q7-common.dtsi index 849034a49a..03caea6fc6 100644 --- a/dts/src/arm/iwg20d-q7-common.dtsi +++ b/dts/src/arm/iwg20d-q7-common.dtsi @@ -181,7 +181,7 @@ }; &gpio2 { - touch-interrupt { + touch-interrupt-hog { gpio-hog; gpios = <12 GPIO_ACTIVE_LOW>; input; diff --git a/dts/src/arm/kirkwood-c200-v1.dts b/dts/src/arm/kirkwood-c200-v1.dts new file mode 100644 index 0000000000..f59ff7578d --- /dev/null +++ b/dts/src/arm/kirkwood-c200-v1.dts @@ -0,0 +1,310 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Ctera C200 V1 Board Description + * Copyright 2021-2022 Pawel Dembicki <paweldembicki@gmail.com> + */ + +/dts-v1/; + +#include "kirkwood.dtsi" +#include "kirkwood-6281.dtsi" +#include <dt-bindings/leds/common.h> + +/ { + model = "Ctera C200 V1"; + compatible = "ctera,c200-v1", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + + chosen { + bootargs = "console=ttyS0,115200"; + stdout-path = &uart0; + }; + + memory@0 { + device_type = "memory"; + reg = <0x00000000 0x20000000>; + }; + + keys { + compatible = "gpio-keys"; + pinctrl-0 = <&pmx_buttons>; + pinctrl-names = "default"; + + power { + label = "Power Button"; + linux,code = <KEY_POWER>; + gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>; + }; + + reset { + label = "Reset Button"; + linux,code = <KEY_RESTART>; + gpios = <&gpio1 17 GPIO_ACTIVE_LOW>; + }; + + usb1 { + label = "USB1 Button"; + linux,code = <BTN_0>; + gpios = <&gpio0 28 GPIO_ACTIVE_LOW>; + }; + + usb2 { + label = "USB2 Button"; + linux,code = <BTN_1>; + gpios = <&gpio0 29 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-poweroff { + compatible = "gpio-poweroff"; + pinctrl-0 = <&pmx_poweroff>; + pinctrl-names = "default"; + gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-0 = <&pmx_leds>; + pinctrl-names = "default"; + + led-0 { + function = LED_FUNCTION_DISK; + function-enumerator = <2>; + color = <LED_COLOR_ID_RED>; + gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; + }; + + led-1 { + function = LED_FUNCTION_DISK; + function-enumerator = <1>; + color = <LED_COLOR_ID_GREEN>; + gpios = <&gpio0 15 GPIO_ACTIVE_LOW>; + }; + + led-2 { + function = LED_FUNCTION_DISK; + function-enumerator = <2>; + color = <LED_COLOR_ID_GREEN>; + gpios = <&gpio0 16 GPIO_ACTIVE_LOW>; + }; + + led-3 { + function = LED_FUNCTION_DISK; + function-enumerator = <1>; + color = <LED_COLOR_ID_RED>; + gpios = <&gpio0 17 GPIO_ACTIVE_LOW>; + }; + + led-4 { + function = LED_FUNCTION_STATUS; + color = <LED_COLOR_ID_RED>; + gpios = <&gpio1 6 GPIO_ACTIVE_LOW>; + }; + + led-5 { + function = LED_FUNCTION_STATUS; + color = <LED_COLOR_ID_GREEN>; + gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; + }; + + led-6 { + function = LED_FUNCTION_INDICATOR; + color = <LED_COLOR_ID_BLUE>; + gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; + }; + + led-7 { + function = LED_FUNCTION_DISK_ERR; + color = <LED_COLOR_ID_RED>; + gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; + }; + + led-8 { + function = LED_FUNCTION_DISK_ERR; + color = <LED_COLOR_ID_GREEN>; + gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; + }; + + led-9 { + function = LED_FUNCTION_USB; + function-enumerator = <1>; + color = <LED_COLOR_ID_RED>; + gpios = <&gpio1 12 GPIO_ACTIVE_LOW>; + }; + + led-10 { + function = LED_FUNCTION_USB; + function-enumerator = <1>; + color = <LED_COLOR_ID_GREEN>; + gpios = <&gpio1 13 GPIO_ACTIVE_LOW>; + linux,default-trigger = "usbport"; + trigger-sources = <&hub_port2>; + }; + + led-11 { + function = LED_FUNCTION_USB; + function-enumerator = <2>; + color = <LED_COLOR_ID_RED>; + gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; + }; + + led-12 { + function = LED_FUNCTION_USB; + function-enumerator = <2>; + color = <LED_COLOR_ID_GREEN>; + gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; + linux,default-trigger = "usbport"; + trigger-sources = <&hub_port1>; + }; + }; +}; + +ð0 { + status = "okay"; +}; + +ð0port { + phy-handle = <ðphy9>; +}; + +&i2c0 { + status = "okay"; + + rtc@30 { + compatible = "s35390a"; + reg = <0x30>; + }; + + lm63@4c { + compatible = "national,lm63"; + reg = <0x4c>; + }; +}; + +&mdio { + status = "okay"; + + ethphy9: ethernet-phy@9 { + reg = <9>; + }; +}; + +&nand { + status = "okay"; + chip-delay = <40>; + + partition@0 { + label = "uboot"; + reg = <0x0000000 0x200000>; + }; + + partition@200000 { + label = "certificate"; + reg = <0x0200000 0x100000>; + }; + + partition@300000 { + label = "preset_cfg"; + reg = <0x0300000 0x100000>; + }; + + partition@400000 { + label = "dev_params"; + reg = <0x0400000 0x100000>; + }; + + partition@500000 { + label = "active_bank"; + reg = <0x0500000 0x0100000>; + }; + + partition@600000 { + label = "magic"; + reg = <0x0600000 0x0100000>; + }; + + partition@700000 { + label = "bank1"; + reg = <0x0700000 0x2800000>; + }; + + partition@2f00000 { + label = "bank2"; + reg = <0x2f00000 0x2800000>; + }; + + /* 0x5700000-0x5a00000 undefined in vendor firmware */ + + partition@5a00000 { + label = "reserved"; + reg = <0x5a00000 0x2000000>; + }; + + partition@7a00000 { + label = "rootfs"; + reg = <0x7a00000 0x8600000>; + }; +}; + +&pinctrl { + /* Buzzer gpios are connected to two pins of buzzer. + * This buzzer require a modulated signal from gpio. + * Leave it as is due lack of proper driver. + */ + pmx_buzzer: pmx-buzzer { + marvell,pins = "mpp12", "mpp13"; + marvell,function = "gpio"; + }; + + pmx_leds: pmx-leds { + marvell,pins = "mpp14", "mpp15", "mpp16", "mpp17", "mpp38", + "mpp39", "mpp40", "mpp42", "mpp43", "mpp44", + "mpp45", "mpp46", "mpp47"; + marvell,function = "gpio"; + }; + + pmx_buttons: pmx-buttons { + marvell,pins = "mpp28", "mpp29", "mpp48", "mpp49"; + marvell,function = "gpio"; + }; + + pmx_poweroff: pmx-poweroff { + marvell,pins = "mpp34"; + marvell,function = "gpio"; + }; +}; + +&rtc { + status = "disabled"; +}; + +&sata { + status = "okay"; + nr-ports = <2>; +}; + +&uart0 { + status = "okay"; +}; + +&usb0 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + #trigger-source-cells = <0>; + + hub_port1: port@1 { + reg = <1>; + #trigger-source-cells = <0>; + }; + + hub_port2: port@2 { + reg = <2>; + #trigger-source-cells = <0>; + }; + }; +}; diff --git a/dts/src/arm/lan966x-pcb8291.dts b/dts/src/arm/lan966x-pcb8291.dts new file mode 100644 index 0000000000..3281af90ac --- /dev/null +++ b/dts/src/arm/lan966x-pcb8291.dts @@ -0,0 +1,64 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * lan966x_pcb8291.dts - Device Tree file for PCB8291 + */ +/dts-v1/; +#include "lan966x.dtsi" + +/ { + model = "Microchip EVB - LAN9662"; + compatible = "microchip,lan9662-pcb8291", "microchip,lan9662", "microchip,lan966"; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + aliases { + serial0 = &usart3; + }; +}; + +&gpio { + fc_shrd7_pins: fc_shrd7-pins { + pins = "GPIO_49"; + function = "fc_shrd7"; + }; + + fc_shrd8_pins: fc_shrd8-pins { + pins = "GPIO_54"; + function = "fc_shrd8"; + }; + + fc3_b_pins: fcb3-spi-pins { + /* SCK, RXD, TXD */ + pins = "GPIO_51", "GPIO_52", "GPIO_53"; + function = "fc3_b"; + }; + + can0_b_pins: can0_b_pins { + /* RX, TX */ + pins = "GPIO_35", "GPIO_36"; + function = "can0_b"; + }; +}; + +&can0 { + pinctrl-0 = <&can0_b_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&flx3 { + atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>; + status = "okay"; + + usart3: serial@200 { + pinctrl-0 = <&fc3_b_pins>, <&fc_shrd7_pins>, <&fc_shrd8_pins>; + pinctrl-names = "default"; + status = "okay"; + }; +}; + +&watchdog { + status = "okay"; +}; diff --git a/dts/src/arm/lan966x.dtsi b/dts/src/arm/lan966x.dtsi new file mode 100644 index 0000000000..7d28696480 --- /dev/null +++ b/dts/src/arm/lan966x.dtsi @@ -0,0 +1,237 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * lan966x.dtsi - Device Tree Include file for Microchip LAN966 family SoC + * + * Copyright (C) 2021 Microchip Technology, Inc. and its subsidiaries + * + * Author: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com> + * + */ + +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/mfd/atmel-flexcom.h> +#include <dt-bindings/dma/at91.h> +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/clock/microchip,lan966x.h> + +/ { + model = "Microchip LAN966 family SoC"; + compatible = "microchip,lan966"; + interrupt-parent = <&gic>; + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + clock-frequency = <600000000>; + reg = <0x0>; + }; + }; + + clocks { + sys_clk: sys_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <162500000>; + }; + + cpu_clk: cpu_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <600000000>; + }; + + ddr_clk: ddr_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <300000000>; + }; + + nic_clk: nic_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + }; + }; + + clks: clock-controller@e00c00a8 { + compatible = "microchip,lan966x-gck"; + #clock-cells = <1>; + clocks = <&cpu_clk>, <&ddr_clk>, <&sys_clk>; + clock-names = "cpu", "ddr", "sys"; + reg = <0xe00c00a8 0x38>; + }; + + timer { + compatible = "arm,armv7-timer"; + interrupt-parent = <&gic>; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>; + clock-frequency = <37500000>; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + flx0: flexcom@e0040000 { + compatible = "atmel,sama5d2-flexcom"; + reg = <0xe0040000 0x100>; + clocks = <&clks GCK_ID_FLEXCOM0>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0xe0040000 0x800>; + status = "disabled"; + }; + + flx1: flexcom@e0044000 { + compatible = "atmel,sama5d2-flexcom"; + reg = <0xe0044000 0x100>; + clocks = <&clks GCK_ID_FLEXCOM1>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0xe0044000 0x800>; + status = "disabled"; + }; + + trng: rng@e0048000 { + compatible = "atmel,at91sam9g45-trng"; + reg = <0xe0048000 0x100>; + clocks = <&nic_clk>; + }; + + aes: crypto@e004c000 { + compatible = "atmel,at91sam9g46-aes"; + reg = <0xe004c000 0x100>; + interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&dma0 AT91_XDMAC_DT_PERID(13)>, + <&dma0 AT91_XDMAC_DT_PERID(12)>; + dma-names = "rx", "tx"; + clocks = <&nic_clk>; + clock-names = "aes_clk"; + }; + + flx2: flexcom@e0060000 { + compatible = "atmel,sama5d2-flexcom"; + reg = <0xe0060000 0x100>; + clocks = <&clks GCK_ID_FLEXCOM2>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0xe0060000 0x800>; + status = "disabled"; + }; + + flx3: flexcom@e0064000 { + compatible = "atmel,sama5d2-flexcom"; + reg = <0xe0064000 0x100>; + clocks = <&clks GCK_ID_FLEXCOM3>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0xe0064000 0x800>; + status = "disabled"; + + usart3: serial@200 { + compatible = "atmel,at91sam9260-usart"; + reg = <0x200 0x200>; + interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&nic_clk>; + clock-names = "usart"; + atmel,fifo-size = <32>; + status = "disabled"; + }; + }; + + dma0: dma-controller@e0068000 { + compatible = "microchip,sama7g5-dma"; + reg = <0xe0068000 0x1000>; + interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; + #dma-cells = <1>; + clocks = <&nic_clk>; + clock-names = "dma_clk"; + }; + + sha: crypto@e006c000 { + compatible = "atmel,at91sam9g46-sha"; + reg = <0xe006c000 0xec>; + interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&dma0 AT91_XDMAC_DT_PERID(14)>; + dma-names = "tx"; + clocks = <&nic_clk>; + clock-names = "sha_clk"; + }; + + flx4: flexcom@e0070000 { + compatible = "atmel,sama5d2-flexcom"; + reg = <0xe0070000 0x100>; + clocks = <&clks GCK_ID_FLEXCOM4>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0xe0070000 0x800>; + status = "disabled"; + }; + + timer0: timer@e008c000 { + compatible = "snps,dw-apb-timer"; + reg = <0xe008c000 0x400>; + clocks = <&nic_clk>; + clock-names = "timer"; + interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; + }; + + watchdog: watchdog@e0090000 { + compatible = "snps,dw-wdt"; + reg = <0xe0090000 0x1000>; + interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&nic_clk>; + status = "disabled"; + }; + + can0: can@e081c000 { + compatible = "bosch,m_can"; + reg = <0xe081c000 0xfc>, <0x00100000 0x4000>; + reg-names = "m_can", "message_ram"; + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "int0", "int1"; + clocks = <&clks GCK_ID_MCAN0>, <&clks GCK_ID_MCAN0>; + clock-names = "hclk", "cclk"; + assigned-clocks = <&clks GCK_ID_MCAN0>; + assigned-clock-rates = <40000000>; + bosch,mram-cfg = <0x0 0 0 64 0 0 32 32>; + status = "disabled"; + }; + + gpio: pinctrl@e2004064 { + compatible = "microchip,lan966x-pinctrl"; + reg = <0xe2004064 0xb4>, + <0xe2010024 0x138>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&gpio 0 0 78>; + interrupt-controller; + interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; + #interrupt-cells = <2>; + }; + + gic: interrupt-controller@e8c11000 { + compatible = "arm,gic-400", "arm,cortex-a7-gic"; + #interrupt-cells = <3>; + interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + reg = <0xe8c11000 0x1000>, + <0xe8c12000 0x2000>, + <0xe8c14000 0x2000>, + <0xe8c16000 0x2000>; + }; + }; +}; diff --git a/dts/src/arm/logicpd-torpedo-35xx-devkit.dts b/dts/src/arm/logicpd-torpedo-35xx-devkit.dts index 57bae2aa91..cb08aa62d9 100644 --- a/dts/src/arm/logicpd-torpedo-35xx-devkit.dts +++ b/dts/src/arm/logicpd-torpedo-35xx-devkit.dts @@ -11,3 +11,11 @@ model = "LogicPD Zoom OMAP35xx Torpedo Development Kit"; compatible = "logicpd,dm3730-torpedo-devkit", "ti,omap3430", "ti,omap3"; }; + +&omap3_pmx_core { + isp1763_pins: pinmux_isp1763_pins { + pinctrl-single,pins = < + OMAP3_CORE1_IOPAD(0x2154, PIN_INPUT_PULLUP | MUX_MODE4) /* sdmmc1_dat6.gpio_128 */ + >; + }; +}; diff --git a/dts/src/arm/logicpd-torpedo-37xx-devkit.dts b/dts/src/arm/logicpd-torpedo-37xx-devkit.dts index 5532db0404..07ea822fe4 100644 --- a/dts/src/arm/logicpd-torpedo-37xx-devkit.dts +++ b/dts/src/arm/logicpd-torpedo-37xx-devkit.dts @@ -85,3 +85,12 @@ >; }; }; + +/* The gpio muxing between omap3530 and dm3730 is different for GPIO_128 */ +&omap3_pmx_wkup { + isp1763_pins: pinmux_isp1763_pins { + pinctrl-single,pins = < + OMAP3_WKUP_IOPAD(0x2a58, PIN_INPUT_PULLUP | MUX_MODE4) /* reserved.gpio_128 */ + >; + }; +}; diff --git a/dts/src/arm/logicpd-torpedo-baseboard.dtsi b/dts/src/arm/logicpd-torpedo-baseboard.dtsi index 533a47bc4a..b4664ab002 100644 --- a/dts/src/arm/logicpd-torpedo-baseboard.dtsi +++ b/dts/src/arm/logicpd-torpedo-baseboard.dtsi @@ -93,7 +93,8 @@ &gpmc { ranges = <0 0 0x30000000 0x1000000 /* CS0: 16MB for NAND */ - 1 0 0x2c000000 0x1000000>; /* CS1: 16MB for LAN9221 */ + 1 0 0x2c000000 0x1000000 /* CS1: 16MB for LAN9221 */ + 6 0 0x28000000 0x1000000>; /* CS6: 16MB for ISP1763 */ ethernet@gpmc { pinctrl-names = "default"; @@ -102,6 +103,44 @@ interrupts = <1 IRQ_TYPE_LEVEL_LOW>; /* gpio129 */ reg = <1 0 0xff>; }; + + usb@6,0 { + pinctrl-names = "default"; + pinctrl-0 = <&isp1763_pins>; + compatible = "nxp,usb-isp1763"; + reg = <0x6 0x0 0xff>; + interrupt-parent = <&gpio5>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "host"; + bus-width = <16>; + dr_mode = "host"; + gpmc,mux-add-data = <0>; + gpmc,device-width = <2>; + gpmc,wait-pin = <0>; + gpmc,burst-length = <4>; + gpmc,cycle2cycle-samecsen = <1>; + gpmc,cycle2cycle-diffcsen = <1>; + gpmc,cs-on-ns = <0>; + gpmc,cs-rd-off-ns = <45>; + gpmc,cs-wr-off-ns = <45>; + gpmc,adv-on-ns = <0>; + gpmc,adv-rd-off-ns = <0>; + gpmc,adv-wr-off-ns = <0>; + gpmc,oe-on-ns = <0>; + gpmc,oe-off-ns = <45>; + gpmc,we-on-ns = <0>; + gpmc,we-off-ns = <25>; + gpmc,rd-cycle-ns = <60>; + gpmc,wr-cycle-ns = <45>; + gpmc,access-ns = <35>; + gpmc,page-burst-access-ns = <0>; + gpmc,bus-turnaround-ns = <0>; + gpmc,cycle2cycle-delay-ns = <60>; + gpmc,wait-monitoring-ns = <0>; + gpmc,clk-activation-ns = <0>; + gpmc,wr-data-mux-bus-ns = <5>; + gpmc,wr-access-ns = <20>; + }; }; &hdqw1w { diff --git a/dts/src/arm/mstar-infinity.dtsi b/dts/src/arm/mstar-infinity.dtsi index 0bee517797..441a917b88 100644 --- a/dts/src/arm/mstar-infinity.dtsi +++ b/dts/src/arm/mstar-infinity.dtsi @@ -8,6 +8,40 @@ #include <dt-bindings/gpio/msc313-gpio.h> +/ { + cpu0_opp_table: opp_table0 { + compatible = "operating-points-v2"; + opp-shared; + + opp-240000000 { + opp-hz = /bits/ 64 <240000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <300000>; + }; + + opp-400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <300000>; + }; + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <300000>; + }; + + opp-800000000 { + opp-hz = /bits/ 64 <800000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <300000>; + }; + }; +}; + +&cpu0 { + operating-points-v2 = <&cpu0_opp_table>; +}; + &imi { reg = <0xa0000000 0x16000>; }; diff --git a/dts/src/arm/mstar-infinity2m-ssd201-som2d01.dtsi b/dts/src/arm/mstar-infinity2m-ssd201-som2d01.dtsi new file mode 100644 index 0000000000..34df472fed --- /dev/null +++ b/dts/src/arm/mstar-infinity2m-ssd201-som2d01.dtsi @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) 2021 thingy.jp. + * Author: Daniel Palmer <daniel@thingy.jp> + * Author: Romain Perier <romain.perier@gmail.com> + */ + +/ { + reg_vcc_dram: regulator-vcc-dram { + compatible = "regulator-fixed"; + regulator-name = "vcc_dram"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + }; +}; + +&pm_uart { + status = "okay"; +}; diff --git a/dts/src/arm/mstar-infinity2m-ssd202d-100ask-dongshanpione.dts b/dts/src/arm/mstar-infinity2m-ssd202d-100ask-dongshanpione.dts new file mode 100644 index 0000000000..f25a04c98c --- /dev/null +++ b/dts/src/arm/mstar-infinity2m-ssd202d-100ask-dongshanpione.dts @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (c) 2021 thingy.jp. + * Author: Daniel Palmer <daniel@thingy.jp> + */ + +/dts-v1/; +#include "mstar-infinity2m-ssd202d.dtsi" + +/ { + model = "DongShanPi One"; + compatible = "100ask,dongshanpione", "mstar,infinity2m"; + + aliases { + serial0 = &pm_uart; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&pm_uart { + status = "okay"; +}; diff --git a/dts/src/arm/mstar-infinity2m-ssd202d-miyoo-mini.dts b/dts/src/arm/mstar-infinity2m-ssd202d-miyoo-mini.dts new file mode 100644 index 0000000000..1bbbf47132 --- /dev/null +++ b/dts/src/arm/mstar-infinity2m-ssd202d-miyoo-mini.dts @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (c) 2021 thingy.jp. + * Author: Daniel Palmer <daniel@thingy.jp> + */ + +/dts-v1/; +#include "mstar-infinity2m-ssd202d.dtsi" + +/ { + model = "Miyoo Mini"; + compatible = "miyoo,miyoo-mini", "mstar,infinity2m"; + + aliases { + serial0 = &pm_uart; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&pm_uart { + status = "okay"; +}; diff --git a/dts/src/arm/mstar-infinity2m-ssd202d-wirelesstag-ido-sbc2d06-v1b-22w.dts b/dts/src/arm/mstar-infinity2m-ssd202d-wirelesstag-ido-sbc2d06-v1b-22w.dts new file mode 100644 index 0000000000..b15c40762b --- /dev/null +++ b/dts/src/arm/mstar-infinity2m-ssd202d-wirelesstag-ido-sbc2d06-v1b-22w.dts @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) 2021 thingy.jp. + * Author: Daniel Palmer <daniel@thingy.jp> + * Author: Romain Perier <romain.perier@gmail.com> + */ + +/dts-v1/; +#include "mstar-infinity2m-ssd202d-wirelesstag-ido-som2d01.dtsi" +#include <dt-bindings/gpio/gpio.h> + +/ { + model = "Wireless Tag IDO-SBC2D06-1VB-22W"; + compatible = "wirelesstag,ido-sbc2d06-v1b-22w", "mstar,infinity2m"; + + leds { + compatible = "gpio-leds"; + sys_led { + gpios = <&gpio SSD20XD_GPIO_GPIO85 GPIO_ACTIVE_LOW>; + linux,default-trigger = "heartbeat"; + }; + }; +}; diff --git a/dts/src/arm/mstar-infinity2m-ssd202d-wirelesstag-ido-som2d01.dtsi b/dts/src/arm/mstar-infinity2m-ssd202d-wirelesstag-ido-som2d01.dtsi new file mode 100644 index 0000000000..d877aff850 --- /dev/null +++ b/dts/src/arm/mstar-infinity2m-ssd202d-wirelesstag-ido-som2d01.dtsi @@ -0,0 +1,28 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) 2021 thingy.jp. + * Author: Daniel Palmer <daniel@thingy.jp> + * Author: Romain Perier <romain.perier@gmail.com> + */ + +/dts-v1/; +#include "mstar-infinity2m-ssd202d.dtsi" +#include "mstar-infinity2m-ssd201-som2d01.dtsi" + +/ { + model = "Wireless Tag IDO-SOM2D01 (SSD202D)"; + compatible = "wirelesstag,ido-som2d01", "mstar,infinity2m"; + + aliases { + serial0 = &pm_uart; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +®_vcc_dram { + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; +}; diff --git a/dts/src/arm/mstar-infinity2m-ssd20xd.dtsi b/dts/src/arm/mstar-infinity2m-ssd20xd.dtsi index 7a5e28b33f..6f067da61b 100644 --- a/dts/src/arm/mstar-infinity2m-ssd20xd.dtsi +++ b/dts/src/arm/mstar-infinity2m-ssd20xd.dtsi @@ -6,6 +6,11 @@ #include "mstar-infinity2m.dtsi" +&gpio { + compatible = "sstar,ssd20xd-gpio"; + status = "okay"; +}; + &smpctrl { compatible = "sstar,ssd201-smpctrl", "mstar,smpctrl"; status = "okay"; diff --git a/dts/src/arm/mstar-infinity2m.dtsi b/dts/src/arm/mstar-infinity2m.dtsi index 6d4d1d224e..1b485efd71 100644 --- a/dts/src/arm/mstar-infinity2m.dtsi +++ b/dts/src/arm/mstar-infinity2m.dtsi @@ -6,11 +6,28 @@ #include "mstar-infinity.dtsi" +&cpu0_opp_table { + opp-1000000000 { + opp-hz = /bits/ 64 <1000000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <300000>; + }; + + opp-1200000000 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <300000>; + }; +}; + &cpus { cpu1: cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a7"; + operating-points-v2 = <&cpu0_opp_table>; reg = <0x1>; + clocks = <&cpupll>; + clock-names = "cpuclk"; }; }; diff --git a/dts/src/arm/mstar-infinity3.dtsi b/dts/src/arm/mstar-infinity3.dtsi index 9857e2a993..a56cf29e5d 100644 --- a/dts/src/arm/mstar-infinity3.dtsi +++ b/dts/src/arm/mstar-infinity3.dtsi @@ -6,6 +6,64 @@ #include "mstar-infinity.dtsi" +&cpu0_opp_table { + opp-1008000000 { + opp-hz = /bits/ 64 <1008000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <300000>; + }; + + // overclock frequencies below, shown to work fine up to 1.3 GHz + opp-108000000 { + opp-hz = /bits/ 64 <1080000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <300000>; + turbo-mode; + }; + + opp-1188000000 { + opp-hz = /bits/ 64 <1188000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <300000>; + turbo-mode; + }; + + opp-1296000000 { + opp-hz = /bits/ 64 <1296000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <300000>; + turbo-mode; + }; + + opp-1350000000 { + opp-hz = /bits/ 64 <1350000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <300000>; + turbo-mode; + }; + + opp-1404000000 { + opp-hz = /bits/ 64 <1404000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <300000>; + turbo-mode; + }; + + opp-1458000000 { + opp-hz = /bits/ 64 <1458000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <300000>; + turbo-mode; + }; + + opp-1512000000 { + opp-hz = /bits/ 64 <1512000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <300000>; + turbo-mode; + }; +}; + &imi { reg = <0xa0000000 0x20000>; }; diff --git a/dts/src/arm/mstar-v7.dtsi b/dts/src/arm/mstar-v7.dtsi index 89ebfe4f29..c26ba9b7b6 100644 --- a/dts/src/arm/mstar-v7.dtsi +++ b/dts/src/arm/mstar-v7.dtsi @@ -21,6 +21,8 @@ device_type = "cpu"; compatible = "arm,cortex-a7"; reg = <0x0>; + clocks = <&cpupll>; + clock-names = "cpuclk"; }; }; @@ -155,6 +157,13 @@ clocks = <&xtal>; }; + cpupll: cpupll@206400 { + compatible = "mstar,msc313-cpupll"; + reg = <0x206400 0x200>; + #clock-cells = <0>; + clocks = <&mpll MSTAR_MSC313_MPLL_DIV2>; + }; + gpio: gpio@207800 { #gpio-cells = <2>; reg = <0x207800 0x200>; diff --git a/dts/src/arm/mt6582-prestigio-pmt5008-3g.dts b/dts/src/arm/mt6582-prestigio-pmt5008-3g.dts new file mode 100644 index 0000000000..b057e037f9 --- /dev/null +++ b/dts/src/arm/mt6582-prestigio-pmt5008-3g.dts @@ -0,0 +1,43 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2021 Maxim Kutnij <gtk3@inbox.ru> + */ + +/dts-v1/; +#include "mt6582.dtsi" + +/ { + model = "Prestigio PMT5008 3G"; + compatible = "prestigio,pmt5008-3g", "mediatek,mt6582"; + + aliases { + bootargs = "console=ttyS0,921600n8 earlyprintk"; + serial0 = &uart0; + serial3 = &uart3; + }; + + chosen { + stdout-path = "serial0:921600n8"; + }; + + memory { + device_type = "memory"; + reg = <0x80000000 0x40000000>; + }; +}; + +&uart0 { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&uart3 { + status = "okay"; +}; diff --git a/dts/src/arm/mt6582.dtsi b/dts/src/arm/mt6582.dtsi new file mode 100644 index 0000000000..4263371784 --- /dev/null +++ b/dts/src/arm/mt6582.dtsi @@ -0,0 +1,128 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2021 Maxim Kutnij <gtk3@inbox.ru> + */ + +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + #address-cells = <1>; + #size-cells = <1>; + compatible = "mediatek,mt6582"; + interrupt-parent = <&sysirq>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x0>; + }; + cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x1>; + }; + cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x2>; + }; + cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x3>; + }; + }; + + system_clk: dummy13m { + compatible = "fixed-clock"; + clock-frequency = <13000000>; + #clock-cells = <0>; + }; + + rtc_clk: dummy32k { + compatible = "fixed-clock"; + clock-frequency = <32000>; + #clock-cells = <0>; + }; + + uart_clk: dummy26m { + compatible = "fixed-clock"; + clock-frequency = <26000000>; + #clock-cells = <0>; + }; + + timer: timer@11008000 { + compatible = "mediatek,mt6577-timer"; + reg = <0x10008000 0x80>; + interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_LOW>; + clocks = <&system_clk>, <&rtc_clk>; + clock-names = "system-clk", "rtc-clk"; + }; + + sysirq: interrupt-controller@10200100 { + compatible = "mediatek,mt6582-sysirq", + "mediatek,mt6577-sysirq"; + interrupt-controller; + #interrupt-cells = <3>; + interrupt-parent = <&gic>; + reg = <0x10200100 0x1c>; + }; + + gic: interrupt-controller@10211000 { + compatible = "arm,cortex-a7-gic"; + interrupt-controller; + #interrupt-cells = <3>; + interrupt-parent = <&gic>; + reg = <0x10211000 0x1000>, + <0x10212000 0x2000>, + <0x10214000 0x2000>, + <0x10216000 0x2000>; + }; + + uart0: serial@11002000 { + compatible = "mediatek,mt6582-uart", + "mediatek,mt6577-uart"; + reg = <0x11002000 0x400>; + interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>; + clocks = <&uart_clk>; + status = "disabled"; + }; + + uart1: serial@11003000 { + compatible = "mediatek,mt6582-uart", + "mediatek,mt6577-uart"; + reg = <0x11003000 0x400>; + interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_LOW>; + clocks = <&uart_clk>; + status = "disabled"; + }; + + uart2: serial@11004000 { + compatible = "mediatek,mt6582-uart", + "mediatek,mt6577-uart"; + reg = <0x11004000 0x400>; + interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_LOW>; + clocks = <&uart_clk>; + status = "disabled"; + }; + + uart3: serial@11005000 { + compatible = "mediatek,mt6582-uart", + "mediatek,mt6577-uart"; + reg = <0x11005000 0x400>; + interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_LOW>; + clocks = <&uart_clk>; + status = "disabled"; + }; + + watchdog: watchdog@10007000 { + compatible = "mediatek,mt6582-wdt", + "mediatek,mt6589-wdt"; + reg = <0x10007000 0x100>; + }; +}; diff --git a/dts/src/arm/nuvoton-wpcm450-supermicro-x9sci-ln4f.dts b/dts/src/arm/nuvoton-wpcm450-supermicro-x9sci-ln4f.dts index 83f27fbf4e..3ee61251a1 100644 --- a/dts/src/arm/nuvoton-wpcm450-supermicro-x9sci-ln4f.dts +++ b/dts/src/arm/nuvoton-wpcm450-supermicro-x9sci-ln4f.dts @@ -8,6 +8,9 @@ #include "nuvoton-wpcm450.dtsi" +#include <dt-bindings/input/linux-event-codes.h> +#include <dt-bindings/gpio/gpio.h> + / { model = "Supermicro X9SCi-LN4F BMC"; compatible = "supermicro,x9sci-ln4f-bmc", "nuvoton,wpcm450"; @@ -20,6 +23,46 @@ device_type = "memory"; reg = <0 0x08000000>; /* 128 MiB */ }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&key_pins>; + + uid { + label = "UID button"; + linux,code = <KEY_HOME>; + gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&led_pins>; + + uid { + label = "UID"; + gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; + }; + + heartbeat { + label = "heartbeat"; + gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&pinctrl { + key_pins: mux-keys { + groups = "gspi", "sspi"; + function = "gpio"; + }; + + led_pins: mux-leds { + groups = "hg3", "hg0", "pwm4"; + function = "gpio"; + }; }; &serial0 { diff --git a/dts/src/arm/nuvoton-wpcm450.dtsi b/dts/src/arm/nuvoton-wpcm450.dtsi index d7cbeb1874..93595850a4 100644 --- a/dts/src/arm/nuvoton-wpcm450.dtsi +++ b/dts/src/arm/nuvoton-wpcm450.dtsi @@ -8,6 +8,17 @@ #address-cells = <1>; #size-cells = <1>; + aliases { + gpio0 = &gpio0; + gpio1 = &gpio1; + gpio2 = &gpio2; + gpio3 = &gpio3; + gpio4 = &gpio4; + gpio5 = &gpio5; + gpio6 = &gpio6; + gpio7 = &gpio7; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -33,12 +44,19 @@ interrupt-parent = <&aic>; ranges; + gcr: syscon@b0000000 { + compatible = "nuvoton,wpcm450-gcr", "syscon", "simple-mfd"; + reg = <0xb0000000 0x200>; + }; + serial0: serial@b8000000 { compatible = "nuvoton,wpcm450-uart"; reg = <0xb8000000 0x20>; reg-shift = <2>; interrupts = <7 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk24m>; + pinctrl-names = "default"; + pinctrl-0 = <&bsp_pins>; status = "disabled"; }; @@ -72,5 +90,371 @@ interrupt-controller; #interrupt-cells = <2>; }; + + pinctrl: pinctrl@b8003000 { + compatible = "nuvoton,wpcm450-pinctrl"; + reg = <0xb8003000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + + gpio0: gpio@0 { + reg = <0>; + gpio-controller; + #gpio-cells = <2>; + interrupts = <2 IRQ_TYPE_LEVEL_HIGH>, + <3 IRQ_TYPE_LEVEL_HIGH>, + <4 IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + }; + + gpio1: gpio@1 { + reg = <1>; + gpio-controller; + #gpio-cells = <2>; + interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + }; + + gpio2: gpio@2 { + reg = <2>; + gpio-controller; + #gpio-cells = <2>; + }; + + gpio3: gpio@3 { + reg = <3>; + gpio-controller; + #gpio-cells = <2>; + }; + + gpio4: gpio@4 { + reg = <4>; + gpio-controller; + #gpio-cells = <2>; + }; + + gpio5: gpio@5 { + reg = <5>; + gpio-controller; + #gpio-cells = <2>; + }; + + gpio6: gpio@6 { + reg = <6>; + gpio-controller; + #gpio-cells = <2>; + }; + + gpio7: gpio@7 { + reg = <7>; + gpio-controller; + #gpio-cells = <2>; + }; + + smb3_pins: mux-smb3 { + groups = "smb3"; + function = "smb3"; + }; + + smb4_pins: mux-smb4 { + groups = "smb4"; + function = "smb4"; + }; + + smb5_pins: mux-smb5 { + groups = "smb5"; + function = "smb5"; + }; + + scs1_pins: mux-scs1 { + groups = "scs1"; + function = "scs1"; + }; + + scs2_pins: mux-scs2 { + groups = "scs2"; + function = "scs2"; + }; + + scs3_pins: mux-scs3 { + groups = "scs3"; + function = "scs3"; + }; + + smb0_pins: mux-smb0 { + groups = "smb0"; + function = "smb0"; + }; + + smb1_pins: mux-smb1 { + groups = "smb1"; + function = "smb1"; + }; + + smb2_pins: mux-smb2 { + groups = "smb2"; + function = "smb2"; + }; + + bsp_pins: mux-bsp { + groups = "bsp"; + function = "bsp"; + }; + + hsp1_pins: mux-hsp1 { + groups = "hsp1"; + function = "hsp1"; + }; + + hsp2_pins: mux-hsp2 { + groups = "hsp2"; + function = "hsp2"; + }; + + r1err_pins: mux-r1err { + groups = "r1err"; + function = "r1err"; + }; + + r1md_pins: mux-r1md { + groups = "r1md"; + function = "r1md"; + }; + + rmii2_pins: mux-rmii2 { + groups = "rmii2"; + function = "rmii2"; + }; + + r2err_pins: mux-r2err { + groups = "r2err"; + function = "r2err"; + }; + + r2md_pins: mux-r2md { + groups = "r2md"; + function = "r2md"; + }; + + kbcc_pins: mux-kbcc { + groups = "kbcc"; + function = "kbcc"; + }; + + dvo0_pins: mux-dvo0 { + groups = "dvo"; + function = "dvo0"; + }; + + dvo3_pins: mux-dvo3 { + groups = "dvo"; + function = "dvo3"; + }; + + clko_pins: mux-clko { + groups = "clko"; + function = "clko"; + }; + + smi_pins: mux-smi { + groups = "smi"; + function = "smi"; + }; + + uinc_pins: mux-uinc { + groups = "uinc"; + function = "uinc"; + }; + + gspi_pins: mux-gspi { + groups = "gspi"; + function = "gspi"; + }; + + mben_pins: mux-mben { + groups = "mben"; + function = "mben"; + }; + + xcs2_pins: mux-xcs2 { + groups = "xcs2"; + function = "xcs2"; + }; + + xcs1_pins: mux-xcs1 { + groups = "xcs1"; + function = "xcs1"; + }; + + sdio_pins: mux-sdio { + groups = "sdio"; + function = "sdio"; + }; + + sspi_pins: mux-sspi { + groups = "sspi"; + function = "sspi"; + }; + + fi0_pins: mux-fi0 { + groups = "fi0"; + function = "fi0"; + }; + + fi1_pins: mux-fi1 { + groups = "fi1"; + function = "fi1"; + }; + + fi2_pins: mux-fi2 { + groups = "fi2"; + function = "fi2"; + }; + + fi3_pins: mux-fi3 { + groups = "fi3"; + function = "fi3"; + }; + + fi4_pins: mux-fi4 { + groups = "fi4"; + function = "fi4"; + }; + + fi5_pins: mux-fi5 { + groups = "fi5"; + function = "fi5"; + }; + + fi6_pins: mux-fi6 { + groups = "fi6"; + function = "fi6"; + }; + + fi7_pins: mux-fi7 { + groups = "fi7"; + function = "fi7"; + }; + + fi8_pins: mux-fi8 { + groups = "fi8"; + function = "fi8"; + }; + + fi9_pins: mux-fi9 { + groups = "fi9"; + function = "fi9"; + }; + + fi10_pins: mux-fi10 { + groups = "fi10"; + function = "fi10"; + }; + + fi11_pins: mux-fi11 { + groups = "fi11"; + function = "fi11"; + }; + + fi12_pins: mux-fi12 { + groups = "fi12"; + function = "fi12"; + }; + + fi13_pins: mux-fi13 { + groups = "fi13"; + function = "fi13"; + }; + + fi14_pins: mux-fi14 { + groups = "fi14"; + function = "fi14"; + }; + + fi15_pins: mux-fi15 { + groups = "fi15"; + function = "fi15"; + }; + + pwm0_pins: mux-pwm0 { + groups = "pwm0"; + function = "pwm0"; + }; + + pwm1_pins: mux-pwm1 { + groups = "pwm1"; + function = "pwm1"; + }; + + pwm2_pins: mux-pwm2 { + groups = "pwm2"; + function = "pwm2"; + }; + + pwm3_pins: mux-pwm3 { + groups = "pwm3"; + function = "pwm3"; + }; + + pwm4_pins: mux-pwm4 { + groups = "pwm4"; + function = "pwm4"; + }; + + pwm5_pins: mux-pwm5 { + groups = "pwm5"; + function = "pwm5"; + }; + + pwm6_pins: mux-pwm6 { + groups = "pwm6"; + function = "pwm6"; + }; + + pwm7_pins: mux-pwm7 { + groups = "pwm7"; + function = "pwm7"; + }; + + hg0_pins: mux-hg0 { + groups = "hg0"; + function = "hg0"; + }; + + hg1_pins: mux-hg1 { + groups = "hg1"; + function = "hg1"; + }; + + hg2_pins: mux-hg2 { + groups = "hg2"; + function = "hg2"; + }; + + hg3_pins: mux-hg3 { + groups = "hg3"; + function = "hg3"; + }; + + hg4_pins: mux-hg4 { + groups = "hg4"; + function = "hg4"; + }; + + hg5_pins: mux-hg5 { + groups = "hg5"; + function = "hg5"; + }; + + hg6_pins: mux-hg6 { + groups = "hg6"; + function = "hg6"; + }; + + hg7_pins: mux-hg7 { + groups = "hg7"; + function = "hg7"; + }; + }; }; }; diff --git a/dts/src/arm/openbmc-flash-layout-64.dtsi b/dts/src/arm/openbmc-flash-layout-64.dtsi index 31f59de519..7af41361c4 100644 --- a/dts/src/arm/openbmc-flash-layout-64.dtsi +++ b/dts/src/arm/openbmc-flash-layout-64.dtsi @@ -28,7 +28,7 @@ partitions { label = "rofs"; }; - rwfs@6000000 { + rwfs@2a00000 { reg = <0x2a00000 0x1600000>; // 22MB label = "rwfs"; }; diff --git a/dts/src/arm/openbmc-flash-layout.dtsi b/dts/src/arm/openbmc-flash-layout.dtsi index 6c26524e93..b47e14063c 100644 --- a/dts/src/arm/openbmc-flash-layout.dtsi +++ b/dts/src/arm/openbmc-flash-layout.dtsi @@ -20,7 +20,7 @@ partitions { label = "kernel"; }; - rofs@c0000 { + rofs@4c0000 { reg = <0x4c0000 0x1740000>; label = "rofs"; }; diff --git a/dts/src/arm/ox810se-wd-mbwe.dts b/dts/src/arm/ox810se-wd-mbwe.dts index 7e2fcb220a..c59e06ff24 100644 --- a/dts/src/arm/ox810se-wd-mbwe.dts +++ b/dts/src/arm/ox810se-wd-mbwe.dts @@ -103,6 +103,10 @@ }; }; +ða { + status = "okay"; +}; + &uart1 { status = "okay"; diff --git a/dts/src/arm/ox810se.dtsi b/dts/src/arm/ox810se.dtsi index 0755e5864c..96c0745f7b 100644 --- a/dts/src/arm/ox810se.dtsi +++ b/dts/src/arm/ox810se.dtsi @@ -81,6 +81,24 @@ ranges; interrupt-parent = <&intc>; + etha: ethernet@40400000 { + compatible = "oxsemi,ox810se-dwmac", "snps,dwmac"; + reg = <0x40400000 0x2000>; + interrupts = <8>; + interrupt-names = "macirq"; + mac-address = [000000000000]; /* Filled in by U-Boot */ + phy-mode = "rgmii"; + + clocks = <&stdclk 6>, <&gmacclk>; + clock-names = "gmac", "stmmaceth"; + resets = <&reset 6>; + + /* Regmap for sys registers */ + oxsemi,sys-ctrl = <&sys>; + + status = "disabled"; + }; + apb-bridge@44000000 { #address-cells = <1>; #size-cells = <1>; diff --git a/dts/src/arm/qcom-apq8026-lg-lenok.dts b/dts/src/arm/qcom-apq8026-lg-lenok.dts index f350c4e8c1..2b7e52fda6 100644 --- a/dts/src/arm/qcom-apq8026-lg-lenok.dts +++ b/dts/src/arm/qcom-apq8026-lg-lenok.dts @@ -16,11 +16,35 @@ aliases { serial0 = &blsp1_uart3; + serial1 = &blsp1_uart4; }; chosen { stdout-path = "serial0:115200n8"; }; + + vreg_wlan: wlan-regulator { + compatible = "regulator-fixed"; + + regulator-name = "wl-reg"; + regulator-min-microvolt = <2950000>; + regulator-max-microvolt = <2950000>; + + gpio = <&tlmm 46 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-names = "default"; + pinctrl-0 = <&wlan_regulator_default_state>; + }; +}; + +&blsp1_i2c1 { + status = "okay"; + + fuel-gauge@55 { + compatible = "ti,bq27421"; + reg = <0x55>; + }; }; &blsp1_i2c5 { @@ -57,14 +81,30 @@ status = "okay"; }; +&blsp1_uart4 { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&blsp1_uart4_default_state>; + + bluetooth { + compatible = "brcm,bcm43430a0-bt"; + + max-speed = <3000000>; + + pinctrl-names = "default"; + pinctrl-0 = <&bluetooth_default_state>; + + host-wakeup-gpios = <&tlmm 48 GPIO_ACTIVE_HIGH>; + device-wakeup-gpios = <&tlmm 47 GPIO_ACTIVE_HIGH>; + shutdown-gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>; + }; +}; + &rpm_requests { pm8226-regulators { compatible = "qcom,rpm-pm8226-regulators"; - pm8226_s1: s1 { - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1275000>; - }; pm8226_s3: s3 { regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1350000>; @@ -195,24 +235,55 @@ bus-width = <8>; non-removable; +}; - pinctrl-names = "default"; - pinctrl-0 = <&sdhc1_pin_a>; +&sdhc_3 { + status = "okay"; + + max-frequency = <100000000>; + non-removable; + + vmmc-supply = <&vreg_wlan>; + vqmmc-supply = <&pm8226_l6>; + + #address-cells = <1>; + #size-cells = <0>; + + wifi@1 { + compatible = "brcm,bcm43430a0-fmac", "brcm,bcm4329-fmac"; + reg = <1>; + + interrupts-extended = <&tlmm 37 IRQ_TYPE_EDGE_FALLING>; + interrupt-names = "host-wake"; + + pinctrl-names = "default"; + pinctrl-0 = <&wlan_hostwake_default_state>; + }; +}; + +&smbb { + qcom,fast-charge-safe-current = <450000>; + qcom,fast-charge-current-limit = <400000>; + qcom,fast-charge-safe-voltage = <4350000>; + qcom,fast-charge-high-threshold-voltage = <4350000>; + qcom,auto-recharge-threshold-voltage = <4240000>; + qcom,minimum-input-voltage = <4450000>; }; &tlmm { - sdhc1_pin_a: sdhc1-pin-active { - clk { - pins = "sdc1_clk"; - drive-strength = <10>; - bias-disable; - }; + blsp1_uart4_default_state: blsp1-uart4-default-state { + pins = "gpio12", "gpio13", "gpio14", "gpio15"; + function = "blsp_uart4"; + drive-strength = <8>; + bias-disable; + }; - cmd-data { - pins = "sdc1_cmd", "sdc1_data"; - drive-strength = <10>; - bias-pull-up; - }; + bluetooth_default_state: bluetooth-default-state { + pins = "gpio47", "gpio48"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + input-enable; }; touch_pins: touch { @@ -234,4 +305,31 @@ output-high; }; }; + + wlan_hostwake_default_state: wlan-hostwake-default-state { + pins = "gpio37"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + input-enable; + }; + + wlan_regulator_default_state: wlan-regulator-default-state { + pins = "gpio46"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; +}; + +&usb { + status = "okay"; + extcon = <&smbb>; + dr_mode = "peripheral"; +}; + +&usb_hs_phy { + extcon = <&smbb>; + v1p8-supply = <&pm8226_l10>; + v3p3-supply = <&pm8226_l20>; }; diff --git a/dts/src/arm/qcom-apq8060-dragonboard.dts b/dts/src/arm/qcom-apq8060-dragonboard.dts index d664ccd454..138d6478ac 100644 --- a/dts/src/arm/qcom-apq8060-dragonboard.dts +++ b/dts/src/arm/qcom-apq8060-dragonboard.dts @@ -83,7 +83,7 @@ soc { pinctrl@800000 { - /* eMMMC pins, all 8 data lines connected */ + /* eMMC pins, all 8 data lines connected */ dragon_sdcc1_pins: sdcc1 { mux { pins = "gpio159", "gpio160", "gpio161", @@ -674,14 +674,14 @@ bias-pull-down; }; - /* LVS0 thru 3 and mvs0 are just switches */ + /* LVS0 thru 3 and mvs are just switches */ lvs0 { regulator-always-on; }; lvs1 { }; lvs2 { }; lvs3 { }; - mvs0 {}; + mvs { }; }; diff --git a/dts/src/arm/qcom-apq8064-asus-nexus7-flo.dts b/dts/src/arm/qcom-apq8064-asus-nexus7-flo.dts index 9a835335bf..ca9f735281 100644 --- a/dts/src/arm/qcom-apq8064-asus-nexus7-flo.dts +++ b/dts/src/arm/qcom-apq8064-asus-nexus7-flo.dts @@ -212,13 +212,12 @@ }; }; - dsi0: mdss_dsi@4700000 { + dsi0: dsi@4700000 { status = "okay"; vdda-supply = <&pm8921_l2>;/*VDD_MIPI1 to 4*/ vdd-supply = <&pm8921_l8>; vddio-supply = <&pm8921_lvs7>; avdd-supply = <&pm8921_l11>; - vcss-supply = <&ext_3p3v>; panel@0 { reg = <0>; diff --git a/dts/src/arm/qcom-apq8064.dtsi b/dts/src/arm/qcom-apq8064.dtsi index 4d562c94c3..a1c8ae516d 100644 --- a/dts/src/arm/qcom-apq8064.dtsi +++ b/dts/src/arm/qcom-apq8064.dtsi @@ -815,6 +815,7 @@ nvmem-cells = <&tsens_calib>, <&tsens_backup>; nvmem-cell-names = "calib", "calib_backup"; #clock-cells = <1>; + #power-domain-cells = <1>; #reset-cells = <1>; #thermal-sensor-cells = <1>; }; @@ -830,11 +831,12 @@ compatible = "qcom,mmcc-apq8064"; reg = <0x4000000 0x1000>; #clock-cells = <1>; + #power-domain-cells = <1>; #reset-cells = <1>; }; l2cc: clock-controller@2011000 { - compatible = "syscon"; + compatible = "qcom,kpss-gcc", "syscon"; reg = <0x2011000 0x1000>; }; @@ -1238,7 +1240,7 @@ reg = <0x5700000 0x70>; }; - dsi0: mdss_dsi@4700000 { + dsi0: dsi@4700000 { compatible = "qcom,mdss-dsi-ctrl"; label = "MDSS DSI CTRL->0"; #address-cells = <1>; @@ -1268,6 +1270,7 @@ <&dsi0_phy 1>; syscon-sfpb = <&mmss_sfpb>; phys = <&dsi0_phy>; + phy-names = "dsi"; ports { #address-cells = <1>; #size-cells = <0>; @@ -1368,10 +1371,10 @@ pcie: pci@1b500000 { compatible = "qcom,pcie-apq8064", "snps,dw-pcie"; - reg = <0x1b500000 0x1000 - 0x1b502000 0x80 - 0x1b600000 0x100 - 0x0ff00000 0x100000>; + reg = <0x1b500000 0x1000>, + <0x1b502000 0x80>, + <0x1b600000 0x100>, + <0x0ff00000 0x100000>; reg-names = "dbi", "elbi", "parf", "config"; device_type = "pci"; linux,pci-domain = <0>; @@ -1379,8 +1382,8 @@ num-lanes = <1>; #address-cells = <3>; #size-cells = <2>; - ranges = <0x81000000 0 0 0x0fe00000 0 0x00100000 /* I/O */ - 0x82000000 0 0x08000000 0x08000000 0 0x07e00000>; /* memory */ + ranges = <0x81000000 0 0 0x0fe00000 0 0x00100000>, /* I/O */ + <0x82000000 0 0x08000000 0x08000000 0 0x07e00000>; /* mem */ interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "msi"; #interrupt-cells = <1>; diff --git a/dts/src/arm/qcom-ipq4019.dtsi b/dts/src/arm/qcom-ipq4019.dtsi index 7dec055363..a9d0566a31 100644 --- a/dts/src/arm/qcom-ipq4019.dtsi +++ b/dts/src/arm/qcom-ipq4019.dtsi @@ -142,7 +142,8 @@ clocks { sleep_clk: sleep_clk { compatible = "fixed-clock"; - clock-frequency = <32768>; + clock-frequency = <32000>; + clock-output-names = "gcc_sleep_clk_src"; #clock-cells = <0>; }; @@ -186,6 +187,7 @@ gcc: clock-controller@1800000 { compatible = "qcom,gcc-ipq4019"; #clock-cells = <1>; + #power-domain-cells = <1>; #reset-cells = <1>; reg = <0x1800000 0x60000>; }; diff --git a/dts/src/arm/qcom-mdm9615.dtsi b/dts/src/arm/qcom-mdm9615.dtsi index c32415f0e6..4d4f37cebf 100644 --- a/dts/src/arm/qcom-mdm9615.dtsi +++ b/dts/src/arm/qcom-mdm9615.dtsi @@ -139,6 +139,7 @@ gcc: clock-controller@900000 { compatible = "qcom,gcc-mdm9615"; #clock-cells = <1>; + #power-domain-cells = <1>; #reset-cells = <1>; reg = <0x900000 0x4000>; }; @@ -151,7 +152,7 @@ }; l2cc: clock-controller@2011000 { - compatible = "syscon"; + compatible = "qcom,kpss-gcc", "syscon"; reg = <0x02011000 0x1000>; }; diff --git a/dts/src/arm/qcom-msm8226.dtsi b/dts/src/arm/qcom-msm8226.dtsi index 7d48599502..85e56992d2 100644 --- a/dts/src/arm/qcom-msm8226.dtsi +++ b/dts/src/arm/qcom-msm8226.dtsi @@ -8,6 +8,7 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/qcom,gcc-msm8974.h> #include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/reset/qcom,gcc-msm8974.h> / { #address-cells = <1>; @@ -72,6 +73,35 @@ rpm_requests: rpm-requests { compatible = "qcom,rpm-msm8226"; qcom,smd-channels = "rpm_requests"; + + rpmpd: power-controller { + compatible = "qcom,msm8226-rpmpd"; + #power-domain-cells = <1>; + operating-points-v2 = <&rpmpd_opp_table>; + + rpmpd_opp_table: opp-table { + compatible = "operating-points-v2"; + + rpmpd_opp_ret: opp1 { + opp-level = <1>; + }; + rpmpd_opp_svs_krait: opp2 { + opp-level = <2>; + }; + rpmpd_opp_svs_soc: opp3 { + opp-level = <3>; + }; + rpmpd_opp_nom: opp4 { + opp-level = <4>; + }; + rpmpd_opp_turbo: opp5 { + opp-level = <5>; + }; + rpmpd_opp_super_turbo: opp6 { + opp-level = <6>; + }; + }; + }; }; }; }; @@ -115,6 +145,8 @@ <&gcc GCC_SDCC1_AHB_CLK>, <&xo_board>; clock-names = "core", "iface", "xo"; + pinctrl-names = "default"; + pinctrl-0 = <&sdhc1_default_state>; status = "disabled"; }; @@ -129,6 +161,8 @@ <&gcc GCC_SDCC2_AHB_CLK>, <&xo_board>; clock-names = "core", "iface", "xo"; + pinctrl-names = "default"; + pinctrl-0 = <&sdhc2_default_state>; status = "disabled"; }; @@ -143,6 +177,8 @@ <&gcc GCC_SDCC3_AHB_CLK>, <&xo_board>; clock-names = "core", "iface", "xo"; + pinctrl-names = "default"; + pinctrl-0 = <&sdhc3_default_state>; status = "disabled"; }; @@ -229,6 +265,44 @@ #size-cells = <0>; }; + usb: usb@f9a55000 { + compatible = "qcom,ci-hdrc"; + reg = <0xf9a55000 0x200>, + <0xf9a55200 0x200>; + interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&gcc GCC_USB_HS_AHB_CLK>, + <&gcc GCC_USB_HS_SYSTEM_CLK>; + clock-names = "iface", "core"; + assigned-clocks = <&gcc GCC_USB_HS_SYSTEM_CLK>; + assigned-clock-rates = <75000000>; + resets = <&gcc GCC_USB_HS_BCR>; + reset-names = "core"; + phy_type = "ulpi"; + dr_mode = "otg"; + hnp-disable; + srp-disable; + adp-disable; + ahb-burst-config = <0>; + phy-names = "usb-phy"; + phys = <&usb_hs_phy>; + status = "disabled"; + #reset-cells = <1>; + + ulpi { + usb_hs_phy: phy { + compatible = "qcom,usb-hs-phy-msm8226", + "qcom,usb-hs-phy"; + #phy-cells = <0>; + clocks = <&xo_board>, <&gcc GCC_USB2A_PHY_SLEEP_CLK>; + clock-names = "ref", "sleep"; + resets = <&gcc GCC_USB2A_PHY_BCR>, <&usb 0>; + reset-names = "phy", "por"; + qcom,init-seq = /bits/ 8 <0x0 0x44 + 0x1 0x68 0x2 0x24 0x3 0x13>; + }; + }; + }; + gcc: clock-controller@fc400000 { compatible = "qcom,gcc-msm8226"; reg = <0xfc400000 0x4000>; @@ -281,6 +355,57 @@ drive-strength = <2>; bias-disable; }; + + sdhc1_default_state: sdhc1-default-state { + clk { + pins = "sdc1_clk"; + drive-strength = <10>; + bias-disable; + }; + + cmd-data { + pins = "sdc1_cmd", "sdc1_data"; + drive-strength = <10>; + bias-pull-up; + }; + }; + + sdhc2_default_state: sdhc2-default-state { + clk { + pins = "sdc2_clk"; + drive-strength = <10>; + bias-disable; + }; + + cmd-data { + pins = "sdc2_cmd", "sdc2_data"; + drive-strength = <10>; + bias-pull-up; + }; + }; + + sdhc3_default_state: sdhc3-default-state { + clk { + pins = "gpio44"; + function = "sdc3"; + drive-strength = <8>; + bias-disable; + }; + + cmd { + pins = "gpio43"; + function = "sdc3"; + drive-strength = <8>; + bias-pull-up; + }; + + data { + pins = "gpio39", "gpio40", "gpio41", "gpio42"; + function = "sdc3"; + drive-strength = <8>; + bias-pull-up; + }; + }; }; restart@fc4ab000 { diff --git a/dts/src/arm/qcom-msm8660.dtsi b/dts/src/arm/qcom-msm8660.dtsi index 1e8aab357f..a258abb23a 100644 --- a/dts/src/arm/qcom-msm8660.dtsi +++ b/dts/src/arm/qcom-msm8660.dtsi @@ -126,6 +126,7 @@ gcc: clock-controller@900000 { compatible = "qcom,gcc-msm8660"; #clock-cells = <1>; + #power-domain-cells = <1>; #reset-cells = <1>; reg = <0x900000 0x4000>; }; @@ -390,7 +391,7 @@ }; l2cc: clock-controller@2082000 { - compatible = "syscon"; + compatible = "qcom,kpss-gcc", "syscon"; reg = <0x02082000 0x1000>; }; diff --git a/dts/src/arm/qcom-msm8960-cdp.dts b/dts/src/arm/qcom-msm8960-cdp.dts index 4af01039c3..d1fd0fe12f 100644 --- a/dts/src/arm/qcom-msm8960-cdp.dts +++ b/dts/src/arm/qcom-msm8960-cdp.dts @@ -279,7 +279,7 @@ pinctrl-0 = <&spi1_default>; spi@16080000 { status = "okay"; - eth@0 { + ethernet@0 { compatible = "micrel,ks8851"; reg = <0>; interrupt-parent = <&msmgpio>; diff --git a/dts/src/arm/qcom-msm8960.dtsi b/dts/src/arm/qcom-msm8960.dtsi index 2a0ec97a26..4a2d74cf01 100644 --- a/dts/src/arm/qcom-msm8960.dtsi +++ b/dts/src/arm/qcom-msm8960.dtsi @@ -78,6 +78,15 @@ }; }; + /* Temporary fixed regulator */ + vsdcc_fixed: vsdcc-regulator { + compatible = "regulator-fixed"; + regulator-name = "SDCC Power"; + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <2700000>; + regulator-always-on; + }; + soc: soc { #address-cells = <1>; #size-cells = <1>; @@ -118,6 +127,7 @@ gcc: clock-controller@900000 { compatible = "qcom,gcc-msm8960"; #clock-cells = <1>; + #power-domain-cells = <1>; #reset-cells = <1>; reg = <0x900000 0x4000>; }; @@ -133,11 +143,12 @@ compatible = "qcom,mmcc-msm8960"; reg = <0x4000000 0x1000>; #clock-cells = <1>; + #power-domain-cells = <1>; #reset-cells = <1>; }; l2cc: clock-controller@2011000 { - compatible = "syscon"; + compatible = "qcom,kpss-gcc", "syscon"; reg = <0x2011000 0x1000>; }; @@ -146,7 +157,9 @@ reg = <0x108000 0x1000>; qcom,ipc = <&l2cc 0x8 2>; - interrupts = <0 19 0>, <0 21 0>, <0 22 0>; + interrupts = <GIC_SPI 19 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 22 IRQ_TYPE_EDGE_RISING>; interrupt-names = "ack", "err", "wakeup"; regulators { @@ -192,7 +205,7 @@ compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; reg = <0x16440000 0x1000>, <0x16400000 0x1000>; - interrupts = <0 154 0x0>; + interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; clocks = <&gcc GSBI5_UART_CLK>, <&gcc GSBI5_H_CLK>; clock-names = "core", "iface"; status = "disabled"; @@ -249,15 +262,6 @@ clock-names = "core"; }; - /* Temporary fixed regulator */ - vsdcc_fixed: vsdcc-regulator { - compatible = "regulator-fixed"; - regulator-name = "SDCC Power"; - regulator-min-microvolt = <2700000>; - regulator-max-microvolt = <2700000>; - regulator-always-on; - }; - amba { compatible = "simple-bus"; #address-cells = <1>; @@ -318,7 +322,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <0x16080000 0x1000>; - interrupts = <0 147 0>; + interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; spi-max-frequency = <24000000>; cs-gpios = <&msmgpio 8 0>; diff --git a/dts/src/arm/qcom-pm8226.dtsi b/dts/src/arm/qcom-pm8226.dtsi index dddb5150df..b3d0f7b587 100644 --- a/dts/src/arm/qcom-pm8226.dtsi +++ b/dts/src/arm/qcom-pm8226.dtsi @@ -16,6 +16,39 @@ debounce = <15625>; bias-pull-up; }; + + smbb: charger@1000 { + compatible = "qcom,pm8226-charger"; + reg = <0x1000>; + interrupts = <0x0 0x10 7 IRQ_TYPE_EDGE_BOTH>, + <0x0 0x10 5 IRQ_TYPE_EDGE_BOTH>, + <0x0 0x10 4 IRQ_TYPE_EDGE_BOTH>, + <0x0 0x12 1 IRQ_TYPE_EDGE_BOTH>, + <0x0 0x12 0 IRQ_TYPE_EDGE_BOTH>, + <0x0 0x13 2 IRQ_TYPE_EDGE_BOTH>, + <0x0 0x13 1 IRQ_TYPE_EDGE_BOTH>, + <0x0 0x14 1 IRQ_TYPE_EDGE_BOTH>; + interrupt-names = "chg-done", + "chg-fast", + "chg-trkl", + "bat-temp-ok", + "bat-present", + "chg-gone", + "usb-valid", + "dc-valid"; + + chg_otg: otg-vbus { }; + }; + + pm8226_mpps: mpps@a000 { + compatible = "qcom,pm8226-mpp", "qcom,spmi-mpp"; + reg = <0xa000>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pm8226_mpps 0 0 8>; + interrupt-controller; + #interrupt-cells = <2>; + }; }; pm8226_1: pm8226@1 { @@ -23,5 +56,15 @@ reg = <0x1 SPMI_USID>; #address-cells = <1>; #size-cells = <0>; + + pm8226_spmi_regulators: pm8226-regulators { + compatible = "qcom,pm8226-regulators"; + }; + + pm8226_vib: vibrator@c000 { + compatible = "qcom,pm8916-vib"; + reg = <0xc000>; + status = "disabled"; + }; }; }; diff --git a/dts/src/arm/qcom-sdx55.dtsi b/dts/src/arm/qcom-sdx55.dtsi index 8ac0492c76..d455795da4 100644 --- a/dts/src/arm/qcom-sdx55.dtsi +++ b/dts/src/arm/qcom-sdx55.dtsi @@ -413,7 +413,7 @@ <0x40000000 0xf1d>, <0x40000f20 0xc8>, <0x40001000 0x1000>, - <0x40002000 0x10000>, + <0x40200000 0x100000>, <0x01c03000 0x3000>; reg-names = "parf", "dbi", "elbi", "atu", "addr_space", "mmio"; @@ -536,7 +536,7 @@ reg = <0x0c264000 0x1000>; }; - spmi_bus: qcom,spmi@c440000 { + spmi_bus: spmi@c440000 { compatible = "qcom,spmi-pmic-arb"; reg = <0x0c440000 0x0000d00>, <0x0c600000 0x2000000>, diff --git a/dts/src/arm/r8a7740-armadillo800eva.dts b/dts/src/arm/r8a7740-armadillo800eva.dts index a01f3def1c..0af63ddc44 100644 --- a/dts/src/arm/r8a7740-armadillo800eva.dts +++ b/dts/src/arm/r8a7740-armadillo800eva.dts @@ -266,7 +266,7 @@ function = "lcd0"; }; - lcd0_mux { + lcd0-mux-hog { /* DBGMD/LCDC0/FSIA MUX */ gpio-hog; gpios = <176 0>; diff --git a/dts/src/arm/r8a7742-iwg21d-q7-dbcm-ca.dts b/dts/src/arm/r8a7742-iwg21d-q7-dbcm-ca.dts index 3c8a7c8b1f..4e58c54cde 100644 --- a/dts/src/arm/r8a7742-iwg21d-q7-dbcm-ca.dts +++ b/dts/src/arm/r8a7742-iwg21d-q7-dbcm-ca.dts @@ -91,10 +91,10 @@ &gpio0 { /* Disable hogging GP0_18 to output LOW */ - /delete-node/ qspi_en; + /delete-node/ qspi-en-hog; /* Hog GP0_18 to output HIGH to enable VIN2 */ - vin2_en { + vin2-en-hog { gpio-hog; gpios = <18 GPIO_ACTIVE_HIGH>; output-high; diff --git a/dts/src/arm/r8a7742-iwg21d-q7.dts b/dts/src/arm/r8a7742-iwg21d-q7.dts index a5a79cdbcd..64102b6640 100644 --- a/dts/src/arm/r8a7742-iwg21d-q7.dts +++ b/dts/src/arm/r8a7742-iwg21d-q7.dts @@ -226,7 +226,7 @@ }; &gpio0 { - touch-interrupt { + touch-interrupt-hog { gpio-hog; gpios = <24 GPIO_ACTIVE_LOW>; input; @@ -234,7 +234,7 @@ }; &gpio1 { - can-trx-en-gpio{ + can-trx-en-hog { gpio-hog; gpios = <28 GPIO_ACTIVE_HIGH>; output-low; diff --git a/dts/src/arm/r8a7742-iwg21m.dtsi b/dts/src/arm/r8a7742-iwg21m.dtsi index 5621c9ed69..b281a4d164 100644 --- a/dts/src/arm/r8a7742-iwg21m.dtsi +++ b/dts/src/arm/r8a7742-iwg21m.dtsi @@ -37,7 +37,7 @@ &gpio0 { /* GP0_18 set low to select QSPI. Doing so will disable VIN2 */ - qspi_en { + qspi-en-hog { gpio-hog; gpios = <18 GPIO_ACTIVE_HIGH>; output-low; diff --git a/dts/src/arm/r8a77470-iwg23s-sbc.dts b/dts/src/arm/r8a77470-iwg23s-sbc.dts index b024621c99..6448022852 100644 --- a/dts/src/arm/r8a77470-iwg23s-sbc.dts +++ b/dts/src/arm/r8a77470-iwg23s-sbc.dts @@ -116,7 +116,7 @@ }; &gpio2 { - interrupt-fixup { + interrupt-fixup-hog { gpio-hog; gpios = <29 GPIO_ACTIVE_HIGH>; line-name = "hdmi-hpd-int"; diff --git a/dts/src/arm/r9a06g032-rzn1d400-db.dts b/dts/src/arm/r9a06g032-rzn1d400-db.dts index 4e57ae2688..3f8f3ce87e 100644 --- a/dts/src/arm/r9a06g032-rzn1d400-db.dts +++ b/dts/src/arm/r9a06g032-rzn1d400-db.dts @@ -26,3 +26,8 @@ &uart0 { status = "okay"; }; + +&wdt0 { + timeout-sec = <60>; + status = "okay"; +}; diff --git a/dts/src/arm/r9a06g032.dtsi b/dts/src/arm/r9a06g032.dtsi index c47896e4ab..636a6ab31c 100644 --- a/dts/src/arm/r9a06g032.dtsi +++ b/dts/src/arm/r9a06g032.dtsi @@ -66,6 +66,22 @@ interrupt-parent = <&gic>; ranges; + wdt0: watchdog@40008000 { + compatible = "renesas,r9a06g032-wdt", "renesas,rzn1-wdt"; + reg = <0x40008000 0x1000>; + interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>; + clocks = <&sysctrl R9A06G032_CLK_WATCHDOG>; + status = "disabled"; + }; + + wdt1: watchdog@40009000 { + compatible = "renesas,r9a06g032-wdt", "renesas,rzn1-wdt"; + reg = <0x40009000 0x1000>; + interrupts = <GIC_SPI 74 IRQ_TYPE_EDGE_RISING>; + clocks = <&sysctrl R9A06G032_CLK_WATCHDOG>; + status = "disabled"; + }; + sysctrl: system-controller@4000c000 { compatible = "renesas,r9a06g032-sysctrl"; reg = <0x4000c000 0x1000>; @@ -173,6 +189,17 @@ status = "okay"; }; + nand_controller: nand-controller@40102000 { + compatible = "renesas,r9a06g032-nandc", "renesas,rzn1-nandc"; + reg = <0x40102000 0x2000>; + interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&sysctrl R9A06G032_HCLK_NAND>, <&sysctrl R9A06G032_CLK_NAND>; + clock-names = "hclk", "eclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + gic: interrupt-controller@44101000 { compatible = "arm,gic-400", "arm,cortex-a7-gic"; interrupt-controller; diff --git a/dts/src/arm/rk3188-px3-evb.dts b/dts/src/arm/rk3188-px3-evb.dts index 39c60426c9..fc478ac4e7 100644 --- a/dts/src/arm/rk3188-px3-evb.dts +++ b/dts/src/arm/rk3188-px3-evb.dts @@ -212,7 +212,7 @@ regulator-name = "wl_18"; }; - lcd_33: SWITCH_REG1 { + lcd_33: SWITCH_REG { regulator-name = "lcd_33"; }; }; diff --git a/dts/src/arm/rk3288.dtsi b/dts/src/arm/rk3288.dtsi index 45a9d9b908..26b9bbe310 100644 --- a/dts/src/arm/rk3288.dtsi +++ b/dts/src/arm/rk3288.dtsi @@ -980,7 +980,6 @@ clock-names = "aclk", "hclk", "sclk", "apb_pclk"; resets = <&cru SRST_CRYPTO>; reset-names = "crypto-rst"; - status = "okay"; }; iep_mmu: iommu@ff900800 { diff --git a/dts/src/arm/rv1108-elgin-r1.dts b/dts/src/arm/rv1108-elgin-r1.dts index f62c9f7af7..0c99a5934e 100644 --- a/dts/src/arm/rv1108-elgin-r1.dts +++ b/dts/src/arm/rv1108-elgin-r1.dts @@ -72,6 +72,7 @@ interrupt-parent = <&gpio0>; interrupts = <RK_PB4 IRQ_TYPE_LEVEL_LOW>; rockchip,system-power-controller; + #clock-cells = <0>; vcc1-supply = <&vcc_sys>; vcc2-supply = <&vcc_sys>; diff --git a/dts/src/arm/rv1108-evb.dts b/dts/src/arm/rv1108-evb.dts index fe5fc9bf75..46cad7cb94 100644 --- a/dts/src/arm/rv1108-evb.dts +++ b/dts/src/arm/rv1108-evb.dts @@ -85,6 +85,7 @@ interrupt-parent = <&gpio0>; interrupts = <RK_PB4 IRQ_TYPE_LEVEL_LOW>; rockchip,system-power-controller; + #clock-cells = <0>; vcc1-supply = <&vcc_sys>; vcc2-supply = <&vcc_sys>; diff --git a/dts/src/arm/s3c2416-pinctrl.dtsi b/dts/src/arm/s3c2416-pinctrl.dtsi index 92439ee5d7..20a7d72827 100644 --- a/dts/src/arm/s3c2416-pinctrl.dtsi +++ b/dts/src/arm/s3c2416-pinctrl.dtsi @@ -12,66 +12,66 @@ * Pin banks */ - gpa: gpa { + gpa: gpa-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpb: gpb { + gpb: gpb-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpc: gpc { + gpc: gpc-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpd: gpd { + gpd: gpd-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpe: gpe { + gpe: gpe-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpf: gpf { + gpf: gpf-gpio-bank { gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; - gpg: gpg { + gpg: gpg-gpio-bank { gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; - gph: gph { + gph: gph-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpj: gpj { + gpj: gpj-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpk: gpk { + gpk: gpk-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpl: gpl { + gpl: gpl-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpm: gpm { + gpm: gpm-gpio-bank { gpio-controller; #gpio-cells = <2>; }; @@ -80,92 +80,92 @@ * Pin groups */ - uart0_data: uart0-data { + uart0_data: uart0-data-pins { samsung,pins = "gph-0", "gph-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; }; - uart0_fctl: uart0-fctl { + uart0_fctl: uart0-fctl-pins { samsung,pins = "gph-8", "gph-9"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; }; - uart1_data: uart1-data { + uart1_data: uart1-data-pins { samsung,pins = "gph-2", "gph-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; }; - uart1_fctl: uart1-fctl { + uart1_fctl: uart1-fctl-pins { samsung,pins = "gph-10", "gph-11"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; }; - uart2_data: uart2-data { + uart2_data: uart2-data-pins { samsung,pins = "gph-4", "gph-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; }; - uart2_fctl: uart2-fctl { + uart2_fctl: uart2-fctl-pins { samsung,pins = "gph-6", "gph-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; }; - uart3_data: uart3-data { + uart3_data: uart3-data-pins { samsung,pins = "gph-6", "gph-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; }; - extuart_clk: extuart-clk { + extuart_clk: extuart-clk-pins { samsung,pins = "gph-12"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; }; - i2c0_bus: i2c0-bus { + i2c0_bus: i2c0-bus-pins { samsung,pins = "gpe-14", "gpe-15"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; }; - spi0_bus: spi0-bus { + spi0_bus: spi0-bus-pins { samsung,pins = "gpe-11", "gpe-12", "gpe-13"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; }; - sd0_clk: sd0-clk { + sd0_clk: sd0-clk-pins { samsung,pins = "gpe-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; }; - sd0_cmd: sd0-cmd { + sd0_cmd: sd0-cmd-pins { samsung,pins = "gpe-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; }; - sd0_bus1: sd0-bus1 { + sd0_bus1: sd0-bus1-pins { samsung,pins = "gpe-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; }; - sd0_bus4: sd0-bus4 { + sd0_bus4: sd0-bus4-pins { samsung,pins = "gpe-8", "gpe-9", "gpe-10"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; }; - sd1_cmd: sd1-cmd { + sd1_cmd: sd1-cmd-pins { samsung,pins = "gpl-8"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; }; - sd1_clk: sd1-clk { + sd1_clk: sd1-clk-pins { samsung,pins = "gpl-9"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; }; - sd1_bus1: sd1-bus1 { + sd1_bus1: sd1-bus1-pins { samsung,pins = "gpl-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; }; - sd1_bus4: sd1-bus4 { + sd1_bus4: sd1-bus4-pins { samsung,pins = "gpl-1", "gpl-2", "gpl-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; }; diff --git a/dts/src/arm/s3c6410-mini6410.dts b/dts/src/arm/s3c6410-mini6410.dts index 285555b9ed..17097da36f 100644 --- a/dts/src/arm/s3c6410-mini6410.dts +++ b/dts/src/arm/s3c6410-mini6410.dts @@ -193,12 +193,12 @@ }; &pinctrl0 { - gpio_leds: gpio-leds { + gpio_leds: gpio-leds-pins { samsung,pins = "gpk-4", "gpk-5", "gpk-6", "gpk-7"; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - gpio_keys: gpio-keys { + gpio_keys: gpio-keys-pins { samsung,pins = "gpn-0", "gpn-1", "gpn-2", "gpn-3", "gpn-4", "gpn-5", "gpl-11", "gpl-12"; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; diff --git a/dts/src/arm/s3c64xx-pinctrl.dtsi b/dts/src/arm/s3c64xx-pinctrl.dtsi index 8e9594d64b..0a3186d57c 100644 --- a/dts/src/arm/s3c64xx-pinctrl.dtsi +++ b/dts/src/arm/s3c64xx-pinctrl.dtsi @@ -16,111 +16,111 @@ * Pin banks */ - gpa: gpa { + gpa: gpa-gpio-bank { gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; - gpb: gpb { + gpb: gpb-gpio-bank { gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; - gpc: gpc { + gpc: gpc-gpio-bank { gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; - gpd: gpd { + gpd: gpd-gpio-bank { gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; - gpe: gpe { + gpe: gpe-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpf: gpf { + gpf: gpf-gpio-bank { gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; - gpg: gpg { + gpg: gpg-gpio-bank { gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; - gph: gph { + gph: gph-gpio-bank { gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; - gpi: gpi { + gpi: gpi-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpj: gpj { + gpj: gpj-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpk: gpk { + gpk: gpk-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gpl: gpl { + gpl: gpl-gpio-bank { gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; - gpm: gpm { + gpm: gpm-gpio-bank { gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; - gpn: gpn { + gpn: gpn-gpio-bank { gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; - gpo: gpo { + gpo: gpo-gpio-bank { gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; - gpp: gpp { + gpp: gpp-gpio-bank { gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; - gpq: gpq { + gpq: gpq-gpio-bank { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -131,225 +131,225 @@ * Pin groups */ - uart0_data: uart0-data { + uart0_data: uart0-data-pins { samsung,pins = "gpa-0", "gpa-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - uart0_fctl: uart0-fctl { + uart0_fctl: uart0-fctl-pins { samsung,pins = "gpa-2", "gpa-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - uart1_data: uart1-data { + uart1_data: uart1-data-pins { samsung,pins = "gpa-4", "gpa-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - uart1_fctl: uart1-fctl { + uart1_fctl: uart1-fctl-pins { samsung,pins = "gpa-6", "gpa-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - uart2_data: uart2-data { + uart2_data: uart2-data-pins { samsung,pins = "gpb-0", "gpb-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - uart3_data: uart3-data { + uart3_data: uart3-data-pins { samsung,pins = "gpb-2", "gpb-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - ext_dma_0: ext-dma-0 { + ext_dma_0: ext-dma-0-pins { samsung,pins = "gpb-0", "gpb-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - ext_dma_1: ext-dma-1 { + ext_dma_1: ext-dma-1-pins { samsung,pins = "gpb-2", "gpb-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_4>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - irda_data_0: irda-data-0 { + irda_data_0: irda-data-0-pins { samsung,pins = "gpb-0", "gpb-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_4>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - irda_data_1: irda-data-1 { + irda_data_1: irda-data-1-pins { samsung,pins = "gpb-2", "gpb-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - irda_sdbw: irda-sdbw { + irda_sdbw: irda-sdbw-pins { samsung,pins = "gpb-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - i2c0_bus: i2c0-bus { + i2c0_bus: i2c0-bus-pins { samsung,pins = "gpb-5", "gpb-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_UP>; }; - i2c1_bus: i2c1-bus { + i2c1_bus: i2c1-bus-pins { /* S3C6410-only */ samsung,pins = "gpb-2", "gpb-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_6>; samsung,pin-pud = <S3C64XX_PIN_PULL_UP>; }; - spi0_bus: spi0-bus { + spi0_bus: spi0-bus-pins { samsung,pins = "gpc-0", "gpc-1", "gpc-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_UP>; }; - spi0_cs: spi0-cs { + spi0_cs: spi0-cs-pins { samsung,pins = "gpc-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - spi1_bus: spi1-bus { + spi1_bus: spi1-bus-pins { samsung,pins = "gpc-4", "gpc-5", "gpc-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_UP>; }; - spi1_cs: spi1-cs { + spi1_cs: spi1-cs-pins { samsung,pins = "gpc-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - sd0_cmd: sd0-cmd { + sd0_cmd: sd0-cmd-pins { samsung,pins = "gpg-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - sd0_clk: sd0-clk { + sd0_clk: sd0-clk-pins { samsung,pins = "gpg-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - sd0_bus1: sd0-bus1 { + sd0_bus1: sd0-bus1-pins { samsung,pins = "gpg-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - sd0_bus4: sd0-bus4 { + sd0_bus4: sd0-bus4-pins { samsung,pins = "gpg-2", "gpg-3", "gpg-4", "gpg-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - sd0_cd: sd0-cd { + sd0_cd: sd0-cd-pins { samsung,pins = "gpg-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_UP>; }; - sd1_cmd: sd1-cmd { + sd1_cmd: sd1-cmd-pins { samsung,pins = "gph-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - sd1_clk: sd1-clk { + sd1_clk: sd1-clk-pins { samsung,pins = "gph-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - sd1_bus1: sd1-bus1 { + sd1_bus1: sd1-bus1-pins { samsung,pins = "gph-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - sd1_bus4: sd1-bus4 { + sd1_bus4: sd1-bus4-pins { samsung,pins = "gph-2", "gph-3", "gph-4", "gph-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - sd1_bus8: sd1-bus8 { + sd1_bus8: sd1-bus8-pins { samsung,pins = "gph-2", "gph-3", "gph-4", "gph-5", "gph-6", "gph-7", "gph-8", "gph-9"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - sd1_cd: sd1-cd { + sd1_cd: sd1-cd-pins { samsung,pins = "gpg-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_UP>; }; - sd2_cmd: sd2-cmd { + sd2_cmd: sd2-cmd-pins { samsung,pins = "gpc-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - sd2_clk: sd2-clk { + sd2_clk: sd2-clk-pins { samsung,pins = "gpc-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - sd2_bus1: sd2-bus1 { + sd2_bus1: sd2-bus1-pins { samsung,pins = "gph-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - sd2_bus4: sd2-bus4 { + sd2_bus4: sd2-bus4-pins { samsung,pins = "gph-6", "gph-7", "gph-8", "gph-9"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - i2s0_bus: i2s0-bus { + i2s0_bus: i2s0-bus-pins { samsung,pins = "gpd-0", "gpd-2", "gpd-3", "gpd-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - i2s0_cdclk: i2s0-cdclk { + i2s0_cdclk: i2s0-cdclk-pins { samsung,pins = "gpd-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - i2s1_bus: i2s1-bus { + i2s1_bus: i2s1-bus-pins { samsung,pins = "gpe-0", "gpe-2", "gpe-3", "gpe-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - i2s1_cdclk: i2s1-cdclk { + i2s1_cdclk: i2s1-cdclk-pins { samsung,pins = "gpe-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - i2s2_bus: i2s2-bus { + i2s2_bus: i2s2-bus-pins { /* S3C6410-only */ samsung,pins = "gpc-4", "gpc-5", "gpc-6", "gph-6", "gph-8", "gph-9"; @@ -357,50 +357,50 @@ samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - i2s2_cdclk: i2s2-cdclk { + i2s2_cdclk: i2s2-cdclk-pins { /* S3C6410-only */ samsung,pins = "gph-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_5>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - pcm0_bus: pcm0-bus { + pcm0_bus: pcm0-bus-pins { samsung,pins = "gpd-0", "gpd-2", "gpd-3", "gpd-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - pcm0_extclk: pcm0-extclk { + pcm0_extclk: pcm0-extclk-pins { samsung,pins = "gpd-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - pcm1_bus: pcm1-bus { + pcm1_bus: pcm1-bus-pins { samsung,pins = "gpe-0", "gpe-2", "gpe-3", "gpe-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - pcm1_extclk: pcm1-extclk { + pcm1_extclk: pcm1-extclk-pins { samsung,pins = "gpe-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - ac97_bus_0: ac97-bus-0 { + ac97_bus_0: ac97-bus-0-pins { samsung,pins = "gpd-0", "gpd-1", "gpd-2", "gpd-3", "gpd-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_4>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - ac97_bus_1: ac97-bus-1 { + ac97_bus_1: ac97-bus-1-pins { samsung,pins = "gpe-0", "gpe-1", "gpe-2", "gpe-3", "gpe-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_4>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - cam_port: cam-port { + cam_port: cam-port-pins { samsung,pins = "gpf-0", "gpf-1", "gpf-2", "gpf-4", "gpf-5", "gpf-6", "gpf-7", "gpf-8", "gpf-9", "gpf-10", "gpf-11", "gpf-12"; @@ -408,242 +408,242 @@ samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - cam_rst: cam-rst { + cam_rst: cam-rst-pins { samsung,pins = "gpf-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - cam_field: cam-field { + cam_field: cam-field-pins { /* S3C6410-only */ samsung,pins = "gpb-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - pwm_extclk: pwm-extclk { + pwm_extclk: pwm-extclk-pins { samsung,pins = "gpf-13"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - pwm0_out: pwm0-out { + pwm0_out: pwm0-out-pins { samsung,pins = "gpf-14"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - pwm1_out: pwm1-out { + pwm1_out: pwm1-out-pins { samsung,pins = "gpf-15"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - clkout0: clkout-0 { + clkout0: clkout-0-pins { samsung,pins = "gpf-14"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - keypad_col0_0: keypad-col0-0 { + keypad_col0_0: keypad-col0-0-pins { samsung,pins = "gph-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_4>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - keypad_col1_0: keypad-col1-0 { + keypad_col1_0: keypad-col1-0-pins { samsung,pins = "gph-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_4>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - keypad_col2_0: keypad-col2-0 { + keypad_col2_0: keypad-col2-0-pins { samsung,pins = "gph-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_4>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - keypad_col3_0: keypad-col3-0 { + keypad_col3_0: keypad-col3-0-pins { samsung,pins = "gph-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_4>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - keypad_col4_0: keypad-col4-0 { + keypad_col4_0: keypad-col4-0-pins { samsung,pins = "gph-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_4>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - keypad_col5_0: keypad-col5-0 { + keypad_col5_0: keypad-col5-0-pins { samsung,pins = "gph-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_4>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - keypad_col6_0: keypad-col6-0 { + keypad_col6_0: keypad-col6-0-pins { samsung,pins = "gph-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_4>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - keypad_col7_0: keypad-col7-0 { + keypad_col7_0: keypad-col7-0-pins { samsung,pins = "gph-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_4>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - keypad_col0_1: keypad-col0-1 { + keypad_col0_1: keypad-col0-1-pins { samsung,pins = "gpl-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - keypad_col1_1: keypad-col1-1 { + keypad_col1_1: keypad-col1-1-pins { samsung,pins = "gpl-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - keypad_col2_1: keypad-col2-1 { + keypad_col2_1: keypad-col2-1-pins { samsung,pins = "gpl-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - keypad_col3_1: keypad-col3-1 { + keypad_col3_1: keypad-col3-1-pins { samsung,pins = "gpl-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - keypad_col4_1: keypad-col4-1 { + keypad_col4_1: keypad-col4-1-pins { samsung,pins = "gpl-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - keypad_col5_1: keypad-col5-1 { + keypad_col5_1: keypad-col5-1-pins { samsung,pins = "gpl-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - keypad_col6_1: keypad-col6-1 { + keypad_col6_1: keypad-col6-1-pins { samsung,pins = "gpl-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - keypad_col7_1: keypad-col7-1 { + keypad_col7_1: keypad-col7-1-pins { samsung,pins = "gpl-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - keypad_row0_0: keypad-row0-0 { + keypad_row0_0: keypad-row0-0-pins { samsung,pins = "gpk-8"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - keypad_row1_0: keypad-row1-0 { + keypad_row1_0: keypad-row1-0-pins { samsung,pins = "gpk-9"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - keypad_row2_0: keypad-row2-0 { + keypad_row2_0: keypad-row2-0-pins { samsung,pins = "gpk-10"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - keypad_row3_0: keypad-row3-0 { + keypad_row3_0: keypad-row3-0-pins { samsung,pins = "gpk-11"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - keypad_row4_0: keypad-row4-0 { + keypad_row4_0: keypad-row4-0-pins { samsung,pins = "gpk-12"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - keypad_row5_0: keypad-row5-0 { + keypad_row5_0: keypad-row5-0-pins { samsung,pins = "gpk-13"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - keypad_row6_0: keypad-row6-0 { + keypad_row6_0: keypad-row6-0-pins { samsung,pins = "gpk-14"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - keypad_row7_0: keypad-row7-0 { + keypad_row7_0: keypad-row7-0-pins { samsung,pins = "gpk-15"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - keypad_row0_1: keypad-row0-1 { + keypad_row0_1: keypad-row0-1-pins { samsung,pins = "gpn-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - keypad_row1_1: keypad-row1-1 { + keypad_row1_1: keypad-row1-1-pins { samsung,pins = "gpn-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - keypad_row2_1: keypad-row2-1 { + keypad_row2_1: keypad-row2-1-pins { samsung,pins = "gpn-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - keypad_row3_1: keypad-row3-1 { + keypad_row3_1: keypad-row3-1-pins { samsung,pins = "gpn-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - keypad_row4_1: keypad-row4-1 { + keypad_row4_1: keypad-row4-1-pins { samsung,pins = "gpn-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - keypad_row5_1: keypad-row5-1 { + keypad_row5_1: keypad-row5-1-pins { samsung,pins = "gpn-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - keypad_row6_1: keypad-row6-1 { + keypad_row6_1: keypad-row6-1-pins { samsung,pins = "gpn-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - keypad_row7_1: keypad-row7-1 { + keypad_row7_1: keypad-row7-1-pins { samsung,pins = "gpn-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - lcd_ctrl: lcd-ctrl { + lcd_ctrl: lcd-ctrl-pins { samsung,pins = "gpj-8", "gpj-9", "gpj-10", "gpj-11"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - lcd_data16: lcd-data-width16 { + lcd_data16: lcd-data-width16-pins { samsung,pins = "gpi-3", "gpi-4", "gpi-5", "gpi-6", "gpi-7", "gpi-10", "gpi-11", "gpi-12", "gpi-13", "gpi-14", "gpi-15", "gpj-3", @@ -652,7 +652,7 @@ samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - lcd_data18: lcd-data-width18 { + lcd_data18: lcd-data-width18-pins { samsung,pins = "gpi-2", "gpi-3", "gpi-4", "gpi-5", "gpi-6", "gpi-7", "gpi-10", "gpi-11", "gpi-12", "gpi-13", "gpi-14", "gpi-15", @@ -662,7 +662,7 @@ samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - lcd_data24: lcd-data-width24 { + lcd_data24: lcd-data-width24-pins { samsung,pins = "gpi-0", "gpi-1", "gpi-2", "gpi-3", "gpi-4", "gpi-5", "gpi-6", "gpi-7", "gpi-8", "gpi-9", "gpi-10", "gpi-11", @@ -673,7 +673,7 @@ samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - hsi_bus: hsi-bus { + hsi_bus: hsi-bus-pins { samsung,pins = "gpk-0", "gpk-1", "gpk-2", "gpk-3", "gpk-4", "gpk-5", "gpk-6", "gpk-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; diff --git a/dts/src/arm/s3c64xx.dtsi b/dts/src/arm/s3c64xx.dtsi index cb11a87dbc..67a7a66e11 100644 --- a/dts/src/arm/s3c64xx.dtsi +++ b/dts/src/arm/s3c64xx.dtsi @@ -178,20 +178,12 @@ interrupt-parent = <&vic1>; interrupts = <21>; - pctrl_int_map: pinctrl-interrupt-map { - interrupt-map = <0 &vic0 0>, - <1 &vic0 1>, - <2 &vic1 0>, - <3 &vic1 1>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <1>; - }; - wakeup-interrupt-controller { compatible = "samsung,s3c64xx-wakeup-eint"; - interrupts = <0>, <1>, <2>, <3>; - interrupt-parent = <&pctrl_int_map>; + interrupts-extended = <&vic0 0>, + <&vic0 1>, + <&vic1 0>, + <&vic1 1>; }; }; }; diff --git a/dts/src/arm/s5pv210-aquila.dts b/dts/src/arm/s5pv210-aquila.dts index 6423348034..54de3bc77c 100644 --- a/dts/src/arm/s5pv210-aquila.dts +++ b/dts/src/arm/s5pv210-aquila.dts @@ -391,7 +391,7 @@ }; &pinctrl0 { - t_flash_detect: t-flash-detect { + t_flash_detect: t-flash-detect-pins { samsung,pins = "gph3-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; diff --git a/dts/src/arm/s5pv210-aries.dtsi b/dts/src/arm/s5pv210-aries.dtsi index 160f8cd9a6..c8f1c324a6 100644 --- a/dts/src/arm/s5pv210-aries.dtsi +++ b/dts/src/arm/s5pv210-aries.dtsi @@ -645,21 +645,21 @@ }; &pinctrl0 { - bt_reset: bt-reset { + bt_reset: bt-reset-pins { samsung,pins = "gpb-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - wlan_bt_en: wlan-bt-en { + wlan_bt_en: wlan-bt-en-pins { samsung,pins = "gpb-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-val = <1>; }; - codec_ldo: codec-ldo { + codec_ldo: codec-ldo-pins { samsung,pins = "gpf3-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; @@ -671,19 +671,19 @@ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - wlan_gpio_rst: wlan-gpio-rst { + wlan_gpio_rst: wlan-gpio-rst-pins { samsung,pins = "gpg1-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - bt_wake: bt-wake { + bt_wake: bt-wake-pins { samsung,pins = "gpg3-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - gp2a_irq: gp2a-irq { + gp2a_irq: gp2a-irq-pins { samsung,pins = "gph0-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_F>; samsung,pin-pud = <S3C64XX_PIN_PULL_DOWN>; @@ -698,67 +698,67 @@ samsung,pin-val = <0>; }; - pmic_irq: pmic-irq { + pmic_irq: pmic-irq-pins { samsung,pins = "gph0-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_F>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - wifi_host_wake: wifi-host-wake { + wifi_host_wake: wifi-host-wake-pins { samsung,pins = "gph2-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <S3C64XX_PIN_PULL_DOWN>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - bt_host_wake: bt-host-wake { + bt_host_wake: bt-host-wake-pins { samsung,pins = "gph2-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <S3C64XX_PIN_PULL_DOWN>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - musb_irq: musq-irq { + musb_irq: musq-irq-pins { samsung,pins = "gph2-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - tf_detect: tf-detect { + tf_detect: tf-detect-pins { samsung,pins = "gph3-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <S3C64XX_PIN_PULL_DOWN>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - wifi_wake: wifi-wake { + wifi_wake: wifi-wake-pins { samsung,pins = "gph3-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - magnetometer_i2c_pins: yas529-i2c-pins { + magnetometer_i2c_pins: yas529-i2c-pins-pins { samsung,pins = "gpj0-0", "gpj0-1"; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - ts_irq: ts-irq { + ts_irq: ts-irq-pins { samsung,pins = "gpj0-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - vibrator_ena: vibrator-ena { + vibrator_ena: vibrator-ena-pins { samsung,pins = "gpj1-1"; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - gp2a_power: gp2a-power { + gp2a_power: gp2a-power-pins { samsung,pins = "gpj1-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; @@ -771,7 +771,7 @@ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - touchkey_vdd_ena: touchkey-vdd-ena { + touchkey_vdd_ena: touchkey-vdd-ena-pins { samsung,pins = "gpj3-2"; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; @@ -789,13 +789,13 @@ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - pmic_i2c_pins: pmic-i2c-pins { + pmic_i2c_pins: pmic-i2c-pins-pins { samsung,pins = "gpj4-0", "gpj4-3"; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - touchkey_irq: touchkey-irq { + touchkey_irq: touchkey-irq-pins { samsung,pins = "gpj4-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <S3C64XX_PIN_PULL_UP>; @@ -820,7 +820,7 @@ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - panel_rst: panel-rst { + panel_rst: panel-rst-pins { samsung,pins = "mp05-5"; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; diff --git a/dts/src/arm/s5pv210-fascinate4g.dts b/dts/src/arm/s5pv210-fascinate4g.dts index 7427c84f11..dfb2ee65e4 100644 --- a/dts/src/arm/s5pv210-fascinate4g.dts +++ b/dts/src/arm/s5pv210-fascinate4g.dts @@ -126,39 +126,39 @@ pinctrl-names = "default"; pinctrl-0 = <&sleep_cfg>; - headset_det: headset-det { + headset_det: headset-det-pins { samsung,pins = "gph0-6", "gph3-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_F>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - fg_irq: fg-irq { + fg_irq: fg-irq-pins { samsung,pins = "gph3-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_F>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - headset_micbias_ena: headset-micbias-ena { + headset_micbias_ena: headset-micbias-ena-pins { samsung,pins = "gpj2-5"; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - earpath_sel: earpath-sel { + earpath_sel: earpath-sel-pins { samsung,pins = "gpj2-6"; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - main_micbias_ena: main-micbias-ena { + main_micbias_ena: main-micbias-ena-pins { samsung,pins = "gpj4-2"; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; /* Based on vendor kernel v2.6.35.7 */ - sleep_cfg: sleep-cfg { + sleep_cfg: sleep-state { PIN_SLP(gpa0-0, PREV, NONE); PIN_SLP(gpa0-1, PREV, NONE); PIN_SLP(gpa0-2, PREV, NONE); diff --git a/dts/src/arm/s5pv210-galaxys.dts b/dts/src/arm/s5pv210-galaxys.dts index eeec2bdece..a78caaa1f3 100644 --- a/dts/src/arm/s5pv210-galaxys.dts +++ b/dts/src/arm/s5pv210-galaxys.dts @@ -150,53 +150,53 @@ pinctrl-names = "default"; pinctrl-0 = <&sleep_cfg>; - fm_i2c_pins: fm-i2c-pins { + fm_i2c_pins: fm-i2c-pins-pins { samsung,pins = "gpd1-2", "gpd1-3"; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - headset_det: headset-det { + headset_det: headset-det-pins { samsung,pins = "gph0-6", "gph3-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_F>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; }; - fm_irq: fm-irq { + fm_irq: fm-irq-pins { samsung,pins = "gpj2-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <S3C64XX_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - fm_rst: fm-rst { + fm_rst: fm-rst-pins { samsung,pins = "gpj2-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - earpath_sel: earpath-sel { + earpath_sel: earpath-sel-pins { samsung,pins = "gpj2-6"; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - massmemory_en: massmemory-en { + massmemory_en: massmemory-en-pins { samsung,pins = "gpj2-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - micbias_reg_ena: micbias-reg-ena { + micbias_reg_ena: micbias-reg-ena-pins { samsung,pins = "gpj4-2"; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; /* Based on CyanogenMod 3.0.101 kernel */ - sleep_cfg: sleep-cfg { + sleep_cfg: sleep-state { PIN_SLP(gpa0-0, PREV, NONE); PIN_SLP(gpa0-1, PREV, NONE); PIN_SLP(gpa0-2, PREV, NONE); diff --git a/dts/src/arm/s5pv210-pinctrl.dtsi b/dts/src/arm/s5pv210-pinctrl.dtsi index b8c5172c31..ae34e7e578 100644 --- a/dts/src/arm/s5pv210-pinctrl.dtsi +++ b/dts/src/arm/s5pv210-pinctrl.dtsi @@ -26,7 +26,7 @@ } &pinctrl0 { - gpa0: gpa0 { + gpa0: gpa0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -34,7 +34,7 @@ #interrupt-cells = <2>; }; - gpa1: gpa1 { + gpa1: gpa1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -42,7 +42,7 @@ #interrupt-cells = <2>; }; - gpb: gpb { + gpb: gpb-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -50,7 +50,7 @@ #interrupt-cells = <2>; }; - gpc0: gpc0 { + gpc0: gpc0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -58,7 +58,7 @@ #interrupt-cells = <2>; }; - gpc1: gpc1 { + gpc1: gpc1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -66,7 +66,7 @@ #interrupt-cells = <2>; }; - gpd0: gpd0 { + gpd0: gpd0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -74,7 +74,7 @@ #interrupt-cells = <2>; }; - gpd1: gpd1 { + gpd1: gpd1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -82,7 +82,7 @@ #interrupt-cells = <2>; }; - gpe0: gpe0 { + gpe0: gpe0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -90,7 +90,7 @@ #interrupt-cells = <2>; }; - gpe1: gpe1 { + gpe1: gpe1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -98,7 +98,7 @@ #interrupt-cells = <2>; }; - gpf0: gpf0 { + gpf0: gpf0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -106,7 +106,7 @@ #interrupt-cells = <2>; }; - gpf1: gpf1 { + gpf1: gpf1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -114,7 +114,7 @@ #interrupt-cells = <2>; }; - gpf2: gpf2 { + gpf2: gpf2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -122,7 +122,7 @@ #interrupt-cells = <2>; }; - gpf3: gpf3 { + gpf3: gpf3-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -130,7 +130,7 @@ #interrupt-cells = <2>; }; - gpg0: gpg0 { + gpg0: gpg0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -138,7 +138,7 @@ #interrupt-cells = <2>; }; - gpg1: gpg1 { + gpg1: gpg1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -146,7 +146,7 @@ #interrupt-cells = <2>; }; - gpg2: gpg2 { + gpg2: gpg2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -154,7 +154,7 @@ #interrupt-cells = <2>; }; - gpg3: gpg3 { + gpg3: gpg3-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -162,7 +162,7 @@ #interrupt-cells = <2>; }; - gpj0: gpj0 { + gpj0: gpj0-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -170,7 +170,7 @@ #interrupt-cells = <2>; }; - gpj1: gpj1 { + gpj1: gpj1-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -178,7 +178,7 @@ #interrupt-cells = <2>; }; - gpj2: gpj2 { + gpj2: gpj2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -186,7 +186,7 @@ #interrupt-cells = <2>; }; - gpj3: gpj3 { + gpj3: gpj3-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -194,7 +194,7 @@ #interrupt-cells = <2>; }; - gpj4: gpj4 { + gpj4: gpj4-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -202,47 +202,47 @@ #interrupt-cells = <2>; }; - gpi: gpi { + gpi: gpi-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - mp01: mp01 { + mp01: mp01-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - mp02: mp02 { + mp02: mp02-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - mp03: mp03 { + mp03: mp03-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - mp04: mp04 { + mp04: mp04-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - mp05: mp05 { + mp05: mp05-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - mp06: mp06 { + mp06: mp06-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - mp07: mp07 { + mp07: mp07-gpio-bank { gpio-controller; #gpio-cells = <2>; }; - gph0: gph0 { + gph0: gph0-gpio-bank { gpio-controller; interrupt-controller; interrupt-parent = <&vic0>; @@ -252,7 +252,7 @@ #interrupt-cells = <2>; }; - gph1: gph1 { + gph1: gph1-gpio-bank { gpio-controller; interrupt-controller; interrupt-parent = <&vic0>; @@ -262,7 +262,7 @@ #interrupt-cells = <2>; }; - gph2: gph2 { + gph2: gph2-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -270,7 +270,7 @@ #interrupt-cells = <2>; }; - gph3: gph3 { + gph3: gph3-gpio-bank { gpio-controller; #gpio-cells = <2>; @@ -278,77 +278,77 @@ #interrupt-cells = <2>; }; - uart0_data: uart0-data { + uart0_data: uart0-data-pins { samsung,pins = "gpa0-0", "gpa0-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - uart0_fctl: uart0-fctl { + uart0_fctl: uart0-fctl-pins { samsung,pins = "gpa0-2", "gpa0-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - uart1_data: uart1-data { + uart1_data: uart1-data-pins { samsung,pins = "gpa0-4", "gpa0-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - uart1_fctl: uart1-fctl { + uart1_fctl: uart1-fctl-pins { samsung,pins = "gpa0-6", "gpa0-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - uart2_data: uart2-data { + uart2_data: uart2-data-pins { samsung,pins = "gpa1-0", "gpa1-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - uart2_fctl: uart2-fctl { + uart2_fctl: uart2-fctl-pins { samsung,pins = "gpa1-2", "gpa1-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - uart3_data: uart3-data { + uart3_data: uart3-data-pins { samsung,pins = "gpa1-2", "gpa1-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - uart_audio: uart-audio { + uart_audio: uart-audio-pins { samsung,pins = "gpa1-2", "gpa1-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_4>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - spi0_bus: spi0-bus { + spi0_bus: spi0-bus-pins { samsung,pins = "gpb-0", "gpb-2", "gpb-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - spi1_bus: spi1-bus { + spi1_bus: spi1-bus-pins { samsung,pins = "gpb-4", "gpb-6", "gpb-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2s0_bus: i2s0-bus { + i2s0_bus: i2s0-bus-pins { samsung,pins = "gpi-0", "gpi-1", "gpi-2", "gpi-3", "gpi-4", "gpi-5", "gpi-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; @@ -356,7 +356,7 @@ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2s1_bus: i2s1-bus { + i2s1_bus: i2s1-bus-pins { samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3", "gpc0-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; @@ -364,7 +364,7 @@ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2s2_bus: i2s2-bus { + i2s2_bus: i2s2-bus-pins { samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3", "gpc1-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_4>; @@ -372,7 +372,7 @@ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - pcm1_bus: pcm1-bus { + pcm1_bus: pcm1-bus-pins { samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3", "gpc0-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; @@ -380,7 +380,7 @@ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - ac97_bus: ac97-bus { + ac97_bus: ac97-bus-pins { samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3", "gpc0-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_4>; @@ -388,7 +388,7 @@ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2s2_bus: i2s2-bus { + i2s2_bus: i2s2-bus-pins { samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3", "gpc1-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; @@ -396,7 +396,7 @@ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - pcm2_bus: pcm2-bus { + pcm2_bus: pcm2-bus-pins { samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3", "gpc1-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; @@ -404,371 +404,371 @@ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - spdif_bus: spdif-bus { + spdif_bus: spdif-bus-pins { samsung,pins = "gpc1-0", "gpc1-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_4>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - spi2_bus: spi2-bus { + spi2_bus: spi2-bus-pins { samsung,pins = "gpc1-1", "gpc1-2", "gpc1-3", "gpc1-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_5>; samsung,pin-pud = <S3C64XX_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2c0_bus: i2c0-bus { + i2c0_bus: i2c0-bus-pins { samsung,pins = "gpd1-0", "gpd1-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2c1_bus: i2c1-bus { + i2c1_bus: i2c1-bus-pins { samsung,pins = "gpd1-2", "gpd1-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - i2c2_bus: i2c2-bus { + i2c2_bus: i2c2-bus-pins { samsung,pins = "gpd1-4", "gpd1-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - pwm0_out: pwm0-out { + pwm0_out: pwm0-out-pins { samsung,pins = "gpd0-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - pwm1_out: pwm1-out { + pwm1_out: pwm1-out-pins { samsung,pins = "gpd0-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - pwm2_out: pwm2-out { + pwm2_out: pwm2-out-pins { samsung,pins = "gpd0-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - pwm3_out: pwm3-out { + pwm3_out: pwm3-out-pins { samsung,pins = "gpd0-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - keypad_row0: keypad-row-0 { + keypad_row0: keypad-row-0-pins { samsung,pins = "gph3-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - keypad_row1: keypad-row-1 { + keypad_row1: keypad-row-1-pins { samsung,pins = "gph3-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - keypad_row2: keypad-row-2 { + keypad_row2: keypad-row-2-pins { samsung,pins = "gph3-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - keypad_row3: keypad-row-3 { + keypad_row3: keypad-row-3-pins { samsung,pins = "gph3-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - keypad_row4: keypad-row-4 { + keypad_row4: keypad-row-4-pins { samsung,pins = "gph3-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - keypad_row5: keypad-row-5 { + keypad_row5: keypad-row-5-pins { samsung,pins = "gph3-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - keypad_row6: keypad-row-6 { + keypad_row6: keypad-row-6-pins { samsung,pins = "gph3-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - keypad_row7: keypad-row-7 { + keypad_row7: keypad-row-7-pins { samsung,pins = "gph3-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - keypad_col0: keypad-col-0 { + keypad_col0: keypad-col-0-pins { samsung,pins = "gph2-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - keypad_col1: keypad-col-1 { + keypad_col1: keypad-col-1-pins { samsung,pins = "gph2-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - keypad_col2: keypad-col-2 { + keypad_col2: keypad-col-2-pins { samsung,pins = "gph2-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - keypad_col3: keypad-col-3 { + keypad_col3: keypad-col-3-pins { samsung,pins = "gph2-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - keypad_col4: keypad-col-4 { + keypad_col4: keypad-col-4-pins { samsung,pins = "gph2-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - keypad_col5: keypad-col-5 { + keypad_col5: keypad-col-5-pins { samsung,pins = "gph2-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - keypad_col6: keypad-col-6 { + keypad_col6: keypad-col-6-pins { samsung,pins = "gph2-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - keypad_col7: keypad-col-7 { + keypad_col7: keypad-col-7-pins { samsung,pins = "gph2-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - sd0_clk: sd0-clk { + sd0_clk: sd0-clk-pins { samsung,pins = "gpg0-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd0_cmd: sd0-cmd { + sd0_cmd: sd0-cmd-pins { samsung,pins = "gpg0-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd0_cd: sd0-cd { + sd0_cd: sd0-cd-pins { samsung,pins = "gpg0-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd0_bus1: sd0-bus-width1 { + sd0_bus1: sd0-bus-width1-pins { samsung,pins = "gpg0-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd0_bus4: sd0-bus-width4 { + sd0_bus4: sd0-bus-width4-pins { samsung,pins = "gpg0-3", "gpg0-4", "gpg0-5", "gpg0-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd0_bus8: sd0-bus-width8 { + sd0_bus8: sd0-bus-width8-pins { samsung,pins = "gpg1-3", "gpg1-4", "gpg1-5", "gpg1-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd1_clk: sd1-clk { + sd1_clk: sd1-clk-pins { samsung,pins = "gpg1-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd1_cmd: sd1-cmd { + sd1_cmd: sd1-cmd-pins { samsung,pins = "gpg1-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd1_cd: sd1-cd { + sd1_cd: sd1-cd-pins { samsung,pins = "gpg1-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd1_bus1: sd1-bus-width1 { + sd1_bus1: sd1-bus-width1-pins { samsung,pins = "gpg1-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd1_bus4: sd1-bus-width4 { + sd1_bus4: sd1-bus-width4-pins { samsung,pins = "gpg1-3", "gpg1-4", "gpg1-5", "gpg1-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd2_clk: sd2-clk { + sd2_clk: sd2-clk-pins { samsung,pins = "gpg2-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd2_cmd: sd2-cmd { + sd2_cmd: sd2-cmd-pins { samsung,pins = "gpg2-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd2_cd: sd2-cd { + sd2_cd: sd2-cd-pins { samsung,pins = "gpg2-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd2_bus1: sd2-bus-width1 { + sd2_bus1: sd2-bus-width1-pins { samsung,pins = "gpg2-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd2_bus4: sd2-bus-width4 { + sd2_bus4: sd2-bus-width4-pins { samsung,pins = "gpg2-3", "gpg2-4", "gpg2-5", "gpg2-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd2_bus8: sd2-bus-width8 { + sd2_bus8: sd2-bus-width8-pins { samsung,pins = "gpg3-3", "gpg3-4", "gpg3-5", "gpg3-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd3_clk: sd3-clk { + sd3_clk: sd3-clk-pins { samsung,pins = "gpg3-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd3_cmd: sd3-cmd { + sd3_cmd: sd3-cmd-pins { samsung,pins = "gpg3-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd3_cd: sd3-cd { + sd3_cd: sd3-cd-pins { samsung,pins = "gpg3-2"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd3_bus1: sd3-bus-width1 { + sd3_bus1: sd3-bus-width1-pins { samsung,pins = "gpg3-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - sd3_bus4: sd3-bus-width4 { + sd3_bus4: sd3-bus-width4-pins { samsung,pins = "gpg3-3", "gpg3-4", "gpg3-5", "gpg3-6"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_UP>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - eint0: ext-int0 { + eint0: ext-int0-pins { samsung,pins = "gph0-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_F>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - eint8: ext-int8 { + eint8: ext-int8-pins { samsung,pins = "gph1-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_F>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - eint15: ext-int15 { + eint15: ext-int15-pins { samsung,pins = "gph1-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_F>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - eint16: ext-int16 { + eint16: ext-int16-pins { samsung,pins = "gph2-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_F>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - eint31: ext-int31 { + eint31: ext-int31-pins { samsung,pins = "gph3-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_F>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - cam_port_a_io: cam-port-a-io { + cam_port_a_io: cam-port-a-io-pins { samsung,pins = "gpe0-0", "gpe0-1", "gpe0-2", "gpe0-3", "gpe0-4", "gpe0-5", "gpe0-6", "gpe0-7", "gpe1-0", "gpe1-1", "gpe1-2", "gpe1-4"; @@ -777,21 +777,21 @@ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - cam_port_a_clk_active: cam-port-a-clk-active { + cam_port_a_clk_active: cam-port-a-clk-active-pins { samsung,pins = "gpe1-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - cam_port_a_clk_idle: cam-port-a-clk-idle { + cam_port_a_clk_idle: cam-port-a-clk-idle-pins { samsung,pins = "gpe1-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <S3C64XX_PIN_PULL_DOWN>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - cam_port_b_io: cam-port-b-io { + cam_port_b_io: cam-port-b-io-pins { samsung,pins = "gpj0-0", "gpj0-1", "gpj0-2", "gpj0-3", "gpj0-4", "gpj0-5", "gpj0-6", "gpj0-7", "gpj1-0", "gpj1-1", "gpj1-2", "gpj1-4"; @@ -800,42 +800,42 @@ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - cam_port_b_clk_active: cam-port-b-clk-active { + cam_port_b_clk_active: cam-port-b-clk-active-pins { samsung,pins = "gpj1-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; }; - cam_port_b_clk_idle: cam-port-b-clk-idle { + cam_port_b_clk_idle: cam-port-b-clk-idle-pins { samsung,pins = "gpj1-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; samsung,pin-pud = <S3C64XX_PIN_PULL_DOWN>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - lcd_ctrl: lcd-ctrl { + lcd_ctrl: lcd-ctrl-pins { samsung,pins = "gpd0-0", "gpd0-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - lcd_sync: lcd-sync { + lcd_sync: lcd-sync-pins { samsung,pins = "gpf0-0", "gpf0-1"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - lcd_clk: lcd-clk { + lcd_clk: lcd-clk-pins { samsung,pins = "gpf0-0", "gpf0-1", "gpf0-2", "gpf0-3"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>; samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; - lcd_data24: lcd-data-width24 { + lcd_data24: lcd-data-width24-pins { samsung,pins = "gpf0-4", "gpf0-5", "gpf0-6", "gpf0-7", "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3", "gpf1-4", "gpf1-5", "gpf1-6", "gpf1-7", diff --git a/dts/src/arm/sam9x60.dtsi b/dts/src/arm/sam9x60.dtsi index ec45ced3cd..998629a3c3 100644 --- a/dts/src/arm/sam9x60.dtsi +++ b/dts/src/arm/sam9x60.dtsi @@ -270,7 +270,7 @@ clock-names = "pclk", "gclk"; }; - sha: sha@f002c000 { + sha: crypto@f002c000 { compatible = "atmel,at91sam9g46-sha"; reg = <0xf002c000 0x100>; interrupts = <41 IRQ_TYPE_LEVEL_HIGH 0>; @@ -280,7 +280,6 @@ dma-names = "tx"; clocks = <&pmc PMC_TYPE_PERIPHERAL 41>; clock-names = "sha_clk"; - status = "okay"; }; trng: trng@f0030000 { @@ -288,10 +287,9 @@ reg = <0xf0030000 0x100>; interrupts = <38 IRQ_TYPE_LEVEL_HIGH 0>; clocks = <&pmc PMC_TYPE_PERIPHERAL 38>; - status = "okay"; }; - aes: aes@f0034000 { + aes: crypto@f0034000 { compatible = "atmel,at91sam9g46-aes"; reg = <0xf0034000 0x100>; interrupts = <39 IRQ_TYPE_LEVEL_HIGH 0>; @@ -304,10 +302,9 @@ dma-names = "tx", "rx"; clocks = <&pmc PMC_TYPE_PERIPHERAL 39>; clock-names = "aes_clk"; - status = "okay"; }; - tdes: tdes@f0038000 { + tdes: crypto@f0038000 { compatible = "atmel,at91sam9g46-tdes"; reg = <0xf0038000 0x100>; interrupts = <40 IRQ_TYPE_LEVEL_HIGH 0>; @@ -320,7 +317,6 @@ dma-names = "tx", "rx"; clocks = <&pmc PMC_TYPE_PERIPHERAL 40>; clock-names = "tdes_clk"; - status = "okay"; }; classd: classd@f003c000 { diff --git a/dts/src/arm/sama5d2.dtsi b/dts/src/arm/sama5d2.dtsi index 09c741e8ec..89c71d419f 100644 --- a/dts/src/arm/sama5d2.dtsi +++ b/dts/src/arm/sama5d2.dtsi @@ -306,7 +306,7 @@ status = "disabled"; }; - sha@f0028000 { + sha: crypto@f0028000 { compatible = "atmel,at91sam9g46-sha"; reg = <0xf0028000 0x100>; interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>; @@ -316,10 +316,9 @@ dma-names = "tx"; clocks = <&pmc PMC_TYPE_PERIPHERAL 12>; clock-names = "sha_clk"; - status = "okay"; }; - aes@f002c000 { + aes: crypto@f002c000 { compatible = "atmel,at91sam9g46-aes"; reg = <0xf002c000 0x100>; interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>; @@ -332,7 +331,6 @@ dma-names = "tx", "rx"; clocks = <&pmc PMC_TYPE_PERIPHERAL 9>; clock-names = "aes_clk"; - status = "okay"; }; spi0: spi@f8000000 { @@ -415,7 +413,7 @@ pmecc: ecc-engine@f8014070 { compatible = "atmel,sama5d2-pmecc"; reg = <0xf8014070 0x490>, - <0xf8014500 0x100>; + <0xf8014500 0x200>; }; }; @@ -1084,7 +1082,7 @@ #gpio-cells = <2>; }; - tdes@fc044000 { + tdes: crypto@fc044000 { compatible = "atmel,at91sam9g46-tdes"; reg = <0xfc044000 0x100>; interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>; @@ -1097,7 +1095,6 @@ dma-names = "tx", "rx"; clocks = <&pmc PMC_TYPE_PERIPHERAL 11>; clock-names = "tdes_clk"; - status = "okay"; }; classd: classd@fc048000 { diff --git a/dts/src/arm/sama5d3.dtsi b/dts/src/arm/sama5d3.dtsi index d1841bffe3..8fa423c525 100644 --- a/dts/src/arm/sama5d3.dtsi +++ b/dts/src/arm/sama5d3.dtsi @@ -381,7 +381,7 @@ status = "disabled"; }; - sha@f8034000 { + sha: crypto@f8034000 { compatible = "atmel,at91sam9g46-sha"; reg = <0xf8034000 0x100>; interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>; @@ -391,7 +391,7 @@ clock-names = "sha_clk"; }; - aes@f8038000 { + aes: crypto@f8038000 { compatible = "atmel,at91sam9g46-aes"; reg = <0xf8038000 0x100>; interrupts = <43 IRQ_TYPE_LEVEL_HIGH 0>; @@ -402,7 +402,7 @@ clock-names = "aes_clk"; }; - tdes@f803c000 { + tdes: crypto@f803c000 { compatible = "atmel,at91sam9g46-tdes"; reg = <0xf803c000 0x100>; interrupts = <44 IRQ_TYPE_LEVEL_HIGH 0>; diff --git a/dts/src/arm/sama5d4.dtsi b/dts/src/arm/sama5d4.dtsi index f6e3e6f572..7b92426648 100644 --- a/dts/src/arm/sama5d4.dtsi +++ b/dts/src/arm/sama5d4.dtsi @@ -673,7 +673,7 @@ status = "disabled"; }; - aes@fc044000 { + aes: crypto@fc044000 { compatible = "atmel,at91sam9g46-aes"; reg = <0xfc044000 0x100>; interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>; @@ -684,10 +684,9 @@ dma-names = "tx", "rx"; clocks = <&pmc PMC_TYPE_PERIPHERAL 12>; clock-names = "aes_clk"; - status = "okay"; }; - tdes@fc04c000 { + tdes: crpyto@fc04c000 { compatible = "atmel,at91sam9g46-tdes"; reg = <0xfc04c000 0x100>; interrupts = <14 IRQ_TYPE_LEVEL_HIGH 0>; @@ -698,10 +697,9 @@ dma-names = "tx", "rx"; clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; clock-names = "tdes_clk"; - status = "okay"; }; - sha@fc050000 { + sha: crypto@fc050000 { compatible = "atmel,at91sam9g46-sha"; reg = <0xfc050000 0x100>; interrupts = <15 IRQ_TYPE_LEVEL_HIGH 0>; @@ -710,7 +708,6 @@ dma-names = "tx"; clocks = <&pmc PMC_TYPE_PERIPHERAL 15>; clock-names = "sha_clk"; - status = "okay"; }; hsmc: smc@fc05c000 { diff --git a/dts/src/arm/sama7g5.dtsi b/dts/src/arm/sama7g5.dtsi index eddcfbf4d2..4decd3a91a 100644 --- a/dts/src/arm/sama7g5.dtsi +++ b/dts/src/arm/sama7g5.dtsi @@ -30,6 +30,44 @@ device_type = "cpu"; compatible = "arm,cortex-a7"; reg = <0x0>; + clocks = <&pmc PMC_TYPE_CORE PMC_CPUPLL>; + clock-names = "cpu"; + operating-points-v2 = <&cpu_opp_table>; + }; + }; + + cpu_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-90000000 { + opp-hz = /bits/ 64 <90000000>; + opp-microvolt = <1050000 1050000 1225000>; + clock-latency-ns = <320000>; + }; + + opp-250000000 { + opp-hz = /bits/ 64 <250000000>; + opp-microvolt = <1050000 1050000 1225000>; + clock-latency-ns = <320000>; + }; + + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <1050000 1050000 1225000>; + clock-latency-ns = <320000>; + opp-suspend; + }; + + opp-800000000 { + opp-hz = /bits/ 64 <800000000>; + opp-microvolt = <1150000 1125000 1225000>; + clock-latency-ns = <320000>; + }; + + opp-1000000002 { + opp-hz = /bits/ 64 <1000000002>; + opp-microvolt = <1250000 1225000 1300000>; + clock-latency-ns = <320000>; }; }; @@ -75,6 +113,45 @@ #size-cells = <1>; ranges; + nfc_sram: sram@600000 { + compatible = "mmio-sram"; + no-memory-wc; + reg = <0x00600000 0x2400>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x00600000 0x2400>; + }; + + nfc_io: nfc-io@10000000 { + compatible = "atmel,sama5d3-nfc-io", "syscon"; + reg = <0x10000000 0x8000000>; + }; + + ebi: ebi@40000000 { + compatible = "atmel,sama5d3-ebi"; + #address-cells = <2>; + #size-cells = <1>; + atmel,smc = <&hsmc>; + reg = <0x40000000 0x20000000>; + ranges = <0x0 0x0 0x40000000 0x8000000 + 0x1 0x0 0x48000000 0x8000000 + 0x2 0x0 0x50000000 0x8000000 + 0x3 0x0 0x58000000 0x8000000>; + clocks = <&pmc PMC_TYPE_CORE PMC_MCK1>; + status = "disabled"; + + nand_controller: nand-controller { + compatible = "atmel,sama5d3-nand-controller"; + atmel,nfc-sram = <&nfc_sram>; + atmel,nfc-io = <&nfc_io>; + ecc-engine = <&pmecc>; + #address-cells = <2>; + #size-cells = <1>; + ranges; + status = "disabled"; + }; + }; + securam: securam@e0000000 { compatible = "microchip,sama7g5-securam", "atmel,sama5d2-securam", "mmio-sram"; reg = <0xe0000000 0x4000>; @@ -83,7 +160,6 @@ #size-cells = <1>; ranges = <0 0xe0000000 0x4000>; no-memory-wc; - status = "okay"; }; secumod: secumod@e0004000 { @@ -181,6 +257,22 @@ clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk"; }; + hsmc: hsmc@e0808000 { + compatible = "atmel,sama5d2-smc", "syscon", "simple-mfd"; + reg = <0xe0808000 0x1000>; + interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 21>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + pmecc: ecc-engine@e0808070 { + compatible = "atmel,sama5d2-pmecc"; + reg = <0xe0808070 0x490>, + <0xe0808500 0x200>; + }; + }; + qspi0: spi@e080c000 { compatible = "microchip,sama7g5-ospi"; reg = <0xe080c000 0x400>, <0x20000000 0x10000000>; @@ -211,6 +303,102 @@ status = "disabled"; }; + can0: can@e0828000 { + compatible = "bosch,m_can"; + reg = <0xe0828000 0x100>, <0x100000 0x7800>; + reg-names = "m_can", "message_ram"; + interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "int0", "int1"; + clocks = <&pmc PMC_TYPE_PERIPHERAL 61>, <&pmc PMC_TYPE_GCK 61>; + clock-names = "hclk", "cclk"; + assigned-clocks = <&pmc PMC_TYPE_GCK 61>; + assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>; + assigned-clock-rates = <40000000>; + bosch,mram-cfg = <0x3400 0 0 64 0 0 32 32>; + status = "disabled"; + }; + + can1: can@e082c000 { + compatible = "bosch,m_can"; + reg = <0xe082c000 0x100>, <0x100000 0xbc00>; + reg-names = "m_can", "message_ram"; + interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "int0", "int1"; + clocks = <&pmc PMC_TYPE_PERIPHERAL 62>, <&pmc PMC_TYPE_GCK 62>; + clock-names = "hclk", "cclk"; + assigned-clocks = <&pmc PMC_TYPE_GCK 62>; + assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>; + assigned-clock-rates = <40000000>; + bosch,mram-cfg = <0x7800 0 0 64 0 0 32 32>; + status = "disabled"; + }; + + can2: can@e0830000 { + compatible = "bosch,m_can"; + reg = <0xe0830000 0x100>, <0x100000 0x10000>; + reg-names = "m_can", "message_ram"; + interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "int0", "int1"; + clocks = <&pmc PMC_TYPE_PERIPHERAL 63>, <&pmc PMC_TYPE_GCK 63>; + clock-names = "hclk", "cclk"; + assigned-clocks = <&pmc PMC_TYPE_GCK 63>; + assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>; + assigned-clock-rates = <40000000>; + bosch,mram-cfg = <0xbc00 0 0 64 0 0 32 32>; + status = "disabled"; + }; + + can3: can@e0834000 { + compatible = "bosch,m_can"; + reg = <0xe0834000 0x100>, <0x110000 0x4400>; + reg-names = "m_can", "message_ram"; + interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "int0", "int1"; + clocks = <&pmc PMC_TYPE_PERIPHERAL 64>, <&pmc PMC_TYPE_GCK 64>; + clock-names = "hclk", "cclk"; + assigned-clocks = <&pmc PMC_TYPE_GCK 64>; + assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>; + assigned-clock-rates = <40000000>; + bosch,mram-cfg = <0x0 0 0 64 0 0 32 32>; + status = "disabled"; + }; + + can4: can@e0838000 { + compatible = "bosch,m_can"; + reg = <0xe0838000 0x100>, <0x110000 0x8800>; + reg-names = "m_can", "message_ram"; + interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "int0", "int1"; + clocks = <&pmc PMC_TYPE_PERIPHERAL 65>, <&pmc PMC_TYPE_GCK 65>; + clock-names = "hclk", "cclk"; + assigned-clocks = <&pmc PMC_TYPE_GCK 65>; + assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>; + assigned-clock-rates = <40000000>; + bosch,mram-cfg = <0x4400 0 0 64 0 0 32 32>; + status = "disabled"; + }; + + can5: can@e083c000 { + compatible = "bosch,m_can"; + reg = <0xe083c000 0x100>, <0x110000 0xcc00>; + reg-names = "m_can", "message_ram"; + interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "int0", "int1"; + clocks = <&pmc PMC_TYPE_PERIPHERAL 66>, <&pmc PMC_TYPE_GCK 66>; + clock-names = "hclk", "cclk"; + assigned-clocks = <&pmc PMC_TYPE_GCK 66>; + assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>; + assigned-clock-rates = <40000000>; + bosch,mram-cfg = <0x8800 0 0 64 0 0 32 32>; + status = "disabled"; + }; + adc: adc@e1000000 { compatible = "microchip,sama7g5-adc"; reg = <0xe1000000 0x200>; @@ -322,6 +510,19 @@ status = "disabled"; }; + eic: interrupt-controller@e1628000 { + compatible = "microchip,sama7g5-eic"; + reg = <0xe1628000 0xec>; + interrupt-parent = <&gic>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 37>; + clock-names = "pclk"; + status = "disabled"; + }; + pit64b0: timer@e1800000 { compatible = "microchip,sama7g5-pit64b", "microchip,sam9x60-pit64b"; reg = <0xe1800000 0x4000>; @@ -338,6 +539,27 @@ clock-names = "pclk", "gclk"; }; + aes: crypto@e1810000 { + compatible = "atmel,at91sam9g46-aes"; + reg = <0xe1810000 0x100>; + interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 27>; + clock-names = "aes_clk"; + dmas = <&dma0 AT91_XDMAC_DT_PERID(1)>, + <&dma0 AT91_XDMAC_DT_PERID(2)>; + dma-names = "tx", "rx"; + }; + + sha: crypto@e1814000 { + compatible = "atmel,at91sam9g46-sha"; + reg = <0xe1814000 0x100>; + interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 83>; + clock-names = "sha_clk"; + dmas = <&dma0 AT91_XDMAC_DT_PERID(48)>; + dma-names = "tx"; + }; + flx0: flexcom@e1818000 { compatible = "atmel,sama5d2-flexcom"; reg = <0xe1818000 0x200>; @@ -382,8 +604,6 @@ dmas = <&dma0 AT91_XDMAC_DT_PERID(7)>, <&dma0 AT91_XDMAC_DT_PERID(8)>; dma-names = "rx", "tx"; - atmel,use-dma-rx; - atmel,use-dma-tx; status = "disabled"; }; }; @@ -420,6 +640,17 @@ status = "disabled"; }; + tdes: crypto@e2014000 { + compatible = "atmel,at91sam9g46-tdes"; + reg = <0xe2014000 0x100>; + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 96>; + clock-names = "tdes_clk"; + dmas = <&dma0 AT91_XDMAC_DT_PERID(54)>, + <&dma0 AT91_XDMAC_DT_PERID(53)>; + dma-names = "tx", "rx"; + }; + flx4: flexcom@e2018000 { compatible = "atmel,sama5d2-flexcom"; reg = <0xe2018000 0x200>; @@ -558,8 +789,6 @@ dmas = <&dma0 AT91_XDMAC_DT_PERID(21)>, <&dma0 AT91_XDMAC_DT_PERID(22)>; dma-names = "rx", "tx"; - atmel,use-dma-rx; - atmel,use-dma-tx; status = "disabled"; }; }; @@ -584,8 +813,6 @@ dmas = <&dma0 AT91_XDMAC_DT_PERID(23)>, <&dma0 AT91_XDMAC_DT_PERID(24)>; dma-names = "rx", "tx"; - atmel,use-dma-rx; - atmel,use-dma-tx; status = "disabled"; }; }; @@ -618,13 +845,11 @@ uddrc: uddrc@e3800000 { compatible = "microchip,sama7g5-uddrc"; reg = <0xe3800000 0x4000>; - status = "okay"; }; ddr3phy: ddr3phy@e3804000 { compatible = "microchip,sama7g5-ddr3phy"; reg = <0xe3804000 0x1000>; - status = "okay"; }; gic: interrupt-controller@e8c11000 { diff --git a/dts/src/arm/socfpga_arria10_mercury_aa1.dts b/dts/src/arm/socfpga_arria10_mercury_aa1.dts index 2a3364b263..a75c059b67 100644 --- a/dts/src/arm/socfpga_arria10_mercury_aa1.dts +++ b/dts/src/arm/socfpga_arria10_mercury_aa1.dts @@ -6,7 +6,7 @@ / { model = "Enclustra Mercury AA1"; - compatible = "altr,socfpga-arria10", "altr,socfpga"; + compatible = "enclustra,mercury-aa1", "altr,socfpga-arria10", "altr,socfpga"; aliases { ethernet0 = &gmac0; diff --git a/dts/src/arm/socfpga_arria10_socdk.dtsi b/dts/src/arm/socfpga_arria10_socdk.dtsi index 7edebe20e8..ec7365444a 100644 --- a/dts/src/arm/socfpga_arria10_socdk.dtsi +++ b/dts/src/arm/socfpga_arria10_socdk.dtsi @@ -6,7 +6,7 @@ / { model = "Altera SOCFPGA Arria 10"; - compatible = "altr,socfpga-arria10", "altr,socfpga"; + compatible = "altr,socfpga-arria10-socdk", "altr,socfpga-arria10", "altr,socfpga"; aliases { ethernet0 = &gmac0; diff --git a/dts/src/arm/socfpga_arria5_socdk.dts b/dts/src/arm/socfpga_arria5_socdk.dts index 1b02d46496..7f5458d8fc 100644 --- a/dts/src/arm/socfpga_arria5_socdk.dts +++ b/dts/src/arm/socfpga_arria5_socdk.dts @@ -7,7 +7,7 @@ / { model = "Altera SOCFPGA Arria V SoC Development Kit"; - compatible = "altr,socfpga-arria5", "altr,socfpga"; + compatible = "altr,socfpga-arria5-socdk", "altr,socfpga-arria5", "altr,socfpga"; chosen { bootargs = "earlyprintk"; @@ -50,7 +50,7 @@ }; }; - regulator_3_3v: 3-3-v-regulator { + regulator_3_3v: regulator { compatible = "regulator-fixed"; regulator-name = "3.3V"; regulator-min-microvolt = <3300000>; diff --git a/dts/src/arm/socfpga_cyclone5_chameleon96.dts b/dts/src/arm/socfpga_cyclone5_chameleon96.dts index f6561766d8..76262f1e5e 100644 --- a/dts/src/arm/socfpga_cyclone5_chameleon96.dts +++ b/dts/src/arm/socfpga_cyclone5_chameleon96.dts @@ -24,7 +24,7 @@ reg = <0x0 0x20000000>; /* 512MB */ }; - regulator_3_3v: 3-3-v-regulator { + regulator_3_3v: regulator { compatible = "regulator-fixed"; regulator-name = "3.3V"; regulator-min-microvolt = <3300000>; diff --git a/dts/src/arm/socfpga_cyclone5_de0_nano_soc.dts b/dts/src/arm/socfpga_cyclone5_de0_nano_soc.dts index 67076e1b1c..c8f051fb2b 100644 --- a/dts/src/arm/socfpga_cyclone5_de0_nano_soc.dts +++ b/dts/src/arm/socfpga_cyclone5_de0_nano_soc.dts @@ -24,7 +24,7 @@ ethernet0 = &gmac1; }; - regulator_3_3v: 3-3-v-regulator { + regulator_3_3v: regulator { compatible = "regulator-fixed"; regulator-name = "3.3V"; regulator-min-microvolt = <3300000>; diff --git a/dts/src/arm/socfpga_cyclone5_socdk.dts b/dts/src/arm/socfpga_cyclone5_socdk.dts index 51bb436784..253ef13918 100644 --- a/dts/src/arm/socfpga_cyclone5_socdk.dts +++ b/dts/src/arm/socfpga_cyclone5_socdk.dts @@ -50,7 +50,7 @@ }; }; - regulator_3_3v: 3-3-v-regulator { + regulator_3_3v: regulator { compatible = "regulator-fixed"; regulator-name = "3.3V"; regulator-min-microvolt = <3300000>; diff --git a/dts/src/arm/socfpga_cyclone5_sockit.dts b/dts/src/arm/socfpga_cyclone5_sockit.dts index cae9ddd5ed..3dd99c7c95 100644 --- a/dts/src/arm/socfpga_cyclone5_sockit.dts +++ b/dts/src/arm/socfpga_cyclone5_sockit.dts @@ -111,7 +111,7 @@ }; }; - regulator_3_3v: vcc3p3-regulator { + regulator_3_3v: regulator { compatible = "regulator-fixed"; regulator-name = "VCC3P3"; regulator-min-microvolt = <3300000>; diff --git a/dts/src/arm/socfpga_cyclone5_sodia.dts b/dts/src/arm/socfpga_cyclone5_sodia.dts index 3f7aa7bf08..b0003f350e 100644 --- a/dts/src/arm/socfpga_cyclone5_sodia.dts +++ b/dts/src/arm/socfpga_cyclone5_sodia.dts @@ -26,7 +26,7 @@ ethernet0 = &gmac1; }; - regulator_3_3v: 3-3-v-regulator { + regulator_3_3v: regulator { compatible = "regulator-fixed"; regulator-name = "3.3V"; regulator-min-microvolt = <3300000>; diff --git a/dts/src/arm/spear1340.dtsi b/dts/src/arm/spear1340.dtsi index 827e887afb..13e1bdb3dd 100644 --- a/dts/src/arm/spear1340.dtsi +++ b/dts/src/arm/spear1340.dtsi @@ -134,9 +134,9 @@ reg = <0xb4100000 0x1000>; interrupts = <0 105 0x4>; status = "disabled"; - dmas = <&dwdma0 12 0 1>, - <&dwdma0 13 1 0>; - dma-names = "tx", "rx"; + dmas = <&dwdma0 13 0 1>, + <&dwdma0 12 1 0>; + dma-names = "rx", "tx"; }; thermal@e07008c4 { diff --git a/dts/src/arm/spear13xx.dtsi b/dts/src/arm/spear13xx.dtsi index c87b881b2c..9135533676 100644 --- a/dts/src/arm/spear13xx.dtsi +++ b/dts/src/arm/spear13xx.dtsi @@ -284,9 +284,9 @@ #size-cells = <0>; interrupts = <0 31 0x4>; status = "disabled"; - dmas = <&dwdma0 4 0 0>, - <&dwdma0 5 0 0>; - dma-names = "tx", "rx"; + dmas = <&dwdma0 5 0 0>, + <&dwdma0 4 0 0>; + dma-names = "rx", "tx"; }; rtc@e0580000 { diff --git a/dts/src/arm/ste-ab8500.dtsi b/dts/src/arm/ste-ab8500.dtsi index 2cf19386a5..35137c6e52 100644 --- a/dts/src/arm/ste-ab8500.dtsi +++ b/dts/src/arm/ste-ab8500.dtsi @@ -28,26 +28,28 @@ interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; interrupt-controller; #interrupt-cells = <2>; + #address-cells = <1>; + #size-cells = <0>; ab8500_clock: clock-controller { compatible = "stericsson,ab8500-clk"; #clock-cells = <1>; }; - ab8500_gpio: ab8500-gpiocontroller { + ab8500_gpio: gpio { compatible = "stericsson,ab8500-gpio"; gpio-controller; #gpio-cells = <2>; }; - ab8500-rtc { + rtc { compatible = "stericsson,ab8500-rtc"; interrupts = <17 IRQ_TYPE_LEVEL_HIGH>, <18 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "60S", "ALARM"; }; - gpadc: ab8500-gpadc { + gpadc: adc { compatible = "stericsson,ab8500-gpadc"; interrupts = <32 IRQ_TYPE_LEVEL_HIGH>, <39 IRQ_TYPE_LEVEL_HIGH>; @@ -120,13 +122,10 @@ }; }; - ab8500_temp { + thermal { compatible = "stericsson,abx500-temp"; interrupts = <3 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "ABX500_TEMP_WARM"; - io-channels = <&gpadc 0x06>, - <&gpadc 0x07>; - io-channel-names = "aux1", "aux2"; }; ab8500_fg { @@ -212,7 +211,7 @@ monitored-battery = <&battery>; }; - ab8500_usb: ab8500_usb { + ab8500_usb: phy { compatible = "stericsson,ab8500-usb"; interrupts = <90 IRQ_TYPE_LEVEL_HIGH>, <96 IRQ_TYPE_LEVEL_HIGH>, @@ -236,7 +235,7 @@ #phy-cells = <0>; }; - ab8500-ponkey { + key { compatible = "stericsson,ab8500-poweron-key"; interrupts = <6 IRQ_TYPE_LEVEL_HIGH>, <7 IRQ_TYPE_LEVEL_HIGH>; @@ -247,29 +246,31 @@ compatible = "stericsson,ab8500-sysctrl"; }; - ab8500-pwm-1 { + pwm@1 { compatible = "stericsson,ab8500-pwm"; + reg = <1>; clocks = <&ab8500_clock AB8500_SYSCLK_INT>; clock-names = "intclk"; + #pwm-cells = <1>; }; - ab8500-pwm-2 { + pwm@2 { compatible = "stericsson,ab8500-pwm"; + reg = <2>; clocks = <&ab8500_clock AB8500_SYSCLK_INT>; clock-names = "intclk"; + #pwm-cells = <1>; }; - ab8500-pwm-3 { + pwm@3 { compatible = "stericsson,ab8500-pwm"; + reg = <3>; clocks = <&ab8500_clock AB8500_SYSCLK_INT>; clock-names = "intclk"; + #pwm-cells = <1>; }; - ab8500-debugfs { - compatible = "stericsson,ab8500-debug"; - }; - - codec: ab8500-codec { + codec: codec { compatible = "stericsson,ab8500-codec"; V-AUD-supply = <&ab8500_ldo_audio_reg>; @@ -283,7 +284,7 @@ stericsson,earpeice-cmv = <950>; /* Units in mV. */ }; - ext_regulators: ab8500-ext-regulators { + ext_regulators: regulator-external { compatible = "stericsson,ab8500-ext-regulator"; ab8500_ext1_reg: ab8500_ext1 { @@ -307,7 +308,7 @@ }; }; - ab8500-regulators { + regulator { compatible = "stericsson,ab8500-regulator"; vin-supply = <&ab8500_ext3_reg>; diff --git a/dts/src/arm/ste-ab8505.dtsi b/dts/src/arm/ste-ab8505.dtsi index e98335e9d1..131c82508e 100644 --- a/dts/src/arm/ste-ab8505.dtsi +++ b/dts/src/arm/ste-ab8505.dtsi @@ -25,26 +25,28 @@ interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; interrupt-controller; #interrupt-cells = <2>; + #address-cells = <1>; + #size-cells = <0>; ab8500_clock: clock-controller { compatible = "stericsson,ab8500-clk"; #clock-cells = <1>; }; - ab8505_gpio: ab8505-gpiocontroller { + ab8505_gpio: gpio { compatible = "stericsson,ab8505-gpio"; gpio-controller; #gpio-cells = <2>; }; - ab8500-rtc { + rtc { compatible = "stericsson,ab8500-rtc"; interrupts = <17 IRQ_TYPE_LEVEL_HIGH>, <18 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "60S", "ALARM"; }; - gpadc: ab8500-gpadc { + gpadc: adc { compatible = "stericsson,ab8500-gpadc"; interrupts = <39 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "SW_CONV_END"; @@ -92,8 +94,13 @@ }; }; + thermal { + compatible = "stericsson,abx500-temp"; + interrupts = <3 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "ABX500_TEMP_WARM"; + }; + ab8500_fg { - status = "disabled"; compatible = "stericsson,ab8500-fg"; interrupts = <24 IRQ_TYPE_LEVEL_HIGH>, <8 IRQ_TYPE_LEVEL_HIGH>, @@ -111,7 +118,6 @@ }; ab8500_btemp { - status = "disabled"; compatible = "stericsson,ab8500-btemp"; interrupts = <20 IRQ_TYPE_LEVEL_HIGH>, <80 IRQ_TYPE_LEVEL_HIGH>, @@ -131,7 +137,6 @@ }; ab8500_charger { - status = "disabled"; compatible = "stericsson,ab8500-charger"; interrupts = <10 IRQ_TYPE_LEVEL_HIGH>, <11 IRQ_TYPE_LEVEL_HIGH>, @@ -170,12 +175,11 @@ }; ab8500_chargalg { - status = "disabled"; compatible = "stericsson,ab8500-chargalg"; monitored-battery = <&battery>; }; - ab8500_usb: ab8500_usb { + ab8500_usb: phy { compatible = "stericsson,ab8500-usb"; interrupts = <90 IRQ_TYPE_LEVEL_HIGH>, <96 IRQ_TYPE_LEVEL_HIGH>, @@ -199,7 +203,7 @@ #phy-cells = <0>; }; - ab8500-ponkey { + key { compatible = "stericsson,ab8500-poweron-key"; interrupts = <6 IRQ_TYPE_LEVEL_HIGH>, <7 IRQ_TYPE_LEVEL_HIGH>; @@ -210,17 +214,15 @@ compatible = "stericsson,ab8500-sysctrl"; }; - ab8500-pwm { + pwm@1 { compatible = "stericsson,ab8500-pwm"; + reg = <1>; clocks = <&ab8500_clock AB8500_SYSCLK_INT>; clock-names = "intclk"; + #pwm-cells = <1>; }; - ab8500-debugfs { - compatible = "stericsson,ab8500-debug"; - }; - - codec: ab8500-codec { + codec: codec { compatible = "stericsson,ab8500-codec"; V-AUD-supply = <&ab8500_ldo_audio_reg>; @@ -233,7 +235,7 @@ stericsson,earpeice-cmv = <950>; /* Units in mV. */ }; - ab8505-regulators { + regulator { compatible = "stericsson,ab8505-regulator"; ab8500_ldo_aux1_reg: ab8500_ldo_aux1 { diff --git a/dts/src/arm/ste-href-ab8500.dtsi b/dts/src/arm/ste-href-ab8500.dtsi index 3ccb7b5c71..9fa024900d 100644 --- a/dts/src/arm/ste-href-ab8500.dtsi +++ b/dts/src/arm/ste-href-ab8500.dtsi @@ -9,7 +9,7 @@ soc { prcmu@80157000 { ab8500 { - ab8500-gpiocontroller { + gpio { /* Hog a few default settings */ pinctrl-names = "default"; pinctrl-0 = <&gpio2_default_mode>, diff --git a/dts/src/arm/ste-href.dtsi b/dts/src/arm/ste-href.dtsi index 718752a024..fbaa0ce464 100644 --- a/dts/src/arm/ste-href.dtsi +++ b/dts/src/arm/ste-href.dtsi @@ -16,7 +16,24 @@ battery: battery { compatible = "simple-battery"; battery-type = "lithium-ion-polymer"; - thermistor-on-batctrl; + }; + + thermal-zones { + battery-thermal { + /* This zone will be polled by the battery temperature code */ + polling-delay = <0>; + polling-delay-passive = <0>; + thermal-sensors = <&bat_therm>; + }; + }; + + bat_therm: thermistor { + compatible = "murata,ncp18wb473"; + io-channels = <&gpadc 0x02>; /* BatTemp */ + pullup-uv = <1800000>; + pullup-ohm = <230000>; + pulldown-ohm = <0>; + #thermal-sensor-cells = <0>; }; soc { @@ -219,16 +236,16 @@ prcmu@80157000 { ab8500 { - ab8500-gpiocontroller { + gpio { }; - ab8500_usb { + phy { pinctrl-names = "default", "sleep"; pinctrl-0 = <&usb_a_1_default>; pinctrl-1 = <&usb_a_1_sleep>; }; - ab8500-regulators { + regulator { ab8500_ldo_aux1_reg: ab8500_ldo_aux1 { regulator-name = "V-DISPLAY"; }; diff --git a/dts/src/arm/ste-snowball.dts b/dts/src/arm/ste-snowball.dts index fb719c8a8e..1c9094f248 100644 --- a/dts/src/arm/ste-snowball.dts +++ b/dts/src/arm/ste-snowball.dts @@ -20,7 +20,24 @@ battery: battery { compatible = "simple-battery"; battery-type = "lithium-ion-polymer"; - thermistor-on-batctrl; + }; + + thermal-zones { + battery-thermal { + /* This zone will be polled by the battery temperature code */ + polling-delay = <0>; + polling-delay-passive = <0>; + thermal-sensors = <&bat_therm>; + }; + }; + + bat_therm: thermistor { + compatible = "murata,ncp18wb473"; + io-channels = <&gpadc 0x02>; /* BatTemp */ + pullup-uv = <1800000>; + pullup-ohm = <230000>; + pulldown-ohm = <0>; + #thermal-sensor-cells = <0>; }; en_3v3_reg: en_3v3 { @@ -384,7 +401,7 @@ prcmu@80157000 { ab8500 { - ab8500-gpiocontroller { + gpio { /* * AB8500 GPIOs are numbered starting from 1, so the first * index 0 is what in the datasheet is called "GPIO1", and @@ -406,13 +423,13 @@ "PM_GPIO42"; /* AB8500 GPIO42 */ }; - ab8500_usb { + phy { pinctrl-names = "default", "sleep"; pinctrl-0 = <&usb_a_1_default>; pinctrl-1 = <&usb_a_1_sleep>; }; - ext_regulators: ab8500-ext-regulators { + ext_regulators: regulator-external { ab8500_ext1_reg: ab8500_ext1 { regulator-name = "ab8500-ext-supply1"; }; @@ -426,7 +443,7 @@ }; }; - ab8500-regulators { + regulator { ab8500_ldo_aux1_reg: ab8500_ldo_aux1 { regulator-name = "V-DISPLAY"; }; diff --git a/dts/src/arm/ste-ux500-samsung-codina.dts b/dts/src/arm/ste-ux500-samsung-codina.dts index fbd6006554..1c1725d31c 100644 --- a/dts/src/arm/ste-ux500-samsung-codina.dts +++ b/dts/src/arm/ste-ux500-samsung-codina.dts @@ -47,6 +47,24 @@ compatible = "samsung,eb425161lu"; }; + thermal-zones { + battery-thermal { + /* This zone will be polled by the battery temperature code */ + polling-delay = <0>; + polling-delay-passive = <0>; + thermal-sensors = <&bat_therm>; + }; + }; + + bat_therm: thermistor { + compatible = "samsung,1404-001221"; + io-channels = <&gpadc 0x02>; /* BatTemp */ + pullup-uv = <1800000>; + pullup-ohm = <230000>; + pulldown-ohm = <0>; + #thermal-sensor-cells = <0>; + }; + /* TI TXS0206 level translator for 2.9 V */ sd_level_translator: regulator-gpio { compatible = "regulator-fixed"; @@ -459,13 +477,13 @@ prcmu@80157000 { ab8500 { - ab8500_usb { + phy { pinctrl-names = "default", "sleep"; pinctrl-0 = <&usb_a_1_default>; pinctrl-1 = <&usb_a_1_sleep>; }; - ab8500-regulators { + regulator { ab8500_ldo_aux1 { /* Used for VDD for sensors */ regulator-name = "V-SENSORS-VDD"; diff --git a/dts/src/arm/ste-ux500-samsung-gavini.dts b/dts/src/arm/ste-ux500-samsung-gavini.dts index 1c0e5cfedd..fd17097476 100644 --- a/dts/src/arm/ste-ux500-samsung-gavini.dts +++ b/dts/src/arm/ste-ux500-samsung-gavini.dts @@ -24,6 +24,24 @@ compatible = "samsung,eb585157lu"; }; + thermal-zones { + battery-thermal { + /* This zone will be polled by the battery temperature code */ + polling-delay = <0>; + polling-delay-passive = <0>; + thermal-sensors = <&bat_therm>; + }; + }; + + bat_therm: thermistor { + compatible = "samsung,1404-001221"; + io-channels = <&gpadc 0x02>; /* BatTemp */ + pullup-uv = <1800000>; + pullup-ohm = <230000>; + pulldown-ohm = <0>; + #thermal-sensor-cells = <0>; + }; + /* TI TXS0206 level translator for 2.9 V */ sd_level_translator: regulator-gpio { compatible = "regulator-fixed"; @@ -432,13 +450,13 @@ prcmu@80157000 { ab8500 { - ab8500_usb { + phy { pinctrl-names = "default", "sleep"; pinctrl-0 = <&usb_a_1_default>; pinctrl-1 = <&usb_a_1_sleep>; }; - ab8500-regulators { + regulator { ab8500_ldo_aux1 { /* Used for VDD for sensors */ regulator-name = "V-SENSORS-VDD"; diff --git a/dts/src/arm/ste-ux500-samsung-golden.dts b/dts/src/arm/ste-ux500-samsung-golden.dts index fc4c5166d8..290ab59e86 100644 --- a/dts/src/arm/ste-ux500-samsung-golden.dts +++ b/dts/src/arm/ste-ux500-samsung-golden.dts @@ -29,6 +29,24 @@ compatible = "samsung,eb-l1m7flu"; }; + thermal-zones { + battery-thermal { + /* This zone will be polled by the battery temperature code */ + polling-delay = <0>; + polling-delay-passive = <0>; + thermal-sensors = <&bat_therm>; + }; + }; + + bat_therm: thermistor { + compatible = "samsung,1404-001221"; + io-channels = <&gpadc 0x02>; /* BatTemp */ + pullup-uv = <1800000>; + pullup-ohm = <230000>; + pulldown-ohm = <0>; + #thermal-sensor-cells = <0>; + }; + i2c-gpio-0 { compatible = "i2c-gpio"; sda-gpios = <&gpio2 14 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; @@ -280,13 +298,13 @@ prcmu@80157000 { ab8505 { - ab8500_usb { + phy { pinctrl-names = "default", "sleep"; pinctrl-0 = <&usb_a_1_default>; pinctrl-1 = <&usb_a_1_sleep>; }; - ab8505-regulators { + regulator { ab8500_ldo_aux1 { regulator-name = "sensor_3v"; regulator-min-microvolt = <3000000>; diff --git a/dts/src/arm/ste-ux500-samsung-janice.dts b/dts/src/arm/ste-ux500-samsung-janice.dts index 5ddcbc1a85..42762bfcd8 100644 --- a/dts/src/arm/ste-ux500-samsung-janice.dts +++ b/dts/src/arm/ste-ux500-samsung-janice.dts @@ -24,6 +24,24 @@ compatible = "samsung,eb535151vu"; }; + thermal-zones { + battery-thermal { + /* This zone will be polled by the battery temperature code */ + polling-delay = <0>; + polling-delay-passive = <0>; + thermal-sensors = <&bat_therm>; + }; + }; + + bat_therm: thermistor { + compatible = "samsung,1404-001221"; + io-channels = <&gpadc 0x02>; /* BatTemp */ + pullup-uv = <1800000>; + pullup-ohm = <230000>; + pulldown-ohm = <0>; + #thermal-sensor-cells = <0>; + }; + /* External LDO for eMMC LDO VMEM_3V3 controlled by GPIO6 */ ldo_3v3_reg: regulator-gpio-ldo-3v3 { compatible = "regulator-fixed"; @@ -480,13 +498,13 @@ prcmu@80157000 { ab8500 { - ab8500_usb { + phy { pinctrl-names = "default", "sleep"; pinctrl-0 = <&usb_a_1_default>; pinctrl-1 = <&usb_a_1_sleep>; }; - ab8500-regulators { + regulator { ab8500_ldo_aux1 { /* Used for VDD for sensors */ regulator-name = "V-SENSORS-VDD"; @@ -594,7 +612,7 @@ reg = <0x08>; mount-matrix = "0", "1", "0", "-1", "0", "0", - "0", "0", "-1"; + "0", "0", "1"; vddio-supply = <&ab8500_ldo_aux2_reg>; // 1.8V vdd-supply = <&ab8500_ldo_aux1_reg>; // 3V }; diff --git a/dts/src/arm/ste-ux500-samsung-kyle.dts b/dts/src/arm/ste-ux500-samsung-kyle.dts index 9ec3f85b1a..2a5bf54137 100644 --- a/dts/src/arm/ste-ux500-samsung-kyle.dts +++ b/dts/src/arm/ste-ux500-samsung-kyle.dts @@ -28,6 +28,24 @@ compatible = "samsung,eb425161la"; }; + thermal-zones { + battery-thermal { + /* This zone will be polled by the battery temperature code */ + polling-delay = <0>; + polling-delay-passive = <0>; + thermal-sensors = <&bat_therm>; + }; + }; + + bat_therm: thermistor { + compatible = "samsung,1404-001221"; + io-channels = <&gpadc 0x02>; /* BatTemp */ + pullup-uv = <1800000>; + pullup-ohm = <230000>; + pulldown-ohm = <0>; + #thermal-sensor-cells = <0>; + }; + /* TI TXS0206 level translator for 2.9 V */ sd_level_translator: regulator-gpio { compatible = "regulator-fixed"; @@ -301,13 +319,13 @@ prcmu@80157000 { ab8505 { - ab8500_usb { + phy { pinctrl-names = "default", "sleep"; pinctrl-0 = <&usb_a_1_default>; pinctrl-1 = <&usb_a_1_sleep>; }; - ab8505-regulators { + regulator { ab8500_ldo_aux1 { /* Used for VDD for sensors */ regulator-name = "AUX1"; diff --git a/dts/src/arm/ste-ux500-samsung-skomer.dts b/dts/src/arm/ste-ux500-samsung-skomer.dts index f8c5899fbd..dcb03ce7cb 100644 --- a/dts/src/arm/ste-ux500-samsung-skomer.dts +++ b/dts/src/arm/ste-ux500-samsung-skomer.dts @@ -24,6 +24,24 @@ compatible = "samsung,eb485159lu"; }; + thermal-zones { + battery-thermal { + /* This zone will be polled by the battery temperature code */ + polling-delay = <0>; + polling-delay-passive = <0>; + thermal-sensors = <&bat_therm>; + }; + }; + + bat_therm: thermistor { + compatible = "samsung,1404-001221"; + io-channels = <&gpadc 0x02>; /* BatTemp */ + pullup-uv = <1800000>; + pullup-ohm = <230000>; + pulldown-ohm = <0>; + #thermal-sensor-cells = <0>; + }; + /* TI TXS0206 level translator for 2.9 V */ sd_level_translator: regulator-gpio { compatible = "regulator-fixed"; @@ -281,13 +299,13 @@ prcmu@80157000 { ab8505 { - ab8500_usb { + phy { pinctrl-names = "default", "sleep"; pinctrl-0 = <&usb_a_1_default>; pinctrl-1 = <&usb_a_1_sleep>; }; - ab8505-regulators { + regulator { ab8500_ldo_aux1 { /* Used for VDD for sensors */ regulator-name = "AUX1"; diff --git a/dts/src/arm/stih407-clock.dtsi b/dts/src/arm/stih407-clock.dtsi index 9cce9541e2..350bcfcf49 100644 --- a/dts/src/arm/stih407-clock.dtsi +++ b/dts/src/arm/stih407-clock.dtsi @@ -29,7 +29,7 @@ */ clockgen-a9@92b0000 { compatible = "st,clkgen-c32"; - reg = <0x92b0000 0xffff>; + reg = <0x92b0000 0x10000>; clockgen_a9_pll: clockgen-a9-pll { #clock-cells = <1>; @@ -37,32 +37,27 @@ clocks = <&clk_sysin>; }; - }; - /* - * ARM CPU related clocks. - */ - clk_m_a9: clk-m-a9@92b0000 { - #clock-cells = <0>; - compatible = "st,stih407-clkgen-a9-mux"; - reg = <0x92b0000 0x10000>; - - clocks = <&clockgen_a9_pll 0>, - <&clockgen_a9_pll 0>, - <&clk_s_c0_flexgen 13>, - <&clk_m_a9_ext2f_div2>; + clk_m_a9: clk-m-a9 { + #clock-cells = <0>; + compatible = "st,stih407-clkgen-a9-mux"; + clocks = <&clockgen_a9_pll 0>, + <&clockgen_a9_pll 0>, + <&clk_s_c0_flexgen 13>, + <&clk_m_a9_ext2f_div2>; - /* - * ARM Peripheral clock for timers - */ - arm_periph_clk: clk-m-a9-periphs { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; + /* + * ARM Peripheral clock for timers + */ + arm_periph_clk: clk-m-a9-periphs { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; - clocks = <&clk_m_a9>; - clock-div = <2>; - clock-mult = <1>; + clocks = <&clk_m_a9>; + clock-div = <2>; + clock-mult = <1>; + }; }; }; @@ -87,14 +82,6 @@ }; }; - clk_s_c0_quadfs: clk-s-c0-quadfs@9103000 { - #clock-cells = <1>; - compatible = "st,quadfs-pll"; - reg = <0x9103000 0x1000>; - - clocks = <&clk_sysin>; - }; - clk_s_c0: clockgen-c@9103000 { compatible = "st,clkgen-c32"; reg = <0x9103000 0x1000>; @@ -113,6 +100,13 @@ clocks = <&clk_sysin>; }; + clk_s_c0_quadfs: clk-s-c0-quadfs { + #clock-cells = <1>; + compatible = "st,quadfs-pll"; + + clocks = <&clk_sysin>; + }; + clk_s_c0_flexgen: clk-s-c0-flexgen { #clock-cells = <1>; compatible = "st,flexgen", "st,flexgen-stih407-c0"; @@ -142,18 +136,17 @@ }; }; - clk_s_d0_quadfs: clk-s-d0-quadfs@9104000 { - #clock-cells = <1>; - compatible = "st,quadfs-d0"; - reg = <0x9104000 0x1000>; - - clocks = <&clk_sysin>; - }; - clockgen-d0@9104000 { compatible = "st,clkgen-c32"; reg = <0x9104000 0x1000>; + clk_s_d0_quadfs: clk-s-d0-quadfs { + #clock-cells = <1>; + compatible = "st,quadfs-d0"; + + clocks = <&clk_sysin>; + }; + clk_s_d0_flexgen: clk-s-d0-flexgen { #clock-cells = <1>; compatible = "st,flexgen", "st,flexgen-stih407-d0"; @@ -166,18 +159,17 @@ }; }; - clk_s_d2_quadfs: clk-s-d2-quadfs@9106000 { - #clock-cells = <1>; - compatible = "st,quadfs-d2"; - reg = <0x9106000 0x1000>; - - clocks = <&clk_sysin>; - }; - clockgen-d2@9106000 { compatible = "st,clkgen-c32"; reg = <0x9106000 0x1000>; + clk_s_d2_quadfs: clk-s-d2-quadfs { + #clock-cells = <1>; + compatible = "st,quadfs-d2"; + + clocks = <&clk_sysin>; + }; + clk_s_d2_flexgen: clk-s-d2-flexgen { #clock-cells = <1>; compatible = "st,flexgen", "st,flexgen-stih407-d2"; @@ -192,18 +184,17 @@ }; }; - clk_s_d3_quadfs: clk-s-d3-quadfs@9107000 { - #clock-cells = <1>; - compatible = "st,quadfs-d3"; - reg = <0x9107000 0x1000>; - - clocks = <&clk_sysin>; - }; - clockgen-d3@9107000 { compatible = "st,clkgen-c32"; reg = <0x9107000 0x1000>; + clk_s_d3_quadfs: clk-s-d3-quadfs { + #clock-cells = <1>; + compatible = "st,quadfs-d3"; + + clocks = <&clk_sysin>; + }; + clk_s_d3_flexgen: clk-s-d3-flexgen { #clock-cells = <1>; compatible = "st,flexgen", "st,flexgen-stih407-d3"; diff --git a/dts/src/arm/stih407-family.dtsi b/dts/src/arm/stih407-family.dtsi index 21f3347a91..1713f78781 100644 --- a/dts/src/arm/stih407-family.dtsi +++ b/dts/src/arm/stih407-family.dtsi @@ -115,37 +115,140 @@ status = "okay"; }; - soc { - #address-cells = <1>; - #size-cells = <1>; - interrupt-parent = <&intc>; + restart: restart-controller { + compatible = "st,stih407-restart"; + st,syscfg = <&syscfg_sbc_reg>; + status = "okay"; + }; + + powerdown: powerdown-controller { + compatible = "st,stih407-powerdown"; + #reset-cells = <1>; + }; + + softreset: softreset-controller { + compatible = "st,stih407-softreset"; + #reset-cells = <1>; + }; + + picophyreset: picophyreset-controller { + compatible = "st,stih407-picophyreset"; + #reset-cells = <1>; + }; + + irq-syscfg { + compatible = "st,stih407-irq-syscfg"; + st,syscfg = <&syscfg_core>; + st,irq-device = <ST_IRQ_SYSCFG_PMU_0>, + <ST_IRQ_SYSCFG_PMU_1>; + st,fiq-device = <ST_IRQ_SYSCFG_DISABLED>, + <ST_IRQ_SYSCFG_DISABLED>; + }; + + usb2_picophy0: phy1 { + compatible = "st,stih407-usb2-phy"; + #phy-cells = <0>; + st,syscfg = <&syscfg_core 0x100 0xf4>; + resets = <&softreset STIH407_PICOPHY_SOFTRESET>, + <&picophyreset STIH407_PICOPHY2_RESET>; + reset-names = "global", "port"; + }; + + miphy28lp_phy: miphy28lp { + compatible = "st,miphy28lp-phy"; + st,syscfg = <&syscfg_core>; + #address-cells = <1>; + #size-cells = <1>; ranges; - compatible = "simple-bus"; - restart: restart-controller@0 { - compatible = "st,stih407-restart"; - reg = <0 0>; - st,syscfg = <&syscfg_sbc_reg>; - status = "okay"; - }; + phy_port0: port@9b22000 { + reg = <0x9b22000 0xff>, + <0x9b09000 0xff>, + <0x9b04000 0xff>; + reg-names = "sata-up", + "pcie-up", + "pipew"; + + st,syscfg = <0x114 0x818 0xe0 0xec>; + #phy-cells = <1>; - powerdown: powerdown-controller@0 { - compatible = "st,stih407-powerdown"; - reg = <0 0>; - #reset-cells = <1>; + reset-names = "miphy-sw-rst"; + resets = <&softreset STIH407_MIPHY0_SOFTRESET>; }; - softreset: softreset-controller@0 { - compatible = "st,stih407-softreset"; - reg = <0 0>; - #reset-cells = <1>; + phy_port1: port@9b2a000 { + reg = <0x9b2a000 0xff>, + <0x9b19000 0xff>, + <0x9b14000 0xff>; + reg-names = "sata-up", + "pcie-up", + "pipew"; + + st,syscfg = <0x118 0x81c 0xe4 0xf0>; + + #phy-cells = <1>; + + reset-names = "miphy-sw-rst"; + resets = <&softreset STIH407_MIPHY1_SOFTRESET>; }; - picophyreset: picophyreset-controller@0 { - compatible = "st,stih407-picophyreset"; - reg = <0 0>; - #reset-cells = <1>; + phy_port2: port@8f95000 { + reg = <0x8f95000 0xff>, + <0x8f90000 0xff>; + reg-names = "pipew", + "usb3-up"; + + st,syscfg = <0x11c 0x820>; + + #phy-cells = <1>; + + reset-names = "miphy-sw-rst"; + resets = <&softreset STIH407_MIPHY2_SOFTRESET>; }; + }; + + st231_gp0: st231-gp0 { + compatible = "st,st231-rproc"; + memory-region = <&gp0_reserved>; + resets = <&softreset STIH407_ST231_GP0_SOFTRESET>; + reset-names = "sw_reset"; + clocks = <&clk_s_c0_flexgen CLK_ST231_GP_0>; + clock-frequency = <600000000>; + st,syscfg = <&syscfg_core 0x22c>; + #mbox-cells = <1>; + mbox-names = "vq0_rx", "vq0_tx", "vq1_rx", "vq1_tx"; + mboxes = <&mailbox0 0 2>, <&mailbox2 0 1>, <&mailbox0 0 3>, <&mailbox2 0 0>; + }; + + st231_delta: st231-delta { + compatible = "st,st231-rproc"; + memory-region = <&delta_reserved>; + resets = <&softreset STIH407_ST231_DMU_SOFTRESET>; + reset-names = "sw_reset"; + clocks = <&clk_s_c0_flexgen CLK_ST231_DMU>; + clock-frequency = <600000000>; + st,syscfg = <&syscfg_core 0x224>; + #mbox-cells = <1>; + mbox-names = "vq0_rx", "vq0_tx", "vq1_rx", "vq1_tx"; + mboxes = <&mailbox0 0 0>, <&mailbox3 0 1>, <&mailbox0 0 1>, <&mailbox3 0 0>; + }; + + delta0 { + compatible = "st,st-delta"; + clock-names = "delta", + "delta-st231", + "delta-flash-promip"; + clocks = <&clk_s_c0_flexgen CLK_VID_DMU>, + <&clk_s_c0_flexgen CLK_ST231_DMU>, + <&clk_s_c0_flexgen CLK_FLASH_PROMIP>; + }; + + soc { + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + ranges; + compatible = "simple-bus"; syscfg_sbc: sbc-syscfg@9620000 { compatible = "st,stih407-sbc-syscfg", "syscon"; @@ -189,16 +292,6 @@ reg = <0x94b5100 0x1000>; }; - irq-syscfg@0 { - compatible = "st,stih407-irq-syscfg"; - reg = <0 0>; - st,syscfg = <&syscfg_core>; - st,irq-device = <ST_IRQ_SYSCFG_PMU_0>, - <ST_IRQ_SYSCFG_PMU_1>; - st,fiq-device = <ST_IRQ_SYSCFG_DISABLED>, - <ST_IRQ_SYSCFG_DISABLED>; - }; - /* Display */ vtg_main: sti-vtg-main@8d02800 { compatible = "st,vtg"; @@ -389,70 +482,6 @@ status = "disabled"; }; - usb2_picophy0: phy1@0 { - compatible = "st,stih407-usb2-phy"; - reg = <0 0>; - #phy-cells = <0>; - st,syscfg = <&syscfg_core 0x100 0xf4>; - resets = <&softreset STIH407_PICOPHY_SOFTRESET>, - <&picophyreset STIH407_PICOPHY2_RESET>; - reset-names = "global", "port"; - }; - - miphy28lp_phy: miphy28lp@0 { - compatible = "st,miphy28lp-phy"; - st,syscfg = <&syscfg_core>; - #address-cells = <1>; - #size-cells = <1>; - ranges; - reg = <0 0>; - - phy_port0: port@9b22000 { - reg = <0x9b22000 0xff>, - <0x9b09000 0xff>, - <0x9b04000 0xff>; - reg-names = "sata-up", - "pcie-up", - "pipew"; - - st,syscfg = <0x114 0x818 0xe0 0xec>; - #phy-cells = <1>; - - reset-names = "miphy-sw-rst"; - resets = <&softreset STIH407_MIPHY0_SOFTRESET>; - }; - - phy_port1: port@9b2a000 { - reg = <0x9b2a000 0xff>, - <0x9b19000 0xff>, - <0x9b14000 0xff>; - reg-names = "sata-up", - "pcie-up", - "pipew"; - - st,syscfg = <0x118 0x81c 0xe4 0xf0>; - - #phy-cells = <1>; - - reset-names = "miphy-sw-rst"; - resets = <&softreset STIH407_MIPHY1_SOFTRESET>; - }; - - phy_port2: port@8f95000 { - reg = <0x8f95000 0xff>, - <0x8f90000 0xff>; - reg-names = "pipew", - "usb3-up"; - - st,syscfg = <0x11c 0x820>; - - #phy-cells = <1>; - - reset-names = "miphy-sw-rst"; - resets = <&softreset STIH407_MIPHY2_SOFTRESET>; - }; - }; - spi@9840000 { compatible = "st,comms-ssc4-spi"; reg = <0x9840000 0x110>; @@ -815,34 +844,6 @@ status = "okay"; }; - st231_gp0: st231-gp0@0 { - compatible = "st,st231-rproc"; - reg = <0 0>; - memory-region = <&gp0_reserved>; - resets = <&softreset STIH407_ST231_GP0_SOFTRESET>; - reset-names = "sw_reset"; - clocks = <&clk_s_c0_flexgen CLK_ST231_GP_0>; - clock-frequency = <600000000>; - st,syscfg = <&syscfg_core 0x22c>; - #mbox-cells = <1>; - mbox-names = "vq0_rx", "vq0_tx", "vq1_rx", "vq1_tx"; - mboxes = <&mailbox0 0 2>, <&mailbox2 0 1>, <&mailbox0 0 3>, <&mailbox2 0 0>; - }; - - st231_delta: st231-delta@0 { - compatible = "st,st231-rproc"; - reg = <0 0>; - memory-region = <&delta_reserved>; - resets = <&softreset STIH407_ST231_DMU_SOFTRESET>; - reset-names = "sw_reset"; - clocks = <&clk_s_c0_flexgen CLK_ST231_DMU>; - clock-frequency = <600000000>; - st,syscfg = <&syscfg_core 0x224>; - #mbox-cells = <1>; - mbox-names = "vq0_rx", "vq0_tx", "vq1_rx", "vq1_tx"; - mboxes = <&mailbox0 0 0>, <&mailbox3 0 1>, <&mailbox0 0 1>, <&mailbox3 0 0>; - }; - /* fdma audio */ fdma0: dma-controller@8e20000 { compatible = "st,stih407-fdma-mpe31-11", "st,slim-rproc"; @@ -986,16 +987,5 @@ status = "disabled"; }; - - delta0@0 { - compatible = "st,st-delta"; - reg = <0 0>; - clock-names = "delta", - "delta-st231", - "delta-flash-promip"; - clocks = <&clk_s_c0_flexgen CLK_VID_DMU>, - <&clk_s_c0_flexgen CLK_ST231_DMU>, - <&clk_s_c0_flexgen CLK_FLASH_PROMIP>; - }; }; }; diff --git a/dts/src/arm/stih410-b2120.dts b/dts/src/arm/stih410-b2120.dts index 9d3b118f5f..538ff98ca1 100644 --- a/dts/src/arm/stih410-b2120.dts +++ b/dts/src/arm/stih410-b2120.dts @@ -24,6 +24,14 @@ ethernet0 = ðernet0; }; + usb2_picophy1: phy2 { + status = "okay"; + }; + + usb2_picophy2: phy3 { + status = "okay"; + }; + soc { mmc0: sdhci@9060000 { @@ -33,14 +41,6 @@ sd-uhs-ddr50; }; - usb2_picophy1: phy2@0 { - status = "okay"; - }; - - usb2_picophy2: phy3@0 { - status = "okay"; - }; - ohci0: usb@9a03c00 { status = "okay"; }; diff --git a/dts/src/arm/stih410-b2260.dts b/dts/src/arm/stih410-b2260.dts index 9d579c16c2..26d93f26f6 100644 --- a/dts/src/arm/stih410-b2260.dts +++ b/dts/src/arm/stih410-b2260.dts @@ -75,6 +75,21 @@ }; }; + miphy28lp_phy: miphy28lp { + + phy_port1: port@9b2a000 { + st,osc-force-ext; + }; + }; + + usb2_picophy1: phy2 { + status = "okay"; + }; + + usb2_picophy2: phy3 { + status = "okay"; + }; + soc { /* Low speed expansion connector */ uart0: serial@9830000 { @@ -145,14 +160,6 @@ status = "okay"; }; - usb2_picophy1: phy2@0 { - status = "okay"; - }; - - usb2_picophy2: phy3@0 { - status = "okay"; - }; - ohci0: usb@9a03c00 { status = "okay"; }; @@ -196,13 +203,6 @@ status = "okay"; }; - miphy28lp_phy: miphy28lp@0 { - - phy_port1: port@9b2a000 { - st,osc-force-ext; - }; - }; - sata1: sata@9b28000 { status = "okay"; }; diff --git a/dts/src/arm/stih410-clock.dtsi b/dts/src/arm/stih410-clock.dtsi index 6b0e6d4477..abac98a181 100644 --- a/dts/src/arm/stih410-clock.dtsi +++ b/dts/src/arm/stih410-clock.dtsi @@ -32,7 +32,7 @@ */ clockgen-a9@92b0000 { compatible = "st,clkgen-c32"; - reg = <0x92b0000 0xffff>; + reg = <0x92b0000 0x10000>; clockgen_a9_pll: clockgen-a9-pll { #clock-cells = <1>; @@ -40,29 +40,29 @@ clocks = <&clk_sysin>; }; - }; - /* - * ARM CPU related clocks. - */ - clk_m_a9: clk-m-a9@92b0000 { - #clock-cells = <0>; - compatible = "st,stih407-clkgen-a9-mux", "st,clkgen-mux"; - reg = <0x92b0000 0x10000>; - - clocks = <&clockgen_a9_pll 0>, - <&clockgen_a9_pll 0>, - <&clk_s_c0_flexgen 13>, - <&clk_m_a9_ext2f_div2>; /* - * ARM Peripheral clock for timers + * ARM CPU related clocks. */ - arm_periph_clk: clk-m-a9-periphs { + clk_m_a9: clk-m-a9 { #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clocks = <&clk_m_a9>; - clock-div = <2>; - clock-mult = <1>; + compatible = "st,stih407-clkgen-a9-mux", "st,clkgen-mux"; + + clocks = <&clockgen_a9_pll 0>, + <&clockgen_a9_pll 0>, + <&clk_s_c0_flexgen 13>, + <&clk_m_a9_ext2f_div2>; + + /* + * ARM Peripheral clock for timers + */ + arm_periph_clk: clk-m-a9-periphs { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + clocks = <&clk_m_a9>; + clock-div = <2>; + clock-mult = <1>; + }; }; }; @@ -87,14 +87,6 @@ }; }; - clk_s_c0_quadfs: clk-s-c0-quadfs@9103000 { - #clock-cells = <1>; - compatible = "st,quadfs-pll"; - reg = <0x9103000 0x1000>; - - clocks = <&clk_sysin>; - }; - clk_s_c0: clockgen-c@9103000 { compatible = "st,clkgen-c32"; reg = <0x9103000 0x1000>; @@ -113,6 +105,13 @@ clocks = <&clk_sysin>; }; + clk_s_c0_quadfs: clk-s-c0-quadfs { + #clock-cells = <1>; + compatible = "st,quadfs-pll"; + + clocks = <&clk_sysin>; + }; + clk_s_c0_flexgen: clk-s-c0-flexgen { #clock-cells = <1>; compatible = "st,flexgen", "st,flexgen-stih410-c0"; @@ -142,18 +141,17 @@ }; }; - clk_s_d0_quadfs: clk-s-d0-quadfs@9104000 { - #clock-cells = <1>; - compatible = "st,quadfs-d0"; - reg = <0x9104000 0x1000>; - - clocks = <&clk_sysin>; - }; - clockgen-d0@9104000 { compatible = "st,clkgen-c32"; reg = <0x9104000 0x1000>; + clk_s_d0_quadfs: clk-s-d0-quadfs { + #clock-cells = <1>; + compatible = "st,quadfs-d0"; + + clocks = <&clk_sysin>; + }; + clk_s_d0_flexgen: clk-s-d0-flexgen { #clock-cells = <1>; compatible = "st,flexgen", "st,flexgen-stih410-d0"; @@ -166,18 +164,17 @@ }; }; - clk_s_d2_quadfs: clk-s-d2-quadfs@9106000 { - #clock-cells = <1>; - compatible = "st,quadfs-d2"; - reg = <0x9106000 0x1000>; - - clocks = <&clk_sysin>; - }; - clockgen-d2@9106000 { compatible = "st,clkgen-c32"; reg = <0x9106000 0x1000>; + clk_s_d2_quadfs: clk-s-d2-quadfs { + #clock-cells = <1>; + compatible = "st,quadfs-d2"; + + clocks = <&clk_sysin>; + }; + clk_s_d2_flexgen: clk-s-d2-flexgen { #clock-cells = <1>; compatible = "st,flexgen", "st,flexgen-stih407-d2"; @@ -192,18 +189,17 @@ }; }; - clk_s_d3_quadfs: clk-s-d3-quadfs@9107000 { - #clock-cells = <1>; - compatible = "st,quadfs-d3"; - reg = <0x9107000 0x1000>; - - clocks = <&clk_sysin>; - }; - clockgen-d3@9107000 { compatible = "st,clkgen-c32"; reg = <0x9107000 0x1000>; + clk_s_d3_quadfs: clk-s-d3-quadfs { + #clock-cells = <1>; + compatible = "st,quadfs-d3"; + + clocks = <&clk_sysin>; + }; + clk_s_d3_flexgen: clk-s-d3-flexgen { #clock-cells = <1>; compatible = "st,flexgen", "st,flexgen-stih407-d3"; diff --git a/dts/src/arm/stih410.dtsi b/dts/src/arm/stih410.dtsi index 6d847019c5..ce2f62cf12 100644 --- a/dts/src/arm/stih410.dtsi +++ b/dts/src/arm/stih410.dtsi @@ -12,31 +12,29 @@ bdisp0 = &bdisp0; }; - soc { - usb2_picophy1: phy2@0 { - compatible = "st,stih407-usb2-phy"; - reg = <0 0>; - #phy-cells = <0>; - st,syscfg = <&syscfg_core 0xf8 0xf4>; - resets = <&softreset STIH407_PICOPHY_SOFTRESET>, - <&picophyreset STIH407_PICOPHY0_RESET>; - reset-names = "global", "port"; - - status = "disabled"; - }; + usb2_picophy1: phy2 { + compatible = "st,stih407-usb2-phy"; + #phy-cells = <0>; + st,syscfg = <&syscfg_core 0xf8 0xf4>; + resets = <&softreset STIH407_PICOPHY_SOFTRESET>, + <&picophyreset STIH407_PICOPHY0_RESET>; + reset-names = "global", "port"; + + status = "disabled"; + }; - usb2_picophy2: phy3@0 { - compatible = "st,stih407-usb2-phy"; - reg = <0 0>; - #phy-cells = <0>; - st,syscfg = <&syscfg_core 0xfc 0xf4>; - resets = <&softreset STIH407_PICOPHY_SOFTRESET>, - <&picophyreset STIH407_PICOPHY1_RESET>; - reset-names = "global", "port"; + usb2_picophy2: phy3 { + compatible = "st,stih407-usb2-phy"; + #phy-cells = <0>; + st,syscfg = <&syscfg_core 0xfc 0xf4>; + resets = <&softreset STIH407_PICOPHY_SOFTRESET>, + <&picophyreset STIH407_PICOPHY1_RESET>; + reset-names = "global", "port"; - status = "disabled"; - }; + status = "disabled"; + }; + soc { ohci0: usb@9a03c00 { compatible = "st,st-ohci-300x"; reg = <0x9a03c00 0x100>; @@ -274,16 +272,6 @@ interrupts = <GIC_SPI 205 IRQ_TYPE_EDGE_RISING>; }; - delta0@0 { - compatible = "st,st-delta"; - clock-names = "delta", - "delta-st231", - "delta-flash-promip"; - clocks = <&clk_s_c0_flexgen CLK_VID_DMU>, - <&clk_s_c0_flexgen CLK_ST231_DMU>, - <&clk_s_c0_flexgen CLK_FLASH_PROMIP>; - }; - sti-cec@94a087c { compatible = "st,stih-cec"; reg = <0x94a087c 0x64>; diff --git a/dts/src/arm/stih418-b2199.dts b/dts/src/arm/stih418-b2199.dts index b66e2b29ed..d21bcc7c12 100644 --- a/dts/src/arm/stih418-b2199.dts +++ b/dts/src/arm/stih418-b2199.dts @@ -37,6 +37,17 @@ }; }; + miphy28lp_phy: miphy28lp { + + phy_port0: port@9b22000 { + st,osc-rdy; + }; + + phy_port1: port@9b2a000 { + st,osc-force-ext; + }; + }; + soc { sbc_serial0: serial@9530000 { status = "okay"; @@ -84,17 +95,6 @@ non-removable; }; - miphy28lp_phy: miphy28lp@0 { - - phy_port0: port@9b22000 { - st,osc-rdy; - }; - - phy_port1: port@9b2a000 { - st,osc-force-ext; - }; - }; - st_dwc3: dwc3@8f94000 { status = "okay"; }; diff --git a/dts/src/arm/stih418-clock.dtsi b/dts/src/arm/stih418-clock.dtsi index e84c476b83..e1749e92a2 100644 --- a/dts/src/arm/stih418-clock.dtsi +++ b/dts/src/arm/stih418-clock.dtsi @@ -32,7 +32,7 @@ */ clockgen-a9@92b0000 { compatible = "st,clkgen-c32"; - reg = <0x92b0000 0xffff>; + reg = <0x92b0000 0x10000>; clockgen_a9_pll: clockgen-a9-pll { #clock-cells = <1>; @@ -40,30 +40,29 @@ clocks = <&clk_sysin>; }; - }; - - /* - * ARM CPU related clocks. - */ - clk_m_a9: clk-m-a9@92b0000 { - #clock-cells = <0>; - compatible = "st,stih407-clkgen-a9-mux", "st,clkgen-mux"; - reg = <0x92b0000 0x10000>; - - clocks = <&clockgen_a9_pll 0>, - <&clockgen_a9_pll 0>, - <&clk_s_c0_flexgen 13>, - <&clk_m_a9_ext2f_div2>; /* - * ARM Peripheral clock for timers + * ARM CPU related clocks. */ - arm_periph_clk: clk-m-a9-periphs { + clk_m_a9: clk-m-a9 { #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clocks = <&clk_m_a9>; - clock-div = <2>; - clock-mult = <1>; + compatible = "st,stih407-clkgen-a9-mux", "st,clkgen-mux"; + + clocks = <&clockgen_a9_pll 0>, + <&clockgen_a9_pll 0>, + <&clk_s_c0_flexgen 13>, + <&clk_m_a9_ext2f_div2>; + + /* + * ARM Peripheral clock for timers + */ + arm_periph_clk: clk-m-a9-periphs { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + clocks = <&clk_m_a9>; + clock-div = <2>; + clock-mult = <1>; + }; }; }; @@ -88,14 +87,6 @@ }; }; - clk_s_c0_quadfs: clk-s-c0-quadfs@9103000 { - #clock-cells = <1>; - compatible = "st,quadfs-pll"; - reg = <0x9103000 0x1000>; - - clocks = <&clk_sysin>; - }; - clk_s_c0: clockgen-c@9103000 { compatible = "st,clkgen-c32"; reg = <0x9103000 0x1000>; @@ -114,6 +105,13 @@ clocks = <&clk_sysin>; }; + clk_s_c0_quadfs: clk-s-c0-quadfs { + #clock-cells = <1>; + compatible = "st,quadfs-pll"; + + clocks = <&clk_sysin>; + }; + clk_s_c0_flexgen: clk-s-c0-flexgen { #clock-cells = <1>; compatible = "st,flexgen", "st,flexgen-stih418-c0"; @@ -143,18 +141,17 @@ }; }; - clk_s_d0_quadfs: clk-s-d0-quadfs@9104000 { - #clock-cells = <1>; - compatible = "st,quadfs-d0"; - reg = <0x9104000 0x1000>; - - clocks = <&clk_sysin>; - }; - clockgen-d0@9104000 { compatible = "st,clkgen-c32"; reg = <0x9104000 0x1000>; + clk_s_d0_quadfs: clk-s-d0-quadfs { + #clock-cells = <1>; + compatible = "st,quadfs-d0"; + + clocks = <&clk_sysin>; + }; + clk_s_d0_flexgen: clk-s-d0-flexgen { #clock-cells = <1>; compatible = "st,flexgen", "st,flexgen-stih410-d0"; @@ -167,18 +164,17 @@ }; }; - clk_s_d2_quadfs: clk-s-d2-quadfs@9106000 { - #clock-cells = <1>; - compatible = "st,quadfs-d2"; - reg = <0x9106000 0x1000>; - - clocks = <&clk_sysin>; - }; - clockgen-d2@9106000 { compatible = "st,clkgen-c32"; reg = <0x9106000 0x1000>; + clk_s_d2_quadfs: clk-s-d2-quadfs { + #clock-cells = <1>; + compatible = "st,quadfs-d2"; + + clocks = <&clk_sysin>; + }; + clk_s_d2_flexgen: clk-s-d2-flexgen { #clock-cells = <1>; compatible = "st,flexgen", "st,flexgen-stih418-d2"; @@ -193,18 +189,17 @@ }; }; - clk_s_d3_quadfs: clk-s-d3-quadfs@9107000 { - #clock-cells = <1>; - compatible = "st,quadfs-d3"; - reg = <0x9107000 0x1000>; - - clocks = <&clk_sysin>; - }; - clockgen-d3@9107000 { compatible = "st,clkgen-c32"; reg = <0x9107000 0x1000>; + clk_s_d3_quadfs: clk-s-d3-quadfs { + #clock-cells = <1>; + compatible = "st,quadfs-d3"; + + clocks = <&clk_sysin>; + }; + clk_s_d3_flexgen: clk-s-d3-flexgen { #clock-cells = <1>; compatible = "st,flexgen", "st,flexgen-stih407-d3"; diff --git a/dts/src/arm/stih418.dtsi b/dts/src/arm/stih418.dtsi index 97eda4392f..b35b9b7a7c 100644 --- a/dts/src/arm/stih418.dtsi +++ b/dts/src/arm/stih418.dtsi @@ -26,31 +26,29 @@ }; }; + usb2_picophy1: phy2 { + compatible = "st,stih407-usb2-phy"; + #phy-cells = <0>; + st,syscfg = <&syscfg_core 0xf8 0xf4>; + resets = <&softreset STIH407_PICOPHY_SOFTRESET>, + <&picophyreset STIH407_PICOPHY0_RESET>; + reset-names = "global", "port"; + }; + + usb2_picophy2: phy3 { + compatible = "st,stih407-usb2-phy"; + #phy-cells = <0>; + st,syscfg = <&syscfg_core 0xfc 0xf4>; + resets = <&softreset STIH407_PICOPHY_SOFTRESET>, + <&picophyreset STIH407_PICOPHY1_RESET>; + reset-names = "global", "port"; + }; + soc { rng11: rng@8a8a000 { status = "disabled"; }; - usb2_picophy1: phy2@0 { - compatible = "st,stih407-usb2-phy"; - reg = <0 0>; - #phy-cells = <0>; - st,syscfg = <&syscfg_core 0xf8 0xf4>; - resets = <&softreset STIH407_PICOPHY_SOFTRESET>, - <&picophyreset STIH407_PICOPHY0_RESET>; - reset-names = "global", "port"; - }; - - usb2_picophy2: phy3@0 { - compatible = "st,stih407-usb2-phy"; - reg = <0 0>; - #phy-cells = <0>; - st,syscfg = <&syscfg_core 0xfc 0xf4>; - resets = <&softreset STIH407_PICOPHY_SOFTRESET>, - <&picophyreset STIH407_PICOPHY1_RESET>; - reset-names = "global", "port"; - }; - ohci0: usb@9a03c00 { compatible = "st,st-ohci-300x"; reg = <0x9a03c00 0x100>; diff --git a/dts/src/arm/stihxxx-b2120.dtsi b/dts/src/arm/stihxxx-b2120.dtsi index d051f080e5..4c72dedcd1 100644 --- a/dts/src/arm/stihxxx-b2120.dtsi +++ b/dts/src/arm/stihxxx-b2120.dtsi @@ -71,6 +71,17 @@ }; }; + miphy28lp_phy: miphy28lp { + + phy_port0: port@9b22000 { + st,osc-rdy; + }; + + phy_port1: port@9b2a000 { + st,osc-force-ext; + }; + }; + soc { sbc_serial0: serial@9530000 { status = "okay"; @@ -128,17 +139,6 @@ st,i2c-min-sda-pulse-width-us = <5>; }; - miphy28lp_phy: miphy28lp@0 { - - phy_port0: port@9b22000 { - st,osc-rdy; - }; - - phy_port1: port@9b2a000 { - st,osc-force-ext; - }; - }; - st_dwc3: dwc3@8f94000 { status = "okay"; }; diff --git a/dts/src/arm/stm32429i-eval.dts b/dts/src/arm/stm32429i-eval.dts index cb46326a8c..0d98aca017 100644 --- a/dts/src/arm/stm32429i-eval.dts +++ b/dts/src/arm/stm32429i-eval.dts @@ -308,6 +308,18 @@ }; }; +&timers5 { + /* Override timer5 to act as clockevent */ + compatible = "st,stm32-timer"; + interrupts = <50>; + status = "okay"; + /delete-property/#address-cells; + /delete-property/#size-cells; + /delete-property/clock-names; + /delete-node/pwm; + /delete-node/timer@4; +}; + &usart1 { pinctrl-0 = <&usart1_pins_a>; pinctrl-names = "default"; diff --git a/dts/src/arm/stm32746g-eval.dts b/dts/src/arm/stm32746g-eval.dts index 327613fd96..a293e65141 100644 --- a/dts/src/arm/stm32746g-eval.dts +++ b/dts/src/arm/stm32746g-eval.dts @@ -194,6 +194,18 @@ bus-width = <4>; }; +&timers5 { + /* Override timer5 to act as clockevent */ + compatible = "st,stm32-timer"; + interrupts = <50>; + status = "okay"; + /delete-property/#address-cells; + /delete-property/#size-cells; + /delete-property/clock-names; + /delete-node/pwm; + /delete-node/timer@4; +}; + &usart1 { pinctrl-0 = <&usart1_pins_a>; pinctrl-names = "default"; diff --git a/dts/src/arm/stm32f429-disco.dts b/dts/src/arm/stm32f429-disco.dts index 6435e099c6..3b81228d46 100644 --- a/dts/src/arm/stm32f429-disco.dts +++ b/dts/src/arm/stm32f429-disco.dts @@ -205,6 +205,18 @@ }; }; +&timers5 { + /* Override timer5 to act as clockevent */ + compatible = "st,stm32-timer"; + interrupts = <50>; + status = "okay"; + /delete-property/#address-cells; + /delete-property/#size-cells; + /delete-property/clock-names; + /delete-node/pwm; + /delete-node/timer@4; +}; + &usart1 { pinctrl-0 = <&usart1_pins_a>; pinctrl-names = "default"; diff --git a/dts/src/arm/stm32f429.dtsi b/dts/src/arm/stm32f429.dtsi index 8748d58502..c31ceb8212 100644 --- a/dts/src/arm/stm32f429.dtsi +++ b/dts/src/arm/stm32f429.dtsi @@ -93,14 +93,6 @@ }; }; - timer2: timer@40000000 { - compatible = "st,stm32-timer"; - reg = <0x40000000 0x400>; - interrupts = <28>; - clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM2)>; - status = "disabled"; - }; - timers2: timers@40000000 { #address-cells = <1>; #size-cells = <0>; @@ -123,14 +115,6 @@ }; }; - timer3: timer@40000400 { - compatible = "st,stm32-timer"; - reg = <0x40000400 0x400>; - interrupts = <29>; - clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM3)>; - status = "disabled"; - }; - timers3: timers@40000400 { #address-cells = <1>; #size-cells = <0>; @@ -153,14 +137,6 @@ }; }; - timer4: timer@40000800 { - compatible = "st,stm32-timer"; - reg = <0x40000800 0x400>; - interrupts = <30>; - clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM4)>; - status = "disabled"; - }; - timers4: timers@40000800 { #address-cells = <1>; #size-cells = <0>; @@ -183,13 +159,6 @@ }; }; - timer5: timer@40000c00 { - compatible = "st,stm32-timer"; - reg = <0x40000c00 0x400>; - interrupts = <50>; - clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM5)>; - }; - timers5: timers@40000c00 { #address-cells = <1>; #size-cells = <0>; @@ -212,14 +181,6 @@ }; }; - timer6: timer@40001000 { - compatible = "st,stm32-timer"; - reg = <0x40001000 0x400>; - interrupts = <54>; - clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM6)>; - status = "disabled"; - }; - timers6: timers@40001000 { #address-cells = <1>; #size-cells = <0>; @@ -236,14 +197,6 @@ }; }; - timer7: timer@40001400 { - compatible = "st,stm32-timer"; - reg = <0x40001400 0x400>; - interrupts = <55>; - clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM7)>; - status = "disabled"; - }; - timers7: timers@40001400 { #address-cells = <1>; #size-cells = <0>; @@ -759,6 +712,16 @@ status = "disabled"; }; + dma2d: dma2d@4002b000 { + compatible = "st,stm32-dma2d"; + reg = <0x4002b000 0xc00>; + interrupts = <90>; + resets = <&rcc STM32F4_AHB1_RESET(DMA2D)>; + clocks = <&rcc 0 STM32F4_AHB1_CLOCK(DMA2D)>; + clock-names = "dma2d"; + status = "disabled"; + }; + usbotg_hs: usb@40040000 { compatible = "snps,dwc2"; reg = <0x40040000 0x40000>; diff --git a/dts/src/arm/stm32f469-disco.dts b/dts/src/arm/stm32f469-disco.dts index 30905ce672..5a0daf8e8b 100644 --- a/dts/src/arm/stm32f469-disco.dts +++ b/dts/src/arm/stm32f469-disco.dts @@ -132,6 +132,10 @@ clock-frequency = <8000000>; }; +&dma2d { + status = "okay"; +}; + &dsi { #address-cells = <1>; #size-cells = <0>; @@ -224,6 +228,18 @@ bus-width = <4>; }; +&timers5 { + /* Override timer5 to act as clockevent */ + compatible = "st,stm32-timer"; + interrupts = <50>; + status = "okay"; + /delete-property/#address-cells; + /delete-property/#size-cells; + /delete-property/clock-names; + /delete-node/pwm; + /delete-node/timer@4; +}; + &usart3 { pinctrl-0 = <&usart3_pins_a>; pinctrl-names = "default"; diff --git a/dts/src/arm/stm32f746-disco.dts b/dts/src/arm/stm32f746-disco.dts index 569d23cc61..c11616ed5f 100644 --- a/dts/src/arm/stm32f746-disco.dts +++ b/dts/src/arm/stm32f746-disco.dts @@ -109,6 +109,18 @@ bus-width = <4>; }; +&timers5 { + /* Override timer5 to act as clockevent */ + compatible = "st,stm32-timer"; + interrupts = <50>; + status = "okay"; + /delete-property/#address-cells; + /delete-property/#size-cells; + /delete-property/clock-names; + /delete-node/pwm; + /delete-node/timer@4; +}; + &usart1 { pinctrl-0 = <&usart1_pins_b>; pinctrl-names = "default"; diff --git a/dts/src/arm/stm32f746.dtsi b/dts/src/arm/stm32f746.dtsi index 014b416f57..dc868e6da4 100644 --- a/dts/src/arm/stm32f746.dtsi +++ b/dts/src/arm/stm32f746.dtsi @@ -75,14 +75,6 @@ }; soc { - timer2: timer@40000000 { - compatible = "st,stm32-timer"; - reg = <0x40000000 0x400>; - interrupts = <28>; - clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM2)>; - status = "disabled"; - }; - timers2: timers@40000000 { #address-cells = <1>; #size-cells = <0>; @@ -105,14 +97,6 @@ }; }; - timer3: timer@40000400 { - compatible = "st,stm32-timer"; - reg = <0x40000400 0x400>; - interrupts = <29>; - clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM3)>; - status = "disabled"; - }; - timers3: timers@40000400 { #address-cells = <1>; #size-cells = <0>; @@ -135,14 +119,6 @@ }; }; - timer4: timer@40000800 { - compatible = "st,stm32-timer"; - reg = <0x40000800 0x400>; - interrupts = <30>; - clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM4)>; - status = "disabled"; - }; - timers4: timers@40000800 { #address-cells = <1>; #size-cells = <0>; @@ -165,13 +141,6 @@ }; }; - timer5: timer@40000c00 { - compatible = "st,stm32-timer"; - reg = <0x40000c00 0x400>; - interrupts = <50>; - clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM5)>; - }; - timers5: timers@40000c00 { #address-cells = <1>; #size-cells = <0>; @@ -194,14 +163,6 @@ }; }; - timer6: timer@40001000 { - compatible = "st,stm32-timer"; - reg = <0x40001000 0x400>; - interrupts = <54>; - clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM6)>; - status = "disabled"; - }; - timers6: timers@40001000 { #address-cells = <1>; #size-cells = <0>; @@ -218,14 +179,6 @@ }; }; - timer7: timer@40001400 { - compatible = "st,stm32-timer"; - reg = <0x40001400 0x400>; - interrupts = <55>; - clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM7)>; - status = "disabled"; - }; - timers7: timers@40001400 { #address-cells = <1>; #size-cells = <0>; diff --git a/dts/src/arm/stm32f769-disco.dts b/dts/src/arm/stm32f769-disco.dts index be943b7019..b038d0ed39 100644 --- a/dts/src/arm/stm32f769-disco.dts +++ b/dts/src/arm/stm32f769-disco.dts @@ -137,6 +137,18 @@ bus-width = <4>; }; +&timers5 { + /* Override timer5 to act as clockevent */ + compatible = "st,stm32-timer"; + interrupts = <50>; + status = "okay"; + /delete-property/#address-cells; + /delete-property/#size-cells; + /delete-property/clock-names; + /delete-node/pwm; + /delete-node/timer@4; +}; + &usart1 { pinctrl-0 = <&usart1_pins_a>; pinctrl-names = "default"; diff --git a/dts/src/arm/stm32mp13-pinctrl.dtsi b/dts/src/arm/stm32mp13-pinctrl.dtsi index 069f95f2b6..d2472cd8f1 100644 --- a/dts/src/arm/stm32mp13-pinctrl.dtsi +++ b/dts/src/arm/stm32mp13-pinctrl.dtsi @@ -7,7 +7,7 @@ &pinctrl { sdmmc1_b4_pins_a: sdmmc1-b4-0 { - pins1 { + pins { pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */ <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */ <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */ @@ -17,12 +17,6 @@ drive-push-pull; bias-disable; }; - pins2 { - pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */ - slew-rate = <2>; - drive-push-pull; - bias-disable; - }; }; sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 { @@ -36,16 +30,81 @@ bias-disable; }; pins2 { + pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */ + slew-rate = <1>; + drive-open-drain; + bias-disable; + }; + }; + + sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 { + pins { + pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */ + <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */ + <STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */ + <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */ + <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */ + <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */ + }; + }; + + sdmmc1_clk_pins_a: sdmmc1-clk-0 { + pins { pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */ - slew-rate = <2>; + slew-rate = <1>; drive-push-pull; bias-disable; }; - pins3 { - pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */ + }; + + sdmmc2_b4_pins_a: sdmmc2-b4-0 { + pins { + pinmux = <STM32_PINMUX('B', 14, AF10)>, /* SDMMC2_D0 */ + <STM32_PINMUX('B', 15, AF10)>, /* SDMMC2_D1 */ + <STM32_PINMUX('B', 3, AF10)>, /* SDMMC2_D2 */ + <STM32_PINMUX('B', 4, AF10)>, /* SDMMC2_D3 */ + <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */ + slew-rate = <1>; + drive-push-pull; + bias-pull-up; + }; + }; + + sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 { + pins1 { + pinmux = <STM32_PINMUX('B', 14, AF10)>, /* SDMMC2_D0 */ + <STM32_PINMUX('B', 15, AF10)>, /* SDMMC2_D1 */ + <STM32_PINMUX('B', 3, AF10)>, /* SDMMC2_D2 */ + <STM32_PINMUX('B', 4, AF10)>; /* SDMMC2_D3 */ + slew-rate = <1>; + drive-push-pull; + bias-pull-up; + }; + pins2 { + pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */ slew-rate = <1>; drive-open-drain; - bias-disable; + bias-pull-up; + }; + }; + + sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 { + pins { + pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC2_D0 */ + <STM32_PINMUX('B', 15, ANALOG)>, /* SDMMC2_D1 */ + <STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC2_D2 */ + <STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC2_D3 */ + <STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC2_CK */ + <STM32_PINMUX('G', 6, ANALOG)>; /* SDMMC2_CMD */ + }; + }; + + sdmmc2_clk_pins_a: sdmmc2-clk-0 { + pins { + pinmux = <STM32_PINMUX('E', 3, AF10)>; /* SDMMC2_CK */ + slew-rate = <1>; + drive-push-pull; + bias-pull-up; }; }; diff --git a/dts/src/arm/stm32mp131.dtsi b/dts/src/arm/stm32mp131.dtsi index 86126dc0d8..1708c79b52 100644 --- a/dts/src/arm/stm32mp131.dtsi +++ b/dts/src/arm/stm32mp131.dtsi @@ -92,10 +92,10 @@ timer { compatible = "arm,armv7-timer"; - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>; interrupt-parent = <&intc>; always-on; }; @@ -115,15 +115,76 @@ status = "disabled"; }; + dma1: dma-controller@48000000 { + compatible = "st,stm32-dma"; + reg = <0x48000000 0x400>; + interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk_pclk4>; + #dma-cells = <4>; + st,mem2mem; + dma-requests = <8>; + }; + + dma2: dma-controller@48001000 { + compatible = "st,stm32-dma"; + reg = <0x48001000 0x400>; + interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk_pclk4>; + #dma-cells = <4>; + st,mem2mem; + dma-requests = <8>; + }; + + dmamux1: dma-router@48002000 { + compatible = "st,stm32h7-dmamux"; + reg = <0x48002000 0x40>; + clocks = <&clk_pclk4>; + #dma-cells = <3>; + dma-masters = <&dma1 &dma2>; + dma-requests = <128>; + dma-channels = <16>; + }; + + exti: interrupt-controller@5000d000 { + compatible = "st,stm32mp13-exti", "syscon"; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x5000d000 0x400>; + }; + syscfg: syscon@50020000 { compatible = "st,stm32mp157-syscfg", "syscon"; reg = <0x50020000 0x400>; clocks = <&clk_pclk3>; }; + mdma: dma-controller@58000000 { + compatible = "st,stm32h7-mdma"; + reg = <0x58000000 0x1000>; + interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk_pclk4>; + #dma-cells = <5>; + dma-channels = <32>; + dma-requests = <48>; + }; + sdmmc1: mmc@58005000 { - compatible = "arm,pl18x", "arm,primecell"; - arm,primecell-periphid = <0x00253180>; + compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell"; + arm,primecell-periphid = <0x20253180>; reg = <0x58005000 0x1000>, <0x58006000 0x1000>; interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "cmd_irq"; @@ -131,7 +192,21 @@ clock-names = "apb_pclk"; cap-sd-highspeed; cap-mmc-highspeed; - max-frequency = <120000000>; + max-frequency = <130000000>; + status = "disabled"; + }; + + sdmmc2: mmc@58007000 { + compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell"; + arm,primecell-periphid = <0x20253180>; + reg = <0x58007000 0x1000>, <0x58008000 0x1000>; + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "cmd_irq"; + clocks = <&clk_pll4_p>; + clock-names = "apb_pclk"; + cap-sd-highspeed; + cap-mmc-highspeed; + max-frequency = <130000000>; status = "disabled"; }; diff --git a/dts/src/arm/stm32mp135f-dk.dts b/dts/src/arm/stm32mp135f-dk.dts index 7e96d9e362..ee100d108e 100644 --- a/dts/src/arm/stm32mp135f-dk.dts +++ b/dts/src/arm/stm32mp135f-dk.dts @@ -38,9 +38,10 @@ }; &sdmmc1 { - pinctrl-names = "default", "opendrain"; - pinctrl-0 = <&sdmmc1_b4_pins_a>; - pinctrl-1 = <&sdmmc1_b4_od_pins_a>; + pinctrl-names = "default", "opendrain", "sleep"; + pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_clk_pins_a>; + pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_clk_pins_a>; + pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>; broken-cd; disable-wp; st,neg-edge; diff --git a/dts/src/arm/stm32mp15-pinctrl.dtsi b/dts/src/arm/stm32mp15-pinctrl.dtsi index 3b65130aff..f0d66d8c6e 100644 --- a/dts/src/arm/stm32mp15-pinctrl.dtsi +++ b/dts/src/arm/stm32mp15-pinctrl.dtsi @@ -338,6 +338,47 @@ }; }; + ethernet0_rmii_pins_b: rmii-1 { + pins1 { + pinmux = <STM32_PINMUX('B', 5, AF0)>, /* ETH1_CLK */ + <STM32_PINMUX('C', 1, AF11)>, /* ETH1_MDC */ + <STM32_PINMUX('G', 13, AF11)>, /* ETH1_TXD0 */ + <STM32_PINMUX('G', 14, AF11)>; /* ETH1_TXD1 */ + bias-disable; + drive-push-pull; + slew-rate = <1>; + }; + pins2 { + pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH1_MDIO */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins3 { + pinmux = <STM32_PINMUX('A', 7, AF11)>, /* ETH1_CRS_DV */ + <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RXD0 */ + <STM32_PINMUX('C', 5, AF11)>; /* ETH1_RXD1 */ + bias-disable; + }; + pins4 { + pinmux = <STM32_PINMUX('B', 11, AF11)>; /* ETH1_TX_EN */ + }; + }; + + ethernet0_rmii_sleep_pins_b: rmii-sleep-1 { + pins1 { + pinmux = <STM32_PINMUX('A', 2, ANALOG)>, /* ETH1_MDIO */ + <STM32_PINMUX('A', 7, ANALOG)>, /* ETH1_CRS_DV */ + <STM32_PINMUX('B', 5, ANALOG)>, /* ETH1_CLK */ + <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_TX_EN */ + <STM32_PINMUX('C', 1, ANALOG)>, /* ETH1_MDC */ + <STM32_PINMUX('C', 4, ANALOG)>, /* ETH1_RXD0 */ + <STM32_PINMUX('C', 5, ANALOG)>, /* ETH1_RXD1 */ + <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_TXD0 */ + <STM32_PINMUX('G', 14, ANALOG)>; /* ETH1_TXD1 */ + }; + }; + fmc_pins_a: fmc-0 { pins1 { pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */ @@ -927,6 +968,21 @@ }; }; + pwm1_pins_b: pwm1-1 { + pins { + pinmux = <STM32_PINMUX('E', 9, AF1)>; /* TIM1_CH1 */ + bias-pull-down; + drive-push-pull; + slew-rate = <0>; + }; + }; + + pwm1_sleep_pins_b: pwm1-sleep-1 { + pins { + pinmux = <STM32_PINMUX('E', 9, ANALOG)>; /* TIM1_CH1 */ + }; + }; + pwm2_pins_a: pwm2-0 { pins { pinmux = <STM32_PINMUX('A', 3, AF1)>; /* TIM2_CH4 */ @@ -1190,7 +1246,7 @@ }; }; - sai2a_sleep_pins_c: sai2a-2 { + sai2a_sleep_pins_c: sai2a-sleep-2 { pins { pinmux = <STM32_PINMUX('D', 13, ANALOG)>, /* SAI2_SCK_A */ <STM32_PINMUX('D', 11, ANALOG)>, /* SAI2_SD_A */ @@ -2042,6 +2098,42 @@ }; }; + usart3_pins_d: usart3-3 { + pins1 { + pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */ + <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = <STM32_PINMUX('D', 9, AF7)>, /* USART3_RX */ + <STM32_PINMUX('D', 11, AF7)>; /* USART3_CTS_NSS */ + bias-disable; + }; + }; + + usart3_idle_pins_d: usart3-idle-3 { + pins1 { + pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */ + <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */ + <STM32_PINMUX('D', 11, ANALOG)>; /* USART3_CTS_NSS */ + }; + pins2 { + pinmux = <STM32_PINMUX('D', 9, AF7)>; /* USART3_RX */ + bias-disable; + }; + }; + + usart3_sleep_pins_d: usart3-sleep-3 { + pins { + pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */ + <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */ + <STM32_PINMUX('D', 11, ANALOG)>, /* USART3_CTS_NSS */ + <STM32_PINMUX('D', 9, ANALOG)>; /* USART3_RX */ + }; + }; + usbotg_hs_pins_a: usbotg-hs-0 { pins { pinmux = <STM32_PINMUX('A', 10, ANALOG)>; /* OTG_ID */ diff --git a/dts/src/arm/stm32mp151.dtsi b/dts/src/arm/stm32mp151.dtsi index 1cfc2f011e..f9aa9af31e 100644 --- a/dts/src/arm/stm32mp151.dtsi +++ b/dts/src/arm/stm32mp151.dtsi @@ -45,10 +45,10 @@ timer { compatible = "arm,armv7-timer"; - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>; interrupt-parent = <&intc>; }; @@ -455,6 +455,9 @@ interrupts-extended = <&exti 27 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc USART2_K>; wakeup-source; + dmas = <&dmamux1 43 0x400 0x15>, + <&dmamux1 44 0x400 0x11>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -464,6 +467,9 @@ interrupts-extended = <&exti 28 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc USART3_K>; wakeup-source; + dmas = <&dmamux1 45 0x400 0x15>, + <&dmamux1 46 0x400 0x11>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -473,6 +479,9 @@ interrupts-extended = <&exti 30 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc UART4_K>; wakeup-source; + dmas = <&dmamux1 63 0x400 0x15>, + <&dmamux1 64 0x400 0x11>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -482,6 +491,9 @@ interrupts-extended = <&exti 31 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc UART5_K>; wakeup-source; + dmas = <&dmamux1 65 0x400 0x15>, + <&dmamux1 66 0x400 0x11>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -588,6 +600,9 @@ interrupts-extended = <&exti 32 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc UART7_K>; wakeup-source; + dmas = <&dmamux1 79 0x400 0x15>, + <&dmamux1 80 0x400 0x11>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -597,6 +612,9 @@ interrupts-extended = <&exti 33 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc UART8_K>; wakeup-source; + dmas = <&dmamux1 81 0x400 0x15>, + <&dmamux1 82 0x400 0x11>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -678,6 +696,9 @@ interrupts-extended = <&exti 29 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc USART6_K>; wakeup-source; + dmas = <&dmamux1 71 0x400 0x15>, + <&dmamux1 72 0x400 0x11>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -1059,7 +1080,7 @@ }; sdmmc3: mmc@48004000 { - compatible = "arm,pl18x", "arm,primecell"; + compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell"; arm,primecell-periphid = <0x00253180>; reg = <0x48004000 0x400>; interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>; @@ -1381,7 +1402,7 @@ }; sdmmc1: mmc@58005000 { - compatible = "arm,pl18x", "arm,primecell"; + compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell"; arm,primecell-periphid = <0x00253180>; reg = <0x58005000 0x1000>; interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; @@ -1396,7 +1417,7 @@ }; sdmmc2: mmc@58007000 { - compatible = "arm,pl18x", "arm,primecell"; + compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell"; arm,primecell-periphid = <0x00253180>; reg = <0x58007000 0x1000>; interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>; @@ -1560,7 +1581,7 @@ reg = <0x5c004000 0x400>; clocks = <&rcc RTCAPB>, <&rcc RTC>; clock-names = "pclk", "rtc_ck"; - interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; + interrupts-extended = <&exti 19 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; diff --git a/dts/src/arm/stm32mp153.dtsi b/dts/src/arm/stm32mp153.dtsi index 1c1889b194..486084e0b8 100644 --- a/dts/src/arm/stm32mp153.dtsi +++ b/dts/src/arm/stm32mp153.dtsi @@ -22,6 +22,13 @@ interrupt-affinity = <&cpu0>, <&cpu1>; }; + timer { + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; + }; + soc { m_can1: can@4400e000 { compatible = "bosch,m_can"; diff --git a/dts/src/arm/stm32mp157a-icore-stm32mp1-ctouch2.dts b/dts/src/arm/stm32mp157a-icore-stm32mp1-ctouch2.dts index d3058a036c..1f75f1d451 100644 --- a/dts/src/arm/stm32mp157a-icore-stm32mp1-ctouch2.dts +++ b/dts/src/arm/stm32mp157a-icore-stm32mp1-ctouch2.dts @@ -43,5 +43,7 @@ pinctrl-0 = <&uart4_pins_a>; pinctrl-1 = <&uart4_sleep_pins_a>; pinctrl-2 = <&uart4_idle_pins_a>; + /delete-property/dmas; + /delete-property/dma-names; status = "okay"; }; diff --git a/dts/src/arm/stm32mp157a-icore-stm32mp1-edimm2.2.dts b/dts/src/arm/stm32mp157a-icore-stm32mp1-edimm2.2.dts index a797eaa917..ba92d7d8ed 100644 --- a/dts/src/arm/stm32mp157a-icore-stm32mp1-edimm2.2.dts +++ b/dts/src/arm/stm32mp157a-icore-stm32mp1-edimm2.2.dts @@ -128,5 +128,7 @@ pinctrl-0 = <&uart4_pins_a>; pinctrl-1 = <&uart4_sleep_pins_a>; pinctrl-2 = <&uart4_idle_pins_a>; + /delete-property/dmas; + /delete-property/dma-names; status = "okay"; }; diff --git a/dts/src/arm/stm32mp157a-iot-box.dts b/dts/src/arm/stm32mp157a-iot-box.dts index 70f394b4d3..6a5a4af25b 100644 --- a/dts/src/arm/stm32mp157a-iot-box.dts +++ b/dts/src/arm/stm32mp157a-iot-box.dts @@ -58,6 +58,8 @@ /delete-property/st,hw-flow-ctrl; cts-gpios = <&gpioa 15 GPIO_ACTIVE_LOW>; rts-gpios = <&gpiob 0 GPIO_ACTIVE_LOW>; + /delete-property/dmas; + /delete-property/dma-names; status = "okay"; bluetooth { diff --git a/dts/src/arm/stm32mp157a-microgea-stm32mp1-microdev2.0-of7.dts b/dts/src/arm/stm32mp157a-microgea-stm32mp1-microdev2.0-of7.dts index 5670b23812..fae656edd8 100644 --- a/dts/src/arm/stm32mp157a-microgea-stm32mp1-microdev2.0-of7.dts +++ b/dts/src/arm/stm32mp157a-microgea-stm32mp1-microdev2.0-of7.dts @@ -143,6 +143,8 @@ pinctrl-0 = <&uart4_pins_a>; pinctrl-1 = <&uart4_sleep_pins_a>; pinctrl-2 = <&uart4_idle_pins_a>; + /delete-property/dmas; + /delete-property/dma-names; status = "okay"; }; @@ -150,5 +152,7 @@ &uart8 { pinctrl-names = "default"; pinctrl-0 = <&uart8_pins_a>; + /delete-property/dmas; + /delete-property/dma-names; status = "okay"; }; diff --git a/dts/src/arm/stm32mp157a-microgea-stm32mp1-microdev2.0.dts b/dts/src/arm/stm32mp157a-microgea-stm32mp1-microdev2.0.dts index 7a75868164..b9d0d3d6ad 100644 --- a/dts/src/arm/stm32mp157a-microgea-stm32mp1-microdev2.0.dts +++ b/dts/src/arm/stm32mp157a-microgea-stm32mp1-microdev2.0.dts @@ -44,6 +44,8 @@ pinctrl-0 = <&uart4_pins_a>; pinctrl-1 = <&uart4_sleep_pins_a>; pinctrl-2 = <&uart4_idle_pins_a>; + /delete-property/dmas; + /delete-property/dma-names; status = "okay"; }; @@ -51,5 +53,7 @@ &uart8 { pinctrl-names = "default"; pinctrl-0 = <&uart8_pins_a>; + /delete-property/dmas; + /delete-property/dma-names; status = "okay"; }; diff --git a/dts/src/arm/stm32mp157a-stinger96.dtsi b/dts/src/arm/stm32mp157a-stinger96.dtsi index a4b14ef3ca..3a36f7fe0a 100644 --- a/dts/src/arm/stm32mp157a-stinger96.dtsi +++ b/dts/src/arm/stm32mp157a-stinger96.dtsi @@ -288,6 +288,8 @@ pinctrl-0 = <&usart2_pins_b>; pinctrl-1 = <&usart2_sleep_pins_b>; st,hw-flow-ctrl; + /delete-property/dmas; + /delete-property/dma-names; status = "okay"; }; @@ -296,6 +298,8 @@ pinctrl-names = "default"; pinctrl-0 = <&uart4_pins_c>; st,hw-flow-ctrl; + /delete-property/dmas; + /delete-property/dma-names; status = "okay"; }; @@ -303,6 +307,8 @@ &uart7 { pinctrl-names = "default"; pinctrl-0 = <&uart7_pins_b>; + /delete-property/dmas; + /delete-property/dma-names; status = "okay"; }; diff --git a/dts/src/arm/stm32mp157c-ed1.dts b/dts/src/arm/stm32mp157c-ed1.dts index 46b471d09c..b1eb688a27 100644 --- a/dts/src/arm/stm32mp157c-ed1.dts +++ b/dts/src/arm/stm32mp157c-ed1.dts @@ -384,6 +384,8 @@ pinctrl-0 = <&uart4_pins_a>; pinctrl-1 = <&uart4_sleep_pins_a>; pinctrl-2 = <&uart4_idle_pins_a>; + /delete-property/dmas; + /delete-property/dma-names; status = "okay"; }; diff --git a/dts/src/arm/stm32mp157c-emsbc-argon.dts b/dts/src/arm/stm32mp157c-emsbc-argon.dts new file mode 100644 index 0000000000..33b3f11d24 --- /dev/null +++ b/dts/src/arm/stm32mp157c-emsbc-argon.dts @@ -0,0 +1,53 @@ +// SPDX-License-Identifier: (GPL-2.0 or MIT) +// +// Copyright (c) 2021 emtrion GmbH +// Author: Reinhold Müller <reinhold.mueller@emtrion.de>. +// + +/dts-v1/; + +#include "stm32mp157c-emstamp-argon.dtsi" + +/ { + model = "emtrion STM32MP157C emSBC-Argon Developer Board"; + compatible = "emtrion,stm32mp157c-emsbc-argon", "emtrion,stm32mp157c-emstamp-argon", + "st,stm32mp157"; + + led: gpio_leds { + compatible = "gpio-leds"; + led-2 { + label = "red"; + gpios = <&gpiof 12 GPIO_ACTIVE_LOW>; + linux,default-trigger = "none"; + default-state = "off"; + }; + led-3 { + label = "green"; + gpios = <&gpioe 7 GPIO_ACTIVE_LOW>; + linux,default-trigger = "none"; + default-state = "off"; + }; + }; +}; + +&dac { + status = "okay"; +}; + +&sdmmc1 { + pinctrl-names = "default", "opendrain", "sleep"; + pinctrl-0 = <&sdmmc1_b4_pins_a>; + pinctrl-1 = <&sdmmc1_b4_od_pins_a>; + pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>; + cd-gpios = <&gpiob 7 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + disable-wp; + st,neg-edge; + bus-width = <4>; + vmmc-supply = <&vdd_sd>; + status = "okay"; +}; + +&spi1 { + status = "okay"; +}; + diff --git a/dts/src/arm/stm32mp157c-emstamp-argon.dtsi b/dts/src/arm/stm32mp157c-emstamp-argon.dtsi new file mode 100644 index 0000000000..33ae5e0590 --- /dev/null +++ b/dts/src/arm/stm32mp157c-emstamp-argon.dtsi @@ -0,0 +1,552 @@ +// SPDX-License-Identifier: (GPL-2.0 or MIT) +// +// Copyright (c) 2021 emtrion GmbH +// Author: Reinhold Müller <reinhold.mueller@emtrion.de>. +// + +#include "stm32mp157.dtsi" +#include "stm32mp15xc.dtsi" +#include "stm32mp15-pinctrl.dtsi" +#include "stm32mp15xxac-pinctrl.dtsi" +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/mfd/st,stpmic1.h> + +/ { + aliases { + ethernet0 = ðernet0; + serial0 = &uart4; + serial1 = &usart2; + serial2 = &usart3; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@c0000000 { + device_type = "memory"; + reg = <0xc0000000 0x20000000>; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + mcuram2: mcuram2@10000000 { + compatible = "shared-dma-pool"; + reg = <0x10000000 0x40000>; + no-map; + }; + + vdev0vring0: vdev0vring0@10040000 { + compatible = "shared-dma-pool"; + reg = <0x10040000 0x2000>; + no-map; + }; + + vdev0vring1: vdev0vring1@10042000 { + compatible = "shared-dma-pool"; + reg = <0x10042000 0x2000>; + no-map; + }; + + vdev0buffer: vdev0buffer@10044000 { + compatible = "shared-dma-pool"; + reg = <0x10044000 0x4000>; + no-map; + }; + + mcuram: mcuram@30000000 { + compatible = "shared-dma-pool"; + reg = <0x30000000 0x40000>; + no-map; + }; + + retram: retram@38000000 { + compatible = "shared-dma-pool"; + reg = <0x38000000 0x10000>; + no-map; + }; + + gpu_reserved: gpu@dc000000 { + reg = <0xdc000000 0x4000000>; + no-map; + }; + }; + + led: gpio_leds { + compatible = "gpio-leds"; + led-0 { + label = "panic"; + gpios = <&gpioa 13 GPIO_ACTIVE_LOW>; + linux,default-trigger = "none"; + default-state = "off"; + panic-indicator; + }; + led-1 { + label = "heartbeat"; + gpios = <&gpioa 14 GPIO_ACTIVE_LOW>; + linux,default-trigger = "heartbeat"; + default-state = "on"; + }; + }; +}; + +&adc { + vdd-supply = <&vdd>; + vdda-supply = <&vdd>; + vref-supply = <&vrefbuf>; + status = "okay"; + + adc1: adc@0 { + pinctrl-names = "default"; + pinctrl-0 = <&adc1_in6_pins_a>; + st,min-sample-time-nsecs = <5000>; + st,adc-channels = <6>; + status = "disabled"; + }; + + adc2: adc@100 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + channel@12 { + reg = <12>; + label = "sense_temp"; + st,min-sample-time-ns = <9000>; + }; + channel@15 { + reg = <15>; + label = "vbat"; + st,min-sample-time-ns = <9000>; + }; + channel@16 { + reg = <16>; + label = "dac_out1"; + st,min-sample-time-ns = <9000>; + }; + channel@17 { + reg = <17>; + label = "dac_out1"; + st,min-sample-time-ns = <9000>; + }; + }; +}; + +&crc1 { + status = "okay"; +}; + +&cryp1 { + status = "okay"; +}; + +&dac { + pinctrl-names = "default"; + pinctrl-0 = <&dac_ch1_pins_a &dac_ch2_pins_a>; + vref-supply = <&vdda>; + status = "disabled"; + + dac1: dac@1 { + status = "okay"; + }; + dac2: dac@2 { + status = "okay"; + }; +}; + +&dts { + status = "okay"; +}; + +ðernet0 { + status = "okay"; + snps,reset-gpio = <&gpioa 1 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + snps,reset-delays-us = <0 30000 50000>; + pinctrl-0 = <ðernet0_rmii_pins_b>; + pinctrl-1 = <ðernet0_rmii_sleep_pins_b>; + pinctrl-names = "default", "sleep"; + phy-mode = "rmii"; + max-speed = <100>; + phy-handle = <&phy0>; + st,eth-ref-clk-sel; + + mdio0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + phy0: ethernet-phy@0 { + reg = <0>; + }; + }; +}; + +&gpu { + contiguous-area = <&gpu_reserved>; +}; + +&hash1 { + status = "okay"; +}; + +&i2c1 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&i2c1_pins_a>; + pinctrl-1 = <&i2c1_sleep_pins_a>; + i2c-scl-rising-time-ns = <100>; + i2c-scl-falling-time-ns = <7>; + status = "disabled"; + /delete-property/dmas; + /delete-property/dma-names; +}; + +&i2c4 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&i2c4_pins_a>; + pinctrl-1 = <&i2c4_sleep_pins_a>; + i2c-scl-rising-time-ns = <185>; + i2c-scl-falling-time-ns = <20>; + status = "okay"; + /delete-property/dmas; + /delete-property/dma-names; + + pmic: stpmic@33 { + compatible = "st,stpmic1"; + reg = <0x33>; + interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>; + interrupt-controller; + #interrupt-cells = <2>; + status = "okay"; + + regulators { + compatible = "st,stpmic1-regulators"; + + ldo1-supply = <&v3v3>; + ldo3-supply = <&vdd_ddr>; + ldo6-supply = <&v3v3>; + pwr_sw1-supply = <&bst_out>; + pwr_sw2-supply = <&bst_out>; + + vddcore: buck1 { + regulator-name = "vddcore"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + regulator-initial-mode = <0>; + regulator-over-current-protection; + }; + + vdd_ddr: buck2 { + regulator-name = "vdd_ddr"; + regulator-min-microvolt = <1350000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + regulator-initial-mode = <0>; + regulator-over-current-protection; + }; + + vdd: buck3 { + regulator-name = "vdd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + st,mask-reset; + regulator-initial-mode = <0>; + regulator-over-current-protection; + }; + + v3v3: buck4 { + regulator-name = "v3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-over-current-protection; + regulator-initial-mode = <0>; + }; + + v1v8_audio: ldo1 { + regulator-name = "v1v8_audio"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + interrupts = <IT_CURLIM_LDO1 0>; + }; + + v3v3_hdmi: ldo2 { + regulator-name = "v3v3_hdmi"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + interrupts = <IT_CURLIM_LDO2 0>; + }; + + vtt_ddr: ldo3 { + regulator-name = "vtt_ddr"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <750000>; + regulator-always-on; + regulator-over-current-protection; + }; + + vdd_usb: ldo4 { + regulator-name = "vdd_usb"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + interrupts = <IT_CURLIM_LDO4 0>; + }; + + vdd_sd: ldo5 { + regulator-name = "vdd_sd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + interrupts = <IT_CURLIM_LDO5 0>; + regulator-always-on; + }; + + vdda: ldo6 { + regulator-name = "vdda"; + regulator-min-microvolt = <2900000>; + regulator-max-microvolt = <2900000>; + regulator-always-on; + interrupts = <IT_CURLIM_LDO6 0>; + regulator-boot-on; + }; + + vref_ddr: vref_ddr { + regulator-name = "vref_ddr"; + regulator-always-on; + regulator-over-current-protection; + }; + + bst_out: boost { + regulator-name = "bst_out"; + interrupts = <IT_OCP_BOOST 0>; + }; + + vbus_otg: pwr_sw1 { + regulator-name = "vbus_otg"; + interrupts = <IT_OCP_OTG 0>; + regulator-active-discharge; + }; + + vbus_usbh: pwr_sw2 { + regulator-name = "usbh_vbus"; + interrupts = <IT_OCP_SWOUT 0>; + regulator-always-on; + regulator-boot-on; + }; + }; + + onkey { + compatible = "st,stpmic1-onkey"; + interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 1>; + interrupt-names = "onkey-falling", "onkey-rising"; + status = "okay"; + }; + + watchdog { + compatible = "st,stpmic1-wdt"; + status = "disabled"; + }; + }; +}; + +&i2c5 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&i2c5_pins_a>; + pinctrl-1 = <&i2c5_sleep_pins_a>; + i2c-scl-rising-time-ns = <185>; + i2c-scl-falling-time-ns = <20>; + /delete-property/dmas; + /delete-property/dma-names; +}; + +&ipcc { + status = "okay"; +}; + +&iwdg2 { + timeout-sec = <32>; + status = "okay"; +}; + +&m4_rproc { + memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>, + <&vdev0vring1>, <&vdev0buffer>; + mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>; + mbox-names = "vq0", "vq1", "shutdown"; + interrupt-parent = <&exti>; + interrupts = <68 1>; + interrupt-names = "wdg"; + recovery; + status = "okay"; +}; + +&pwr_regulators { + vdd-supply = <&vdd>; + vdd_3v3_usbfs-supply = <&vdd_usb>; +}; + +&qspi { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>; + pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>; + reg = <0x58003000 0x1000>, <0x70000000 0x4000000>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + flash0: is25lp016d@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <133000000>; + spi-rx-bus-width = <1>; + spi-tx-bus-width = <1>; + #address-cells = <1>; + #size-cells = <1>; + }; +}; + +&rng1 { + status = "okay"; +}; + +&rtc { + status = "okay"; +}; + +&sdmmc2 { + arm,primecell-periphid = <0x10153180>; + pinctrl-names = "default", "opendrain", "sleep"; + pinctrl-0 = <&sdmmc2_b4_pins_b>; + pinctrl-1 = <&sdmmc2_b4_od_pins_b>; + pinctrl-2 = <&sdmmc2_b4_sleep_pins_a>; + non-removable; + st,neg-edge; + bus-width = <4>; + vmmc-supply = <&v3v3>; + status = "okay"; +}; + +&spi1 { + pinctrl-names = "default"; + pinctrl-0 = <&spi1_pins_a>; + cs-gpios = <&gpioz 3 0>; + status = "disabled"; + + spidev@0 { + compatible = "spidev"; + reg = <0>; + spi-max-frequency = <100000>; + }; +}; + +&timers1 { + /* spare dmas for other usage */ + /delete-property/dmas; + /delete-property/dma-names; + pwm { + pinctrl-0 = <&pwm1_pins_b>; + pinctrl-1 = <&pwm1_sleep_pins_b>; + pinctrl-names = "default", "sleep"; + status = "okay"; + }; + timer@0 { + status = "okay"; + }; +}; + +&timers4 { + /delete-property/dmas; + /delete-property/dma-names; + pwm { + pinctrl-0 = <&pwm4_pins_b>; + pinctrl-1 = <&pwm4_sleep_pins_b>; + pinctrl-names = "default", "sleep"; + status = "okay"; + }; + timer@3 { + status = "okay"; + }; +}; + +&timers5 { + /delete-property/dmas; + /delete-property/dma-names; + pwm { + pinctrl-0 = <&pwm5_pins_a>; + pinctrl-1 = <&pwm5_sleep_pins_a>; + pinctrl-names = "default", "sleep"; + status = "okay"; + }; + timer@4 { + status = "okay"; + }; +}; + +&uart4 { + pinctrl-names = "default", "sleep", "idle"; + pinctrl-0 = <&uart4_pins_a>; + pinctrl-1 = <&uart4_sleep_pins_a>; + pinctrl-2 = <&uart4_idle_pins_a>; + status = "okay"; +}; + +&usart2 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&usart2_pins_a>; + pinctrl-1 = <&usart2_sleep_pins_a>; + status = "okay"; +}; + +&usart3 { + pinctrl-names = "default", "sleep", "idle"; + pinctrl-0 = <&usart3_pins_d>; + pinctrl-1 = <&usart3_sleep_pins_d>; + pinctrl-2 = <&usart3_idle_pins_d>; + status = "okay"; +}; + +&usbh_ehci { + phys = <&usbphyc_port0>; + phy-names = "usb"; + status = "okay"; +}; + +&usbh_ohci { + phys = <&usbphyc_port0>; + phy-names = "usb"; + status = "okay"; +}; + +&usbotg_hs { + dr_mode = "peripheral"; + pinctrl-names = "default"; + pinctrl-0 = <&usbotg_hs_pins_a>; + phy-names = "usb2-phy"; + phys = <&usbphyc_port1 0>; + vbus-supply = <&vbus_otg>; + status = "okay"; +}; + +&usbphyc { + status = "okay"; +}; + +&usbphyc_port0 { + phy-supply = <&vdd_usb>; +}; + +&usbphyc_port1 { + phy-supply = <&vdd_usb>; +}; + +&vrefbuf { + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + vdda-supply = <&vdd>; + status = "okay"; +}; + diff --git a/dts/src/arm/stm32mp157c-lxa-mc1.dts b/dts/src/arm/stm32mp157c-lxa-mc1.dts index 1e9bf7eea0..e8d2ec41d5 100644 --- a/dts/src/arm/stm32mp157c-lxa-mc1.dts +++ b/dts/src/arm/stm32mp157c-lxa-mc1.dts @@ -248,5 +248,7 @@ &uart4 { pinctrl-names = "default"; pinctrl-0 = <&uart4_pins_a>; + /delete-property/dmas; + /delete-property/dma-names; status = "okay"; }; diff --git a/dts/src/arm/stm32mp157c-odyssey.dts b/dts/src/arm/stm32mp157c-odyssey.dts index 554f5d3bcd..ed66d25b8b 100644 --- a/dts/src/arm/stm32mp157c-odyssey.dts +++ b/dts/src/arm/stm32mp157c-odyssey.dts @@ -81,6 +81,8 @@ &uart4 { pinctrl-names = "default"; pinctrl-0 = <&uart4_pins_a>; + /delete-property/dmas; + /delete-property/dma-names; status = "okay"; }; diff --git a/dts/src/arm/stm32mp15xx-dhcom-drc02.dtsi b/dts/src/arm/stm32mp15xx-dhcom-drc02.dtsi index 4b10b013ff..35b1034aa3 100644 --- a/dts/src/arm/stm32mp15xx-dhcom-drc02.dtsi +++ b/dts/src/arm/stm32mp15xx-dhcom-drc02.dtsi @@ -131,6 +131,8 @@ &usart3 { pinctrl-names = "default"; pinctrl-0 = <&usart3_pins_a>; + /delete-property/dmas; + /delete-property/dma-names; status = "okay"; }; @@ -144,6 +146,8 @@ pinctrl-names = "default"; pinctrl-0 = <&uart8_pins_a>; rts-gpios = <&gpioe 6 GPIO_ACTIVE_HIGH>; + /delete-property/dmas; + /delete-property/dma-names; status = "okay"; }; diff --git a/dts/src/arm/stm32mp15xx-dhcom-pdk2.dtsi b/dts/src/arm/stm32mp15xx-dhcom-pdk2.dtsi index fbf3826933..5f586f0240 100644 --- a/dts/src/arm/stm32mp15xx-dhcom-pdk2.dtsi +++ b/dts/src/arm/stm32mp15xx-dhcom-pdk2.dtsi @@ -287,6 +287,8 @@ &usart3 { pinctrl-names = "default"; pinctrl-0 = <&usart3_pins_a>; + /delete-property/dmas; + /delete-property/dma-names; status = "okay"; }; @@ -294,6 +296,8 @@ pinctrl-names = "default"; pinctrl-0 = <&uart8_pins_a &uart8_rtscts_pins_a>; uart-has-rtscts; + /delete-property/dmas; + /delete-property/dma-names; status = "okay"; }; diff --git a/dts/src/arm/stm32mp15xx-dhcom-picoitx.dtsi b/dts/src/arm/stm32mp15xx-dhcom-picoitx.dtsi index ba816ef8b9..abc595350e 100644 --- a/dts/src/arm/stm32mp15xx-dhcom-picoitx.dtsi +++ b/dts/src/arm/stm32mp15xx-dhcom-picoitx.dtsi @@ -105,12 +105,16 @@ &usart3 { pinctrl-names = "default"; pinctrl-0 = <&usart3_pins_a>; + /delete-property/dmas; + /delete-property/dma-names; status = "okay"; }; &uart8 { pinctrl-names = "default"; pinctrl-0 = <&uart8_pins_a &uart8_rtscts_pins_a>; + /delete-property/dmas; + /delete-property/dma-names; status = "okay"; }; diff --git a/dts/src/arm/stm32mp15xx-dhcom-som.dtsi b/dts/src/arm/stm32mp15xx-dhcom-som.dtsi index 8c41f819f7..83e2c87713 100644 --- a/dts/src/arm/stm32mp15xx-dhcom-som.dtsi +++ b/dts/src/arm/stm32mp15xx-dhcom-som.dtsi @@ -196,7 +196,6 @@ "", "", "DHCOM-E", "", "", "", "", "", "", "", "", ""; - status = "okay"; }; &gpiod { @@ -521,5 +520,7 @@ &uart4 { pinctrl-names = "default"; pinctrl-0 = <&uart4_pins_a>; + /delete-property/dmas; + /delete-property/dma-names; status = "okay"; }; diff --git a/dts/src/arm/stm32mp15xx-dhcor-avenger96.dtsi b/dts/src/arm/stm32mp15xx-dhcor-avenger96.dtsi index 6885948f30..61e17f44ce 100644 --- a/dts/src/arm/stm32mp15xx-dhcor-avenger96.dtsi +++ b/dts/src/arm/stm32mp15xx-dhcor-avenger96.dtsi @@ -376,6 +376,8 @@ label = "LS-UART1"; pinctrl-names = "default"; pinctrl-0 = <&uart4_pins_b>; + /delete-property/dmas; + /delete-property/dma-names; status = "okay"; }; @@ -385,6 +387,8 @@ pinctrl-names = "default"; pinctrl-0 = <&uart7_pins_a>; uart-has-rtscts; + /delete-property/dmas; + /delete-property/dma-names; status = "okay"; }; @@ -394,6 +398,8 @@ pinctrl-0 = <&usart2_pins_a>; pinctrl-1 = <&usart2_sleep_pins_a>; st,hw-flow-ctrl; + /delete-property/dmas; + /delete-property/dma-names; status = "okay"; bluetooth { diff --git a/dts/src/arm/stm32mp15xx-dhcor-som.dtsi b/dts/src/arm/stm32mp15xx-dhcor-som.dtsi index 44ecc47085..6336c3ca0f 100644 --- a/dts/src/arm/stm32mp15xx-dhcor-som.dtsi +++ b/dts/src/arm/stm32mp15xx-dhcor-som.dtsi @@ -19,6 +19,48 @@ device_type = "memory"; reg = <0xc0000000 0x40000000>; }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + mcuram2: mcuram2@10000000 { + compatible = "shared-dma-pool"; + reg = <0x10000000 0x40000>; + no-map; + }; + + vdev0vring0: vdev0vring0@10040000 { + compatible = "shared-dma-pool"; + reg = <0x10040000 0x1000>; + no-map; + }; + + vdev0vring1: vdev0vring1@10041000 { + compatible = "shared-dma-pool"; + reg = <0x10041000 0x1000>; + no-map; + }; + + vdev0buffer: vdev0buffer@10042000 { + compatible = "shared-dma-pool"; + reg = <0x10042000 0x4000>; + no-map; + }; + + mcuram: mcuram@30000000 { + compatible = "shared-dma-pool"; + reg = <0x30000000 0x40000>; + no-map; + }; + + retram: retram@38000000 { + compatible = "shared-dma-pool"; + reg = <0x38000000 0x10000>; + no-map; + }; + }; }; &crc1 { @@ -179,11 +221,25 @@ }; }; +&ipcc { + status = "okay"; +}; + &iwdg2 { timeout-sec = <32>; status = "okay"; }; +&m4_rproc { + memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>, + <&vdev0vring1>, <&vdev0buffer>; + mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>; + mbox-names = "vq0", "vq1", "shutdown"; + interrupt-parent = <&exti>; + interrupts = <68 1>; + status = "okay"; +}; + &pwr_regulators { vdd-supply = <&vdd>; vdd_3v3_usbfs-supply = <&vdd_usb>; diff --git a/dts/src/arm/stm32mp15xx-dkx.dtsi b/dts/src/arm/stm32mp15xx-dkx.dtsi index 6caeb448c1..333c2af971 100644 --- a/dts/src/arm/stm32mp15xx-dkx.dtsi +++ b/dts/src/arm/stm32mp15xx-dkx.dtsi @@ -650,6 +650,8 @@ pinctrl-0 = <&uart4_pins_a>; pinctrl-1 = <&uart4_sleep_pins_a>; pinctrl-2 = <&uart4_idle_pins_a>; + /delete-property/dmas; + /delete-property/dma-names; status = "okay"; }; @@ -658,6 +660,8 @@ pinctrl-0 = <&uart7_pins_c>; pinctrl-1 = <&uart7_sleep_pins_c>; pinctrl-2 = <&uart7_idle_pins_c>; + /delete-property/dmas; + /delete-property/dma-names; status = "disabled"; }; diff --git a/dts/src/arm/sun7i-a20-haoyu-marsboard.dts b/dts/src/arm/sun7i-a20-haoyu-marsboard.dts new file mode 100644 index 0000000000..097e479c27 --- /dev/null +++ b/dts/src/arm/sun7i-a20-haoyu-marsboard.dts @@ -0,0 +1,182 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2021 Conley Lee + * Conley Lee <conleylee@foxmail.com> + */ + +/dts-v1/; +#include "sun7i-a20.dtsi" +#include "sunxi-common-regulators.dtsi" + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/interrupt-controller/irq.h> + +/ { + model = "HAOYU Electronics Marsboard A20"; + compatible = "haoyu,a20-marsboard", "allwinner,sun7i-a20"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + hdmi-connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con_in: endpoint { + remote-endpoint = <&hdmi_out_con>; + }; + }; + }; +}; + +&ahci { + target-supply = <®_ahci_5v>; + status = "okay"; +}; + +&codec { + status = "okay"; +}; + +&cpu0 { + cpu-supply = <®_dcdc2>; +}; + +&de { + status = "okay"; +}; + +&ehci0 { + status = "okay"; +}; + +&ehci1 { + status = "okay"; +}; + +&gmac { + pinctrl-names = "default"; + pinctrl-0 = <&gmac_mii_pins>, <&gmac_txerr>; + phy-handle = <&phy0>; + phy-mode = "mii"; + status = "okay"; +}; + +&hdmi { + status = "okay"; +}; + +&hdmi_out { + hdmi_out_con: endpoint { + remote-endpoint = <&hdmi_con_in>; + }; +}; + +&i2c0 { + status = "okay"; + + axp209: pmic@34 { + reg = <0x34>; + interrupt-parent = <&nmi_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + }; +}; + +&mmc0 { + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 7 10 GPIO_ACTIVE_LOW>; /* PH10 */ + status = "okay"; +}; + +&gmac_mdio { + phy0: ethernet-phy@0 { + reg = <0>; + }; +}; + +&ohci0 { + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + +&otg_sram { + status = "okay"; +}; + +&pio { + gmac_txerr: gmac-txerr-pin { + pins = "PA17"; + function = "gmac"; + }; +}; + +®_ahci_5v { + status = "okay"; +}; + +#include "axp209.dtsi" + +&ac_power_supply { + status = "okay"; +}; + +®_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1450000>; + regulator-name = "vdd-cpu"; +}; + +®_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-int-dll"; +}; + +®_ldo1 { + regulator-name = "vdd-rtc"; +}; + +®_ldo2 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "avcc"; +}; + +®_usb1_vbus { + status = "okay"; +}; + +®_usb2_vbus { + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pb_pins>; + status = "okay"; +}; + +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + +&usbphy { + usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ + usb1_vbus-supply = <®_usb1_vbus>; + usb2_vbus-supply = <®_usb2_vbus>; + status = "okay"; +}; diff --git a/dts/src/arm/sun8i-h3-nanopi-neo-air.dts b/dts/src/arm/sun8i-h3-nanopi-neo-air.dts index be49eabbff..cd3df12b65 100644 --- a/dts/src/arm/sun8i-h3-nanopi-neo-air.dts +++ b/dts/src/arm/sun8i-h3-nanopi-neo-air.dts @@ -103,12 +103,40 @@ }; }; +&mmc2 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc2_8bit_pins>; + vmmc-supply = <®_vcc3v3>; + vqmmc-supply = <®_vcc3v3>; + bus-width = <8>; + non-removable; + status = "okay"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pa_pins>; status = "okay"; }; +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&uart3_pins>, <&uart3_rts_cts_pins>; + uart-has-rtscts; + status = "okay"; + + bluetooth { + compatible = "brcm,bcm43438-bt"; + clocks = <&rtc 1>; + clock-names = "lpo"; + vbat-supply = <®_vcc3v3>; + vddio-supply = <®_vcc3v3>; + device-wakeup-gpios = <&pio 0 8 GPIO_ACTIVE_HIGH>; /* PA8 */ + host-wakeup-gpios = <&pio 0 7 GPIO_ACTIVE_HIGH>; /* PA7 */ + shutdown-gpios = <&pio 6 13 GPIO_ACTIVE_HIGH>; /* PG13 */ + }; +}; + &usbphy { /* USB VBUS is always on */ status = "okay"; diff --git a/dts/src/arm/sun8i-h3-nanopi-neo.dts b/dts/src/arm/sun8i-h3-nanopi-neo.dts index 9f33f6fae5..df71fab3cf 100644 --- a/dts/src/arm/sun8i-h3-nanopi-neo.dts +++ b/dts/src/arm/sun8i-h3-nanopi-neo.dts @@ -45,6 +45,10 @@ / { model = "FriendlyARM NanoPi NEO"; compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3"; + + aliases { + ethernet0 = &emac; + }; }; &ehci0 { diff --git a/dts/src/arm/sun8i-h3.dtsi b/dts/src/arm/sun8i-h3.dtsi index 845f252354..eac2349a23 100644 --- a/dts/src/arm/sun8i-h3.dtsi +++ b/dts/src/arm/sun8i-h3.dtsi @@ -245,7 +245,7 @@ cpu_thermal: cpu-thermal { polling-delay-passive = <0>; polling-delay = <0>; - thermal-sensors = <&ths 0>; + thermal-sensors = <&ths>; trips { cpu_hot_trip: cpu-hot { diff --git a/dts/src/arm/sun8i-v3s.dtsi b/dts/src/arm/sun8i-v3s.dtsi index b30bc1a25e..084323d5c6 100644 --- a/dts/src/arm/sun8i-v3s.dtsi +++ b/dts/src/arm/sun8i-v3s.dtsi @@ -593,6 +593,17 @@ #size-cells = <0>; }; + gic: interrupt-controller@1c81000 { + compatible = "arm,gic-400"; + reg = <0x01c81000 0x1000>, + <0x01c82000 0x2000>, + <0x01c84000 0x2000>, + <0x01c86000 0x2000>; + interrupt-controller; + #interrupt-cells = <3>; + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; + }; + csi1: camera@1cb4000 { compatible = "allwinner,sun8i-v3s-csi"; reg = <0x01cb4000 0x3000>; @@ -604,16 +615,5 @@ resets = <&ccu RST_BUS_CSI>; status = "disabled"; }; - - gic: interrupt-controller@1c81000 { - compatible = "arm,gic-400"; - reg = <0x01c81000 0x1000>, - <0x01c82000 0x2000>, - <0x01c84000 0x2000>, - <0x01c86000 0x2000>; - interrupt-controller; - #interrupt-cells = <3>; - interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; - }; }; }; diff --git a/dts/src/arm/sunxi-h3-h5.dtsi b/dts/src/arm/sunxi-h3-h5.dtsi index 4aeca9e7e3..d7e9f977f9 100644 --- a/dts/src/arm/sunxi-h3-h5.dtsi +++ b/dts/src/arm/sunxi-h3-h5.dtsi @@ -913,6 +913,19 @@ #size-cells = <0>; }; + r_uart: serial@1f02800 { + compatible = "snps,dw-apb-uart"; + reg = <0x01f02800 0x400>; + interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; + reg-shift = <2>; + reg-io-width = <4>; + clocks = <&r_ccu CLK_APB0_UART>; + resets = <&r_ccu RST_APB0_UART>; + pinctrl-names = "default"; + pinctrl-0 = <&r_uart_pins>; + status = "disabled"; + }; + r_pio: pinctrl@1f02c00 { compatible = "allwinner,sun8i-h3-r-pinctrl"; reg = <0x01f02c00 0x400>; @@ -939,6 +952,11 @@ pins = "PL10"; function = "s_pwm"; }; + + r_uart_pins: r-uart-pins { + pins = "PL2", "PL3"; + function = "s_uart"; + }; }; r_pwm: pwm@1f03800 { diff --git a/dts/src/arm/tegra20-asus-tf101.dts b/dts/src/arm/tegra20-asus-tf101.dts index 020172ee73..a054d39db4 100644 --- a/dts/src/arm/tegra20-asus-tf101.dts +++ b/dts/src/arm/tegra20-asus-tf101.dts @@ -436,17 +436,27 @@ }; }; + spdif@70002400 { + status = "okay"; + + nvidia,fixed-parent-rate; + }; + i2s@70002800 { status = "okay"; + + nvidia,fixed-parent-rate; }; serial@70006040 { compatible = "nvidia,tegra20-hsuart"; + /delete-property/ reg-shift; /* GPS BCM4751 */ }; serial@70006200 { compatible = "nvidia,tegra20-hsuart"; + /delete-property/ reg-shift; status = "okay"; /* Azurewave AW-NH615 BCM4329B1 */ @@ -756,7 +766,7 @@ lpddr2 { compatible = "elpida,B8132B2PB-6D-F", "jedec,lpddr2-s4"; - revision-id1 = <1>; + revision-id = <1 0>; density = <2048>; io-width = <16>; }; diff --git a/dts/src/arm/tegra20-colibri.dtsi b/dts/src/arm/tegra20-colibri.dtsi index 1eefb9ee4a..8ebd8afc85 100644 --- a/dts/src/arm/tegra20-colibri.dtsi +++ b/dts/src/arm/tegra20-colibri.dtsi @@ -691,7 +691,7 @@ #address-cells = <1>; #size-cells = <0>; - asix@1 { + ethernet@1 { compatible = "usbb95,772b"; reg = <1>; local-mac-address = [00 00 00 00 00 00]; diff --git a/dts/src/arm/tegra20-paz00.dts b/dts/src/arm/tegra20-paz00.dts index d53a175dc1..0fb4b1f5bc 100644 --- a/dts/src/arm/tegra20-paz00.dts +++ b/dts/src/arm/tegra20-paz00.dts @@ -13,6 +13,8 @@ compatible = "compal,paz00", "nvidia,tegra20"; aliases { + mmc0 = &sdmmc4; /* eMMC */ + mmc1 = &sdmmc1; /* MicroSD */ rtc0 = "/i2c@7000d000/tps6586x@34"; rtc1 = "/rtc@7000e000"; serial0 = &uarta; @@ -558,7 +560,7 @@ status = "okay"; }; - mmc@c8000000 { + sdmmc1: mmc@c8000000 { status = "okay"; cd-gpios = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_LOW>; wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>; @@ -566,7 +568,7 @@ bus-width = <4>; }; - mmc@c8000600 { + sdmmc4: mmc@c8000600 { status = "okay"; bus-width = <8>; non-removable; diff --git a/dts/src/arm/tegra20-tamonten.dtsi b/dts/src/arm/tegra20-tamonten.dtsi index de39c5465c..0e19bd0a84 100644 --- a/dts/src/arm/tegra20-tamonten.dtsi +++ b/dts/src/arm/tegra20-tamonten.dtsi @@ -183,8 +183,8 @@ }; conf_ata { nvidia,pins = "ata", "atb", "atc", "atd", "ate", - "cdev1", "cdev2", "dap1", "dtb", "gma", - "gmb", "gmc", "gmd", "gme", "gpu7", + "cdev1", "cdev2", "dap1", "dtb", "dtf", + "gma", "gmb", "gmc", "gmd", "gme", "gpu7", "gpv", "i2cp", "irrx", "irtx", "pta", "rm", "slxa", "slxk", "spia", "spib", "uac"; @@ -203,7 +203,7 @@ }; conf_crtp { nvidia,pins = "crtp", "dap2", "dap3", "dap4", - "dtc", "dte", "dtf", "gpu", "sdio1", + "dtc", "dte", "gpu", "sdio1", "slxc", "slxd", "spdi", "spdo", "spig", "uda"; nvidia,pull = <TEGRA_PIN_PULL_NONE>; diff --git a/dts/src/arm/tegra30-asus-tf700t.dts b/dts/src/arm/tegra30-asus-tf700t.dts index 18a9bfa5e9..1a331dec3c 100644 --- a/dts/src/arm/tegra30-asus-tf700t.dts +++ b/dts/src/arm/tegra30-asus-tf700t.dts @@ -742,7 +742,7 @@ #address-cells = <1>; #size-cells = <0>; - dsi-bridge@7 { + dsi@7 { compatible = "toshiba,tc358768"; reg = <0x7>; diff --git a/dts/src/arm/tegra30-asus-transformer-common.dtsi b/dts/src/arm/tegra30-asus-transformer-common.dtsi index 85b43a86a2..c662ab261e 100644 --- a/dts/src/arm/tegra30-asus-transformer-common.dtsi +++ b/dts/src/arm/tegra30-asus-transformer-common.dtsi @@ -1080,6 +1080,7 @@ serial@70006040 { compatible = "nvidia,tegra30-hsuart"; + /delete-property/ reg-shift; status = "okay"; /* Broadcom GPS BCM47511 */ @@ -1087,6 +1088,7 @@ serial@70006200 { compatible = "nvidia,tegra30-hsuart"; + /delete-property/ reg-shift; status = "okay"; nvidia,adjust-baud-rates = <0 9600 100>, diff --git a/dts/src/arm/tegra30-colibri.dtsi b/dts/src/arm/tegra30-colibri.dtsi index be691a1c33..22231d450b 100644 --- a/dts/src/arm/tegra30-colibri.dtsi +++ b/dts/src/arm/tegra30-colibri.dtsi @@ -960,7 +960,7 @@ #address-cells = <1>; #size-cells = <0>; - asix@1 { + ethernet@1 { compatible = "usbb95,772b"; reg = <1>; local-mac-address = [00 00 00 00 00 00]; diff --git a/dts/src/arm/tegra30-ouya.dts b/dts/src/arm/tegra30-ouya.dts index a5cfbab5f5..e58dda4f9d 100644 --- a/dts/src/arm/tegra30-ouya.dts +++ b/dts/src/arm/tegra30-ouya.dts @@ -4553,7 +4553,7 @@ #address-cells = <1>; #size-cells = <0>; - smsc@2 { /* SMSC 10/100T Ethernet Controller */ + ethernet@2 { /* SMSC 10/100T Ethernet Controller */ compatible = "usb424,9e00"; reg = <2>; local-mac-address = [00 11 22 33 44 55]; diff --git a/dts/src/arm/tegra30-pegatron-chagall.dts b/dts/src/arm/tegra30-pegatron-chagall.dts index f4b2d42188..8ce6103529 100644 --- a/dts/src/arm/tegra30-pegatron-chagall.dts +++ b/dts/src/arm/tegra30-pegatron-chagall.dts @@ -1103,6 +1103,7 @@ uartb: serial@70006040 { compatible = "nvidia,tegra30-hsuart"; + /delete-property/ reg-shift; status = "okay"; /* Broadcom GPS BCM47511 */ @@ -1110,6 +1111,7 @@ uartc: serial@70006200 { compatible = "nvidia,tegra30-hsuart"; + /delete-property/ reg-shift; status = "okay"; nvidia,adjust-baud-rates = <0 9600 100>, diff --git a/dts/src/arm/vf-colibri-eval-v3.dtsi b/dts/src/arm/vf-colibri-eval-v3.dtsi index c12a1b8bc0..14c411f146 100644 --- a/dts/src/arm/vf-colibri-eval-v3.dtsi +++ b/dts/src/arm/vf-colibri-eval-v3.dtsi @@ -103,7 +103,7 @@ status = "okay"; /* M41T0M6 real time clock on carrier board */ - rtc: m41t0m6@68 { + rtc: rtc@68 { compatible = "st,m41t0"; reg = <0x68>; }; |