5 files changed, 30 insertions, 0 deletions
diff --git a/dts/src/mips/brcm/bcm63268.dtsi b/dts/src/mips/brcm/bcm63268.dtsi
index 5acb49b618..e0021ff9f1 100644
--- a/dts/src/mips/brcm/bcm63268.dtsi
+++ b/dts/src/mips/brcm/bcm63268.dtsi
@@ -70,6 +70,12 @@
 			mask = <0x1>;
 		};
 
+		periph_rst: reset-controller@10000010 {
+			compatible = "brcm,bcm6345-reset";
+			reg = <0x10000010 0x4>;
+			#reset-cells = <1>;
+		};
+
 		periph_intc: interrupt-controller@10000020 {
 			compatible = "brcm,bcm6345-l1-intc";
 			reg = <0x10000020 0x20>,
diff --git a/dts/src/mips/brcm/bcm6328.dtsi b/dts/src/mips/brcm/bcm6328.dtsi
index 1f9edd7103..9dc558763c 100644
--- a/dts/src/mips/brcm/bcm6328.dtsi
+++ b/dts/src/mips/brcm/bcm6328.dtsi
@@ -57,6 +57,12 @@
 			#clock-cells = <1>;
 		};
 
+		periph_rst: reset-controller@10000010 {
+			compatible = "brcm,bcm6345-reset";
+			reg = <0x10000010 0x4>;
+			#reset-cells = <1>;
+		};
+
 		periph_intc: interrupt-controller@10000020 {
 			compatible = "brcm,bcm6345-l1-intc";
 			reg = <0x10000020 0x10>,
diff --git a/dts/src/mips/brcm/bcm6358.dtsi b/dts/src/mips/brcm/bcm6358.dtsi
index f21176cac0..9d93e7f5e6 100644
--- a/dts/src/mips/brcm/bcm6358.dtsi
+++ b/dts/src/mips/brcm/bcm6358.dtsi
@@ -82,6 +82,12 @@
 			interrupts = <2>, <3>;
 		};
 
+		periph_rst: reset-controller@fffe0034 {
+			compatible = "brcm,bcm6345-reset";
+			reg = <0xfffe0034 0x4>;
+			#reset-cells = <1>;
+		};
+
 		leds0: led-controller@fffe00d0 {
 			#address-cells = <1>;
 			#size-cells = <0>;
diff --git a/dts/src/mips/brcm/bcm6362.dtsi b/dts/src/mips/brcm/bcm6362.dtsi
index c98f9111e3..eb10341b75 100644
--- a/dts/src/mips/brcm/bcm6362.dtsi
+++ b/dts/src/mips/brcm/bcm6362.dtsi
@@ -70,6 +70,12 @@
 			mask = <0x1>;
 		};
 
+		periph_rst: reset-controller@10000010 {
+			compatible = "brcm,bcm6345-reset";
+			reg = <0x10000010 0x4>;
+			#reset-cells = <1>;
+		};
+
 		periph_intc: interrupt-controller@10000020 {
 			compatible = "brcm,bcm6345-l1-intc";
 			reg = <0x10000020 0x10>,
diff --git a/dts/src/mips/brcm/bcm6368.dtsi b/dts/src/mips/brcm/bcm6368.dtsi
index 449c167dd8..52c19f40b9 100644
--- a/dts/src/mips/brcm/bcm6368.dtsi
+++ b/dts/src/mips/brcm/bcm6368.dtsi
@@ -70,6 +70,12 @@
 			mask = <0x1>;
 		};
 
+		periph_rst: reset-controller@10000010 {
+			compatible = "brcm,bcm6345-reset";
+			reg = <0x10000010 0x4>;
+			#reset-cells = <1>;
+		};
+
 		periph_intc: interrupt-controller@10000020 {
 			compatible = "brcm,bcm6345-l1-intc";
 			reg = <0x10000020 0x10>,