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-rw-r--r--dts/src/powerpc/fsl/p5020si-pre.dtsi10
1 files changed, 9 insertions, 1 deletions
diff --git a/dts/src/powerpc/fsl/p5020si-pre.dtsi b/dts/src/powerpc/fsl/p5020si-pre.dtsi
index 1cc61e126e..bfba0b4f1c 100644
--- a/dts/src/powerpc/fsl/p5020si-pre.dtsi
+++ b/dts/src/powerpc/fsl/p5020si-pre.dtsi
@@ -1,7 +1,7 @@
/*
* P5020/P5010 Silicon/SoC Device Tree Source (pre include)
*
- * Copyright 2011 Freescale Semiconductor Inc.
+ * Copyright 2011 - 2015 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -79,6 +79,14 @@
raideng_jr1 = &raideng_jr1;
raideng_jr2 = &raideng_jr2;
raideng_jr3 = &raideng_jr3;
+
+ fman0 = &fman0;
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+ ethernet2 = &enet2;
+ ethernet3 = &enet3;
+ ethernet4 = &enet4;
+ ethernet5 = &enet5;
};
cpus {