diff options
Diffstat (limited to 'dts/src/powerpc')
70 files changed, 477 insertions, 6801 deletions
diff --git a/dts/src/powerpc/fsl/c293si-post.dtsi b/dts/src/powerpc/fsl/c293si-post.dtsi index bec0fc3684..f208fb8f64 100644 --- a/dts/src/powerpc/fsl/c293si-post.dtsi +++ b/dts/src/powerpc/fsl/c293si-post.dtsi @@ -124,10 +124,10 @@ reg = <0x80000 0x20000>; ranges = <0x0 0x80000 0x20000>; - jr@1000{ + jr@1000 { interrupts = <45 2 0 0>; }; - jr@2000{ + jr@2000 { interrupts = <57 2 0 0>; }; }; @@ -140,10 +140,10 @@ reg = <0xa0000 0x20000>; ranges = <0x0 0xa0000 0x20000>; - jr@1000{ + jr@1000 { interrupts = <49 2 0 0>; }; - jr@2000{ + jr@2000 { interrupts = <50 2 0 0>; }; }; @@ -156,10 +156,10 @@ reg = <0xc0000 0x20000>; ranges = <0x0 0xc0000 0x20000>; - jr@1000{ + jr@1000 { interrupts = <55 2 0 0>; }; - jr@2000{ + jr@2000 { interrupts = <56 2 0 0>; }; }; diff --git a/dts/src/powerpc/fsl/e500v1_power_isa.dtsi b/dts/src/powerpc/fsl/e500v1_power_isa.dtsi new file mode 100644 index 0000000000..7e2a90cde7 --- /dev/null +++ b/dts/src/powerpc/fsl/e500v1_power_isa.dtsi @@ -0,0 +1,51 @@ +/* + * e500v1 Power ISA Device Tree Source (include) + * + * Copyright 2012 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/ { + cpus { + power-isa-version = "2.03"; + power-isa-b; // Base + power-isa-e; // Embedded + power-isa-atb; // Alternate Time Base + power-isa-cs; // Cache Specification + power-isa-e.le; // Embedded.Little-Endian + power-isa-e.pm; // Embedded.Performance Monitor + power-isa-ecl; // Embedded Cache Locking + power-isa-mmc; // Memory Coherence + power-isa-sp; // Signal Processing Engine + power-isa-sp.fs; // SPE.Embedded Float Scalar Single + power-isa-sp.fv; // SPE.Embedded Float Vector + mmu-type = "power-embedded"; + }; +}; diff --git a/dts/src/powerpc/fsl/mpc8540ads.dts b/dts/src/powerpc/fsl/mpc8540ads.dts deleted file mode 100644 index 18a8851305..0000000000 --- a/dts/src/powerpc/fsl/mpc8540ads.dts +++ /dev/null @@ -1,355 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * MPC8540 ADS Device Tree Source - * - * Copyright 2006, 2008 Freescale Semiconductor Inc. - */ - -/dts-v1/; - -/include/ "e500v2_power_isa.dtsi" - -/ { - model = "MPC8540ADS"; - compatible = "MPC8540ADS", "MPC85xxADS"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8540@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; // 33 MHz, from uboot - bus-frequency = <0>; // 166 MHz - clock-frequency = <0>; // 825 MHz, from uboot - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x8000000>; // 128M at 0x0 - }; - - soc8540@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x100000>; - bus-frequency = <0>; - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <8>; - }; - - ecm@1000 { - compatible = "fsl,mpc8540-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8540-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8540-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x40000>; // L2, 256K - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8540-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8540-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8540-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8540-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@0 { - interrupt-parent = <&mpic>; - interrupts = <5 1>; - reg = <0x0>; - }; - phy1: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <5 1>; - reg = <0x1>; - }; - phy3: ethernet-phy@3 { - interrupt-parent = <&mpic>; - interrupts = <7 1>; - reg = <0x3>; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet2: ethernet@26000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <2>; - device_type = "network"; - model = "FEC"; - compatible = "gianfar"; - reg = <0x26000 0x1000>; - ranges = <0x0 0x26000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <41 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi2>; - phy-handle = <&phy3>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - }; - - pci0: pci@e0008000 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x02 */ - 0x1000 0x0 0x0 0x1 &mpic 0x1 0x1 - 0x1000 0x0 0x0 0x2 &mpic 0x2 0x1 - 0x1000 0x0 0x0 0x3 &mpic 0x3 0x1 - 0x1000 0x0 0x0 0x4 &mpic 0x4 0x1 - - /* IDSEL 0x03 */ - 0x1800 0x0 0x0 0x1 &mpic 0x4 0x1 - 0x1800 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x1800 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x1800 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 0x04 */ - 0x2000 0x0 0x0 0x1 &mpic 0x3 0x1 - 0x2000 0x0 0x0 0x2 &mpic 0x4 0x1 - 0x2000 0x0 0x0 0x3 &mpic 0x1 0x1 - 0x2000 0x0 0x0 0x4 &mpic 0x2 0x1 - - /* IDSEL 0x05 */ - 0x2800 0x0 0x0 0x1 &mpic 0x2 0x1 - 0x2800 0x0 0x0 0x2 &mpic 0x3 0x1 - 0x2800 0x0 0x0 0x3 &mpic 0x4 0x1 - 0x2800 0x0 0x0 0x4 &mpic 0x1 0x1 - - /* IDSEL 0x0c */ - 0x6000 0x0 0x0 0x1 &mpic 0x1 0x1 - 0x6000 0x0 0x0 0x2 &mpic 0x2 0x1 - 0x6000 0x0 0x0 0x3 &mpic 0x3 0x1 - 0x6000 0x0 0x0 0x4 &mpic 0x4 0x1 - - /* IDSEL 0x0d */ - 0x6800 0x0 0x0 0x1 &mpic 0x4 0x1 - 0x6800 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x6800 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x6800 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 0x0e */ - 0x7000 0x0 0x0 0x1 &mpic 0x3 0x1 - 0x7000 0x0 0x0 0x2 &mpic 0x4 0x1 - 0x7000 0x0 0x0 0x3 &mpic 0x1 0x1 - 0x7000 0x0 0x0 0x4 &mpic 0x2 0x1 - - /* IDSEL 0x0f */ - 0x7800 0x0 0x0 0x1 &mpic 0x2 0x1 - 0x7800 0x0 0x0 0x2 &mpic 0x3 0x1 - 0x7800 0x0 0x0 0x3 &mpic 0x4 0x1 - 0x7800 0x0 0x0 0x4 &mpic 0x1 0x1 - - /* IDSEL 0x12 */ - 0x9000 0x0 0x0 0x1 &mpic 0x1 0x1 - 0x9000 0x0 0x0 0x2 &mpic 0x2 0x1 - 0x9000 0x0 0x0 0x3 &mpic 0x3 0x1 - 0x9000 0x0 0x0 0x4 &mpic 0x4 0x1 - - /* IDSEL 0x13 */ - 0x9800 0x0 0x0 0x1 &mpic 0x4 0x1 - 0x9800 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x9800 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x9800 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 0x14 */ - 0xa000 0x0 0x0 0x1 &mpic 0x3 0x1 - 0xa000 0x0 0x0 0x2 &mpic 0x4 0x1 - 0xa000 0x0 0x0 0x3 &mpic 0x1 0x1 - 0xa000 0x0 0x0 0x4 &mpic 0x2 0x1 - - /* IDSEL 0x15 */ - 0xa800 0x0 0x0 0x1 &mpic 0x2 0x1 - 0xa800 0x0 0x0 0x2 &mpic 0x3 0x1 - 0xa800 0x0 0x0 0x3 &mpic 0x4 0x1 - 0xa800 0x0 0x0 0x4 &mpic 0x1 0x1>; - interrupt-parent = <&mpic>; - interrupts = <24 2>; - bus-range = <0 0>; - ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x0 0xe2000000 0x0 0x100000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008000 0x1000>; - compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; - device_type = "pci"; - }; -}; diff --git a/dts/src/powerpc/fsl/mpc8541cds.dts b/dts/src/powerpc/fsl/mpc8541cds.dts deleted file mode 100644 index ac381e7b1c..0000000000 --- a/dts/src/powerpc/fsl/mpc8541cds.dts +++ /dev/null @@ -1,375 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * MPC8541 CDS Device Tree Source - * - * Copyright 2006, 2008 Freescale Semiconductor Inc. - */ - -/dts-v1/; - -/include/ "e500v2_power_isa.dtsi" - -/ { - model = "MPC8541CDS"; - compatible = "MPC8541CDS", "MPC85xxCDS"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8541@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; // 33 MHz, from uboot - bus-frequency = <0>; // 166 MHz - clock-frequency = <0>; // 825 MHz, from uboot - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x8000000>; // 128M at 0x0 - }; - - soc8541@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x100000>; - bus-frequency = <0>; - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <8>; - }; - - ecm@1000 { - compatible = "fsl,mpc8541-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8541-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8541-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x40000>; // L2, 256K - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8541-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8541-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8541-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8541-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8541-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@0 { - interrupt-parent = <&mpic>; - interrupts = <5 1>; - reg = <0x0>; - }; - phy1: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <5 1>; - reg = <0x1>; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - crypto@30000 { - compatible = "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <45 2>; - interrupt-parent = <&mpic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x7e>; - fsl,descriptor-types-mask = <0x01010ebf>; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - - cpm@919c0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8541-cpm", "fsl,cpm2"; - reg = <0x919c0 0x30>; - ranges; - - muram@80000 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x80000 0x10000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0x0 0x2000 0x9000 0x1000>; - }; - }; - - brg@919f0 { - compatible = "fsl,mpc8541-brg", - "fsl,cpm2-brg", - "fsl,cpm-brg"; - reg = <0x919f0 0x10 0x915f0 0x10>; - }; - - cpmpic: pic@90c00 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - interrupts = <46 2>; - interrupt-parent = <&mpic>; - reg = <0x90c00 0x80>; - compatible = "fsl,mpc8541-cpm-pic", "fsl,cpm2-pic"; - }; - }; - }; - - pci0: pci@e0008000 { - interrupt-map-mask = <0x1f800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x10 */ - 0x8000 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x8000 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x8000 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x8000 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 0x11 */ - 0x8800 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x8800 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x8800 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x8800 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 0x12 (Slot 1) */ - 0x9000 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x9000 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x9000 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x9000 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 0x13 (Slot 2) */ - 0x9800 0x0 0x0 0x1 &mpic 0x1 0x1 - 0x9800 0x0 0x0 0x2 &mpic 0x2 0x1 - 0x9800 0x0 0x0 0x3 &mpic 0x3 0x1 - 0x9800 0x0 0x0 0x4 &mpic 0x0 0x1 - - /* IDSEL 0x14 (Slot 3) */ - 0xa000 0x0 0x0 0x1 &mpic 0x2 0x1 - 0xa000 0x0 0x0 0x2 &mpic 0x3 0x1 - 0xa000 0x0 0x0 0x3 &mpic 0x0 0x1 - 0xa000 0x0 0x0 0x4 &mpic 0x1 0x1 - - /* IDSEL 0x15 (Slot 4) */ - 0xa800 0x0 0x0 0x1 &mpic 0x3 0x1 - 0xa800 0x0 0x0 0x2 &mpic 0x0 0x1 - 0xa800 0x0 0x0 0x3 &mpic 0x1 0x1 - 0xa800 0x0 0x0 0x4 &mpic 0x2 0x1 - - /* Bus 1 (Tundra Bridge) */ - /* IDSEL 0x12 (ISA bridge) */ - 0x19000 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x19000 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x19000 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x19000 0x0 0x0 0x4 &mpic 0x3 0x1>; - interrupt-parent = <&mpic>; - interrupts = <24 2>; - bus-range = <0 0>; - ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x0 0xe2000000 0x0 0x100000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008000 0x1000>; - compatible = "fsl,mpc8540-pci"; - device_type = "pci"; - - i8259@19000 { - interrupt-controller; - device_type = "interrupt-controller"; - reg = <0x19000 0x0 0x0 0x0 0x1>; - #address-cells = <0>; - #interrupt-cells = <2>; - compatible = "chrp,iic"; - interrupts = <1>; - interrupt-parent = <&pci0>; - }; - }; - - pci1: pci@e0009000 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x15 */ - 0xa800 0x0 0x0 0x1 &mpic 0xb 0x1 - 0xa800 0x0 0x0 0x2 &mpic 0xb 0x1 - 0xa800 0x0 0x0 0x3 &mpic 0xb 0x1 - 0xa800 0x0 0x0 0x4 &mpic 0xb 0x1>; - interrupt-parent = <&mpic>; - interrupts = <25 2>; - bus-range = <0 0>; - ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x0 0xe3000000 0x0 0x100000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0009000 0x1000>; - compatible = "fsl,mpc8540-pci"; - device_type = "pci"; - }; -}; diff --git a/dts/src/powerpc/fsl/mpc8548cds.dtsi b/dts/src/powerpc/fsl/mpc8548cds.dtsi deleted file mode 100644 index 3bc7d47112..0000000000 --- a/dts/src/powerpc/fsl/mpc8548cds.dtsi +++ /dev/null @@ -1,302 +0,0 @@ -/* - * MPC8548CDS Device Tree Source stub (no addresses or top-level ranges) - * - * Copyright 2012 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&board_lbc { - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x01000000>; - bank-width = <2>; - device-width = <2>; - - partition@0 { - reg = <0x0 0x0b00000>; - label = "ramdisk-nor"; - }; - - partition@300000 { - reg = <0x0b00000 0x0400000>; - label = "kernel-nor"; - }; - - partition@700000 { - reg = <0x0f00000 0x060000>; - label = "dtb-nor"; - }; - - partition@760000 { - reg = <0x0f60000 0x020000>; - label = "env-nor"; - read-only; - }; - - partition@780000 { - reg = <0x0f80000 0x080000>; - label = "u-boot-nor"; - read-only; - }; - }; - - board-control@1,0 { - compatible = "fsl,mpc8548cds-fpga"; - reg = <0x1 0x0 0x1000>; - }; -}; - -&board_soc { - i2c@3000 { - eeprom@50 { - compatible = "atmel,24c64"; - reg = <0x50>; - }; - - eeprom@56 { - compatible = "atmel,24c64"; - reg = <0x56>; - }; - - eeprom@57 { - compatible = "atmel,24c64"; - reg = <0x57>; - }; - }; - - i2c@3100 { - eeprom@50 { - compatible = "atmel,24c64"; - reg = <0x50>; - }; - }; - - enet0: ethernet@24000 { - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - }; - - mdio@24520 { - phy0: ethernet-phy@0 { - interrupts = <5 1 0 0>; - reg = <0x0>; - }; - phy1: ethernet-phy@1 { - interrupts = <5 1 0 0>; - reg = <0x1>; - }; - phy2: ethernet-phy@2 { - interrupts = <5 1 0 0>; - reg = <0x2>; - }; - phy3: ethernet-phy@3 { - interrupts = <5 1 0 0>; - reg = <0x3>; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet1: ethernet@25000 { - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - }; - - mdio@25520 { - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet2: ethernet@26000 { - tbi-handle = <&tbi2>; - phy-handle = <&phy2>; - }; - - mdio@26520 { - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet3: ethernet@27000 { - tbi-handle = <&tbi3>; - phy-handle = <&phy3>; - }; - - mdio@27520 { - tbi3: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; -}; - -&board_pci0 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x4 (PCIX Slot 2) */ - 0x2000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0 - 0x2000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0 - 0x2000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0 - 0x2000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0 - - /* IDSEL 0x5 (PCIX Slot 3) */ - 0x2800 0x0 0x0 0x1 &mpic 0x1 0x1 0 0 - 0x2800 0x0 0x0 0x2 &mpic 0x2 0x1 0 0 - 0x2800 0x0 0x0 0x3 &mpic 0x3 0x1 0 0 - 0x2800 0x0 0x0 0x4 &mpic 0x0 0x1 0 0 - - /* IDSEL 0x6 (PCIX Slot 4) */ - 0x3000 0x0 0x0 0x1 &mpic 0x2 0x1 0 0 - 0x3000 0x0 0x0 0x2 &mpic 0x3 0x1 0 0 - 0x3000 0x0 0x0 0x3 &mpic 0x0 0x1 0 0 - 0x3000 0x0 0x0 0x4 &mpic 0x1 0x1 0 0 - - /* IDSEL 0x8 (PCIX Slot 5) */ - 0x4000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0 - 0x4000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0 - 0x4000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0 - 0x4000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0 - - /* IDSEL 0xC (Tsi310 bridge) */ - 0x6000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0 - 0x6000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0 - 0x6000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0 - 0x6000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0 - - /* IDSEL 0x14 (Slot 2) */ - 0xa000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0 - 0xa000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0 - 0xa000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0 - 0xa000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0 - - /* IDSEL 0x15 (Slot 3) */ - 0xa800 0x0 0x0 0x1 &mpic 0x1 0x1 0 0 - 0xa800 0x0 0x0 0x2 &mpic 0x2 0x1 0 0 - 0xa800 0x0 0x0 0x3 &mpic 0x3 0x1 0 0 - 0xa800 0x0 0x0 0x4 &mpic 0x0 0x1 0 0 - - /* IDSEL 0x16 (Slot 4) */ - 0xb000 0x0 0x0 0x1 &mpic 0x2 0x1 0 0 - 0xb000 0x0 0x0 0x2 &mpic 0x3 0x1 0 0 - 0xb000 0x0 0x0 0x3 &mpic 0x0 0x1 0 0 - 0xb000 0x0 0x0 0x4 &mpic 0x1 0x1 0 0 - - /* IDSEL 0x18 (Slot 5) */ - 0xc000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0 - 0xc000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0 - 0xc000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0 - 0xc000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0 - - /* IDSEL 0x1C (Tsi310 bridge PCI primary) */ - 0xe000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0 - 0xe000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0 - 0xe000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0 - 0xe000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0>; - - pci_bridge@1c { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x00 (PrPMC Site) */ - 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0 - 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0 - 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0 - 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0 - - /* IDSEL 0x04 (VIA chip) */ - 0x2000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0 - 0x2000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0 - 0x2000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0 - 0x2000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0 - - /* IDSEL 0x05 (8139) */ - 0x2800 0x0 0x0 0x1 &mpic 0x1 0x1 0 0 - - /* IDSEL 0x06 (Slot 6) */ - 0x3000 0x0 0x0 0x1 &mpic 0x2 0x1 0 0 - 0x3000 0x0 0x0 0x2 &mpic 0x3 0x1 0 0 - 0x3000 0x0 0x0 0x3 &mpic 0x0 0x1 0 0 - 0x3000 0x0 0x0 0x4 &mpic 0x1 0x1 0 0 - - /* IDESL 0x07 (Slot 7) */ - 0x3800 0x0 0x0 0x1 &mpic 0x3 0x1 0 0 - 0x3800 0x0 0x0 0x2 &mpic 0x0 0x1 0 0 - 0x3800 0x0 0x0 0x3 &mpic 0x1 0x1 0 0 - 0x3800 0x0 0x0 0x4 &mpic 0x2 0x1 0 0>; - - reg = <0xe000 0x0 0x0 0x0 0x0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - ranges = <0x2000000 0x0 0x80000000 - 0x2000000 0x0 0x80000000 - 0x0 0x20000000 - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x80000>; - clock-frequency = <33333333>; - - isa@4 { - device_type = "isa"; - #interrupt-cells = <2>; - #size-cells = <1>; - #address-cells = <2>; - reg = <0x2000 0x0 0x0 0x0 0x0>; - ranges = <0x1 0x0 0x1000000 0x0 0x0 0x1000>; - interrupt-parent = <&i8259>; - - i8259: interrupt-controller@20 { - interrupt-controller; - device_type = "interrupt-controller"; - reg = <0x1 0x20 0x2 - 0x1 0xa0 0x2 - 0x1 0x4d0 0x2>; - #address-cells = <0>; - #interrupt-cells = <2>; - compatible = "chrp,iic"; - interrupts = <0 1 0 0>; - interrupt-parent = <&mpic>; - }; - - rtc@70 { - compatible = "pnpPNP,b00"; - reg = <0x1 0x70 0x2>; - }; - }; - }; -}; diff --git a/dts/src/powerpc/fsl/mpc8548cds_32b.dts b/dts/src/powerpc/fsl/mpc8548cds_32b.dts deleted file mode 100644 index f6ba4a9827..0000000000 --- a/dts/src/powerpc/fsl/mpc8548cds_32b.dts +++ /dev/null @@ -1,82 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * MPC8548 CDS Device Tree Source (32-bit address map) - * - * Copyright 2006, 2008, 2011-2012 Freescale Semiconductor Inc. - */ - -/include/ "mpc8548si-pre.dtsi" - -/ { - model = "MPC8548CDS"; - compatible = "MPC8548CDS", "MPC85xxCDS"; - - memory { - device_type = "memory"; - reg = <0 0 0x0 0x8000000>; // 128M at 0x0 - }; - - board_lbc: lbc: localbus@e0005000 { - reg = <0 0xe0005000 0 0x1000>; - - ranges = <0x0 0x0 0x0 0xff000000 0x01000000 - 0x1 0x0 0x0 0xf8004000 0x00001000>; - - }; - - board_soc: soc: soc8548@e0000000 { - ranges = <0 0x0 0xe0000000 0x100000>; - }; - - board_pci0: pci0: pci@e0008000 { - reg = <0 0xe0008000 0 0x1000>; - ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x10000000 - 0x1000000 0x0 0x00000000 0 0xe2000000 0x0 0x800000>; - clock-frequency = <66666666>; - }; - - pci1: pci@e0009000 { - reg = <0 0xe0009000 0 0x1000>; - ranges = <0x2000000 0x0 0x90000000 0 0x90000000 0x0 0x10000000 - 0x1000000 0x0 0x00000000 0 0xe2800000 0x0 0x800000>; - clock-frequency = <66666666>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x15 */ - 0xa800 0x0 0x0 0x1 &mpic 0xb 0x1 0 0 - 0xa800 0x0 0x0 0x2 &mpic 0x1 0x1 0 0 - 0xa800 0x0 0x0 0x3 &mpic 0x2 0x1 0 0 - 0xa800 0x0 0x0 0x4 &mpic 0x3 0x1 0 0>; - }; - - pci2: pcie@e000a000 { - reg = <0 0xe000a000 0 0x1000>; - ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xe3000000 0x0 0x100000>; - pcie@0 { - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - rio: rapidio@e00c0000 { - reg = <0x0 0xe00c0000 0x0 0x20000>; - port1 { - ranges = <0x0 0x0 0x0 0xc0000000 0x0 0x20000000>; - }; - }; -}; - -/* - * mpc8548cds.dtsi must be last to ensure board_pci0 overrides pci0 settings - * for interrupt-map & interrupt-map-mask. - */ - -/include/ "mpc8548si-post.dtsi" -/include/ "mpc8548cds.dtsi" diff --git a/dts/src/powerpc/fsl/mpc8548cds_36b.dts b/dts/src/powerpc/fsl/mpc8548cds_36b.dts deleted file mode 100644 index 32e9076375..0000000000 --- a/dts/src/powerpc/fsl/mpc8548cds_36b.dts +++ /dev/null @@ -1,82 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * MPC8548 CDS Device Tree Source (36-bit address map) - * - * Copyright 2012 Freescale Semiconductor Inc. - */ - -/include/ "mpc8548si-pre.dtsi" - -/ { - model = "MPC8548CDS"; - compatible = "MPC8548CDS", "MPC85xxCDS"; - - memory { - device_type = "memory"; - reg = <0 0 0x0 0x8000000>; // 128M at 0x0 - }; - - board_lbc: lbc: localbus@fe0005000 { - reg = <0xf 0xe0005000 0 0x1000>; - - ranges = <0x0 0x0 0xf 0xff000000 0x01000000 - 0x1 0x0 0xf 0xf8004000 0x00001000>; - - }; - - board_soc: soc: soc8548@fe0000000 { - ranges = <0 0xf 0xe0000000 0x100000>; - }; - - board_pci0: pci0: pci@fe0008000 { - reg = <0xf 0xe0008000 0 0x1000>; - ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x10000000 - 0x1000000 0x0 0x00000000 0xf 0xe2000000 0x0 0x800000>; - clock-frequency = <66666666>; - }; - - pci1: pci@fe0009000 { - reg = <0xf 0xe0009000 0 0x1000>; - ranges = <0x2000000 0x0 0xe0000000 0xc 0x10000000 0x0 0x10000000 - 0x1000000 0x0 0x00000000 0xf 0xe2800000 0x0 0x800000>; - clock-frequency = <66666666>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x15 */ - 0xa800 0x0 0x0 0x1 &mpic 0xb 0x1 0 0 - 0xa800 0x0 0x0 0x2 &mpic 0x1 0x1 0 0 - 0xa800 0x0 0x0 0x3 &mpic 0x2 0x1 0 0 - 0xa800 0x0 0x0 0x4 &mpic 0x3 0x1 0 0>; - }; - - pci2: pcie@fe000a000 { - reg = <0xf 0xe000a000 0 0x1000>; - ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xe3000000 0x0 0x100000>; - pcie@0 { - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - rio: rapidio@fe00c0000 { - reg = <0xf 0xe00c0000 0x0 0x20000>; - port1 { - ranges = <0x0 0x0 0xc 0x40000000 0x0 0x20000000>; - }; - }; -}; - -/* - * mpc8548cds.dtsi must be last to ensure board_pci0 overrides pci0 settings - * for interrupt-map & interrupt-map-mask. - */ - -/include/ "mpc8548si-post.dtsi" -/include/ "mpc8548cds.dtsi" diff --git a/dts/src/powerpc/fsl/mpc8555cds.dts b/dts/src/powerpc/fsl/mpc8555cds.dts deleted file mode 100644 index 9f58db2a7e..0000000000 --- a/dts/src/powerpc/fsl/mpc8555cds.dts +++ /dev/null @@ -1,375 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * MPC8555 CDS Device Tree Source - * - * Copyright 2006, 2008 Freescale Semiconductor Inc. - */ - -/dts-v1/; - -/include/ "e500v2_power_isa.dtsi" - -/ { - model = "MPC8555CDS"; - compatible = "MPC8555CDS", "MPC85xxCDS"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8555@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; // 33 MHz, from uboot - bus-frequency = <0>; // 166 MHz - clock-frequency = <0>; // 825 MHz, from uboot - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x8000000>; // 128M at 0x0 - }; - - soc8555@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x100000>; - bus-frequency = <0>; - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <8>; - }; - - ecm@1000 { - compatible = "fsl,mpc8555-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8555-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8555-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x40000>; // L2, 256K - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8555-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8555-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8555-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8555-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8555-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@0 { - interrupt-parent = <&mpic>; - interrupts = <5 1>; - reg = <0x0>; - }; - phy1: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <5 1>; - reg = <0x1>; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - crypto@30000 { - compatible = "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <45 2>; - interrupt-parent = <&mpic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x7e>; - fsl,descriptor-types-mask = <0x01010ebf>; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - - cpm@919c0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8555-cpm", "fsl,cpm2"; - reg = <0x919c0 0x30>; - ranges; - - muram@80000 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x80000 0x10000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0x0 0x2000 0x9000 0x1000>; - }; - }; - - brg@919f0 { - compatible = "fsl,mpc8555-brg", - "fsl,cpm2-brg", - "fsl,cpm-brg"; - reg = <0x919f0 0x10 0x915f0 0x10>; - }; - - cpmpic: pic@90c00 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - interrupts = <46 2>; - interrupt-parent = <&mpic>; - reg = <0x90c00 0x80>; - compatible = "fsl,mpc8555-cpm-pic", "fsl,cpm2-pic"; - }; - }; - }; - - pci0: pci@e0008000 { - interrupt-map-mask = <0x1f800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x10 */ - 0x8000 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x8000 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x8000 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x8000 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 0x11 */ - 0x8800 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x8800 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x8800 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x8800 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 0x12 (Slot 1) */ - 0x9000 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x9000 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x9000 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x9000 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 0x13 (Slot 2) */ - 0x9800 0x0 0x0 0x1 &mpic 0x1 0x1 - 0x9800 0x0 0x0 0x2 &mpic 0x2 0x1 - 0x9800 0x0 0x0 0x3 &mpic 0x3 0x1 - 0x9800 0x0 0x0 0x4 &mpic 0x0 0x1 - - /* IDSEL 0x14 (Slot 3) */ - 0xa000 0x0 0x0 0x1 &mpic 0x2 0x1 - 0xa000 0x0 0x0 0x2 &mpic 0x3 0x1 - 0xa000 0x0 0x0 0x3 &mpic 0x0 0x1 - 0xa000 0x0 0x0 0x4 &mpic 0x1 0x1 - - /* IDSEL 0x15 (Slot 4) */ - 0xa800 0x0 0x0 0x1 &mpic 0x3 0x1 - 0xa800 0x0 0x0 0x2 &mpic 0x0 0x1 - 0xa800 0x0 0x0 0x3 &mpic 0x1 0x1 - 0xa800 0x0 0x0 0x4 &mpic 0x2 0x1 - - /* Bus 1 (Tundra Bridge) */ - /* IDSEL 0x12 (ISA bridge) */ - 0x19000 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x19000 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x19000 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x19000 0x0 0x0 0x4 &mpic 0x3 0x1>; - interrupt-parent = <&mpic>; - interrupts = <24 2>; - bus-range = <0 0>; - ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x0 0xe2000000 0x0 0x100000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008000 0x1000>; - compatible = "fsl,mpc8540-pci"; - device_type = "pci"; - - i8259@19000 { - interrupt-controller; - device_type = "interrupt-controller"; - reg = <0x19000 0x0 0x0 0x0 0x1>; - #address-cells = <0>; - #interrupt-cells = <2>; - compatible = "chrp,iic"; - interrupts = <1>; - interrupt-parent = <&pci0>; - }; - }; - - pci1: pci@e0009000 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x15 */ - 0xa800 0x0 0x0 0x1 &mpic 0xb 0x1 - 0xa800 0x0 0x0 0x2 &mpic 0xb 0x1 - 0xa800 0x0 0x0 0x3 &mpic 0xb 0x1 - 0xa800 0x0 0x0 0x4 &mpic 0xb 0x1>; - interrupt-parent = <&mpic>; - interrupts = <25 2>; - bus-range = <0 0>; - ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x0 0xe3000000 0x0 0x100000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0009000 0x1000>; - compatible = "fsl,mpc8540-pci"; - device_type = "pci"; - }; -}; diff --git a/dts/src/powerpc/fsl/mpc8560ads.dts b/dts/src/powerpc/fsl/mpc8560ads.dts deleted file mode 100644 index a24722ccae..0000000000 --- a/dts/src/powerpc/fsl/mpc8560ads.dts +++ /dev/null @@ -1,388 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * MPC8560 ADS Device Tree Source - * - * Copyright 2006, 2008 Freescale Semiconductor Inc. - */ - -/dts-v1/; - -/include/ "e500v2_power_isa.dtsi" - -/ { - model = "MPC8560ADS"; - compatible = "MPC8560ADS", "MPC85xxADS"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - ethernet3 = &enet3; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8560@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <82500000>; - bus-frequency = <330000000>; - clock-frequency = <825000000>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x10000000>; - }; - - soc8560@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x100000>; - bus-frequency = <330000000>; - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <8>; - }; - - ecm@1000 { - compatible = "fsl,mpc8560-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8540-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8540-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x40000>; // L2, 256K - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8560-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8560-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8560-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8560-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@0 { - interrupt-parent = <&mpic>; - interrupts = <5 1>; - reg = <0x0>; - }; - phy1: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <5 1>; - reg = <0x1>; - }; - phy2: ethernet-phy@2 { - interrupt-parent = <&mpic>; - interrupts = <7 1>; - reg = <0x2>; - }; - phy3: ethernet-phy@3 { - interrupt-parent = <&mpic>; - interrupts = <7 1>; - reg = <0x3>; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - - cpm@919c0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8560-cpm", "fsl,cpm2"; - reg = <0x919c0 0x30>; - ranges; - - muram@80000 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x80000 0x10000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0x0 0x4000 0x9000 0x2000>; - }; - }; - - brg@919f0 { - compatible = "fsl,mpc8560-brg", - "fsl,cpm2-brg", - "fsl,cpm-brg"; - reg = <0x919f0 0x10 0x915f0 0x10>; - clock-frequency = <165000000>; - }; - - cpmpic: pic@90c00 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - interrupts = <46 2>; - interrupt-parent = <&mpic>; - reg = <0x90c00 0x80>; - compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic"; - }; - - serial0: serial@91a00 { - device_type = "serial"; - compatible = "fsl,mpc8560-scc-uart", - "fsl,cpm2-scc-uart"; - reg = <0x91a00 0x20 0x88000 0x100>; - fsl,cpm-brg = <1>; - fsl,cpm-command = <0x800000>; - current-speed = <115200>; - interrupts = <40 8>; - interrupt-parent = <&cpmpic>; - }; - - serial1: serial@91a20 { - device_type = "serial"; - compatible = "fsl,mpc8560-scc-uart", - "fsl,cpm2-scc-uart"; - reg = <0x91a20 0x20 0x88100 0x100>; - fsl,cpm-brg = <2>; - fsl,cpm-command = <0x4a00000>; - current-speed = <115200>; - interrupts = <41 8>; - interrupt-parent = <&cpmpic>; - }; - - enet2: ethernet@91320 { - device_type = "network"; - compatible = "fsl,mpc8560-fcc-enet", - "fsl,cpm2-fcc-enet"; - reg = <0x91320 0x20 0x88500 0x100 0x913b0 0x1>; - local-mac-address = [ 00 00 00 00 00 00 ]; - fsl,cpm-command = <0x16200300>; - interrupts = <33 8>; - interrupt-parent = <&cpmpic>; - phy-handle = <&phy2>; - }; - - enet3: ethernet@91340 { - device_type = "network"; - compatible = "fsl,mpc8560-fcc-enet", - "fsl,cpm2-fcc-enet"; - reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>; - local-mac-address = [ 00 00 00 00 00 00 ]; - fsl,cpm-command = <0x1a400300>; - interrupts = <34 8>; - interrupt-parent = <&cpmpic>; - phy-handle = <&phy3>; - }; - }; - }; - - pci0: pci@e0008000 { - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; - device_type = "pci"; - reg = <0xe0008000 0x1000>; - clock-frequency = <66666666>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x2 */ - 0x1000 0x0 0x0 0x1 &mpic 0x1 0x1 - 0x1000 0x0 0x0 0x2 &mpic 0x2 0x1 - 0x1000 0x0 0x0 0x3 &mpic 0x3 0x1 - 0x1000 0x0 0x0 0x4 &mpic 0x4 0x1 - - /* IDSEL 0x3 */ - 0x1800 0x0 0x0 0x1 &mpic 0x4 0x1 - 0x1800 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x1800 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x1800 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 0x4 */ - 0x2000 0x0 0x0 0x1 &mpic 0x3 0x1 - 0x2000 0x0 0x0 0x2 &mpic 0x4 0x1 - 0x2000 0x0 0x0 0x3 &mpic 0x1 0x1 - 0x2000 0x0 0x0 0x4 &mpic 0x2 0x1 - - /* IDSEL 0x5 */ - 0x2800 0x0 0x0 0x1 &mpic 0x2 0x1 - 0x2800 0x0 0x0 0x2 &mpic 0x3 0x1 - 0x2800 0x0 0x0 0x3 &mpic 0x4 0x1 - 0x2800 0x0 0x0 0x4 &mpic 0x1 0x1 - - /* IDSEL 12 */ - 0x6000 0x0 0x0 0x1 &mpic 0x1 0x1 - 0x6000 0x0 0x0 0x2 &mpic 0x2 0x1 - 0x6000 0x0 0x0 0x3 &mpic 0x3 0x1 - 0x6000 0x0 0x0 0x4 &mpic 0x4 0x1 - - /* IDSEL 13 */ - 0x6800 0x0 0x0 0x1 &mpic 0x4 0x1 - 0x6800 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x6800 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x6800 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 14*/ - 0x7000 0x0 0x0 0x1 &mpic 0x3 0x1 - 0x7000 0x0 0x0 0x2 &mpic 0x4 0x1 - 0x7000 0x0 0x0 0x3 &mpic 0x1 0x1 - 0x7000 0x0 0x0 0x4 &mpic 0x2 0x1 - - /* IDSEL 15 */ - 0x7800 0x0 0x0 0x1 &mpic 0x2 0x1 - 0x7800 0x0 0x0 0x2 &mpic 0x3 0x1 - 0x7800 0x0 0x0 0x3 &mpic 0x4 0x1 - 0x7800 0x0 0x0 0x4 &mpic 0x1 0x1 - - /* IDSEL 18 */ - 0x9000 0x0 0x0 0x1 &mpic 0x1 0x1 - 0x9000 0x0 0x0 0x2 &mpic 0x2 0x1 - 0x9000 0x0 0x0 0x3 &mpic 0x3 0x1 - 0x9000 0x0 0x0 0x4 &mpic 0x4 0x1 - - /* IDSEL 19 */ - 0x9800 0x0 0x0 0x1 &mpic 0x4 0x1 - 0x9800 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x9800 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x9800 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 20 */ - 0xa000 0x0 0x0 0x1 &mpic 0x3 0x1 - 0xa000 0x0 0x0 0x2 &mpic 0x4 0x1 - 0xa000 0x0 0x0 0x3 &mpic 0x1 0x1 - 0xa000 0x0 0x0 0x4 &mpic 0x2 0x1 - - /* IDSEL 21 */ - 0xa800 0x0 0x0 0x1 &mpic 0x2 0x1 - 0xa800 0x0 0x0 0x2 &mpic 0x3 0x1 - 0xa800 0x0 0x0 0x3 &mpic 0x4 0x1 - 0xa800 0x0 0x0 0x4 &mpic 0x1 0x1>; - - interrupt-parent = <&mpic>; - interrupts = <24 2>; - bus-range = <0 0>; - ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x0 0xe2000000 0x0 0x1000000>; - }; -}; diff --git a/dts/src/powerpc/fsl/mpc8641_hpcn.dts b/dts/src/powerpc/fsl/mpc8641_hpcn.dts deleted file mode 100644 index f7a2430d66..0000000000 --- a/dts/src/powerpc/fsl/mpc8641_hpcn.dts +++ /dev/null @@ -1,394 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * MPC8641 HPCN Device Tree Source - * - * Copyright 2006 Freescale Semiconductor Inc. - */ - -/include/ "mpc8641si-pre.dtsi" - -/ { - model = "MPC8641HPCN"; - compatible = "fsl,mpc8641hpcn"; - - memory { - device_type = "memory"; - reg = <0x00000000 0x40000000>; // 1G at 0x0 - }; - - lbc: localbus@ffe05000 { - reg = <0xffe05000 0x1000>; - - ranges = <0 0 0xef800000 0x00800000 - 2 0 0xffdf8000 0x00008000 - 3 0 0xffdf0000 0x00008000>; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x00800000>; - bank-width = <2>; - device-width = <2>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "kernel"; - reg = <0x00000000 0x00300000>; - }; - partition@300000 { - label = "firmware b"; - reg = <0x00300000 0x00100000>; - read-only; - }; - partition@400000 { - label = "fs"; - reg = <0x00400000 0x00300000>; - }; - partition@700000 { - label = "firmware a"; - reg = <0x00700000 0x00100000>; - read-only; - }; - }; - }; - - soc: soc8641@ffe00000 { - ranges = <0x00000000 0xffe00000 0x00100000>; - - enet0: ethernet@24000 { - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - phy-connection-type = "rgmii-id"; - }; - - mdio@24520 { - phy0: ethernet-phy@0 { - interrupts = <10 1 0 0>; - reg = <0>; - }; - phy1: ethernet-phy@1 { - interrupts = <10 1 0 0>; - reg = <1>; - }; - phy2: ethernet-phy@2 { - interrupts = <10 1 0 0>; - reg = <2>; - }; - phy3: ethernet-phy@3 { - interrupts = <10 1 0 0>; - reg = <3>; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet1: ethernet@25000 { - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - phy-connection-type = "rgmii-id"; - }; - - mdio@25520 { - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet2: ethernet@26000 { - tbi-handle = <&tbi2>; - phy-handle = <&phy2>; - phy-connection-type = "rgmii-id"; - }; - - mdio@26520 { - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet3: ethernet@27000 { - tbi-handle = <&tbi3>; - phy-handle = <&phy3>; - phy-connection-type = "rgmii-id"; - }; - - mdio@27520 { - tbi3: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - rmu: rmu@d3000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,srio-rmu"; - reg = <0xd3000 0x500>; - ranges = <0x0 0xd3000 0x500>; - - message-unit@0 { - compatible = "fsl,srio-msg-unit"; - reg = <0x0 0x100>; - interrupts = < - 53 2 0 0 /* msg1_tx_irq */ - 54 2 0 0>;/* msg1_rx_irq */ - }; - message-unit@100 { - compatible = "fsl,srio-msg-unit"; - reg = <0x100 0x100>; - interrupts = < - 55 2 0 0 /* msg2_tx_irq */ - 56 2 0 0>;/* msg2_rx_irq */ - }; - doorbell-unit@400 { - compatible = "fsl,srio-dbell-unit"; - reg = <0x400 0x80>; - interrupts = < - 49 2 0 0 /* bell_outb_irq */ - 50 2 0 0>;/* bell_inb_irq */ - }; - port-write-unit@4e0 { - compatible = "fsl,srio-port-write-unit"; - reg = <0x4e0 0x20>; - interrupts = <48 2 0 0>; - }; - }; - }; - - pci0: pcie@ffe08000 { - reg = <0xffe08000 0x1000>; - ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000 - 0x01000000 0x0 0x00000000 0xffc00000 0x0 0x00010000>; - interrupt-map-mask = <0xff00 0 0 7>; - interrupt-map = < - /* IDSEL 0x11 func 0 - PCI slot 1 */ - 0x8800 0 0 1 &mpic 2 1 0 0 - 0x8800 0 0 2 &mpic 3 1 0 0 - 0x8800 0 0 3 &mpic 4 1 0 0 - 0x8800 0 0 4 &mpic 1 1 0 0 - - /* IDSEL 0x11 func 1 - PCI slot 1 */ - 0x8900 0 0 1 &mpic 2 1 0 0 - 0x8900 0 0 2 &mpic 3 1 0 0 - 0x8900 0 0 3 &mpic 4 1 0 0 - 0x8900 0 0 4 &mpic 1 1 0 0 - - /* IDSEL 0x11 func 2 - PCI slot 1 */ - 0x8a00 0 0 1 &mpic 2 1 0 0 - 0x8a00 0 0 2 &mpic 3 1 0 0 - 0x8a00 0 0 3 &mpic 4 1 0 0 - 0x8a00 0 0 4 &mpic 1 1 0 0 - - /* IDSEL 0x11 func 3 - PCI slot 1 */ - 0x8b00 0 0 1 &mpic 2 1 0 0 - 0x8b00 0 0 2 &mpic 3 1 0 0 - 0x8b00 0 0 3 &mpic 4 1 0 0 - 0x8b00 0 0 4 &mpic 1 1 0 0 - - /* IDSEL 0x11 func 4 - PCI slot 1 */ - 0x8c00 0 0 1 &mpic 2 1 0 0 - 0x8c00 0 0 2 &mpic 3 1 0 0 - 0x8c00 0 0 3 &mpic 4 1 0 0 - 0x8c00 0 0 4 &mpic 1 1 0 0 - - /* IDSEL 0x11 func 5 - PCI slot 1 */ - 0x8d00 0 0 1 &mpic 2 1 0 0 - 0x8d00 0 0 2 &mpic 3 1 0 0 - 0x8d00 0 0 3 &mpic 4 1 0 0 - 0x8d00 0 0 4 &mpic 1 1 0 0 - - /* IDSEL 0x11 func 6 - PCI slot 1 */ - 0x8e00 0 0 1 &mpic 2 1 0 0 - 0x8e00 0 0 2 &mpic 3 1 0 0 - 0x8e00 0 0 3 &mpic 4 1 0 0 - 0x8e00 0 0 4 &mpic 1 1 0 0 - - /* IDSEL 0x11 func 7 - PCI slot 1 */ - 0x8f00 0 0 1 &mpic 2 1 0 0 - 0x8f00 0 0 2 &mpic 3 1 0 0 - 0x8f00 0 0 3 &mpic 4 1 0 0 - 0x8f00 0 0 4 &mpic 1 1 0 0 - - /* IDSEL 0x12 func 0 - PCI slot 2 */ - 0x9000 0 0 1 &mpic 3 1 0 0 - 0x9000 0 0 2 &mpic 4 1 0 0 - 0x9000 0 0 3 &mpic 1 1 0 0 - 0x9000 0 0 4 &mpic 2 1 0 0 - - /* IDSEL 0x12 func 1 - PCI slot 2 */ - 0x9100 0 0 1 &mpic 3 1 0 0 - 0x9100 0 0 2 &mpic 4 1 0 0 - 0x9100 0 0 3 &mpic 1 1 0 0 - 0x9100 0 0 4 &mpic 2 1 0 0 - - /* IDSEL 0x12 func 2 - PCI slot 2 */ - 0x9200 0 0 1 &mpic 3 1 0 0 - 0x9200 0 0 2 &mpic 4 1 0 0 - 0x9200 0 0 3 &mpic 1 1 0 0 - 0x9200 0 0 4 &mpic 2 1 0 0 - - /* IDSEL 0x12 func 3 - PCI slot 2 */ - 0x9300 0 0 1 &mpic 3 1 0 0 - 0x9300 0 0 2 &mpic 4 1 0 0 - 0x9300 0 0 3 &mpic 1 1 0 0 - 0x9300 0 0 4 &mpic 2 1 0 0 - - /* IDSEL 0x12 func 4 - PCI slot 2 */ - 0x9400 0 0 1 &mpic 3 1 0 0 - 0x9400 0 0 2 &mpic 4 1 0 0 - 0x9400 0 0 3 &mpic 1 1 0 0 - 0x9400 0 0 4 &mpic 2 1 0 0 - - /* IDSEL 0x12 func 5 - PCI slot 2 */ - 0x9500 0 0 1 &mpic 3 1 0 0 - 0x9500 0 0 2 &mpic 4 1 0 0 - 0x9500 0 0 3 &mpic 1 1 0 0 - 0x9500 0 0 4 &mpic 2 1 0 0 - - /* IDSEL 0x12 func 6 - PCI slot 2 */ - 0x9600 0 0 1 &mpic 3 1 0 0 - 0x9600 0 0 2 &mpic 4 1 0 0 - 0x9600 0 0 3 &mpic 1 1 0 0 - 0x9600 0 0 4 &mpic 2 1 0 0 - - /* IDSEL 0x12 func 7 - PCI slot 2 */ - 0x9700 0 0 1 &mpic 3 1 0 0 - 0x9700 0 0 2 &mpic 4 1 0 0 - 0x9700 0 0 3 &mpic 1 1 0 0 - 0x9700 0 0 4 &mpic 2 1 0 0 - - // IDSEL 0x1c USB - 0xe000 0 0 1 &i8259 12 2 - 0xe100 0 0 2 &i8259 9 2 - 0xe200 0 0 3 &i8259 10 2 - 0xe300 0 0 4 &i8259 11 2 - - // IDSEL 0x1d Audio - 0xe800 0 0 1 &i8259 6 2 - - // IDSEL 0x1e Legacy - 0xf000 0 0 1 &i8259 7 2 - 0xf100 0 0 1 &i8259 7 2 - - // IDSEL 0x1f IDE/SATA - 0xf800 0 0 1 &i8259 14 2 - 0xf900 0 0 1 &i8259 5 2 - >; - - pcie@0 { - ranges = <0x02000000 0x0 0x80000000 - 0x02000000 0x0 0x80000000 - 0x0 0x20000000 - - 0x01000000 0x0 0x00000000 - 0x01000000 0x0 0x00000000 - 0x0 0x00010000>; - uli1575@0 { - reg = <0 0 0 0 0>; - #size-cells = <2>; - #address-cells = <3>; - ranges = <0x02000000 0x0 0x80000000 - 0x02000000 0x0 0x80000000 - 0x0 0x20000000 - 0x01000000 0x0 0x00000000 - 0x01000000 0x0 0x00000000 - 0x0 0x00010000>; - isa@1e { - device_type = "isa"; - #size-cells = <1>; - #address-cells = <2>; - reg = <0xf000 0 0 0 0>; - ranges = <1 0 0x01000000 0 0 - 0x00001000>; - interrupt-parent = <&i8259>; - - i8259: interrupt-controller@20 { - reg = <1 0x20 2 - 1 0xa0 2 - 1 0x4d0 2>; - interrupt-controller; - device_type = "interrupt-controller"; - #address-cells = <0>; - #interrupt-cells = <2>; - compatible = "chrp,iic"; - interrupts = <9 2 0 0>; - }; - - i8042@60 { - #size-cells = <0>; - #address-cells = <1>; - reg = <1 0x60 1 1 0x64 1>; - interrupts = <1 3 12 3>; - interrupt-parent = <&i8259>; - - keyboard@0 { - reg = <0>; - compatible = "pnpPNP,303"; - }; - - mouse@1 { - reg = <1>; - compatible = "pnpPNP,f03"; - }; - }; - - rtc@70 { - compatible = - "pnpPNP,b00"; - reg = <1 0x70 2>; - }; - - gpio@400 { - reg = <1 0x400 0x80>; - }; - }; - }; - }; - - }; - - pci1: pcie@ffe09000 { - reg = <0xffe09000 0x1000>; - ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000 - 0x01000000 0x0 0x00000000 0xffc10000 0x0 0x00010000>; - - pcie@0 { - ranges = <0x02000000 0x0 0xa0000000 - 0x02000000 0x0 0xa0000000 - 0x0 0x20000000 - - 0x01000000 0x0 0x00000000 - 0x01000000 0x0 0x00000000 - 0x0 0x00010000>; - }; - }; -/* - * Only one of Rapid IO or PCI can be present due to HW limitations and - * due to the fact that the 2 now share address space in the new memory - * map. The most likely case is that we have PCI, so comment out the - * rapidio node. Leave it here for reference. - - rapidio@ffec0000 { - reg = <0xffec0000 0x11000>; - compatible = "fsl,srio"; - interrupts = <48 2 0 0>; - #address-cells = <2>; - #size-cells = <2>; - fsl,srio-rmu-handle = <&rmu>; - ranges; - - port1 { - #address-cells = <2>; - #size-cells = <2>; - cell-index = <1>; - ranges = <0 0 0x80000000 0 0x20000000>; - }; - }; -*/ - -}; - -/include/ "mpc8641si-post.dtsi" diff --git a/dts/src/powerpc/fsl/mpc8641_hpcn_36b.dts b/dts/src/powerpc/fsl/mpc8641_hpcn_36b.dts deleted file mode 100644 index 3f5f7a99b9..0000000000 --- a/dts/src/powerpc/fsl/mpc8641_hpcn_36b.dts +++ /dev/null @@ -1,337 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * MPC8641 HPCN Device Tree Source - * - * Copyright 2008-2009 Freescale Semiconductor Inc. - */ - -/include/ "mpc8641si-pre.dtsi" - -/ { - model = "MPC8641HPCN"; - compatible = "fsl,mpc8641hpcn"; - #address-cells = <2>; - #size-cells = <2>; - - memory { - device_type = "memory"; - reg = <0x0 0x00000000 0x0 0x40000000>; // 1G at 0x0 - }; - - lbc: localbus@fffe05000 { - reg = <0x0f 0xffe05000 0x0 0x1000>; - - ranges = <0 0 0xf 0xef800000 0x00800000 - 2 0 0xf 0xffdf8000 0x00008000 - 3 0 0xf 0xffdf0000 0x00008000>; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x00800000>; - bank-width = <2>; - device-width = <2>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "kernel"; - reg = <0x00000000 0x00300000>; - }; - partition@300000 { - label = "firmware b"; - reg = <0x00300000 0x00100000>; - read-only; - }; - partition@400000 { - label = "fs"; - reg = <0x00400000 0x00300000>; - }; - partition@700000 { - label = "firmware a"; - reg = <0x00700000 0x00100000>; - read-only; - }; - }; - }; - - soc: soc8641@fffe00000 { - ranges = <0x00000000 0x0f 0xffe00000 0x00100000>; - - enet0: ethernet@24000 { - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - phy-connection-type = "rgmii-id"; - }; - - mdio@24520 { - phy0: ethernet-phy@0 { - interrupts = <10 1 0 0>; - reg = <0>; - }; - phy1: ethernet-phy@1 { - interrupts = <10 1 0 0>; - reg = <1>; - }; - phy2: ethernet-phy@2 { - interrupts = <10 1 0 0>; - reg = <2>; - }; - phy3: ethernet-phy@3 { - interrupts = <10 1 0 0>; - reg = <3>; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet1: ethernet@25000 { - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - phy-connection-type = "rgmii-id"; - }; - - mdio@25520 { - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet2: ethernet@26000 { - tbi-handle = <&tbi2>; - phy-handle = <&phy2>; - phy-connection-type = "rgmii-id"; - }; - - mdio@26520 { - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet3: ethernet@27000 { - tbi-handle = <&tbi3>; - phy-handle = <&phy3>; - phy-connection-type = "rgmii-id"; - }; - - mdio@27520 { - tbi3: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - pci0: pcie@fffe08000 { - reg = <0x0f 0xffe08000 0x0 0x1000>; - ranges = <0x02000000 0x0 0xe0000000 0x0c 0x00000000 0x0 0x20000000 - 0x01000000 0x0 0x00000000 0x0f 0xffc00000 0x0 0x00010000>; - interrupt-map-mask = <0xff00 0 0 7>; - interrupt-map = < - /* IDSEL 0x11 func 0 - PCI slot 1 */ - 0x8800 0 0 1 &mpic 2 1 0 0 - 0x8800 0 0 2 &mpic 3 1 0 0 - 0x8800 0 0 3 &mpic 4 1 0 0 - 0x8800 0 0 4 &mpic 1 1 0 0 - - /* IDSEL 0x11 func 1 - PCI slot 1 */ - 0x8900 0 0 1 &mpic 2 1 0 0 - 0x8900 0 0 2 &mpic 3 1 0 0 - 0x8900 0 0 3 &mpic 4 1 0 0 - 0x8900 0 0 4 &mpic 1 1 0 0 - - /* IDSEL 0x11 func 2 - PCI slot 1 */ - 0x8a00 0 0 1 &mpic 2 1 0 0 - 0x8a00 0 0 2 &mpic 3 1 0 0 - 0x8a00 0 0 3 &mpic 4 1 0 0 - 0x8a00 0 0 4 &mpic 1 1 0 0 - - /* IDSEL 0x11 func 3 - PCI slot 1 */ - 0x8b00 0 0 1 &mpic 2 1 0 0 - 0x8b00 0 0 2 &mpic 3 1 0 0 - 0x8b00 0 0 3 &mpic 4 1 0 0 - 0x8b00 0 0 4 &mpic 1 1 0 0 - - /* IDSEL 0x11 func 4 - PCI slot 1 */ - 0x8c00 0 0 1 &mpic 2 1 0 0 - 0x8c00 0 0 2 &mpic 3 1 0 0 - 0x8c00 0 0 3 &mpic 4 1 0 0 - 0x8c00 0 0 4 &mpic 1 1 0 0 - - /* IDSEL 0x11 func 5 - PCI slot 1 */ - 0x8d00 0 0 1 &mpic 2 1 0 0 - 0x8d00 0 0 2 &mpic 3 1 0 0 - 0x8d00 0 0 3 &mpic 4 1 0 0 - 0x8d00 0 0 4 &mpic 1 1 0 0 - - /* IDSEL 0x11 func 6 - PCI slot 1 */ - 0x8e00 0 0 1 &mpic 2 1 0 0 - 0x8e00 0 0 2 &mpic 3 1 0 0 - 0x8e00 0 0 3 &mpic 4 1 0 0 - 0x8e00 0 0 4 &mpic 1 1 0 0 - - /* IDSEL 0x11 func 7 - PCI slot 1 */ - 0x8f00 0 0 1 &mpic 2 1 0 0 - 0x8f00 0 0 2 &mpic 3 1 0 0 - 0x8f00 0 0 3 &mpic 4 1 0 0 - 0x8f00 0 0 4 &mpic 1 1 0 0 - - /* IDSEL 0x12 func 0 - PCI slot 2 */ - 0x9000 0 0 1 &mpic 3 1 0 0 - 0x9000 0 0 2 &mpic 4 1 0 0 - 0x9000 0 0 3 &mpic 1 1 0 0 - 0x9000 0 0 4 &mpic 2 1 0 0 - - /* IDSEL 0x12 func 1 - PCI slot 2 */ - 0x9100 0 0 1 &mpic 3 1 0 0 - 0x9100 0 0 2 &mpic 4 1 0 0 - 0x9100 0 0 3 &mpic 1 1 0 0 - 0x9100 0 0 4 &mpic 2 1 0 0 - - /* IDSEL 0x12 func 2 - PCI slot 2 */ - 0x9200 0 0 1 &mpic 3 1 0 0 - 0x9200 0 0 2 &mpic 4 1 0 0 - 0x9200 0 0 3 &mpic 1 1 0 0 - 0x9200 0 0 4 &mpic 2 1 0 0 - - /* IDSEL 0x12 func 3 - PCI slot 2 */ - 0x9300 0 0 1 &mpic 3 1 0 0 - 0x9300 0 0 2 &mpic 4 1 0 0 - 0x9300 0 0 3 &mpic 1 1 0 0 - 0x9300 0 0 4 &mpic 2 1 0 0 - - /* IDSEL 0x12 func 4 - PCI slot 2 */ - 0x9400 0 0 1 &mpic 3 1 0 0 - 0x9400 0 0 2 &mpic 4 1 0 0 - 0x9400 0 0 3 &mpic 1 1 0 0 - 0x9400 0 0 4 &mpic 2 1 0 0 - - /* IDSEL 0x12 func 5 - PCI slot 2 */ - 0x9500 0 0 1 &mpic 3 1 0 0 - 0x9500 0 0 2 &mpic 4 1 0 0 - 0x9500 0 0 3 &mpic 1 1 0 0 - 0x9500 0 0 4 &mpic 2 1 0 0 - - /* IDSEL 0x12 func 6 - PCI slot 2 */ - 0x9600 0 0 1 &mpic 3 1 0 0 - 0x9600 0 0 2 &mpic 4 1 0 0 - 0x9600 0 0 3 &mpic 1 1 0 0 - 0x9600 0 0 4 &mpic 2 1 0 0 - - /* IDSEL 0x12 func 7 - PCI slot 2 */ - 0x9700 0 0 1 &mpic 3 1 0 0 - 0x9700 0 0 2 &mpic 4 1 0 0 - 0x9700 0 0 3 &mpic 1 1 0 0 - 0x9700 0 0 4 &mpic 2 1 0 0 - - // IDSEL 0x1c USB - 0xe000 0 0 1 &i8259 12 2 - 0xe100 0 0 2 &i8259 9 2 - 0xe200 0 0 3 &i8259 10 2 - 0xe300 0 0 4 &i8259 11 2 - - // IDSEL 0x1d Audio - 0xe800 0 0 1 &i8259 6 2 - - // IDSEL 0x1e Legacy - 0xf000 0 0 1 &i8259 7 2 - 0xf100 0 0 1 &i8259 7 2 - - // IDSEL 0x1f IDE/SATA - 0xf800 0 0 1 &i8259 14 2 - 0xf900 0 0 1 &i8259 5 2 - >; - - pcie@0 { - ranges = <0x02000000 0x0 0xe0000000 - 0x02000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x01000000 0x0 0x00000000 - 0x01000000 0x0 0x00000000 - 0x0 0x00010000>; - uli1575@0 { - reg = <0 0 0 0 0>; - #size-cells = <2>; - #address-cells = <3>; - ranges = <0x02000000 0x0 0xe0000000 - 0x02000000 0x0 0xe0000000 - 0x0 0x20000000 - 0x01000000 0x0 0x00000000 - 0x01000000 0x0 0x00000000 - 0x0 0x00010000>; - isa@1e { - device_type = "isa"; - #size-cells = <1>; - #address-cells = <2>; - reg = <0xf000 0 0 0 0>; - ranges = <1 0 0x01000000 0 0 - 0x00001000>; - interrupt-parent = <&i8259>; - - i8259: interrupt-controller@20 { - reg = <1 0x20 2 - 1 0xa0 2 - 1 0x4d0 2>; - interrupt-controller; - device_type = "interrupt-controller"; - #address-cells = <0>; - #interrupt-cells = <2>; - compatible = "chrp,iic"; - interrupts = <9 2 0 0>; - }; - - i8042@60 { - #size-cells = <0>; - #address-cells = <1>; - reg = <1 0x60 1 1 0x64 1>; - interrupts = <1 3 12 3>; - interrupt-parent = <&i8259>; - - keyboard@0 { - reg = <0>; - compatible = "pnpPNP,303"; - }; - - mouse@1 { - reg = <1>; - compatible = "pnpPNP,f03"; - }; - }; - - rtc@70 { - compatible = - "pnpPNP,b00"; - reg = <1 0x70 2>; - }; - - gpio@400 { - reg = <1 0x400 0x80>; - }; - }; - }; - }; - - }; - - pci1: pcie@fffe09000 { - reg = <0x0f 0xffe09000 0x0 0x1000>; - ranges = <0x02000000 0x0 0xe0000000 0x0c 0x20000000 0x0 0x20000000 - 0x01000000 0x0 0x00000000 0x0f 0xffc10000 0x0 0x00010000>; - - pcie@0 { - ranges = <0x02000000 0x0 0xe0000000 - 0x02000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x01000000 0x0 0x00000000 - 0x01000000 0x0 0x00000000 - 0x0 0x00010000>; - }; - }; -}; - -/include/ "mpc8641si-post.dtsi" diff --git a/dts/src/powerpc/fsl/p1022rdk.dts b/dts/src/powerpc/fsl/p1022rdk.dts index 29e8af1e37..4261c2f7e4 100644 --- a/dts/src/powerpc/fsl/p1022rdk.dts +++ b/dts/src/powerpc/fsl/p1022rdk.dts @@ -60,23 +60,23 @@ compatible = "st,m41t62"; reg = <0x68>; }; - adt7461@4c{ + adt7461@4c { compatible = "adi,adt7461"; reg = <0x4c>; }; - zl6100@21{ + zl6100@21 { compatible = "isil,zl6100"; reg = <0x21>; }; - zl6100@24{ + zl6100@24 { compatible = "isil,zl6100"; reg = <0x24>; }; - zl6100@26{ + zl6100@26 { compatible = "isil,zl6100"; reg = <0x26>; }; - zl6100@29{ + zl6100@29 { compatible = "isil,zl6100"; reg = <0x29>; }; diff --git a/dts/src/powerpc/fsl/p1022si-post.dtsi b/dts/src/powerpc/fsl/p1022si-post.dtsi index 5f51b7bfc0..093e4e3ed3 100644 --- a/dts/src/powerpc/fsl/p1022si-post.dtsi +++ b/dts/src/powerpc/fsl/p1022si-post.dtsi @@ -238,7 +238,7 @@ fsl,has-rstcr; }; - power@e0070{ + power@e0070 { compatible = "fsl,mpc8536-pmc", "fsl,mpc8548-pmc"; reg = <0xe0070 0x20>; }; diff --git a/dts/src/powerpc/fsl/p3041ds.dts b/dts/src/powerpc/fsl/p3041ds.dts index 6f5f7283c5..ca0e0272ac 100644 --- a/dts/src/powerpc/fsl/p3041ds.dts +++ b/dts/src/powerpc/fsl/p3041ds.dts @@ -41,7 +41,7 @@ #size-cells = <2>; interrupt-parent = <&mpic>; - aliases{ + aliases { phy_rgmii_0 = &phy_rgmii_0; phy_rgmii_1 = &phy_rgmii_1; phy_sgmii_1c = &phy_sgmii_1c; @@ -165,7 +165,7 @@ }; }; - fman@400000{ + fman@400000 { ethernet@e0000 { phy-handle = <&phy_sgmii_1c>; phy-connection-type = "sgmii"; diff --git a/dts/src/powerpc/fsl/p5040ds.dts b/dts/src/powerpc/fsl/p5040ds.dts index 30850b3228..5cfc689ee4 100644 --- a/dts/src/powerpc/fsl/p5040ds.dts +++ b/dts/src/powerpc/fsl/p5040ds.dts @@ -41,7 +41,7 @@ #size-cells = <2>; interrupt-parent = <&mpic>; - aliases{ + aliases { phy_sgmii_slot2_1c = &phy_sgmii_slot2_1c; phy_sgmii_slot2_1d = &phy_sgmii_slot2_1d; phy_sgmii_slot2_1e = &phy_sgmii_slot2_1e; diff --git a/dts/src/powerpc/fsl/qoriq-fman3-0-10g-0-best-effort.dtsi b/dts/src/powerpc/fsl/qoriq-fman3-0-10g-0-best-effort.dtsi index baa0c503e7..7e70977f28 100644 --- a/dts/src/powerpc/fsl/qoriq-fman3-0-10g-0-best-effort.dtsi +++ b/dts/src/powerpc/fsl/qoriq-fman3-0-10g-0-best-effort.dtsi @@ -55,7 +55,8 @@ fman@400000 { reg = <0xe0000 0x1000>; fsl,fman-ports = <&fman0_rx_0x08 &fman0_tx_0x28>; ptp-timer = <&ptp_timer0>; - pcsphy-handle = <&pcsphy0>; + pcsphy-handle = <&pcsphy0>, <&pcsphy0>; + pcs-handle-names = "sgmii", "qsgmii"; }; mdio@e1000 { diff --git a/dts/src/powerpc/fsl/qoriq-fman3-0-10g-0.dtsi b/dts/src/powerpc/fsl/qoriq-fman3-0-10g-0.dtsi index 93095600e8..5f89f7c176 100644 --- a/dts/src/powerpc/fsl/qoriq-fman3-0-10g-0.dtsi +++ b/dts/src/powerpc/fsl/qoriq-fman3-0-10g-0.dtsi @@ -52,7 +52,15 @@ fman@400000 { compatible = "fsl,fman-memac"; reg = <0xf0000 0x1000>; fsl,fman-ports = <&fman0_rx_0x10 &fman0_tx_0x30>; - pcsphy-handle = <&pcsphy6>; + pcsphy-handle = <&pcsphy6>, <&qsgmiib_pcs2>, <&pcsphy6>; + pcs-handle-names = "sgmii", "qsgmii", "xfi"; + }; + + mdio@e9000 { + qsgmiib_pcs2: ethernet-pcs@2 { + compatible = "fsl,lynx-pcs"; + reg = <2>; + }; }; mdio@f1000 { diff --git a/dts/src/powerpc/fsl/qoriq-fman3-0-10g-1-best-effort.dtsi b/dts/src/powerpc/fsl/qoriq-fman3-0-10g-1-best-effort.dtsi index ff4bd38f06..71eb75e82c 100644 --- a/dts/src/powerpc/fsl/qoriq-fman3-0-10g-1-best-effort.dtsi +++ b/dts/src/powerpc/fsl/qoriq-fman3-0-10g-1-best-effort.dtsi @@ -55,7 +55,15 @@ fman@400000 { reg = <0xe2000 0x1000>; fsl,fman-ports = <&fman0_rx_0x09 &fman0_tx_0x29>; ptp-timer = <&ptp_timer0>; - pcsphy-handle = <&pcsphy1>; + pcsphy-handle = <&pcsphy1>, <&qsgmiia_pcs1>; + pcs-handle-names = "sgmii", "qsgmii"; + }; + + mdio@e1000 { + qsgmiia_pcs1: ethernet-pcs@1 { + compatible = "fsl,lynx-pcs"; + reg = <1>; + }; }; mdio@e3000 { diff --git a/dts/src/powerpc/fsl/qoriq-fman3-0-10g-1.dtsi b/dts/src/powerpc/fsl/qoriq-fman3-0-10g-1.dtsi index 1fa38ed6f5..fb7032ddb7 100644 --- a/dts/src/powerpc/fsl/qoriq-fman3-0-10g-1.dtsi +++ b/dts/src/powerpc/fsl/qoriq-fman3-0-10g-1.dtsi @@ -52,7 +52,15 @@ fman@400000 { compatible = "fsl,fman-memac"; reg = <0xf2000 0x1000>; fsl,fman-ports = <&fman0_rx_0x11 &fman0_tx_0x31>; - pcsphy-handle = <&pcsphy7>; + pcsphy-handle = <&pcsphy7>, <&qsgmiib_pcs3>, <&pcsphy7>; + pcs-handle-names = "sgmii", "qsgmii", "xfi"; + }; + + mdio@e9000 { + qsgmiib_pcs3: ethernet-pcs@3 { + compatible = "fsl,lynx-pcs"; + reg = <3>; + }; }; mdio@f3000 { diff --git a/dts/src/powerpc/fsl/qoriq-fman3-0-10g-2.dtsi b/dts/src/powerpc/fsl/qoriq-fman3-0-10g-2.dtsi new file mode 100644 index 0000000000..6b3609574b --- /dev/null +++ b/dts/src/powerpc/fsl/qoriq-fman3-0-10g-2.dtsi @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-or-later +/* + * QorIQ FMan v3 10g port #2 device tree stub [ controller @ offset 0x400000 ] + * + * Copyright 2022 Sean Anderson <sean.anderson@seco.com> + * Copyright 2012 - 2015 Freescale Semiconductor Inc. + */ + +fman@400000 { + fman0_rx_0x08: port@88000 { + cell-index = <0x8>; + compatible = "fsl,fman-v3-port-rx"; + reg = <0x88000 0x1000>; + fsl,fman-10g-port; + }; + + fman0_tx_0x28: port@a8000 { + cell-index = <0x28>; + compatible = "fsl,fman-v3-port-tx"; + reg = <0xa8000 0x1000>; + fsl,fman-10g-port; + }; + + ethernet@e0000 { + cell-index = <0>; + compatible = "fsl,fman-memac"; + reg = <0xe0000 0x1000>; + fsl,fman-ports = <&fman0_rx_0x08 &fman0_tx_0x28>; + ptp-timer = <&ptp_timer0>; + pcsphy-handle = <&pcsphy0>, <&pcsphy0>; + pcs-handle-names = "sgmii", "xfi"; + }; + + mdio@e1000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio"; + reg = <0xe1000 0x1000>; + fsl,erratum-a011043; /* must ignore read errors */ + + pcsphy0: ethernet-phy@0 { + reg = <0x0>; + }; + }; +}; diff --git a/dts/src/powerpc/fsl/qoriq-fman3-0-10g-3.dtsi b/dts/src/powerpc/fsl/qoriq-fman3-0-10g-3.dtsi new file mode 100644 index 0000000000..28ed1a85a4 --- /dev/null +++ b/dts/src/powerpc/fsl/qoriq-fman3-0-10g-3.dtsi @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-or-later +/* + * QorIQ FMan v3 10g port #3 device tree stub [ controller @ offset 0x400000 ] + * + * Copyright 2022 Sean Anderson <sean.anderson@seco.com> + * Copyright 2012 - 2015 Freescale Semiconductor Inc. + */ + +fman@400000 { + fman0_rx_0x09: port@89000 { + cell-index = <0x9>; + compatible = "fsl,fman-v3-port-rx"; + reg = <0x89000 0x1000>; + fsl,fman-10g-port; + }; + + fman0_tx_0x29: port@a9000 { + cell-index = <0x29>; + compatible = "fsl,fman-v3-port-tx"; + reg = <0xa9000 0x1000>; + fsl,fman-10g-port; + }; + + ethernet@e2000 { + cell-index = <1>; + compatible = "fsl,fman-memac"; + reg = <0xe2000 0x1000>; + fsl,fman-ports = <&fman0_rx_0x09 &fman0_tx_0x29>; + ptp-timer = <&ptp_timer0>; + pcsphy-handle = <&pcsphy1>, <&pcsphy1>; + pcs-handle-names = "sgmii", "xfi"; + }; + + mdio@e3000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio"; + reg = <0xe3000 0x1000>; + fsl,erratum-a011043; /* must ignore read errors */ + + pcsphy1: ethernet-phy@0 { + reg = <0x0>; + }; + }; +}; diff --git a/dts/src/powerpc/fsl/qoriq-fman3-0-1g-0.dtsi b/dts/src/powerpc/fsl/qoriq-fman3-0-1g-0.dtsi index a8cc9780c0..1089d6861b 100644 --- a/dts/src/powerpc/fsl/qoriq-fman3-0-1g-0.dtsi +++ b/dts/src/powerpc/fsl/qoriq-fman3-0-1g-0.dtsi @@ -51,7 +51,8 @@ fman@400000 { reg = <0xe0000 0x1000>; fsl,fman-ports = <&fman0_rx_0x08 &fman0_tx_0x28>; ptp-timer = <&ptp_timer0>; - pcsphy-handle = <&pcsphy0>; + pcsphy-handle = <&pcsphy0>, <&pcsphy0>; + pcs-handle-names = "sgmii", "qsgmii"; }; mdio@e1000 { diff --git a/dts/src/powerpc/fsl/qoriq-fman3-0-1g-1.dtsi b/dts/src/powerpc/fsl/qoriq-fman3-0-1g-1.dtsi index 8b8bd70c93..a95bbb4fc8 100644 --- a/dts/src/powerpc/fsl/qoriq-fman3-0-1g-1.dtsi +++ b/dts/src/powerpc/fsl/qoriq-fman3-0-1g-1.dtsi @@ -51,7 +51,15 @@ fman@400000 { reg = <0xe2000 0x1000>; fsl,fman-ports = <&fman0_rx_0x09 &fman0_tx_0x29>; ptp-timer = <&ptp_timer0>; - pcsphy-handle = <&pcsphy1>; + pcsphy-handle = <&pcsphy1>, <&qsgmiia_pcs1>; + pcs-handle-names = "sgmii", "qsgmii"; + }; + + mdio@e1000 { + qsgmiia_pcs1: ethernet-pcs@1 { + compatible = "fsl,lynx-pcs"; + reg = <1>; + }; }; mdio@e3000 { diff --git a/dts/src/powerpc/fsl/qoriq-fman3-0-1g-2.dtsi b/dts/src/powerpc/fsl/qoriq-fman3-0-1g-2.dtsi index 619c880b54..7d5af0147a 100644 --- a/dts/src/powerpc/fsl/qoriq-fman3-0-1g-2.dtsi +++ b/dts/src/powerpc/fsl/qoriq-fman3-0-1g-2.dtsi @@ -51,7 +51,15 @@ fman@400000 { reg = <0xe4000 0x1000>; fsl,fman-ports = <&fman0_rx_0x0a &fman0_tx_0x2a>; ptp-timer = <&ptp_timer0>; - pcsphy-handle = <&pcsphy2>; + pcsphy-handle = <&pcsphy2>, <&qsgmiia_pcs2>; + pcs-handle-names = "sgmii", "qsgmii"; + }; + + mdio@e1000 { + qsgmiia_pcs2: ethernet-pcs@2 { + compatible = "fsl,lynx-pcs"; + reg = <2>; + }; }; mdio@e5000 { diff --git a/dts/src/powerpc/fsl/qoriq-fman3-0-1g-3.dtsi b/dts/src/powerpc/fsl/qoriq-fman3-0-1g-3.dtsi index d7ebb73a40..61e5466ec8 100644 --- a/dts/src/powerpc/fsl/qoriq-fman3-0-1g-3.dtsi +++ b/dts/src/powerpc/fsl/qoriq-fman3-0-1g-3.dtsi @@ -51,7 +51,15 @@ fman@400000 { reg = <0xe6000 0x1000>; fsl,fman-ports = <&fman0_rx_0x0b &fman0_tx_0x2b>; ptp-timer = <&ptp_timer0>; - pcsphy-handle = <&pcsphy3>; + pcsphy-handle = <&pcsphy3>, <&qsgmiia_pcs3>; + pcs-handle-names = "sgmii", "qsgmii"; + }; + + mdio@e1000 { + qsgmiia_pcs3: ethernet-pcs@3 { + compatible = "fsl,lynx-pcs"; + reg = <3>; + }; }; mdio@e7000 { diff --git a/dts/src/powerpc/fsl/qoriq-fman3-0-1g-4.dtsi b/dts/src/powerpc/fsl/qoriq-fman3-0-1g-4.dtsi index b151d696a0..3ba0cdafc0 100644 --- a/dts/src/powerpc/fsl/qoriq-fman3-0-1g-4.dtsi +++ b/dts/src/powerpc/fsl/qoriq-fman3-0-1g-4.dtsi @@ -51,7 +51,8 @@ fman@400000 { reg = <0xe8000 0x1000>; fsl,fman-ports = <&fman0_rx_0x0c &fman0_tx_0x2c>; ptp-timer = <&ptp_timer0>; - pcsphy-handle = <&pcsphy4>; + pcsphy-handle = <&pcsphy4>, <&pcsphy4>; + pcs-handle-names = "sgmii", "qsgmii"; }; mdio@e9000 { diff --git a/dts/src/powerpc/fsl/qoriq-fman3-0-1g-5.dtsi b/dts/src/powerpc/fsl/qoriq-fman3-0-1g-5.dtsi index adc0ae0013..51748de0a2 100644 --- a/dts/src/powerpc/fsl/qoriq-fman3-0-1g-5.dtsi +++ b/dts/src/powerpc/fsl/qoriq-fman3-0-1g-5.dtsi @@ -51,7 +51,15 @@ fman@400000 { reg = <0xea000 0x1000>; fsl,fman-ports = <&fman0_rx_0x0d &fman0_tx_0x2d>; ptp-timer = <&ptp_timer0>; - pcsphy-handle = <&pcsphy5>; + pcsphy-handle = <&pcsphy5>, <&qsgmiib_pcs1>; + pcs-handle-names = "sgmii", "qsgmii"; + }; + + mdio@e9000 { + qsgmiib_pcs1: ethernet-pcs@1 { + compatible = "fsl,lynx-pcs"; + reg = <1>; + }; }; mdio@eb000 { diff --git a/dts/src/powerpc/fsl/qoriq-fman3-1-10g-0.dtsi b/dts/src/powerpc/fsl/qoriq-fman3-1-10g-0.dtsi index 435047e0e2..ee4f5170f6 100644 --- a/dts/src/powerpc/fsl/qoriq-fman3-1-10g-0.dtsi +++ b/dts/src/powerpc/fsl/qoriq-fman3-1-10g-0.dtsi @@ -52,7 +52,15 @@ fman@500000 { compatible = "fsl,fman-memac"; reg = <0xf0000 0x1000>; fsl,fman-ports = <&fman1_rx_0x10 &fman1_tx_0x30>; - pcsphy-handle = <&pcsphy14>; + pcsphy-handle = <&pcsphy14>, <&qsgmiid_pcs2>, <&pcsphy14>; + pcs-handle-names = "sgmii", "qsgmii", "xfi"; + }; + + mdio@e9000 { + qsgmiid_pcs2: ethernet-pcs@2 { + compatible = "fsl,lynx-pcs"; + reg = <2>; + }; }; mdio@f1000 { diff --git a/dts/src/powerpc/fsl/qoriq-fman3-1-10g-1.dtsi b/dts/src/powerpc/fsl/qoriq-fman3-1-10g-1.dtsi index c098657cca..83d2e0ce8f 100644 --- a/dts/src/powerpc/fsl/qoriq-fman3-1-10g-1.dtsi +++ b/dts/src/powerpc/fsl/qoriq-fman3-1-10g-1.dtsi @@ -52,7 +52,15 @@ fman@500000 { compatible = "fsl,fman-memac"; reg = <0xf2000 0x1000>; fsl,fman-ports = <&fman1_rx_0x11 &fman1_tx_0x31>; - pcsphy-handle = <&pcsphy15>; + pcsphy-handle = <&pcsphy15>, <&qsgmiid_pcs3>, <&pcsphy15>; + pcs-handle-names = "sgmii", "qsgmii", "xfi"; + }; + + mdio@e9000 { + qsgmiid_pcs3: ethernet-pcs@3 { + compatible = "fsl,lynx-pcs"; + reg = <3>; + }; }; mdio@f3000 { diff --git a/dts/src/powerpc/fsl/qoriq-fman3-1-1g-0.dtsi b/dts/src/powerpc/fsl/qoriq-fman3-1-1g-0.dtsi index 9d06824815..3132fc73f1 100644 --- a/dts/src/powerpc/fsl/qoriq-fman3-1-1g-0.dtsi +++ b/dts/src/powerpc/fsl/qoriq-fman3-1-1g-0.dtsi @@ -51,7 +51,8 @@ fman@500000 { reg = <0xe0000 0x1000>; fsl,fman-ports = <&fman1_rx_0x08 &fman1_tx_0x28>; ptp-timer = <&ptp_timer1>; - pcsphy-handle = <&pcsphy8>; + pcsphy-handle = <&pcsphy8>, <&pcsphy8>; + pcs-handle-names = "sgmii", "qsgmii"; }; mdio@e1000 { diff --git a/dts/src/powerpc/fsl/qoriq-fman3-1-1g-1.dtsi b/dts/src/powerpc/fsl/qoriq-fman3-1-1g-1.dtsi index 70e947730c..75e904d966 100644 --- a/dts/src/powerpc/fsl/qoriq-fman3-1-1g-1.dtsi +++ b/dts/src/powerpc/fsl/qoriq-fman3-1-1g-1.dtsi @@ -51,7 +51,15 @@ fman@500000 { reg = <0xe2000 0x1000>; fsl,fman-ports = <&fman1_rx_0x09 &fman1_tx_0x29>; ptp-timer = <&ptp_timer1>; - pcsphy-handle = <&pcsphy9>; + pcsphy-handle = <&pcsphy9>, <&qsgmiic_pcs1>; + pcs-handle-names = "sgmii", "qsgmii"; + }; + + mdio@e1000 { + qsgmiic_pcs1: ethernet-pcs@1 { + compatible = "fsl,lynx-pcs"; + reg = <1>; + }; }; mdio@e3000 { diff --git a/dts/src/powerpc/fsl/qoriq-fman3-1-1g-2.dtsi b/dts/src/powerpc/fsl/qoriq-fman3-1-1g-2.dtsi index ad96e65295..69f2cc7b8f 100644 --- a/dts/src/powerpc/fsl/qoriq-fman3-1-1g-2.dtsi +++ b/dts/src/powerpc/fsl/qoriq-fman3-1-1g-2.dtsi @@ -51,7 +51,15 @@ fman@500000 { reg = <0xe4000 0x1000>; fsl,fman-ports = <&fman1_rx_0x0a &fman1_tx_0x2a>; ptp-timer = <&ptp_timer1>; - pcsphy-handle = <&pcsphy10>; + pcsphy-handle = <&pcsphy10>, <&qsgmiic_pcs2>; + pcs-handle-names = "sgmii", "qsgmii"; + }; + + mdio@e1000 { + qsgmiic_pcs2: ethernet-pcs@2 { + compatible = "fsl,lynx-pcs"; + reg = <2>; + }; }; mdio@e5000 { diff --git a/dts/src/powerpc/fsl/qoriq-fman3-1-1g-3.dtsi b/dts/src/powerpc/fsl/qoriq-fman3-1-1g-3.dtsi index 034bc4b71f..b3aaf01d7d 100644 --- a/dts/src/powerpc/fsl/qoriq-fman3-1-1g-3.dtsi +++ b/dts/src/powerpc/fsl/qoriq-fman3-1-1g-3.dtsi @@ -51,7 +51,15 @@ fman@500000 { reg = <0xe6000 0x1000>; fsl,fman-ports = <&fman1_rx_0x0b &fman1_tx_0x2b>; ptp-timer = <&ptp_timer1>; - pcsphy-handle = <&pcsphy11>; + pcsphy-handle = <&pcsphy11>, <&qsgmiic_pcs3>; + pcs-handle-names = "sgmii", "qsgmii"; + }; + + mdio@e1000 { + qsgmiic_pcs3: ethernet-pcs@3 { + compatible = "fsl,lynx-pcs"; + reg = <3>; + }; }; mdio@e7000 { diff --git a/dts/src/powerpc/fsl/qoriq-fman3-1-1g-4.dtsi b/dts/src/powerpc/fsl/qoriq-fman3-1-1g-4.dtsi index 93ca23d82b..18e0204328 100644 --- a/dts/src/powerpc/fsl/qoriq-fman3-1-1g-4.dtsi +++ b/dts/src/powerpc/fsl/qoriq-fman3-1-1g-4.dtsi @@ -51,7 +51,8 @@ fman@500000 { reg = <0xe8000 0x1000>; fsl,fman-ports = <&fman1_rx_0x0c &fman1_tx_0x2c>; ptp-timer = <&ptp_timer1>; - pcsphy-handle = <&pcsphy12>; + pcsphy-handle = <&pcsphy12>, <&pcsphy12>; + pcs-handle-names = "sgmii", "qsgmii"; }; mdio@e9000 { diff --git a/dts/src/powerpc/fsl/qoriq-fman3-1-1g-5.dtsi b/dts/src/powerpc/fsl/qoriq-fman3-1-1g-5.dtsi index 23b3117a2f..55f329d13f 100644 --- a/dts/src/powerpc/fsl/qoriq-fman3-1-1g-5.dtsi +++ b/dts/src/powerpc/fsl/qoriq-fman3-1-1g-5.dtsi @@ -51,7 +51,15 @@ fman@500000 { reg = <0xea000 0x1000>; fsl,fman-ports = <&fman1_rx_0x0d &fman1_tx_0x2d>; ptp-timer = <&ptp_timer1>; - pcsphy-handle = <&pcsphy13>; + pcsphy-handle = <&pcsphy13>, <&qsgmiid_pcs1>; + pcs-handle-names = "sgmii", "qsgmii"; + }; + + mdio@e9000 { + qsgmiid_pcs1: ethernet-pcs@1 { + compatible = "fsl,lynx-pcs"; + reg = <1>; + }; }; mdio@eb000 { diff --git a/dts/src/powerpc/fsl/t1023si-post.dtsi b/dts/src/powerpc/fsl/t1023si-post.dtsi index d552044c5a..aa5152ca81 100644 --- a/dts/src/powerpc/fsl/t1023si-post.dtsi +++ b/dts/src/powerpc/fsl/t1023si-post.dtsi @@ -367,45 +367,46 @@ reg = <0xf0000 0x1000>; interrupts = <18 2 0 0>; fsl,tmu-range = <0xb0000 0xa0026 0x80048 0x30061>; - fsl,tmu-calibration = <0x00000000 0x0000000f - 0x00000001 0x00000017 - 0x00000002 0x0000001e - 0x00000003 0x00000026 - 0x00000004 0x0000002e - 0x00000005 0x00000035 - 0x00000006 0x0000003d - 0x00000007 0x00000044 - 0x00000008 0x0000004c - 0x00000009 0x00000053 - 0x0000000a 0x0000005b - 0x0000000b 0x00000064 - - 0x00010000 0x00000011 - 0x00010001 0x0000001c - 0x00010002 0x00000024 - 0x00010003 0x0000002b - 0x00010004 0x00000034 - 0x00010005 0x00000039 - 0x00010006 0x00000042 - 0x00010007 0x0000004c - 0x00010008 0x00000051 - 0x00010009 0x0000005a - 0x0001000a 0x00000063 - - 0x00020000 0x00000013 - 0x00020001 0x00000019 - 0x00020002 0x00000024 - 0x00020003 0x0000002c - 0x00020004 0x00000035 - 0x00020005 0x0000003d - 0x00020006 0x00000046 - 0x00020007 0x00000050 - 0x00020008 0x00000059 - - 0x00030000 0x00000002 - 0x00030001 0x0000000d - 0x00030002 0x00000019 - 0x00030003 0x00000024>; + fsl,tmu-calibration = + <0x00000000 0x0000000f>, + <0x00000001 0x00000017>, + <0x00000002 0x0000001e>, + <0x00000003 0x00000026>, + <0x00000004 0x0000002e>, + <0x00000005 0x00000035>, + <0x00000006 0x0000003d>, + <0x00000007 0x00000044>, + <0x00000008 0x0000004c>, + <0x00000009 0x00000053>, + <0x0000000a 0x0000005b>, + <0x0000000b 0x00000064>, + + <0x00010000 0x00000011>, + <0x00010001 0x0000001c>, + <0x00010002 0x00000024>, + <0x00010003 0x0000002b>, + <0x00010004 0x00000034>, + <0x00010005 0x00000039>, + <0x00010006 0x00000042>, + <0x00010007 0x0000004c>, + <0x00010008 0x00000051>, + <0x00010009 0x0000005a>, + <0x0001000a 0x00000063>, + + <0x00020000 0x00000013>, + <0x00020001 0x00000019>, + <0x00020002 0x00000024>, + <0x00020003 0x0000002c>, + <0x00020004 0x00000035>, + <0x00020005 0x0000003d>, + <0x00020006 0x00000046>, + <0x00020007 0x00000050>, + <0x00020008 0x00000059>, + + <0x00030000 0x00000002>, + <0x00030001 0x0000000d>, + <0x00030002 0x00000019>, + <0x00030003 0x00000024>; #thermal-sensor-cells = <1>; }; diff --git a/dts/src/powerpc/fsl/t1024qds.dts b/dts/src/powerpc/fsl/t1024qds.dts index d6858b7cd9..9ea7942f91 100644 --- a/dts/src/powerpc/fsl/t1024qds.dts +++ b/dts/src/powerpc/fsl/t1024qds.dts @@ -151,7 +151,7 @@ }; i2c@118000 { - pca9547@77 { + i2c-mux@77 { compatible = "nxp,pca9547"; reg = <0x77>; #address-cells = <1>; diff --git a/dts/src/powerpc/fsl/t1024rdb.dts b/dts/src/powerpc/fsl/t1024rdb.dts index dbcd31cc35..270aaf631f 100644 --- a/dts/src/powerpc/fsl/t1024rdb.dts +++ b/dts/src/powerpc/fsl/t1024rdb.dts @@ -165,7 +165,7 @@ }; i2c@118100 { - pca9546@77 { + i2c-mux@77 { compatible = "nxp,pca9546"; reg = <0x77>; #address-cells = <1>; diff --git a/dts/src/powerpc/fsl/t1040rdb-rev-a.dts b/dts/src/powerpc/fsl/t1040rdb-rev-a.dts index 73f8c998c6..d4f5f159d6 100644 --- a/dts/src/powerpc/fsl/t1040rdb-rev-a.dts +++ b/dts/src/powerpc/fsl/t1040rdb-rev-a.dts @@ -10,7 +10,6 @@ / { model = "fsl,T1040RDB-REV-A"; - compatible = "fsl,T1040RDB-REV-A"; }; &seville_port0 { diff --git a/dts/src/powerpc/fsl/t1040rdb.dts b/dts/src/powerpc/fsl/t1040rdb.dts index b6733e7e65..dd3aab81e9 100644 --- a/dts/src/powerpc/fsl/t1040rdb.dts +++ b/dts/src/powerpc/fsl/t1040rdb.dts @@ -180,6 +180,9 @@ }; &seville_port8 { - ethernet = <&enet0>; + status = "okay"; +}; + +&seville_port9 { status = "okay"; }; diff --git a/dts/src/powerpc/fsl/t1040si-post.dtsi b/dts/src/powerpc/fsl/t1040si-post.dtsi index f58eb820eb..7767886232 100644 --- a/dts/src/powerpc/fsl/t1040si-post.dtsi +++ b/dts/src/powerpc/fsl/t1040si-post.dtsi @@ -447,41 +447,42 @@ reg = <0xf0000 0x1000>; interrupts = <18 2 0 0>; fsl,tmu-range = <0xa0000 0x90026 0x8004a 0x1006a>; - fsl,tmu-calibration = <0x00000000 0x00000025 - 0x00000001 0x00000028 - 0x00000002 0x0000002d - 0x00000003 0x00000031 - 0x00000004 0x00000036 - 0x00000005 0x0000003a - 0x00000006 0x00000040 - 0x00000007 0x00000044 - 0x00000008 0x0000004a - 0x00000009 0x0000004f - 0x0000000a 0x00000054 - - 0x00010000 0x0000000d - 0x00010001 0x00000013 - 0x00010002 0x00000019 - 0x00010003 0x0000001f - 0x00010004 0x00000025 - 0x00010005 0x0000002d - 0x00010006 0x00000033 - 0x00010007 0x00000043 - 0x00010008 0x0000004b - 0x00010009 0x00000053 - - 0x00020000 0x00000010 - 0x00020001 0x00000017 - 0x00020002 0x0000001f - 0x00020003 0x00000029 - 0x00020004 0x00000031 - 0x00020005 0x0000003c - 0x00020006 0x00000042 - 0x00020007 0x0000004d - 0x00020008 0x00000056 - - 0x00030000 0x00000012 - 0x00030001 0x0000001d>; + fsl,tmu-calibration = + <0x00000000 0x00000025>, + <0x00000001 0x00000028>, + <0x00000002 0x0000002d>, + <0x00000003 0x00000031>, + <0x00000004 0x00000036>, + <0x00000005 0x0000003a>, + <0x00000006 0x00000040>, + <0x00000007 0x00000044>, + <0x00000008 0x0000004a>, + <0x00000009 0x0000004f>, + <0x0000000a 0x00000054>, + + <0x00010000 0x0000000d>, + <0x00010001 0x00000013>, + <0x00010002 0x00000019>, + <0x00010003 0x0000001f>, + <0x00010004 0x00000025>, + <0x00010005 0x0000002d>, + <0x00010006 0x00000033>, + <0x00010007 0x00000043>, + <0x00010008 0x0000004b>, + <0x00010009 0x00000053>, + + <0x00020000 0x00000010>, + <0x00020001 0x00000017>, + <0x00020002 0x0000001f>, + <0x00020003 0x00000029>, + <0x00020004 0x00000031>, + <0x00020005 0x0000003c>, + <0x00020006 0x00000042>, + <0x00020007 0x0000004d>, + <0x00020008 0x00000056>, + + <0x00030000 0x00000012>, + <0x00030001 0x0000001d>; #thermal-sensor-cells = <1>; }; @@ -686,6 +687,7 @@ seville_port8: port@8 { reg = <8>; phy-mode = "internal"; + ethernet = <&enet0>; status = "disabled"; fixed-link { @@ -697,6 +699,7 @@ seville_port9: port@9 { reg = <9>; phy-mode = "internal"; + ethernet = <&enet1>; status = "disabled"; fixed-link { diff --git a/dts/src/powerpc/fsl/t104xqds.dtsi b/dts/src/powerpc/fsl/t104xqds.dtsi index 6154797322..1c329f076f 100644 --- a/dts/src/powerpc/fsl/t104xqds.dtsi +++ b/dts/src/powerpc/fsl/t104xqds.dtsi @@ -268,7 +268,7 @@ }; i2c@118000 { - pca9547@77 { + i2c-mux@77 { compatible = "nxp,pca9547"; reg = <0x77>; }; diff --git a/dts/src/powerpc/fsl/t104xrdb.dtsi b/dts/src/powerpc/fsl/t104xrdb.dtsi index bfe1ed5be3..fc7bec5dcb 100644 --- a/dts/src/powerpc/fsl/t104xrdb.dtsi +++ b/dts/src/powerpc/fsl/t104xrdb.dtsi @@ -128,7 +128,7 @@ }; i2c@118100 { - pca9546@77 { + i2c-mux@77 { compatible = "nxp,pca9546"; reg = <0x77>; #address-cells = <1>; diff --git a/dts/src/powerpc/fsl/t2081si-post.dtsi b/dts/src/powerpc/fsl/t2081si-post.dtsi index ecbb447920..27714dc2f0 100644 --- a/dts/src/powerpc/fsl/t2081si-post.dtsi +++ b/dts/src/powerpc/fsl/t2081si-post.dtsi @@ -609,8 +609,8 @@ /include/ "qoriq-bman1.dtsi" /include/ "qoriq-fman3-0.dtsi" -/include/ "qoriq-fman3-0-1g-0.dtsi" -/include/ "qoriq-fman3-0-1g-1.dtsi" +/include/ "qoriq-fman3-0-10g-2.dtsi" +/include/ "qoriq-fman3-0-10g-3.dtsi" /include/ "qoriq-fman3-0-1g-2.dtsi" /include/ "qoriq-fman3-0-1g-3.dtsi" /include/ "qoriq-fman3-0-1g-4.dtsi" @@ -659,3 +659,19 @@ interrupts = <16 2 1 9>; }; }; + +&fman0_rx_0x08 { + /delete-property/ fsl,fman-10g-port; +}; + +&fman0_tx_0x28 { + /delete-property/ fsl,fman-10g-port; +}; + +&fman0_rx_0x09 { + /delete-property/ fsl,fman-10g-port; +}; + +&fman0_tx_0x29 { + /delete-property/ fsl,fman-10g-port; +}; diff --git a/dts/src/powerpc/fsl/t208xqds.dtsi b/dts/src/powerpc/fsl/t208xqds.dtsi index db4139999b..962c999416 100644 --- a/dts/src/powerpc/fsl/t208xqds.dtsi +++ b/dts/src/powerpc/fsl/t208xqds.dtsi @@ -135,7 +135,7 @@ }; i2c@118000 { - pca9547@77 { + i2c-mux@77 { compatible = "nxp,pca9547"; reg = <0x77>; #address-cells = <1>; diff --git a/dts/src/powerpc/fsl/t208xrdb.dtsi b/dts/src/powerpc/fsl/t208xrdb.dtsi index ff87e67c70..ecc3e8c739 100644 --- a/dts/src/powerpc/fsl/t208xrdb.dtsi +++ b/dts/src/powerpc/fsl/t208xrdb.dtsi @@ -138,7 +138,7 @@ }; i2c@118100 { - pca9546@77 { + i2c-mux@77 { compatible = "nxp,pca9546"; reg = <0x77>; }; diff --git a/dts/src/powerpc/fsl/t4240qds.dts b/dts/src/powerpc/fsl/t4240qds.dts index c0913ac5aa..128b5798bb 100644 --- a/dts/src/powerpc/fsl/t4240qds.dts +++ b/dts/src/powerpc/fsl/t4240qds.dts @@ -41,7 +41,7 @@ #size-cells = <2>; interrupt-parent = <&mpic>; - aliases{ + aliases { phy_rgmii1 = &phyrgmii1; phy_rgmii2 = &phyrgmii2; phy_sgmii3 = &phy3; diff --git a/dts/src/powerpc/ksi8560.dts b/dts/src/powerpc/ksi8560.dts index fe6c17c881..37a7eb576d 100644 --- a/dts/src/powerpc/ksi8560.dts +++ b/dts/src/powerpc/ksi8560.dts @@ -14,6 +14,8 @@ /dts-v1/; +/include/ "fsl/e500v1_power_isa.dtsi" + / { model = "KSI8560"; compatible = "emerson,KSI8560"; diff --git a/dts/src/powerpc/mgcoge.dts b/dts/src/powerpc/mgcoge.dts index 7de068991b..9cefed2072 100644 --- a/dts/src/powerpc/mgcoge.dts +++ b/dts/src/powerpc/mgcoge.dts @@ -225,13 +225,6 @@ interrupts = <2 8>; interrupt-parent = <&PIC>; cs-gpios = < &cpm2_pio_d 19 0>; - #address-cells = <1>; - #size-cells = <0>; - ds3106@1 { - compatible = "gen,spidev"; - reg = <0>; - spi-max-frequency = <8000000>; - }; }; }; diff --git a/dts/src/powerpc/microwatt.dts b/dts/src/powerpc/microwatt.dts index b69db1d275..269e930b3b 100644 --- a/dts/src/powerpc/microwatt.dts +++ b/dts/src/powerpc/microwatt.dts @@ -21,6 +21,14 @@ reg = <0x00000000 0x00000000 0x00000000 0x10000000>; }; + clocks { + sys_clk: litex_sys_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <100000000>; + }; + }; + cpus { #size-cells = <0x00>; #address-cells = <0x01>; @@ -141,6 +149,20 @@ litex,slot-size = <0x800>; interrupts = <0x11 0x1>; }; + + mmc@8040000 { + compatible = "litex,mmc"; + reg = <0x8042800 0x800 + 0x8041000 0x800 + 0x8040800 0x800 + 0x8042000 0x800 + 0x8041800 0x800>; + reg-names = "phy", "core", "reader", "writer", "irq"; + bus-width = <4>; + interrupts = <0x13 1>; + cap-sd-highspeed; + clocks = <&sys_clk>; + }; }; chosen { diff --git a/dts/src/powerpc/mpc5121.dtsi b/dts/src/powerpc/mpc5121.dtsi index 3f66b91a8e..d3fc8062fb 100644 --- a/dts/src/powerpc/mpc5121.dtsi +++ b/dts/src/powerpc/mpc5121.dtsi @@ -140,7 +140,7 @@ }; /* Power Management Controller */ - pmc@1000{ + pmc@1000 { compatible = "fsl,mpc5121-pmc"; reg = <0x1000 0x100>; interrupts = <83 0x8>; diff --git a/dts/src/powerpc/mpc5125twr.dts b/dts/src/powerpc/mpc5125twr.dts index 0bd2acc040..ee090709aa 100644 --- a/dts/src/powerpc/mpc5125twr.dts +++ b/dts/src/powerpc/mpc5125twr.dts @@ -104,7 +104,7 @@ clock-names = "osc"; }; - pmc@1000{ // Power Management Controller + pmc@1000 { // Power Management Controller compatible = "fsl,mpc5121-pmc"; reg = <0x1000 0x100>; interrupts = <83 0x2>; diff --git a/dts/src/powerpc/mpc7448hpc2.dts b/dts/src/powerpc/mpc7448hpc2.dts deleted file mode 100644 index 9494af160e..0000000000 --- a/dts/src/powerpc/mpc7448hpc2.dts +++ /dev/null @@ -1,192 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * MPC7448HPC2 (Taiga) board Device Tree Source - * - * Copyright 2006, 2008 Freescale Semiconductor Inc. - * 2006 Roy Zang <Roy Zang at freescale.com>. - */ - -/dts-v1/; - -/ { - model = "mpc7448hpc2"; - compatible = "mpc74xx"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - - serial0 = &serial0; - serial1 = &serial1; - - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells =<0>; - - PowerPC,7448@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K bytes - i-cache-size = <0x8000>; // L1, 32K bytes - timebase-frequency = <0>; // 33 MHz, from uboot - clock-frequency = <0>; // From U-Boot - bus-frequency = <0>; // From U-Boot - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x20000000 // DDR2 512M at 0 - >; - }; - - tsi108@c0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "tsi-bridge"; - ranges = <0x0 0xc0000000 0x10000>; - reg = <0xc0000000 0x10000>; - bus-frequency = <0>; - - i2c@7000 { - interrupt-parent = <&mpic>; - interrupts = <14 0>; - reg = <0x7000 0x400>; - device_type = "i2c"; - compatible = "tsi108-i2c"; - }; - - MDIO: mdio@6000 { - compatible = "tsi108-mdio"; - reg = <0x6000 0x50>; - #address-cells = <1>; - #size-cells = <0>; - - phy8: ethernet-phy@8 { - interrupt-parent = <&mpic>; - interrupts = <2 1>; - reg = <0x8>; - }; - - phy9: ethernet-phy@9 { - interrupt-parent = <&mpic>; - interrupts = <2 1>; - reg = <0x9>; - }; - - }; - - enet0: ethernet@6200 { - linux,network-index = <0>; - #size-cells = <0>; - device_type = "network"; - compatible = "tsi108-ethernet"; - reg = <0x6000 0x200>; - address = [ 00 06 D2 00 00 01 ]; - interrupts = <16 2>; - interrupt-parent = <&mpic>; - mdio-handle = <&MDIO>; - phy-handle = <&phy8>; - }; - - enet1: ethernet@6600 { - linux,network-index = <1>; - #address-cells = <1>; - #size-cells = <0>; - device_type = "network"; - compatible = "tsi108-ethernet"; - reg = <0x6400 0x200>; - address = [ 00 06 D2 00 00 02 ]; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - mdio-handle = <&MDIO>; - phy-handle = <&phy9>; - }; - - serial0: serial@7808 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0x7808 0x200>; - clock-frequency = <1064000000>; - interrupts = <12 0>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@7c08 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0x7c08 0x200>; - clock-frequency = <1064000000>; - interrupts = <13 0>; - interrupt-parent = <&mpic>; - }; - - mpic: pic@7400 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x7400 0x400>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - pci0: pci@1000 { - compatible = "tsi108-pci"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0x1000 0x1000>; - bus-range = <0 0>; - ranges = <0x2000000 0x0 0xe0000000 0xe0000000 0x0 0x1a000000 - 0x1000000 0x0 0x0 0xfa000000 0x0 0x10000>; - clock-frequency = <133333332>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x11 */ - 0x800 0x0 0x0 0x1 &RT0 0x24 0x0 - 0x800 0x0 0x0 0x2 &RT0 0x25 0x0 - 0x800 0x0 0x0 0x3 &RT0 0x26 0x0 - 0x800 0x0 0x0 0x4 &RT0 0x27 0x0 - - /* IDSEL 0x12 */ - 0x1000 0x0 0x0 0x1 &RT0 0x25 0x0 - 0x1000 0x0 0x0 0x2 &RT0 0x26 0x0 - 0x1000 0x0 0x0 0x3 &RT0 0x27 0x0 - 0x1000 0x0 0x0 0x4 &RT0 0x24 0x0 - - /* IDSEL 0x13 */ - 0x1800 0x0 0x0 0x1 &RT0 0x26 0x0 - 0x1800 0x0 0x0 0x2 &RT0 0x27 0x0 - 0x1800 0x0 0x0 0x3 &RT0 0x24 0x0 - 0x1800 0x0 0x0 0x4 &RT0 0x25 0x0 - - /* IDSEL 0x14 */ - 0x2000 0x0 0x0 0x1 &RT0 0x27 0x0 - 0x2000 0x0 0x0 0x2 &RT0 0x24 0x0 - 0x2000 0x0 0x0 0x3 &RT0 0x25 0x0 - 0x2000 0x0 0x0 0x4 &RT0 0x26 0x0 - >; - - RT0: router@1180 { - clock-frequency = <0>; - interrupt-controller; - device_type = "pic-router"; - #address-cells = <0>; - #interrupt-cells = <2>; - big-endian; - interrupts = <23 2>; - interrupt-parent = <&mpic>; - }; - }; - }; -}; diff --git a/dts/src/powerpc/mpc8272ads.dts b/dts/src/powerpc/mpc8272ads.dts deleted file mode 100644 index 13ec786f6a..0000000000 --- a/dts/src/powerpc/mpc8272ads.dts +++ /dev/null @@ -1,263 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * MPC8272 ADS Device Tree Source - * - * Copyright 2005,2008 Freescale Semiconductor Inc. - */ - -/dts-v1/; - -/ { - model = "MPC8272ADS"; - compatible = "fsl,mpc8272ads"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = ð0; - ethernet1 = ð1; - serial0 = &scc1; - serial1 = &scc4; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8272@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <16384>; - i-cache-size = <16384>; - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x0>; - }; - - localbus@f0010100 { - compatible = "fsl,mpc8272-localbus", - "fsl,pq2-localbus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0xf0010100 0x40>; - - ranges = <0x0 0x0 0xff800000 0x00800000 - 0x1 0x0 0xf4500000 0x8000 - 0x3 0x0 0xf8200000 0x8000>; - - flash@0,0 { - compatible = "jedec-flash"; - reg = <0x0 0x0 0x00800000>; - bank-width = <4>; - device-width = <1>; - }; - - board-control@1,0 { - reg = <0x1 0x0 0x20>; - compatible = "fsl,mpc8272ads-bcsr"; - }; - - PCI_PIC: interrupt-controller@3,0 { - compatible = "fsl,mpc8272ads-pci-pic", - "fsl,pq2ads-pci-pic"; - #interrupt-cells = <1>; - interrupt-controller; - reg = <0x3 0x0 0x8>; - interrupt-parent = <&PIC>; - interrupts = <20 8>; - }; - }; - - - pci@f0010800 { - device_type = "pci"; - reg = <0xf0010800 0x10c 0xf00101ac 0x8 0xf00101c4 0x8>; - compatible = "fsl,mpc8272-pci", "fsl,pq2-pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - clock-frequency = <66666666>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x16 */ - 0xb000 0x0 0x0 0x1 &PCI_PIC 0 - 0xb000 0x0 0x0 0x2 &PCI_PIC 1 - 0xb000 0x0 0x0 0x3 &PCI_PIC 2 - 0xb000 0x0 0x0 0x4 &PCI_PIC 3 - - /* IDSEL 0x17 */ - 0xb800 0x0 0x0 0x1 &PCI_PIC 4 - 0xb800 0x0 0x0 0x2 &PCI_PIC 5 - 0xb800 0x0 0x0 0x3 &PCI_PIC 6 - 0xb800 0x0 0x0 0x4 &PCI_PIC 7 - - /* IDSEL 0x18 */ - 0xc000 0x0 0x0 0x1 &PCI_PIC 8 - 0xc000 0x0 0x0 0x2 &PCI_PIC 9 - 0xc000 0x0 0x0 0x3 &PCI_PIC 10 - 0xc000 0x0 0x0 0x4 &PCI_PIC 11>; - - interrupt-parent = <&PIC>; - interrupts = <18 8>; - ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x20000000 - 0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x0 0xf6000000 0x0 0x2000000>; - }; - - soc@f0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,mpc8272", "fsl,pq2-soc"; - ranges = <0x0 0xf0000000 0x53000>; - - // Temporary -- will go away once kernel uses ranges for get_immrbase(). - reg = <0xf0000000 0x53000>; - - cpm@119c0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8272-cpm", "fsl,cpm2"; - reg = <0x119c0 0x30>; - ranges; - - muram@0 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x0 0x10000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0x0 0x2000 0x9800 0x800>; - }; - }; - - brg@119f0 { - compatible = "fsl,mpc8272-brg", - "fsl,cpm2-brg", - "fsl,cpm-brg"; - reg = <0x119f0 0x10 0x115f0 0x10>; - }; - - scc1: serial@11a00 { - device_type = "serial"; - compatible = "fsl,mpc8272-scc-uart", - "fsl,cpm2-scc-uart"; - reg = <0x11a00 0x20 0x8000 0x100>; - interrupts = <40 8>; - interrupt-parent = <&PIC>; - fsl,cpm-brg = <1>; - fsl,cpm-command = <0x800000>; - }; - - scc4: serial@11a60 { - device_type = "serial"; - compatible = "fsl,mpc8272-scc-uart", - "fsl,cpm2-scc-uart"; - reg = <0x11a60 0x20 0x8300 0x100>; - interrupts = <43 8>; - interrupt-parent = <&PIC>; - fsl,cpm-brg = <4>; - fsl,cpm-command = <0xce00000>; - }; - - usb@11b60 { - compatible = "fsl,mpc8272-cpm-usb"; - reg = <0x11b60 0x40 0x8b00 0x100>; - interrupts = <11 8>; - interrupt-parent = <&PIC>; - mode = "peripheral"; - }; - - mdio@10d40 { - compatible = "fsl,mpc8272ads-mdio-bitbang", - "fsl,mpc8272-mdio-bitbang", - "fsl,cpm2-mdio-bitbang"; - reg = <0x10d40 0x14>; - #address-cells = <1>; - #size-cells = <0>; - fsl,mdio-pin = <18>; - fsl,mdc-pin = <19>; - - PHY0: ethernet-phy@0 { - interrupt-parent = <&PIC>; - interrupts = <23 8>; - reg = <0x0>; - }; - - PHY1: ethernet-phy@1 { - interrupt-parent = <&PIC>; - interrupts = <23 8>; - reg = <0x3>; - }; - }; - - eth0: ethernet@11300 { - device_type = "network"; - compatible = "fsl,mpc8272-fcc-enet", - "fsl,cpm2-fcc-enet"; - reg = <0x11300 0x20 0x8400 0x100 0x11390 0x1>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <32 8>; - interrupt-parent = <&PIC>; - phy-handle = <&PHY0>; - linux,network-index = <0>; - fsl,cpm-command = <0x12000300>; - }; - - eth1: ethernet@11320 { - device_type = "network"; - compatible = "fsl,mpc8272-fcc-enet", - "fsl,cpm2-fcc-enet"; - reg = <0x11320 0x20 0x8500 0x100 0x113b0 0x1>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <33 8>; - interrupt-parent = <&PIC>; - phy-handle = <&PHY1>; - linux,network-index = <1>; - fsl,cpm-command = <0x16200300>; - }; - - i2c@11860 { - compatible = "fsl,mpc8272-i2c", - "fsl,cpm2-i2c"; - reg = <0x11860 0x20 0x8afc 0x2>; - interrupts = <1 8>; - interrupt-parent = <&PIC>; - fsl,cpm-command = <0x29600000>; - #address-cells = <1>; - #size-cells = <0>; - }; - }; - - PIC: interrupt-controller@10c00 { - #interrupt-cells = <2>; - interrupt-controller; - reg = <0x10c00 0x80>; - compatible = "fsl,mpc8272-pic", "fsl,cpm2-pic"; - }; - - crypto@30000 { - compatible = "fsl,sec1.0"; - reg = <0x40000 0x13000>; - interrupts = <47 0x8>; - interrupt-parent = <&PIC>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x7e>; - fsl,descriptor-types-mask = <0x1010415>; - }; - }; - - chosen { - stdout-path = "/soc/cpm/serial@11a00"; - }; -}; diff --git a/dts/src/powerpc/mpc832x_mds.dts b/dts/src/powerpc/mpc832x_mds.dts deleted file mode 100644 index 3af073f01e..0000000000 --- a/dts/src/powerpc/mpc832x_mds.dts +++ /dev/null @@ -1,436 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * MPC8323E EMDS Device Tree Source - * - * Copyright 2006 Freescale Semiconductor Inc. - * - - * To enable external serial I/O on a Freescale MPC 8323 SYS/MDS board, do - * this: - * - * 1) On chip U61, lift (disconnect) pins 21 (TXD) and 22 (RXD) from the board. - * 2) Solder a wire from U61-21 to P19A-23. P19 is a grid of pins on the board - * next to the serial ports. - * 3) Solder a wire from U61-22 to P19K-22. - * - * Note that there's a typo in the schematic. The board labels the last column - * of pins "P19K", but in the schematic, that column is called "P19J". So if - * you're going by the schematic, the pin is called "P19J-K22". - */ - -/dts-v1/; - -/ { - model = "MPC8323EMDS"; - compatible = "MPC8323EMDS", "MPC832xMDS", "MPC83xxMDS"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8323@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <16384>; // L1, 16K - i-cache-size = <16384>; // L1, 16K - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x08000000>; - }; - - bcsr@f8000000 { - compatible = "fsl,mpc8323mds-bcsr"; - reg = <0xf8000000 0x8000>; - }; - - soc8323@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x00100000>; - reg = <0xe0000000 0x00000200>; - bus-frequency = <132000000>; - - wdt@200 { - device_type = "watchdog"; - compatible = "mpc83xx_wdt"; - reg = <0x200 0x100>; - }; - - pmc: power@b00 { - compatible = "fsl,mpc8323-pmc", "fsl,mpc8349-pmc"; - reg = <0xb00 0x100 0xa00 0x100>; - interrupts = <80 0x8>; - interrupt-parent = <&ipic>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - - rtc@68 { - compatible = "dallas,ds1374"; - reg = <0x68>; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <10 0x8>; - interrupt-parent = <&ipic>; - }; - - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8323-dma", "fsl,elo-dma"; - reg = <0x82a8 4>; - ranges = <0 0x8100 0x1a8>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; - reg = <0 0x80>; - cell-index = <0>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@80 { - compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@100 { - compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@180 { - compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; - reg = <0x180 0x28>; - cell-index = <3>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - }; - - crypto@30000 { - compatible = "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - fsl,num-channels = <1>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x4c>; - fsl,descriptor-types-mask = <0x0122003f>; - sleep = <&pmc 0x03000000>; - }; - - ipic: pic@700 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x700 0x100>; - device_type = "ipic"; - }; - - par_io@1400 { - reg = <0x1400 0x100>; - device_type = "par_io"; - num-ports = <7>; - - pio3: ucc_pin@3 { - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 3 4 3 0 2 0 /* MDIO */ - 3 5 1 0 2 0 /* MDC */ - 0 13 2 0 1 0 /* RX_CLK (CLK9) */ - 3 24 2 0 1 0 /* TX_CLK (CLK10) */ - 1 0 1 0 1 0 /* TxD0 */ - 1 1 1 0 1 0 /* TxD1 */ - 1 2 1 0 1 0 /* TxD2 */ - 1 3 1 0 1 0 /* TxD3 */ - 1 4 2 0 1 0 /* RxD0 */ - 1 5 2 0 1 0 /* RxD1 */ - 1 6 2 0 1 0 /* RxD2 */ - 1 7 2 0 1 0 /* RxD3 */ - 1 8 2 0 1 0 /* RX_ER */ - 1 9 1 0 1 0 /* TX_ER */ - 1 10 2 0 1 0 /* RX_DV */ - 1 11 2 0 1 0 /* COL */ - 1 12 1 0 1 0 /* TX_EN */ - 1 13 2 0 1 0>; /* CRS */ - }; - pio4: ucc_pin@4 { - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 3 31 2 0 1 0 /* RX_CLK (CLK7) */ - 3 6 2 0 1 0 /* TX_CLK (CLK8) */ - 1 18 1 0 1 0 /* TxD0 */ - 1 19 1 0 1 0 /* TxD1 */ - 1 20 1 0 1 0 /* TxD2 */ - 1 21 1 0 1 0 /* TxD3 */ - 1 22 2 0 1 0 /* RxD0 */ - 1 23 2 0 1 0 /* RxD1 */ - 1 24 2 0 1 0 /* RxD2 */ - 1 25 2 0 1 0 /* RxD3 */ - 1 26 2 0 1 0 /* RX_ER */ - 1 27 1 0 1 0 /* TX_ER */ - 1 28 2 0 1 0 /* RX_DV */ - 1 29 2 0 1 0 /* COL */ - 1 30 1 0 1 0 /* TX_EN */ - 1 31 2 0 1 0>; /* CRS */ - }; - pio5: ucc_pin@5 { - pio-map = < - /* - * open has - * port pin dir drain sel irq - */ - 2 0 1 0 2 0 /* TxD5 */ - 2 8 2 0 2 0 /* RxD5 */ - - 2 29 2 0 0 0 /* CTS5 */ - 2 31 1 0 2 0 /* RTS5 */ - - 2 24 2 0 0 0 /* CD */ - - >; - }; - - }; - }; - - qe@e0100000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "qe"; - compatible = "fsl,qe"; - ranges = <0x0 0xe0100000 0x00100000>; - reg = <0xe0100000 0x480>; - brg-frequency = <0>; - bus-frequency = <198000000>; - fsl,qe-num-riscs = <1>; - fsl,qe-num-snums = <28>; - - muram@10000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,qe-muram", "fsl,cpm-muram"; - ranges = <0x0 0x00010000 0x00004000>; - - data-only@0 { - compatible = "fsl,qe-muram-data", - "fsl,cpm-muram-data"; - reg = <0x0 0x4000>; - }; - }; - - spi@4c0 { - cell-index = <0>; - compatible = "fsl,spi"; - reg = <0x4c0 0x40>; - interrupts = <2>; - interrupt-parent = <&qeic>; - mode = "cpu"; - }; - - spi@500 { - cell-index = <1>; - compatible = "fsl,spi"; - reg = <0x500 0x40>; - interrupts = <1>; - interrupt-parent = <&qeic>; - mode = "cpu"; - }; - - usb@6c0 { - compatible = "qe_udc"; - reg = <0x6c0 0x40 0x8b00 0x100>; - interrupts = <11>; - interrupt-parent = <&qeic>; - mode = "slave"; - }; - - enet0: ucc@2200 { - device_type = "network"; - compatible = "ucc_geth"; - cell-index = <3>; - reg = <0x2200 0x200>; - interrupts = <34>; - interrupt-parent = <&qeic>; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "clk9"; - tx-clock-name = "clk10"; - phy-handle = <&phy3>; - pio-handle = <&pio3>; - }; - - enet1: ucc@3200 { - device_type = "network"; - compatible = "ucc_geth"; - cell-index = <4>; - reg = <0x3200 0x200>; - interrupts = <35>; - interrupt-parent = <&qeic>; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "clk7"; - tx-clock-name = "clk8"; - phy-handle = <&phy4>; - pio-handle = <&pio4>; - }; - - ucc@2400 { - device_type = "serial"; - compatible = "ucc_uart"; - cell-index = <5>; /* The UCC number, 1-7*/ - port-number = <0>; /* Which ttyQEx device */ - soft-uart; /* We need Soft-UART */ - reg = <0x2400 0x200>; - interrupts = <40>; /* From Table 18-12 */ - interrupt-parent = < &qeic >; - /* - * For Soft-UART, we need to set TX to 1X, which - * means specifying separate clock sources. - */ - rx-clock-name = "brg5"; - tx-clock-name = "brg6"; - pio-handle = < &pio5 >; - }; - - - mdio@2320 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0x2320 0x18>; - compatible = "fsl,ucc-mdio"; - - phy3: ethernet-phy@3 { - interrupt-parent = <&ipic>; - interrupts = <17 0x8>; - reg = <0x3>; - }; - phy4: ethernet-phy@4 { - interrupt-parent = <&ipic>; - interrupts = <18 0x8>; - reg = <0x4>; - }; - }; - - qeic: interrupt-controller@80 { - interrupt-controller; - compatible = "fsl,qe-ic"; - #address-cells = <0>; - #interrupt-cells = <1>; - reg = <0x80 0x80>; - big-endian; - interrupts = <32 0x8 33 0x8>; //high:32 low:33 - interrupt-parent = <&ipic>; - }; - }; - - pci0: pci@e0008500 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x11 AD17 */ - 0x8800 0x0 0x0 0x1 &ipic 20 0x8 - 0x8800 0x0 0x0 0x2 &ipic 21 0x8 - 0x8800 0x0 0x0 0x3 &ipic 22 0x8 - 0x8800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL 0x12 AD18 */ - 0x9000 0x0 0x0 0x1 &ipic 22 0x8 - 0x9000 0x0 0x0 0x2 &ipic 23 0x8 - 0x9000 0x0 0x0 0x3 &ipic 20 0x8 - 0x9000 0x0 0x0 0x4 &ipic 21 0x8 - - /* IDSEL 0x13 AD19 */ - 0x9800 0x0 0x0 0x1 &ipic 23 0x8 - 0x9800 0x0 0x0 0x2 &ipic 20 0x8 - 0x9800 0x0 0x0 0x3 &ipic 21 0x8 - 0x9800 0x0 0x0 0x4 &ipic 22 0x8 - - /* IDSEL 0x15 AD21*/ - 0xa800 0x0 0x0 0x1 &ipic 20 0x8 - 0xa800 0x0 0x0 0x2 &ipic 21 0x8 - 0xa800 0x0 0x0 0x3 &ipic 22 0x8 - 0xa800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL 0x16 AD22*/ - 0xb000 0x0 0x0 0x1 &ipic 23 0x8 - 0xb000 0x0 0x0 0x2 &ipic 20 0x8 - 0xb000 0x0 0x0 0x3 &ipic 21 0x8 - 0xb000 0x0 0x0 0x4 &ipic 22 0x8 - - /* IDSEL 0x17 AD23*/ - 0xb800 0x0 0x0 0x1 &ipic 22 0x8 - 0xb800 0x0 0x0 0x2 &ipic 23 0x8 - 0xb800 0x0 0x0 0x3 &ipic 20 0x8 - 0xb800 0x0 0x0 0x4 &ipic 21 0x8 - - /* IDSEL 0x18 AD24*/ - 0xc000 0x0 0x0 0x1 &ipic 21 0x8 - 0xc000 0x0 0x0 0x2 &ipic 22 0x8 - 0xc000 0x0 0x0 0x3 &ipic 23 0x8 - 0xc000 0x0 0x0 0x4 &ipic 20 0x8>; - interrupt-parent = <&ipic>; - interrupts = <66 0x8>; - bus-range = <0x0 0x0>; - ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 - 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xd0000000 0x0 0x00100000>; - clock-frequency = <0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008500 0x100 /* internal registers */ - 0xe0008300 0x8>; /* config space access registers */ - compatible = "fsl,mpc8349-pci"; - device_type = "pci"; - sleep = <&pmc 0x00010000>; - }; -}; diff --git a/dts/src/powerpc/mpc834x_mds.dts b/dts/src/powerpc/mpc834x_mds.dts deleted file mode 100644 index 6c8cb859c5..0000000000 --- a/dts/src/powerpc/mpc834x_mds.dts +++ /dev/null @@ -1,403 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * MPC8349E MDS Device Tree Source - * - * Copyright 2005, 2006 Freescale Semiconductor Inc. - */ - -/dts-v1/; - -/ { - model = "MPC8349EMDS"; - compatible = "MPC8349EMDS", "MPC834xMDS", "MPC83xxMDS"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8349@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - timebase-frequency = <0>; // from bootloader - bus-frequency = <0>; // from bootloader - clock-frequency = <0>; // from bootloader - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x10000000>; // 256MB at 0 - }; - - bcsr@e2400000 { - compatible = "fsl,mpc8349mds-bcsr"; - reg = <0xe2400000 0x8000>; - }; - - soc8349@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x00100000>; - reg = <0xe0000000 0x00000200>; - bus-frequency = <0>; - - wdt@200 { - device_type = "watchdog"; - compatible = "mpc83xx_wdt"; - reg = <0x200 0x100>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - - rtc@68 { - compatible = "dallas,ds1374"; - reg = <0x68>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <15 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - }; - - spi@7000 { - cell-index = <0>; - compatible = "fsl,spi"; - reg = <0x7000 0x1000>; - interrupts = <16 0x8>; - interrupt-parent = <&ipic>; - mode = "cpu"; - }; - - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8349-dma", "fsl,elo-dma"; - reg = <0x82a8 4>; - ranges = <0 0x8100 0x1a8>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; - reg = <0 0x80>; - cell-index = <0>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@80 { - compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@100 { - compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@180 { - compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; - reg = <0x180 0x28>; - cell-index = <3>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - }; - - /* phy type (ULPI or SERIAL) are only types supported for MPH */ - /* port = 0 or 1 */ - usb@22000 { - compatible = "fsl-usb2-mph"; - reg = <0x22000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&ipic>; - interrupts = <39 0x8>; - phy_type = "ulpi"; - port0; - }; - /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ - usb@23000 { - compatible = "fsl-usb2-dr"; - reg = <0x23000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&ipic>; - interrupts = <38 0x8>; - dr_mode = "otg"; - phy_type = "ulpi"; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <32 0x8 33 0x8 34 0x8>; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - linux,network-index = <0>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@0 { - interrupt-parent = <&ipic>; - interrupts = <17 0x8>; - reg = <0x0>; - }; - - phy1: ethernet-phy@1 { - interrupt-parent = <&ipic>; - interrupts = <18 0x8>; - reg = <0x1>; - }; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 0x8 36 0x8 37 0x8>; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - linux,network-index = <1>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <10 0x8>; - interrupt-parent = <&ipic>; - }; - - crypto@30000 { - compatible = "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x7e>; - fsl,descriptor-types-mask = <0x01010ebf>; - }; - - /* IPIC - * interrupts cell = <intr #, sense> - * sense values match linux IORESOURCE_IRQ_* defines: - * sense == 8: Level, low assertion - * sense == 2: Edge, high-to-low change - */ - ipic: pic@700 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x700 0x100>; - device_type = "ipic"; - }; - }; - - pci0: pci@e0008500 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x11 */ - 0x8800 0x0 0x0 0x1 &ipic 20 0x8 - 0x8800 0x0 0x0 0x2 &ipic 21 0x8 - 0x8800 0x0 0x0 0x3 &ipic 22 0x8 - 0x8800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL 0x12 */ - 0x9000 0x0 0x0 0x1 &ipic 22 0x8 - 0x9000 0x0 0x0 0x2 &ipic 23 0x8 - 0x9000 0x0 0x0 0x3 &ipic 20 0x8 - 0x9000 0x0 0x0 0x4 &ipic 21 0x8 - - /* IDSEL 0x13 */ - 0x9800 0x0 0x0 0x1 &ipic 23 0x8 - 0x9800 0x0 0x0 0x2 &ipic 20 0x8 - 0x9800 0x0 0x0 0x3 &ipic 21 0x8 - 0x9800 0x0 0x0 0x4 &ipic 22 0x8 - - /* IDSEL 0x15 */ - 0xa800 0x0 0x0 0x1 &ipic 20 0x8 - 0xa800 0x0 0x0 0x2 &ipic 21 0x8 - 0xa800 0x0 0x0 0x3 &ipic 22 0x8 - 0xa800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL 0x16 */ - 0xb000 0x0 0x0 0x1 &ipic 23 0x8 - 0xb000 0x0 0x0 0x2 &ipic 20 0x8 - 0xb000 0x0 0x0 0x3 &ipic 21 0x8 - 0xb000 0x0 0x0 0x4 &ipic 22 0x8 - - /* IDSEL 0x17 */ - 0xb800 0x0 0x0 0x1 &ipic 22 0x8 - 0xb800 0x0 0x0 0x2 &ipic 23 0x8 - 0xb800 0x0 0x0 0x3 &ipic 20 0x8 - 0xb800 0x0 0x0 0x4 &ipic 21 0x8 - - /* IDSEL 0x18 */ - 0xc000 0x0 0x0 0x1 &ipic 21 0x8 - 0xc000 0x0 0x0 0x2 &ipic 22 0x8 - 0xc000 0x0 0x0 0x3 &ipic 23 0x8 - 0xc000 0x0 0x0 0x4 &ipic 20 0x8>; - interrupt-parent = <&ipic>; - interrupts = <66 0x8>; - bus-range = <0 0>; - ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 - 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008500 0x100 /* internal registers */ - 0xe0008300 0x8>; /* config space access registers */ - compatible = "fsl,mpc8349-pci"; - device_type = "pci"; - }; - - pci1: pci@e0008600 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x11 */ - 0x8800 0x0 0x0 0x1 &ipic 20 0x8 - 0x8800 0x0 0x0 0x2 &ipic 21 0x8 - 0x8800 0x0 0x0 0x3 &ipic 22 0x8 - 0x8800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL 0x12 */ - 0x9000 0x0 0x0 0x1 &ipic 22 0x8 - 0x9000 0x0 0x0 0x2 &ipic 23 0x8 - 0x9000 0x0 0x0 0x3 &ipic 20 0x8 - 0x9000 0x0 0x0 0x4 &ipic 21 0x8 - - /* IDSEL 0x13 */ - 0x9800 0x0 0x0 0x1 &ipic 23 0x8 - 0x9800 0x0 0x0 0x2 &ipic 20 0x8 - 0x9800 0x0 0x0 0x3 &ipic 21 0x8 - 0x9800 0x0 0x0 0x4 &ipic 22 0x8 - - /* IDSEL 0x15 */ - 0xa800 0x0 0x0 0x1 &ipic 20 0x8 - 0xa800 0x0 0x0 0x2 &ipic 21 0x8 - 0xa800 0x0 0x0 0x3 &ipic 22 0x8 - 0xa800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL 0x16 */ - 0xb000 0x0 0x0 0x1 &ipic 23 0x8 - 0xb000 0x0 0x0 0x2 &ipic 20 0x8 - 0xb000 0x0 0x0 0x3 &ipic 21 0x8 - 0xb000 0x0 0x0 0x4 &ipic 22 0x8 - - /* IDSEL 0x17 */ - 0xb800 0x0 0x0 0x1 &ipic 22 0x8 - 0xb800 0x0 0x0 0x2 &ipic 23 0x8 - 0xb800 0x0 0x0 0x3 &ipic 20 0x8 - 0xb800 0x0 0x0 0x4 &ipic 21 0x8 - - /* IDSEL 0x18 */ - 0xc000 0x0 0x0 0x1 &ipic 21 0x8 - 0xc000 0x0 0x0 0x2 &ipic 22 0x8 - 0xc000 0x0 0x0 0x3 &ipic 23 0x8 - 0xc000 0x0 0x0 0x4 &ipic 20 0x8>; - interrupt-parent = <&ipic>; - interrupts = <67 0x8>; - bus-range = <0 0>; - ranges = <0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000 - 0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe2100000 0x0 0x00100000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008600 0x100 /* internal registers */ - 0xe0008380 0x8>; /* config space access registers */ - compatible = "fsl,mpc8349-pci"; - device_type = "pci"; - }; -}; diff --git a/dts/src/powerpc/mpc836x_mds.dts b/dts/src/powerpc/mpc836x_mds.dts deleted file mode 100644 index f4ca12ec57..0000000000 --- a/dts/src/powerpc/mpc836x_mds.dts +++ /dev/null @@ -1,481 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * MPC8360E EMDS Device Tree Source - * - * Copyright 2006 Freescale Semiconductor Inc. - */ - - -/* -/memreserve/ 00000000 1000000; -*/ - -/dts-v1/; - -/ { - model = "MPC8360MDS"; - compatible = "MPC8360EMDS", "MPC836xMDS", "MPC83xxMDS"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8360@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <32768>; // L1, 32K - i-cache-size = <32768>; // L1, 32K - timebase-frequency = <66000000>; - bus-frequency = <264000000>; - clock-frequency = <528000000>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x10000000>; - }; - - localbus@e0005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8360-localbus", "fsl,pq2pro-localbus", - "simple-bus"; - reg = <0xe0005000 0xd8>; - ranges = <0 0 0xfe000000 0x02000000 - 1 0 0xf8000000 0x00008000>; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x2000000>; - bank-width = <2>; - device-width = <1>; - }; - - bcsr@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8360mds-bcsr"; - reg = <1 0 0x8000>; - ranges = <0 1 0 0x8000>; - - bcsr13: gpio-controller@d { - #gpio-cells = <2>; - compatible = "fsl,mpc8360mds-bcsr-gpio"; - reg = <0xd 1>; - gpio-controller; - }; - }; - }; - - soc8360@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x00100000>; - reg = <0xe0000000 0x00000200>; - bus-frequency = <264000000>; - - wdt@200 { - device_type = "watchdog"; - compatible = "mpc83xx_wdt"; - reg = <0x200 0x100>; - }; - - pmc: power@b00 { - compatible = "fsl,mpc8360-pmc", "fsl,mpc8349-pmc"; - reg = <0xb00 0x100 0xa00 0x100>; - interrupts = <80 0x8>; - interrupt-parent = <&ipic>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - - rtc@68 { - compatible = "dallas,ds1374"; - reg = <0x68>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <15 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <264000000>; - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <264000000>; - interrupts = <10 0x8>; - interrupt-parent = <&ipic>; - }; - - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8360-dma", "fsl,elo-dma"; - reg = <0x82a8 4>; - ranges = <0 0x8100 0x1a8>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; - reg = <0 0x80>; - cell-index = <0>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@80 { - compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@100 { - compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@180 { - compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; - reg = <0x180 0x28>; - cell-index = <3>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - }; - - crypto@30000 { - compatible = "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x7e>; - fsl,descriptor-types-mask = <0x01010ebf>; - sleep = <&pmc 0x03000000>; - }; - - ipic: pic@700 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x700 0x100>; - device_type = "ipic"; - }; - - par_io@1400 { - #address-cells = <1>; - #size-cells = <1>; - reg = <0x1400 0x100>; - ranges = <0 0x1400 0x100>; - device_type = "par_io"; - num-ports = <7>; - - qe_pio_b: gpio-controller@18 { - #gpio-cells = <2>; - compatible = "fsl,mpc8360-qe-pario-bank", - "fsl,mpc8323-qe-pario-bank"; - reg = <0x18 0x18>; - gpio-controller; - }; - - pio1: ucc_pin@1 { - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 0 3 1 0 1 0 /* TxD0 */ - 0 4 1 0 1 0 /* TxD1 */ - 0 5 1 0 1 0 /* TxD2 */ - 0 6 1 0 1 0 /* TxD3 */ - 1 6 1 0 3 0 /* TxD4 */ - 1 7 1 0 1 0 /* TxD5 */ - 1 9 1 0 2 0 /* TxD6 */ - 1 10 1 0 2 0 /* TxD7 */ - 0 9 2 0 1 0 /* RxD0 */ - 0 10 2 0 1 0 /* RxD1 */ - 0 11 2 0 1 0 /* RxD2 */ - 0 12 2 0 1 0 /* RxD3 */ - 0 13 2 0 1 0 /* RxD4 */ - 1 1 2 0 2 0 /* RxD5 */ - 1 0 2 0 2 0 /* RxD6 */ - 1 4 2 0 2 0 /* RxD7 */ - 0 7 1 0 1 0 /* TX_EN */ - 0 8 1 0 1 0 /* TX_ER */ - 0 15 2 0 1 0 /* RX_DV */ - 0 16 2 0 1 0 /* RX_ER */ - 0 0 2 0 1 0 /* RX_CLK */ - 2 9 1 0 3 0 /* GTX_CLK - CLK10 */ - 2 8 2 0 1 0>; /* GTX125 - CLK9 */ - }; - pio2: ucc_pin@2 { - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 0 17 1 0 1 0 /* TxD0 */ - 0 18 1 0 1 0 /* TxD1 */ - 0 19 1 0 1 0 /* TxD2 */ - 0 20 1 0 1 0 /* TxD3 */ - 1 2 1 0 1 0 /* TxD4 */ - 1 3 1 0 2 0 /* TxD5 */ - 1 5 1 0 3 0 /* TxD6 */ - 1 8 1 0 3 0 /* TxD7 */ - 0 23 2 0 1 0 /* RxD0 */ - 0 24 2 0 1 0 /* RxD1 */ - 0 25 2 0 1 0 /* RxD2 */ - 0 26 2 0 1 0 /* RxD3 */ - 0 27 2 0 1 0 /* RxD4 */ - 1 12 2 0 2 0 /* RxD5 */ - 1 13 2 0 3 0 /* RxD6 */ - 1 11 2 0 2 0 /* RxD7 */ - 0 21 1 0 1 0 /* TX_EN */ - 0 22 1 0 1 0 /* TX_ER */ - 0 29 2 0 1 0 /* RX_DV */ - 0 30 2 0 1 0 /* RX_ER */ - 0 31 2 0 1 0 /* RX_CLK */ - 2 2 1 0 2 0 /* GTX_CLK - CLK10 */ - 2 3 2 0 1 0 /* GTX125 - CLK4 */ - 0 1 3 0 2 0 /* MDIO */ - 0 2 1 0 1 0>; /* MDC */ - }; - - }; - }; - - qe@e0100000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "qe"; - compatible = "fsl,qe"; - ranges = <0x0 0xe0100000 0x00100000>; - reg = <0xe0100000 0x480>; - brg-frequency = <0>; - bus-frequency = <396000000>; - fsl,qe-num-riscs = <2>; - fsl,qe-num-snums = <28>; - - muram@10000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,qe-muram", "fsl,cpm-muram"; - ranges = <0x0 0x00010000 0x0000c000>; - - data-only@0 { - compatible = "fsl,qe-muram-data", - "fsl,cpm-muram-data"; - reg = <0x0 0xc000>; - }; - }; - - timer@440 { - compatible = "fsl,mpc8360-qe-gtm", - "fsl,qe-gtm", "fsl,gtm"; - reg = <0x440 0x40>; - clock-frequency = <132000000>; - interrupts = <12 13 14 15>; - interrupt-parent = <&qeic>; - }; - - spi@4c0 { - cell-index = <0>; - compatible = "fsl,spi"; - reg = <0x4c0 0x40>; - interrupts = <2>; - interrupt-parent = <&qeic>; - mode = "cpu"; - }; - - spi@500 { - cell-index = <1>; - compatible = "fsl,spi"; - reg = <0x500 0x40>; - interrupts = <1>; - interrupt-parent = <&qeic>; - mode = "cpu"; - }; - - usb@6c0 { - compatible = "fsl,mpc8360-qe-usb", - "fsl,mpc8323-qe-usb"; - reg = <0x6c0 0x40 0x8b00 0x100>; - interrupts = <11>; - interrupt-parent = <&qeic>; - fsl,fullspeed-clock = "clk21"; - fsl,lowspeed-clock = "brg9"; - gpios = <&qe_pio_b 2 0 /* USBOE */ - &qe_pio_b 3 0 /* USBTP */ - &qe_pio_b 8 0 /* USBTN */ - &qe_pio_b 9 0 /* USBRP */ - &qe_pio_b 11 0 /* USBRN */ - &bcsr13 5 0 /* SPEED */ - &bcsr13 4 1>; /* POWER */ - }; - - enet0: ucc@2000 { - device_type = "network"; - compatible = "ucc_geth"; - cell-index = <1>; - reg = <0x2000 0x200>; - interrupts = <32>; - interrupt-parent = <&qeic>; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "none"; - tx-clock-name = "clk9"; - phy-handle = <&phy0>; - phy-connection-type = "rgmii-id"; - pio-handle = <&pio1>; - }; - - enet1: ucc@3000 { - device_type = "network"; - compatible = "ucc_geth"; - cell-index = <2>; - reg = <0x3000 0x200>; - interrupts = <33>; - interrupt-parent = <&qeic>; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "none"; - tx-clock-name = "clk4"; - phy-handle = <&phy1>; - phy-connection-type = "rgmii-id"; - pio-handle = <&pio2>; - }; - - mdio@2120 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0x2120 0x18>; - compatible = "fsl,ucc-mdio"; - - phy0: ethernet-phy@0 { - interrupt-parent = <&ipic>; - interrupts = <17 0x8>; - reg = <0x0>; - }; - phy1: ethernet-phy@1 { - interrupt-parent = <&ipic>; - interrupts = <18 0x8>; - reg = <0x1>; - }; - tbi-phy@2 { - device_type = "tbi-phy"; - reg = <0x2>; - }; - }; - - qeic: interrupt-controller@80 { - interrupt-controller; - compatible = "fsl,qe-ic"; - #address-cells = <0>; - #interrupt-cells = <1>; - reg = <0x80 0x80>; - big-endian; - interrupts = <32 0x8 33 0x8>; // high:32 low:33 - interrupt-parent = <&ipic>; - }; - }; - - pci0: pci@e0008500 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x11 AD17 */ - 0x8800 0x0 0x0 0x1 &ipic 20 0x8 - 0x8800 0x0 0x0 0x2 &ipic 21 0x8 - 0x8800 0x0 0x0 0x3 &ipic 22 0x8 - 0x8800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL 0x12 AD18 */ - 0x9000 0x0 0x0 0x1 &ipic 22 0x8 - 0x9000 0x0 0x0 0x2 &ipic 23 0x8 - 0x9000 0x0 0x0 0x3 &ipic 20 0x8 - 0x9000 0x0 0x0 0x4 &ipic 21 0x8 - - /* IDSEL 0x13 AD19 */ - 0x9800 0x0 0x0 0x1 &ipic 23 0x8 - 0x9800 0x0 0x0 0x2 &ipic 20 0x8 - 0x9800 0x0 0x0 0x3 &ipic 21 0x8 - 0x9800 0x0 0x0 0x4 &ipic 22 0x8 - - /* IDSEL 0x15 AD21*/ - 0xa800 0x0 0x0 0x1 &ipic 20 0x8 - 0xa800 0x0 0x0 0x2 &ipic 21 0x8 - 0xa800 0x0 0x0 0x3 &ipic 22 0x8 - 0xa800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL 0x16 AD22*/ - 0xb000 0x0 0x0 0x1 &ipic 23 0x8 - 0xb000 0x0 0x0 0x2 &ipic 20 0x8 - 0xb000 0x0 0x0 0x3 &ipic 21 0x8 - 0xb000 0x0 0x0 0x4 &ipic 22 0x8 - - /* IDSEL 0x17 AD23*/ - 0xb800 0x0 0x0 0x1 &ipic 22 0x8 - 0xb800 0x0 0x0 0x2 &ipic 23 0x8 - 0xb800 0x0 0x0 0x3 &ipic 20 0x8 - 0xb800 0x0 0x0 0x4 &ipic 21 0x8 - - /* IDSEL 0x18 AD24*/ - 0xc000 0x0 0x0 0x1 &ipic 21 0x8 - 0xc000 0x0 0x0 0x2 &ipic 22 0x8 - 0xc000 0x0 0x0 0x3 &ipic 23 0x8 - 0xc000 0x0 0x0 0x4 &ipic 20 0x8>; - interrupt-parent = <&ipic>; - interrupts = <66 0x8>; - bus-range = <0 0>; - ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000 - 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008500 0x100 /* internal registers */ - 0xe0008300 0x8>; /* config space access registers */ - compatible = "fsl,mpc8349-pci"; - device_type = "pci"; - sleep = <&pmc 0x00010000>; - }; -}; diff --git a/dts/src/powerpc/mpc8377_mds.dts b/dts/src/powerpc/mpc8377_mds.dts deleted file mode 100644 index 9227bce0e2..0000000000 --- a/dts/src/powerpc/mpc8377_mds.dts +++ /dev/null @@ -1,505 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * MPC8377E MDS Device Tree Source - * - * Copyright 2007 Freescale Semiconductor Inc. - */ - -/dts-v1/; - -/ { - model = "fsl,mpc8377emds"; - compatible = "fsl,mpc8377emds","fsl,mpc837xmds"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8377@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x20000000>; // 512MB at 0 - }; - - localbus@e0005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8377-elbc", "fsl,elbc", "simple-bus"; - reg = <0xe0005000 0x1000>; - interrupts = <77 0x8>; - interrupt-parent = <&ipic>; - - // booting from NOR flash - ranges = <0 0x0 0xfe000000 0x02000000 - 1 0x0 0xf8000000 0x00008000 - 3 0x0 0xe0600000 0x00008000>; - - flash@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0 0x0 0x2000000>; - bank-width = <2>; - device-width = <1>; - - u-boot@0 { - reg = <0x0 0x100000>; - read-only; - }; - - fs@100000 { - reg = <0x100000 0x800000>; - }; - - kernel@1d00000 { - reg = <0x1d00000 0x200000>; - }; - - dtb@1f00000 { - reg = <0x1f00000 0x100000>; - }; - }; - - bcsr@1,0 { - reg = <1 0x0 0x8000>; - compatible = "fsl,mpc837xmds-bcsr"; - }; - - nand@3,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8377-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <3 0x0 0x8000>; - - u-boot@0 { - reg = <0x0 0x100000>; - read-only; - }; - - kernel@100000 { - reg = <0x100000 0x300000>; - }; - - fs@400000 { - reg = <0x400000 0x1c00000>; - }; - }; - }; - - soc@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x00100000>; - reg = <0xe0000000 0x00000200>; - bus-frequency = <0>; - - wdt@200 { - compatible = "mpc83xx_wdt"; - reg = <0x200 0x100>; - }; - - sleep-nexus { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - sleep = <&pmc 0x0c000000>; - ranges; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - - rtc@68 { - compatible = "dallas,ds1374"; - reg = <0x68>; - interrupts = <19 0x8>; - interrupt-parent = <&ipic>; - }; - }; - - sdhci@2e000 { - compatible = "fsl,mpc8377-esdhc", "fsl,esdhc"; - reg = <0x2e000 0x1000>; - interrupts = <42 0x8>; - interrupt-parent = <&ipic>; - sdhci,wp-inverted; - /* Filled in by U-Boot */ - clock-frequency = <0>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <15 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - }; - - spi@7000 { - cell-index = <0>; - compatible = "fsl,spi"; - reg = <0x7000 0x1000>; - interrupts = <16 0x8>; - interrupt-parent = <&ipic>; - mode = "cpu"; - }; - - usb@23000 { - compatible = "fsl-usb2-dr"; - reg = <0x23000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&ipic>; - interrupts = <38 0x8>; - dr_mode = "host"; - phy_type = "ulpi"; - sleep = <&pmc 0x00c00000>; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <32 0x8 33 0x8 34 0x8>; - phy-connection-type = "mii"; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy2>; - sleep = <&pmc 0xc0000000>; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy2: ethernet-phy@2 { - interrupt-parent = <&ipic>; - interrupts = <17 0x8>; - reg = <0x2>; - }; - - phy3: ethernet-phy@3 { - interrupt-parent = <&ipic>; - interrupts = <18 0x8>; - reg = <0x3>; - }; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 0x8 36 0x8 37 0x8>; - phy-connection-type = "mii"; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy3>; - sleep = <&pmc 0x30000000>; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <10 0x8>; - interrupt-parent = <&ipic>; - }; - - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8377-dma", "fsl,elo-dma"; - reg = <0x82a8 4>; - ranges = <0 0x8100 0x1a8>; - interrupt-parent = <&ipic>; - interrupts = <0x47 8>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; - reg = <0 0x80>; - cell-index = <0>; - interrupt-parent = <&ipic>; - interrupts = <0x47 8>; - }; - dma-channel@80 { - compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&ipic>; - interrupts = <0x47 8>; - }; - dma-channel@100 { - compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&ipic>; - interrupts = <0x47 8>; - }; - dma-channel@180 { - compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; - reg = <0x180 0x28>; - cell-index = <3>; - interrupt-parent = <&ipic>; - interrupts = <0x47 8>; - }; - }; - - crypto@30000 { - compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", - "fsl,sec2.1", "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x9fe>; - fsl,descriptor-types-mask = <0x3ab0ebf>; - sleep = <&pmc 0x03000000>; - }; - - sata@18000 { - compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; - reg = <0x18000 0x1000>; - interrupts = <44 0x8>; - interrupt-parent = <&ipic>; - sleep = <&pmc 0x000000c0>; - }; - - sata@19000 { - compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; - reg = <0x19000 0x1000>; - interrupts = <45 0x8>; - interrupt-parent = <&ipic>; - sleep = <&pmc 0x00000030>; - }; - - /* IPIC - * interrupts cell = <intr #, sense> - * sense values match linux IORESOURCE_IRQ_* defines: - * sense == 8: Level, low assertion - * sense == 2: Edge, high-to-low change - */ - ipic: pic@700 { - compatible = "fsl,ipic"; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x700 0x100>; - }; - - pmc: power@b00 { - compatible = "fsl,mpc8377-pmc", "fsl,mpc8349-pmc"; - reg = <0xb00 0x100 0xa00 0x100>; - interrupts = <80 0x8>; - interrupt-parent = <&ipic>; - }; - }; - - pci0: pci@e0008500 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x11 */ - 0x8800 0x0 0x0 0x1 &ipic 20 0x8 - 0x8800 0x0 0x0 0x2 &ipic 21 0x8 - 0x8800 0x0 0x0 0x3 &ipic 22 0x8 - 0x8800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL 0x12 */ - 0x9000 0x0 0x0 0x1 &ipic 22 0x8 - 0x9000 0x0 0x0 0x2 &ipic 23 0x8 - 0x9000 0x0 0x0 0x3 &ipic 20 0x8 - 0x9000 0x0 0x0 0x4 &ipic 21 0x8 - - /* IDSEL 0x13 */ - 0x9800 0x0 0x0 0x1 &ipic 23 0x8 - 0x9800 0x0 0x0 0x2 &ipic 20 0x8 - 0x9800 0x0 0x0 0x3 &ipic 21 0x8 - 0x9800 0x0 0x0 0x4 &ipic 22 0x8 - - /* IDSEL 0x15 */ - 0xa800 0x0 0x0 0x1 &ipic 20 0x8 - 0xa800 0x0 0x0 0x2 &ipic 21 0x8 - 0xa800 0x0 0x0 0x3 &ipic 22 0x8 - 0xa800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL 0x16 */ - 0xb000 0x0 0x0 0x1 &ipic 23 0x8 - 0xb000 0x0 0x0 0x2 &ipic 20 0x8 - 0xb000 0x0 0x0 0x3 &ipic 21 0x8 - 0xb000 0x0 0x0 0x4 &ipic 22 0x8 - - /* IDSEL 0x17 */ - 0xb800 0x0 0x0 0x1 &ipic 22 0x8 - 0xb800 0x0 0x0 0x2 &ipic 23 0x8 - 0xb800 0x0 0x0 0x3 &ipic 20 0x8 - 0xb800 0x0 0x0 0x4 &ipic 21 0x8 - - /* IDSEL 0x18 */ - 0xc000 0x0 0x0 0x1 &ipic 21 0x8 - 0xc000 0x0 0x0 0x2 &ipic 22 0x8 - 0xc000 0x0 0x0 0x3 &ipic 23 0x8 - 0xc000 0x0 0x0 0x4 &ipic 20 0x8>; - interrupt-parent = <&ipic>; - interrupts = <66 0x8>; - bus-range = <0x0 0x0>; - ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 - 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>; - sleep = <&pmc 0x00010000>; - clock-frequency = <0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008500 0x100 /* internal registers */ - 0xe0008300 0x8>; /* config space access registers */ - compatible = "fsl,mpc8349-pci"; - device_type = "pci"; - }; - - pci1: pcie@e0009000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie"; - reg = <0xe0009000 0x00001000>; - ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000 - 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>; - bus-range = <0 255>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0 0 0 1 &ipic 1 8 - 0 0 0 2 &ipic 1 8 - 0 0 0 3 &ipic 1 8 - 0 0 0 4 &ipic 1 8>; - sleep = <&pmc 0x00300000>; - clock-frequency = <0>; - - pcie@0 { - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - reg = <0 0 0 0 0>; - ranges = <0x02000000 0 0xa8000000 - 0x02000000 0 0xa8000000 - 0 0x10000000 - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00800000>; - }; - }; - - pci2: pcie@e000a000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie"; - reg = <0xe000a000 0x00001000>; - ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000 - 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>; - bus-range = <0 255>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0 0 0 1 &ipic 2 8 - 0 0 0 2 &ipic 2 8 - 0 0 0 3 &ipic 2 8 - 0 0 0 4 &ipic 2 8>; - sleep = <&pmc 0x000c0000>; - clock-frequency = <0>; - - pcie@0 { - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - reg = <0 0 0 0 0>; - ranges = <0x02000000 0 0xc8000000 - 0x02000000 0 0xc8000000 - 0 0x10000000 - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00800000>; - }; - }; -}; diff --git a/dts/src/powerpc/mpc8378_mds.dts b/dts/src/powerpc/mpc8378_mds.dts deleted file mode 100644 index e45b25554e..0000000000 --- a/dts/src/powerpc/mpc8378_mds.dts +++ /dev/null @@ -1,489 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * MPC8378E MDS Device Tree Source - * - * Copyright 2007 Freescale Semiconductor Inc. - */ - -/dts-v1/; - -/ { - model = "fsl,mpc8378emds"; - compatible = "fsl,mpc8378emds","fsl,mpc837xmds"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8378@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x20000000>; // 512MB at 0 - }; - - localbus@e0005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8378-elbc", "fsl,elbc", "simple-bus"; - reg = <0xe0005000 0x1000>; - interrupts = <77 0x8>; - interrupt-parent = <&ipic>; - - // booting from NOR flash - ranges = <0 0x0 0xfe000000 0x02000000 - 1 0x0 0xf8000000 0x00008000 - 3 0x0 0xe0600000 0x00008000>; - - flash@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0 0x0 0x2000000>; - bank-width = <2>; - device-width = <1>; - - u-boot@0 { - reg = <0x0 0x100000>; - read-only; - }; - - fs@100000 { - reg = <0x100000 0x800000>; - }; - - kernel@1d00000 { - reg = <0x1d00000 0x200000>; - }; - - dtb@1f00000 { - reg = <0x1f00000 0x100000>; - }; - }; - - bcsr@1,0 { - reg = <1 0x0 0x8000>; - compatible = "fsl,mpc837xmds-bcsr"; - }; - - nand@3,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8378-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <3 0x0 0x8000>; - - u-boot@0 { - reg = <0x0 0x100000>; - read-only; - }; - - kernel@100000 { - reg = <0x100000 0x300000>; - }; - - fs@400000 { - reg = <0x400000 0x1c00000>; - }; - }; - }; - - soc@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x00100000>; - reg = <0xe0000000 0x00000200>; - bus-frequency = <0>; - - wdt@200 { - compatible = "mpc83xx_wdt"; - reg = <0x200 0x100>; - }; - - sleep-nexus { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - sleep = <&pmc 0x0c000000>; - ranges; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - - rtc@68 { - compatible = "dallas,ds1374"; - reg = <0x68>; - interrupts = <19 0x8>; - interrupt-parent = <&ipic>; - }; - }; - - sdhci@2e000 { - compatible = "fsl,mpc8378-esdhc", "fsl,esdhc"; - reg = <0x2e000 0x1000>; - interrupts = <42 0x8>; - interrupt-parent = <&ipic>; - sdhci,wp-inverted; - /* Filled in by U-Boot */ - clock-frequency = <0>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <15 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - }; - - spi@7000 { - cell-index = <0>; - compatible = "fsl,spi"; - reg = <0x7000 0x1000>; - interrupts = <16 0x8>; - interrupt-parent = <&ipic>; - mode = "cpu"; - }; - - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8378-dma", "fsl,elo-dma"; - reg = <0x82a8 4>; - ranges = <0 0x8100 0x1a8>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; - reg = <0 0x80>; - cell-index = <0>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@80 { - compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@100 { - compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@180 { - compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; - reg = <0x180 0x28>; - cell-index = <3>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - }; - - usb@23000 { - compatible = "fsl-usb2-dr"; - reg = <0x23000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&ipic>; - interrupts = <38 0x8>; - dr_mode = "host"; - phy_type = "ulpi"; - sleep = <&pmc 0x00c00000>; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <32 0x8 33 0x8 34 0x8>; - phy-connection-type = "mii"; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy2>; - sleep = <&pmc 0xc0000000>; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy2: ethernet-phy@2 { - interrupt-parent = <&ipic>; - interrupts = <17 0x8>; - reg = <0x2>; - }; - - phy3: ethernet-phy@3 { - interrupt-parent = <&ipic>; - interrupts = <18 0x8>; - reg = <0x3>; - }; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 0x8 36 0x8 37 0x8>; - phy-connection-type = "mii"; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy3>; - sleep = <&pmc 0x30000000>; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <10 0x8>; - interrupt-parent = <&ipic>; - }; - - crypto@30000 { - compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", - "fsl,sec2.1", "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x9fe>; - fsl,descriptor-types-mask = <0x3ab0ebf>; - sleep = <&pmc 0x03000000>; - }; - - /* IPIC - * interrupts cell = <intr #, sense> - * sense values match linux IORESOURCE_IRQ_* defines: - * sense == 8: Level, low assertion - * sense == 2: Edge, high-to-low change - */ - ipic: pic@700 { - compatible = "fsl,ipic"; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x700 0x100>; - }; - - pmc: power@b00 { - compatible = "fsl,mpc8378-pmc", "fsl,mpc8349-pmc"; - reg = <0xb00 0x100 0xa00 0x100>; - interrupts = <80 0x8>; - interrupt-parent = <&ipic>; - }; - }; - - pci0: pci@e0008500 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x11 */ - 0x8800 0x0 0x0 0x1 &ipic 20 0x8 - 0x8800 0x0 0x0 0x2 &ipic 21 0x8 - 0x8800 0x0 0x0 0x3 &ipic 22 0x8 - 0x8800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL 0x12 */ - 0x9000 0x0 0x0 0x1 &ipic 22 0x8 - 0x9000 0x0 0x0 0x2 &ipic 23 0x8 - 0x9000 0x0 0x0 0x3 &ipic 20 0x8 - 0x9000 0x0 0x0 0x4 &ipic 21 0x8 - - /* IDSEL 0x13 */ - 0x9800 0x0 0x0 0x1 &ipic 23 0x8 - 0x9800 0x0 0x0 0x2 &ipic 20 0x8 - 0x9800 0x0 0x0 0x3 &ipic 21 0x8 - 0x9800 0x0 0x0 0x4 &ipic 22 0x8 - - /* IDSEL 0x15 */ - 0xa800 0x0 0x0 0x1 &ipic 20 0x8 - 0xa800 0x0 0x0 0x2 &ipic 21 0x8 - 0xa800 0x0 0x0 0x3 &ipic 22 0x8 - 0xa800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL 0x16 */ - 0xb000 0x0 0x0 0x1 &ipic 23 0x8 - 0xb000 0x0 0x0 0x2 &ipic 20 0x8 - 0xb000 0x0 0x0 0x3 &ipic 21 0x8 - 0xb000 0x0 0x0 0x4 &ipic 22 0x8 - - /* IDSEL 0x17 */ - 0xb800 0x0 0x0 0x1 &ipic 22 0x8 - 0xb800 0x0 0x0 0x2 &ipic 23 0x8 - 0xb800 0x0 0x0 0x3 &ipic 20 0x8 - 0xb800 0x0 0x0 0x4 &ipic 21 0x8 - - /* IDSEL 0x18 */ - 0xc000 0x0 0x0 0x1 &ipic 21 0x8 - 0xc000 0x0 0x0 0x2 &ipic 22 0x8 - 0xc000 0x0 0x0 0x3 &ipic 23 0x8 - 0xc000 0x0 0x0 0x4 &ipic 20 0x8>; - interrupt-parent = <&ipic>; - interrupts = <66 0x8>; - bus-range = <0x0 0x0>; - ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 - 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>; - clock-frequency = <0>; - sleep = <&pmc 0x00010000>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008500 0x100 /* internal registers */ - 0xe0008300 0x8>; /* config space access registers */ - compatible = "fsl,mpc8349-pci"; - device_type = "pci"; - }; - - pci1: pcie@e0009000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie"; - reg = <0xe0009000 0x00001000>; - ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000 - 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>; - bus-range = <0 255>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0 0 0 1 &ipic 1 8 - 0 0 0 2 &ipic 1 8 - 0 0 0 3 &ipic 1 8 - 0 0 0 4 &ipic 1 8>; - sleep = <&pmc 0x00300000>; - clock-frequency = <0>; - - pcie@0 { - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - reg = <0 0 0 0 0>; - ranges = <0x02000000 0 0xa8000000 - 0x02000000 0 0xa8000000 - 0 0x10000000 - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00800000>; - }; - }; - - pci2: pcie@e000a000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie"; - reg = <0xe000a000 0x00001000>; - ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000 - 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>; - bus-range = <0 255>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0 0 0 1 &ipic 2 8 - 0 0 0 2 &ipic 2 8 - 0 0 0 3 &ipic 2 8 - 0 0 0 4 &ipic 2 8>; - sleep = <&pmc 0x000c0000>; - clock-frequency = <0>; - - pcie@0 { - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - reg = <0 0 0 0 0>; - ranges = <0x02000000 0 0xc8000000 - 0x02000000 0 0xc8000000 - 0 0x10000000 - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00800000>; - }; - }; -}; diff --git a/dts/src/powerpc/mpc8379_mds.dts b/dts/src/powerpc/mpc8379_mds.dts deleted file mode 100644 index f7379a1cbb..0000000000 --- a/dts/src/powerpc/mpc8379_mds.dts +++ /dev/null @@ -1,455 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * MPC8379E MDS Device Tree Source - * - * Copyright 2007 Freescale Semiconductor Inc. - */ - -/dts-v1/; - -/ { - model = "fsl,mpc8379emds"; - compatible = "fsl,mpc8379emds","fsl,mpc837xmds"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8379@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x20000000>; // 512MB at 0 - }; - - localbus@e0005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8379-elbc", "fsl,elbc", "simple-bus"; - reg = <0xe0005000 0x1000>; - interrupts = <77 0x8>; - interrupt-parent = <&ipic>; - - // booting from NOR flash - ranges = <0 0x0 0xfe000000 0x02000000 - 1 0x0 0xf8000000 0x00008000 - 3 0x0 0xe0600000 0x00008000>; - - flash@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0 0x0 0x2000000>; - bank-width = <2>; - device-width = <1>; - - u-boot@0 { - reg = <0x0 0x100000>; - read-only; - }; - - fs@100000 { - reg = <0x100000 0x800000>; - }; - - kernel@1d00000 { - reg = <0x1d00000 0x200000>; - }; - - dtb@1f00000 { - reg = <0x1f00000 0x100000>; - }; - }; - - bcsr@1,0 { - reg = <1 0x0 0x8000>; - compatible = "fsl,mpc837xmds-bcsr"; - }; - - nand@3,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8379-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <3 0x0 0x8000>; - - u-boot@0 { - reg = <0x0 0x100000>; - read-only; - }; - - kernel@100000 { - reg = <0x100000 0x300000>; - }; - - fs@400000 { - reg = <0x400000 0x1c00000>; - }; - }; - }; - - soc@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x00100000>; - reg = <0xe0000000 0x00000200>; - bus-frequency = <0>; - - wdt@200 { - compatible = "mpc83xx_wdt"; - reg = <0x200 0x100>; - }; - - sleep-nexus { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - sleep = <&pmc 0x0c000000>; - ranges; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - - rtc@68 { - compatible = "dallas,ds1374"; - reg = <0x68>; - interrupts = <19 0x8>; - interrupt-parent = <&ipic>; - }; - }; - - sdhci@2e000 { - compatible = "fsl,mpc8379-esdhc", "fsl,esdhc"; - reg = <0x2e000 0x1000>; - interrupts = <42 0x8>; - interrupt-parent = <&ipic>; - sdhci,wp-inverted; - /* Filled in by U-Boot */ - clock-frequency = <0>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <15 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - }; - - spi@7000 { - cell-index = <0>; - compatible = "fsl,spi"; - reg = <0x7000 0x1000>; - interrupts = <16 0x8>; - interrupt-parent = <&ipic>; - mode = "cpu"; - }; - - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8379-dma", "fsl,elo-dma"; - reg = <0x82a8 4>; - ranges = <0 0x8100 0x1a8>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; - reg = <0 0x80>; - cell-index = <0>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@80 { - compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@100 { - compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@180 { - compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; - reg = <0x180 0x28>; - cell-index = <3>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - }; - - usb@23000 { - compatible = "fsl-usb2-dr"; - reg = <0x23000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&ipic>; - interrupts = <38 0x8>; - dr_mode = "host"; - phy_type = "ulpi"; - sleep = <&pmc 0x00c00000>; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <32 0x8 33 0x8 34 0x8>; - phy-connection-type = "mii"; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy2>; - sleep = <&pmc 0xc0000000>; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy2: ethernet-phy@2 { - interrupt-parent = <&ipic>; - interrupts = <17 0x8>; - reg = <0x2>; - }; - - phy3: ethernet-phy@3 { - interrupt-parent = <&ipic>; - interrupts = <18 0x8>; - reg = <0x3>; - }; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 0x8 36 0x8 37 0x8>; - phy-connection-type = "mii"; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy3>; - sleep = <&pmc 0x30000000>; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <10 0x8>; - interrupt-parent = <&ipic>; - }; - - crypto@30000 { - compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", - "fsl,sec2.1", "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x9fe>; - fsl,descriptor-types-mask = <0x3ab0ebf>; - sleep = <&pmc 0x03000000>; - }; - - sata@18000 { - compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; - reg = <0x18000 0x1000>; - interrupts = <44 0x8>; - interrupt-parent = <&ipic>; - sleep = <&pmc 0x000000c0>; - }; - - sata@19000 { - compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; - reg = <0x19000 0x1000>; - interrupts = <45 0x8>; - interrupt-parent = <&ipic>; - sleep = <&pmc 0x00000030>; - }; - - sata@1a000 { - compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; - reg = <0x1a000 0x1000>; - interrupts = <46 0x8>; - interrupt-parent = <&ipic>; - sleep = <&pmc 0x0000000c>; - }; - - sata@1b000 { - compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; - reg = <0x1b000 0x1000>; - interrupts = <47 0x8>; - interrupt-parent = <&ipic>; - sleep = <&pmc 0x00000003>; - }; - - /* IPIC - * interrupts cell = <intr #, sense> - * sense values match linux IORESOURCE_IRQ_* defines: - * sense == 8: Level, low assertion - * sense == 2: Edge, high-to-low change - */ - ipic: pic@700 { - compatible = "fsl,ipic"; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x700 0x100>; - }; - - pmc: power@b00 { - compatible = "fsl,mpc8379-pmc", "fsl,mpc8349-pmc"; - reg = <0xb00 0x100 0xa00 0x100>; - interrupts = <80 0x8>; - interrupt-parent = <&ipic>; - }; - }; - - pci0: pci@e0008500 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x11 */ - 0x8800 0x0 0x0 0x1 &ipic 20 0x8 - 0x8800 0x0 0x0 0x2 &ipic 21 0x8 - 0x8800 0x0 0x0 0x3 &ipic 22 0x8 - 0x8800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL 0x12 */ - 0x9000 0x0 0x0 0x1 &ipic 22 0x8 - 0x9000 0x0 0x0 0x2 &ipic 23 0x8 - 0x9000 0x0 0x0 0x3 &ipic 20 0x8 - 0x9000 0x0 0x0 0x4 &ipic 21 0x8 - - /* IDSEL 0x13 */ - 0x9800 0x0 0x0 0x1 &ipic 23 0x8 - 0x9800 0x0 0x0 0x2 &ipic 20 0x8 - 0x9800 0x0 0x0 0x3 &ipic 21 0x8 - 0x9800 0x0 0x0 0x4 &ipic 22 0x8 - - /* IDSEL 0x15 */ - 0xa800 0x0 0x0 0x1 &ipic 20 0x8 - 0xa800 0x0 0x0 0x2 &ipic 21 0x8 - 0xa800 0x0 0x0 0x3 &ipic 22 0x8 - 0xa800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL 0x16 */ - 0xb000 0x0 0x0 0x1 &ipic 23 0x8 - 0xb000 0x0 0x0 0x2 &ipic 20 0x8 - 0xb000 0x0 0x0 0x3 &ipic 21 0x8 - 0xb000 0x0 0x0 0x4 &ipic 22 0x8 - - /* IDSEL 0x17 */ - 0xb800 0x0 0x0 0x1 &ipic 22 0x8 - 0xb800 0x0 0x0 0x2 &ipic 23 0x8 - 0xb800 0x0 0x0 0x3 &ipic 20 0x8 - 0xb800 0x0 0x0 0x4 &ipic 21 0x8 - - /* IDSEL 0x18 */ - 0xc000 0x0 0x0 0x1 &ipic 21 0x8 - 0xc000 0x0 0x0 0x2 &ipic 22 0x8 - 0xc000 0x0 0x0 0x3 &ipic 23 0x8 - 0xc000 0x0 0x0 0x4 &ipic 20 0x8>; - interrupt-parent = <&ipic>; - interrupts = <66 0x8>; - bus-range = <0x0 0x0>; - ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 - 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>; - sleep = <&pmc 0x00010000>; - clock-frequency = <0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008500 0x100 /* internal registers */ - 0xe0008300 0x8>; /* config space access registers */ - compatible = "fsl,mpc8349-pci"; - device_type = "pci"; - }; -}; diff --git a/dts/src/powerpc/mpc8610_hpcd.dts b/dts/src/powerpc/mpc8610_hpcd.dts deleted file mode 100644 index 33bbe58c1a..0000000000 --- a/dts/src/powerpc/mpc8610_hpcd.dts +++ /dev/null @@ -1,503 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * MPC8610 HPCD Device Tree Source - * - * Copyright 2007-2008 Freescale Semiconductor Inc. - */ - -/dts-v1/; - -/ { - model = "MPC8610HPCD"; - compatible = "fsl,MPC8610HPCD"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8610@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; // L1 - i-cache-size = <32768>; // L1 - sleep = <&pmc 0x00008000 0 // core - &pmc 0x00004000 0>; // timebase - timebase-frequency = <0>; // From uboot - bus-frequency = <0>; // From uboot - clock-frequency = <0>; // From uboot - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x20000000>; // 512M at 0x0 - }; - - localbus@e0005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8610-elbc", "fsl,elbc", "simple-bus"; - reg = <0xe0005000 0x1000>; - interrupts = <19 2>; - interrupt-parent = <&mpic>; - ranges = <0 0 0xf8000000 0x08000000 - 1 0 0xf0000000 0x08000000 - 2 0 0xe8400000 0x00008000 - 4 0 0xe8440000 0x00008000 - 5 0 0xe8480000 0x00008000 - 6 0 0xe84c0000 0x00008000 - 3 0 0xe8000000 0x00000020>; - sleep = <&pmc 0x08000000 0>; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x8000000>; - bank-width = <2>; - device-width = <1>; - }; - - flash@1,0 { - compatible = "cfi-flash"; - reg = <1 0 0x8000000>; - bank-width = <2>; - device-width = <1>; - }; - - flash@2,0 { - compatible = "fsl,mpc8610-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <2 0 0x8000>; - }; - - flash@4,0 { - compatible = "fsl,mpc8610-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <4 0 0x8000>; - }; - - flash@5,0 { - compatible = "fsl,mpc8610-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <5 0 0x8000>; - }; - - flash@6,0 { - compatible = "fsl,mpc8610-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <6 0 0x8000>; - }; - - board-control@3,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,fpga-pixis"; - reg = <3 0 0x20>; - ranges = <0 3 0 0x20>; - interrupt-parent = <&mpic>; - interrupts = <8 8>; - - sdcsr_pio: gpio-controller@a { - #gpio-cells = <2>; - compatible = "fsl,fpga-pixis-gpio-bank"; - reg = <0xa 1>; - gpio-controller; - }; - }; - }; - - soc@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - #interrupt-cells = <2>; - device_type = "soc"; - compatible = "fsl,mpc8610-immr", "simple-bus"; - ranges = <0x0 0xe0000000 0x00100000>; - bus-frequency = <0>; - - mcm-law@0 { - compatible = "fsl,mcm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <10>; - }; - - mcm@1000 { - compatible = "fsl,mpc8610-mcm", "fsl,mcm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - - cs4270:codec@4f { - compatible = "cirrus,cs4270"; - reg = <0x4f>; - /* MCLK source is a stand-alone oscillator */ - clock-frequency = <12288000>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - sleep = <&pmc 0x00000004 0>; - dfsrr; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - sleep = <&pmc 0x00000002 0>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - sleep = <&pmc 0x00000008 0>; - }; - - spi@7000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc8610-spi", "fsl,spi"; - reg = <0x7000 0x40>; - cell-index = <0>; - interrupts = <59 2>; - interrupt-parent = <&mpic>; - mode = "cpu"; - cs-gpios = <&sdcsr_pio 7 0>; - sleep = <&pmc 0x00000800 0>; - - mmc-slot@0 { - compatible = "fsl,mpc8610hpcd-mmc-slot", - "mmc-spi-slot"; - reg = <0>; - gpios = <&sdcsr_pio 0 1 /* nCD */ - &sdcsr_pio 1 0>; /* WP */ - voltage-ranges = <3300 3300>; - spi-max-frequency = <50000000>; - }; - }; - - display@2c000 { - compatible = "fsl,diu"; - reg = <0x2c000 100>; - interrupts = <72 2>; - interrupt-parent = <&mpic>; - sleep = <&pmc 0x04000000 0>; - }; - - mpic: interrupt-controller@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - - msi@41600 { - compatible = "fsl,mpc8610-msi", "fsl,mpic-msi"; - reg = <0x41600 0x80>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xe0 0 - 0xe1 0 - 0xe2 0 - 0xe3 0 - 0xe4 0 - 0xe5 0 - 0xe6 0 - 0xe7 0>; - interrupt-parent = <&mpic>; - }; - - global-utilities@e0000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8610-guts"; - reg = <0xe0000 0x1000>; - ranges = <0 0xe0000 0x1000>; - fsl,has-rstcr; - - pmc: power@70 { - compatible = "fsl,mpc8610-pmc", - "fsl,mpc8641d-pmc"; - reg = <0x70 0x20>; - }; - }; - - wdt@e4000 { - compatible = "fsl,mpc8610-wdt"; - reg = <0xe4000 0x100>; - }; - - ssi@16000 { - compatible = "fsl,mpc8610-ssi"; - cell-index = <0>; - reg = <0x16000 0x100>; - interrupt-parent = <&mpic>; - interrupts = <62 2>; - fsl,mode = "i2s-slave"; - codec-handle = <&cs4270>; - fsl,playback-dma = <&dma00>; - fsl,capture-dma = <&dma01>; - fsl,fifo-depth = <8>; - sleep = <&pmc 0 0x08000000>; - }; - - ssi@16100 { - compatible = "fsl,mpc8610-ssi"; - status = "disabled"; - cell-index = <1>; - reg = <0x16100 0x100>; - interrupt-parent = <&mpic>; - interrupts = <63 2>; - fsl,fifo-depth = <8>; - sleep = <&pmc 0 0x04000000>; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8610-dma", "fsl,eloplus-dma"; - cell-index = <0>; - reg = <0x21300 0x4>; /* DMA general status register */ - ranges = <0x0 0x21100 0x200>; - sleep = <&pmc 0x00000400 0>; - - dma00: dma-channel@0 { - compatible = "fsl,mpc8610-dma-channel", - "fsl,ssi-dma-channel"; - cell-index = <0>; - reg = <0x0 0x80>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma01: dma-channel@1 { - compatible = "fsl,mpc8610-dma-channel", - "fsl,ssi-dma-channel"; - cell-index = <1>; - reg = <0x80 0x80>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@2 { - compatible = "fsl,mpc8610-dma-channel", - "fsl,eloplus-dma-channel"; - cell-index = <2>; - reg = <0x100 0x80>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@3 { - compatible = "fsl,mpc8610-dma-channel", - "fsl,eloplus-dma-channel"; - cell-index = <3>; - reg = <0x180 0x80>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - dma@c300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8610-dma", "fsl,eloplus-dma"; - cell-index = <1>; - reg = <0xc300 0x4>; /* DMA general status register */ - ranges = <0x0 0xc100 0x200>; - sleep = <&pmc 0x00000200 0>; - - dma-channel@0 { - compatible = "fsl,mpc8610-dma-channel", - "fsl,eloplus-dma-channel"; - cell-index = <0>; - reg = <0x0 0x80>; - interrupt-parent = <&mpic>; - interrupts = <76 2>; - }; - dma-channel@1 { - compatible = "fsl,mpc8610-dma-channel", - "fsl,eloplus-dma-channel"; - cell-index = <1>; - reg = <0x80 0x80>; - interrupt-parent = <&mpic>; - interrupts = <77 2>; - }; - dma-channel@2 { - compatible = "fsl,mpc8610-dma-channel", - "fsl,eloplus-dma-channel"; - cell-index = <2>; - reg = <0x100 0x80>; - interrupt-parent = <&mpic>; - interrupts = <78 2>; - }; - dma-channel@3 { - compatible = "fsl,mpc8610-dma-channel", - "fsl,eloplus-dma-channel"; - cell-index = <3>; - reg = <0x180 0x80>; - interrupt-parent = <&mpic>; - interrupts = <79 2>; - }; - }; - - }; - - pci0: pci@e0008000 { - compatible = "fsl,mpc8610-pci"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008000 0x1000>; - bus-range = <0 0>; - ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe1000000 0x0 0x00100000>; - sleep = <&pmc 0x80000000 0>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <24 2>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x11 */ - 0x8800 0 0 1 &mpic 4 1 - 0x8800 0 0 2 &mpic 5 1 - 0x8800 0 0 3 &mpic 6 1 - 0x8800 0 0 4 &mpic 7 1 - - /* IDSEL 0x12 */ - 0x9000 0 0 1 &mpic 5 1 - 0x9000 0 0 2 &mpic 6 1 - 0x9000 0 0 3 &mpic 7 1 - 0x9000 0 0 4 &mpic 4 1 - >; - }; - - pci1: pcie@e000a000 { - compatible = "fsl,mpc8641-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe000a000 0x1000>; - bus-range = <1 3>; - ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe3000000 0x0 0x00100000>; - sleep = <&pmc 0x40000000 0>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <26 2>; - interrupt-map-mask = <0xf800 0 0 7>; - - interrupt-map = < - /* IDSEL 0x1b */ - 0xd800 0 0 1 &mpic 2 1 - - /* IDSEL 0x1c*/ - 0xe000 0 0 1 &mpic 1 1 - 0xe000 0 0 2 &mpic 1 1 - 0xe000 0 0 3 &mpic 1 1 - 0xe000 0 0 4 &mpic 1 1 - - /* IDSEL 0x1f */ - 0xf800 0 0 1 &mpic 3 2 - 0xf800 0 0 2 &mpic 0 1 - >; - - pcie@0 { - reg = <0 0 0 0 0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x02000000 0x0 0xa0000000 - 0x02000000 0x0 0xa0000000 - 0x0 0x10000000 - 0x01000000 0x0 0x00000000 - 0x01000000 0x0 0x00000000 - 0x0 0x00100000>; - uli1575@0 { - reg = <0 0 0 0 0>; - #size-cells = <2>; - #address-cells = <3>; - ranges = <0x02000000 0x0 0xa0000000 - 0x02000000 0x0 0xa0000000 - 0x0 0x10000000 - 0x01000000 0x0 0x00000000 - 0x01000000 0x0 0x00000000 - 0x0 0x00100000>; - - isa@1e { - device_type = "isa"; - #size-cells = <1>; - #address-cells = <2>; - reg = <0xf000 0 0 0 0>; - ranges = <1 0 0x01000000 0 0 - 0x00001000>; - - rtc@70 { - compatible = "pnpPNP,b00"; - reg = <1 0x70 2>; - }; - }; - }; - }; - }; - - pci2: pcie@e0009000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "fsl,mpc8641-pcie"; - reg = <0xe0009000 0x00001000>; - ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000 - 0x01000000 0 0x00000000 0xe2000000 0 0x00100000>; - bus-range = <0 255>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0x0000 0 0 1 &mpic 4 1 - 0x0000 0 0 2 &mpic 5 1 - 0x0000 0 0 3 &mpic 6 1 - 0x0000 0 0 4 &mpic 7 1>; - interrupt-parent = <&mpic>; - interrupts = <25 2>; - sleep = <&pmc 0x20000000 0>; - clock-frequency = <33333333>; - }; -}; diff --git a/dts/src/powerpc/pq2fads.dts b/dts/src/powerpc/pq2fads.dts deleted file mode 100644 index b6666215ed..0000000000 --- a/dts/src/powerpc/pq2fads.dts +++ /dev/null @@ -1,243 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * Device Tree for the PQ2FADS-ZU board with an MPC8280 chip. - * - * Copyright 2007,2008 Freescale Semiconductor Inc. - */ - -/dts-v1/; - -/ { - model = "pq2fads"; - compatible = "fsl,pq2fads"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <16384>; - i-cache-size = <16384>; - timebase-frequency = <0>; - clock-frequency = <0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x0>; - }; - - localbus@f0010100 { - compatible = "fsl,mpc8280-localbus", - "fsl,pq2-localbus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0xf0010100 0x60>; - - ranges = <0x0 0x0 0xff800000 0x800000 - 0x1 0x0 0xf4500000 0x8000 - 0x8 0x0 0xf8200000 0x8000>; - - flash@0,0 { - compatible = "jedec-flash"; - reg = <0x0 0x0 0x800000>; - bank-width = <4>; - device-width = <1>; - }; - - bcsr@1,0 { - reg = <0x1 0x0 0x20>; - compatible = "fsl,pq2fads-bcsr"; - }; - - PCI_PIC: pic@8,0 { - #interrupt-cells = <1>; - interrupt-controller; - reg = <0x8 0x0 0x8>; - compatible = "fsl,pq2ads-pci-pic"; - interrupt-parent = <&PIC>; - interrupts = <24 8>; - }; - }; - - pci0: pci@f0010800 { - device_type = "pci"; - reg = <0xf0010800 0x10c 0xf00101ac 0x8 0xf00101c4 0x8>; - compatible = "fsl,mpc8280-pci", "fsl,pq2-pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - clock-frequency = <66000000>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x16 */ - 0xb000 0x0 0x0 0x1 &PCI_PIC 0 - 0xb000 0x0 0x0 0x2 &PCI_PIC 1 - 0xb000 0x0 0x0 0x3 &PCI_PIC 2 - 0xb000 0x0 0x0 0x4 &PCI_PIC 3 - - /* IDSEL 0x17 */ - 0xb800 0x0 0x0 0x1 &PCI_PIC 4 - 0xb800 0x0 0x0 0x2 &PCI_PIC 5 - 0xb800 0x0 0x0 0x3 &PCI_PIC 6 - 0xb800 0x0 0x0 0x4 &PCI_PIC 7 - - /* IDSEL 0x18 */ - 0xc000 0x0 0x0 0x1 &PCI_PIC 8 - 0xc000 0x0 0x0 0x2 &PCI_PIC 9 - 0xc000 0x0 0x0 0x3 &PCI_PIC 10 - 0xc000 0x0 0x0 0x4 &PCI_PIC 11>; - - interrupt-parent = <&PIC>; - interrupts = <18 8>; - ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x20000000 - 0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x0 0xf6000000 0x0 0x2000000>; - }; - - soc@f0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,mpc8280", "fsl,pq2-soc"; - ranges = <0x0 0xf0000000 0x53000>; - - // Temporary -- will go away once kernel uses ranges for get_immrbase(). - reg = <0xf0000000 0x53000>; - - cpm@119c0 { - #address-cells = <1>; - #size-cells = <1>; - #interrupt-cells = <2>; - compatible = "fsl,mpc8280-cpm", "fsl,cpm2"; - reg = <0x119c0 0x30>; - ranges; - - muram@0 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x0 0x10000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0x0 0x2000 0x9800 0x800>; - }; - }; - - brg@119f0 { - compatible = "fsl,mpc8280-brg", - "fsl,cpm2-brg", - "fsl,cpm-brg"; - reg = <0x119f0 0x10 0x115f0 0x10>; - }; - - serial0: serial@11a00 { - device_type = "serial"; - compatible = "fsl,mpc8280-scc-uart", - "fsl,cpm2-scc-uart"; - reg = <0x11a00 0x20 0x8000 0x100>; - interrupts = <40 8>; - interrupt-parent = <&PIC>; - fsl,cpm-brg = <1>; - fsl,cpm-command = <0x800000>; - }; - - serial1: serial@11a20 { - device_type = "serial"; - compatible = "fsl,mpc8280-scc-uart", - "fsl,cpm2-scc-uart"; - reg = <0x11a20 0x20 0x8100 0x100>; - interrupts = <41 8>; - interrupt-parent = <&PIC>; - fsl,cpm-brg = <2>; - fsl,cpm-command = <0x4a00000>; - }; - - enet0: ethernet@11320 { - device_type = "network"; - compatible = "fsl,mpc8280-fcc-enet", - "fsl,cpm2-fcc-enet"; - reg = <0x11320 0x20 0x8500 0x100 0x113b0 0x1>; - interrupts = <33 8>; - interrupt-parent = <&PIC>; - phy-handle = <&PHY0>; - linux,network-index = <0>; - fsl,cpm-command = <0x16200300>; - }; - - enet1: ethernet@11340 { - device_type = "network"; - compatible = "fsl,mpc8280-fcc-enet", - "fsl,cpm2-fcc-enet"; - reg = <0x11340 0x20 0x8600 0x100 0x113d0 0x1>; - interrupts = <34 8>; - interrupt-parent = <&PIC>; - phy-handle = <&PHY1>; - linux,network-index = <1>; - fsl,cpm-command = <0x1a400300>; - local-mac-address = [00 e0 0c 00 79 01]; - }; - - mdio@10d40 { - compatible = "fsl,pq2fads-mdio-bitbang", - "fsl,mpc8280-mdio-bitbang", - "fsl,cpm2-mdio-bitbang"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x10d40 0x14>; - fsl,mdio-pin = <9>; - fsl,mdc-pin = <10>; - - PHY0: ethernet-phy@0 { - interrupt-parent = <&PIC>; - interrupts = <25 2>; - reg = <0x0>; - }; - - PHY1: ethernet-phy@1 { - interrupt-parent = <&PIC>; - interrupts = <25 2>; - reg = <0x3>; - }; - }; - - usb@11b60 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc8280-usb", - "fsl,cpm2-usb"; - reg = <0x11b60 0x18 0x8b00 0x100>; - interrupt-parent = <&PIC>; - interrupts = <11 8>; - fsl,cpm-command = <0x2e600000>; - }; - }; - - PIC: interrupt-controller@10c00 { - #interrupt-cells = <2>; - interrupt-controller; - reg = <0x10c00 0x80>; - compatible = "fsl,mpc8280-pic", "fsl,cpm2-pic"; - }; - - }; - - chosen { - stdout-path = "/soc/cpm/serial@11a00"; - }; -}; diff --git a/dts/src/powerpc/stx_gp3_8560.dts b/dts/src/powerpc/stx_gp3_8560.dts index d1ab698eef..e73f7e75b0 100644 --- a/dts/src/powerpc/stx_gp3_8560.dts +++ b/dts/src/powerpc/stx_gp3_8560.dts @@ -7,6 +7,8 @@ /dts-v1/; +/include/ "fsl/e500v1_power_isa.dtsi" + / { model = "stx,gp3"; compatible = "stx,gp3-8560", "stx,gp3"; diff --git a/dts/src/powerpc/stxssa8555.dts b/dts/src/powerpc/stxssa8555.dts index 5dca2a91c4..96add25c90 100644 --- a/dts/src/powerpc/stxssa8555.dts +++ b/dts/src/powerpc/stxssa8555.dts @@ -9,6 +9,8 @@ /dts-v1/; +/include/ "fsl/e500v1_power_isa.dtsi" + / { model = "stx,gp3"; compatible = "stx,gp3-8560", "stx,gp3"; diff --git a/dts/src/powerpc/tqm8540.dts b/dts/src/powerpc/tqm8540.dts index 9c1eb97791..eb4d8fd3f7 100644 --- a/dts/src/powerpc/tqm8540.dts +++ b/dts/src/powerpc/tqm8540.dts @@ -7,6 +7,8 @@ /dts-v1/; +/include/ "fsl/e500v1_power_isa.dtsi" + / { model = "tqc,tqm8540"; compatible = "tqc,tqm8540"; diff --git a/dts/src/powerpc/tqm8541.dts b/dts/src/powerpc/tqm8541.dts index 44595cf675..fe5d3d873e 100644 --- a/dts/src/powerpc/tqm8541.dts +++ b/dts/src/powerpc/tqm8541.dts @@ -7,6 +7,8 @@ /dts-v1/; +/include/ "fsl/e500v1_power_isa.dtsi" + / { model = "tqc,tqm8541"; compatible = "tqc,tqm8541"; diff --git a/dts/src/powerpc/tqm8555.dts b/dts/src/powerpc/tqm8555.dts index 54f3e82907..4be05b7d22 100644 --- a/dts/src/powerpc/tqm8555.dts +++ b/dts/src/powerpc/tqm8555.dts @@ -7,6 +7,8 @@ /dts-v1/; +/include/ "fsl/e500v1_power_isa.dtsi" + / { model = "tqc,tqm8555"; compatible = "tqc,tqm8555"; diff --git a/dts/src/powerpc/tqm8560.dts b/dts/src/powerpc/tqm8560.dts index 7415cb69f6..8ea4850242 100644 --- a/dts/src/powerpc/tqm8560.dts +++ b/dts/src/powerpc/tqm8560.dts @@ -8,6 +8,8 @@ /dts-v1/; +/include/ "fsl/e500v1_power_isa.dtsi" + / { model = "tqc,tqm8560"; compatible = "tqc,tqm8560"; diff --git a/dts/src/powerpc/turris1x.dts b/dts/src/powerpc/turris1x.dts index 12e08271e6..dff1ea074d 100644 --- a/dts/src/powerpc/turris1x.dts +++ b/dts/src/powerpc/turris1x.dts @@ -15,7 +15,7 @@ / { model = "Turris 1.x"; - compatible = "cznic,turris1x", "fsl,P2020RDB-PC"; /* fsl,P2020RDB-PC is required for booting Linux */ + compatible = "cznic,turris1x"; aliases { ethernet0 = &enet0; @@ -69,6 +69,20 @@ interrupt-parent = <&gpio>; interrupts = <12 IRQ_TYPE_LEVEL_LOW>, /* GPIO12 - ALERT pin */ <13 IRQ_TYPE_LEVEL_LOW>; /* GPIO13 - CRIT pin */ + #address-cells = <1>; + #size-cells = <0>; + + /* Local temperature sensor (SA56004ED internal) */ + channel@0 { + reg = <0>; + label = "board"; + }; + + /* Remote temperature sensor (D+/D- connected to P2020 CPU Temperature Diode) */ + channel@1 { + reg = <1>; + label = "cpu"; + }; }; /* DDR3 SPD/EEPROM */ @@ -147,7 +161,7 @@ port@0 { reg = <0>; - label = "cpu1"; + label = "cpu"; ethernet = <&enet1>; phy-mode = "rgmii-id"; @@ -184,7 +198,7 @@ port@6 { reg = <6>; - label = "cpu0"; + label = "cpu"; ethernet = <&enet0>; phy-mode = "rgmii-id"; @@ -263,21 +277,21 @@ }; partition@20000 { - /* 1.7 MB for Rescue Linux Kernel Image */ + /* 1.7 MB for Linux Kernel Image */ reg = <0x00020000 0x001a0000>; - label = "rescue-kernel"; + label = "kernel"; }; partition@1c0000 { /* 1.5 MB for Rescue JFFS2 Root File System */ reg = <0x001c0000 0x00180000>; - label = "rescue-rootfs"; + label = "rescue"; }; partition@340000 { - /* 11 MB for TAR.XZ Backup with content of NAND Root File System */ + /* 11 MB for TAR.XZ Archive with Factory content of NAND Root File System */ reg = <0x00340000 0x00b00000>; - label = "backup-rootfs"; + label = "factory"; }; partition@e40000 { @@ -353,11 +367,34 @@ }; reboot@d { + /* + * CPLD firmware which manages system reset and + * watchdog registers has bugs. It does not + * autoclear system reset register after change + * and watchdog ignores reset line on immediate + * succeeding reset cycle triggered by watchdog. + * These bugs have to be workarounded in U-Boot + * bootloader. So use system reset via syscon as + * a last resort because older U-Boot versions + * do not have workaround for watchdog. + * + * Reset method via rstcr's global-utilities + * (the preferred one) has priority level 128, + * watchdog has priority level 0 and default + * syscon-reboot priority level is 192. + * + * So define syscon-reboot with custom priority + * level 64 (between rstcr and watchdog) because + * rstcr should stay as default preferred reset + * method and reset via watchdog is more broken + * than system reset via syscon. + */ compatible = "syscon-reboot"; reg = <0x0d 0x01>; offset = <0x0d>; mask = <0x01>; value = <0x01>; + priority = <64>; }; led-controller@13 { @@ -439,12 +476,12 @@ * channel 1 (but only USB 2.0 subset) to USB 2.0 pins on mPCIe * slot 1 (CN5), channels 2 and 3 to connector P600. * - * P2020 PCIe Root Port uses 1MB of PCIe MEM and xHCI controller + * P2020 PCIe Root Port does not use PCIe MEM and xHCI controller * uses 64kB + 8kB of PCIe MEM. No PCIe IO is used or required. - * So allocate 2MB of PCIe MEM for this PCIe bus. + * So allocate 128kB of PCIe MEM for this PCIe bus. */ reg = <0 0xffe08000 0 0x1000>; - ranges = <0x02000000 0x0 0xc0000000 0 0xc0000000 0x0 0x00200000>, /* MEM */ + ranges = <0x02000000 0x0 0xc0000000 0 0xc0000000 0x0 0x00020000>, /* MEM */ <0x01000000 0x0 0x00000000 0 0xffc20000 0x0 0x00010000>; /* IO */ pcie@0 { diff --git a/dts/src/powerpc/warp.dts b/dts/src/powerpc/warp.dts index b4f3274087..aa62d08e97 100644 --- a/dts/src/powerpc/warp.dts +++ b/dts/src/powerpc/warp.dts @@ -258,14 +258,12 @@ }; power-leds { - compatible = "gpio-leds"; + compatible = "warp-power-leds"; green { gpios = <&GPIO1 0 0>; - default-state = "keep"; }; red { gpios = <&GPIO1 1 0>; - default-state = "keep"; }; }; |