diff options
Diffstat (limited to 'include')
184 files changed, 4211 insertions, 202 deletions
diff --git a/include/.gitignore b/include/.gitignore index 18e58a752a..3ac630625d 100644 --- a/include/.gitignore +++ b/include/.gitignore @@ -1 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0-only + /config.h diff --git a/include/acpi.h b/include/acpi.h index b8e73b35df..04f722da23 100644 --- a/include/acpi.h +++ b/include/acpi.h @@ -10,6 +10,78 @@ #include <linux/types.h> #include <driver.h> +/* Names within the namespace are 4 bytes long */ + +#define ACPI_NAMESEG_SIZE 4 /* Fixed by ACPI spec */ +#define ACPI_PATH_SEGMENT_LENGTH 5 /* 4 chars for name + 1 char for separator */ +#define ACPI_PATH_SEPARATOR '.' + +/* Sizes for ACPI table headers */ + +#define ACPI_OEM_ID_SIZE 6 +#define ACPI_OEM_TABLE_ID_SIZE 8 + +/* + * Algorithm to obtain access bit or byte width. + * Can be used with access_width of struct acpi_generic_address and access_size of + * struct acpi_resource_generic_register. + */ +#define ACPI_ACCESS_BIT_WIDTH(size) (1 << ((size) + 2)) +#define ACPI_ACCESS_BYTE_WIDTH(size) (1 << ((size) - 1)) + +/* Address Space (Operation Region) Types */ + +typedef u8 acpi_adr_space_type; +#define ACPI_ADR_SPACE_SYSTEM_MEMORY (acpi_adr_space_type) 0 +#define ACPI_ADR_SPACE_SYSTEM_IO (acpi_adr_space_type) 1 +#define ACPI_ADR_SPACE_PCI_CONFIG (acpi_adr_space_type) 2 +#define ACPI_ADR_SPACE_EC (acpi_adr_space_type) 3 +#define ACPI_ADR_SPACE_SMBUS (acpi_adr_space_type) 4 +#define ACPI_ADR_SPACE_CMOS (acpi_adr_space_type) 5 +#define ACPI_ADR_SPACE_PCI_BAR_TARGET (acpi_adr_space_type) 6 +#define ACPI_ADR_SPACE_IPMI (acpi_adr_space_type) 7 +#define ACPI_ADR_SPACE_GPIO (acpi_adr_space_type) 8 +#define ACPI_ADR_SPACE_GSBUS (acpi_adr_space_type) 9 +#define ACPI_ADR_SPACE_PLATFORM_COMM (acpi_adr_space_type) 10 +#define ACPI_ADR_SPACE_PLATFORM_RT (acpi_adr_space_type) 11 + +/******************************************************************************* + * + * Master ACPI Table Header. This common header is used by all ACPI tables + * except the RSDP and FACS. + * + ******************************************************************************/ + +struct __packed acpi_table_header { + char signature[ACPI_NAMESEG_SIZE]; /* ASCII table signature */ + u32 length; /* Length of table in bytes, including this header */ + u8 revision; /* ACPI Specification minor version number */ + u8 checksum; /* To make sum of entire table == 0 */ + char oem_id[ACPI_OEM_ID_SIZE]; /* ASCII OEM identification */ + char oem_table_id[ACPI_OEM_TABLE_ID_SIZE]; /* ASCII OEM table identification */ + u32 oem_revision; /* OEM revision number */ + char asl_compiler_id[ACPI_NAMESEG_SIZE]; /* ASCII ASL compiler vendor ID */ + u32 asl_compiler_revision; /* ASL compiler version */ +}; + +/******************************************************************************* + * + * GAS - Generic Address Structure (ACPI 2.0+) + * + * Note: Since this structure is used in the ACPI tables, it is byte aligned. + * If misaligned access is not supported by the hardware, accesses to the + * 64-bit Address field must be performed with care. + * + ******************************************************************************/ + +struct __packed acpi_generic_address { + u8 space_id; /* Address space where struct or register exists */ + u8 bit_width; /* Size in bits of given register */ + u8 bit_offset; /* Bit offset within the register */ + u8 access_width; /* Minimum Access size (ACPI 3.0) */ + u64 address; /* 64-bit address of struct or register */ +}; + typedef char acpi_sig_t[4]; struct __packed acpi_rsdp { /* root system description pointer */ diff --git a/include/aiodev.h b/include/aiodev.h index d557715671..f0c26d7c58 100644 --- a/include/aiodev.h +++ b/include/aiodev.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + /* * core.c - Code implementing core functionality of AIODEV susbsystem * diff --git a/include/asm-generic/atomic-long.h b/include/asm-generic/atomic-long.h index fd1fdad20f..cafb25172c 100644 --- a/include/asm-generic/atomic-long.h +++ b/include/asm-generic/atomic-long.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _ASM_GENERIC_ATOMIC_LONG_H #define _ASM_GENERIC_ATOMIC_LONG_H /* diff --git a/include/asm-generic/barebox.lds.h b/include/asm-generic/barebox.lds.h index c5f9d97547..a22e251c9d 100644 --- a/include/asm-generic/barebox.lds.h +++ b/include/asm-generic/barebox.lds.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + /* * Align to a 32 byte boundary equal to the @@ -6,8 +8,7 @@ #define STRUCT_ALIGNMENT 32 #define STRUCT_ALIGN() . = ALIGN(STRUCT_ALIGNMENT) -#if defined CONFIG_X86 || \ - defined CONFIG_ARCH_EP93XX +#if defined CONFIG_ARCH_EP93XX #include <mach/barebox.lds.h> #endif diff --git a/include/asm-generic/bitops/__ffs.h b/include/asm-generic/bitops/__ffs.h index 9a3274aecf..6421acb3a5 100644 --- a/include/asm-generic/bitops/__ffs.h +++ b/include/asm-generic/bitops/__ffs.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _ASM_GENERIC_BITOPS___FFS_H_ #define _ASM_GENERIC_BITOPS___FFS_H_ diff --git a/include/asm-generic/bitops/__fls.h b/include/asm-generic/bitops/__fls.h index be24465403..a5615539c3 100644 --- a/include/asm-generic/bitops/__fls.h +++ b/include/asm-generic/bitops/__fls.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _ASM_GENERIC_BITOPS___FLS_H_ #define _ASM_GENERIC_BITOPS___FLS_H_ diff --git a/include/asm-generic/bitops/ffs.h b/include/asm-generic/bitops/ffs.h index 0ff1b8b7c7..4a375eae14 100644 --- a/include/asm-generic/bitops/ffs.h +++ b/include/asm-generic/bitops/ffs.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _ASM_GENERIC_BITOPS_FFS_H_ #define _ASM_GENERIC_BITOPS_FFS_H_ diff --git a/include/asm-generic/bitops/ffz.h b/include/asm-generic/bitops/ffz.h index 6744bd4cdf..f9f624837e 100644 --- a/include/asm-generic/bitops/ffz.h +++ b/include/asm-generic/bitops/ffz.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _ASM_GENERIC_BITOPS_FFZ_H_ #define _ASM_GENERIC_BITOPS_FFZ_H_ diff --git a/include/asm-generic/bitops/find.h b/include/asm-generic/bitops/find.h index 72a51e5a12..2ef6e94fa1 100644 --- a/include/asm-generic/bitops/find.h +++ b/include/asm-generic/bitops/find.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _ASM_GENERIC_BITOPS_FIND_H_ #define _ASM_GENERIC_BITOPS_FIND_H_ diff --git a/include/asm-generic/bitops/fls.h b/include/asm-generic/bitops/fls.h index cc0d3ca95a..faa02fc48d 100644 --- a/include/asm-generic/bitops/fls.h +++ b/include/asm-generic/bitops/fls.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _ASM_GENERIC_BITOPS_FLS_H_ #define _ASM_GENERIC_BITOPS_FLS_H_ diff --git a/include/asm-generic/bitops/fls64.h b/include/asm-generic/bitops/fls64.h index 86d403f8b2..45533402f0 100644 --- a/include/asm-generic/bitops/fls64.h +++ b/include/asm-generic/bitops/fls64.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _ASM_GENERIC_BITOPS_FLS64_H_ #define _ASM_GENERIC_BITOPS_FLS64_H_ diff --git a/include/asm-generic/bitops/hweight.h b/include/asm-generic/bitops/hweight.h index 7268c8b9ab..f0c188b675 100644 --- a/include/asm-generic/bitops/hweight.h +++ b/include/asm-generic/bitops/hweight.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _ASM_GENERIC_BITOPS_HWEIGHT_H_ #define _ASM_GENERIC_BITOPS_HWEIGHT_H_ diff --git a/include/asm-generic/bitops/ops.h b/include/asm-generic/bitops/ops.h index f19bcaa29b..1684621922 100644 --- a/include/asm-generic/bitops/ops.h +++ b/include/asm-generic/bitops/ops.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _ASM_GENERIC_BITOPS_OPS_H_ #define _ASM_GENERIC_BITOPS_OPS_H_ diff --git a/include/asm-generic/bitsperlong.h b/include/asm-generic/bitsperlong.h index bb98650298..20c055c6bd 100644 --- a/include/asm-generic/bitsperlong.h +++ b/include/asm-generic/bitsperlong.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __ASM_GENERIC_BITS_PER_LONG #define __ASM_GENERIC_BITS_PER_LONG @@ -7,4 +9,8 @@ #define BITS_PER_LONG 32 #endif /* CONFIG_64BIT */ +#ifndef BITS_PER_LONG_LONG +#define BITS_PER_LONG_LONG 64 +#endif + #endif /* __ASM_GENERIC_BITS_PER_LONG */ diff --git a/include/asm-generic/bug.h b/include/asm-generic/bug.h index 6aa3eada0e..5d0a458eae 100644 --- a/include/asm-generic/bug.h +++ b/include/asm-generic/bug.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _ASM_GENERIC_BUG_H #define _ASM_GENERIC_BUG_H @@ -48,4 +50,16 @@ } \ unlikely(__ret_warn_once); \ }) + +#define WARN_ON_ONCE(condition) ({ \ + static int __warned; \ + int __ret_warn_once = !!(condition); \ + \ + if (unlikely(__ret_warn_once && !__warned)) { \ + __warned = 1; \ + __WARN(); \ + } \ + unlikely(__ret_warn_once); \ +}) + #endif diff --git a/include/asm-generic/errno.h b/include/asm-generic/errno.h index 7d99a95370..a96f8864df 100644 --- a/include/asm-generic/errno.h +++ b/include/asm-generic/errno.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _ARM_ERRNO_H #define _ARM_ERRNO_H diff --git a/include/asm-generic/int-ll64.h b/include/asm-generic/int-ll64.h index f394147c07..8f220128d7 100644 --- a/include/asm-generic/int-ll64.h +++ b/include/asm-generic/int-ll64.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + /* * asm-generic/int-ll64.h * diff --git a/include/asm-generic/ioctl.h b/include/asm-generic/ioctl.h index 8641813855..eba15da2cc 100644 --- a/include/asm-generic/ioctl.h +++ b/include/asm-generic/ioctl.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _ASM_GENERIC_IOCTL_H #define _ASM_GENERIC_IOCTL_H diff --git a/include/asm-generic/memory_layout.h b/include/asm-generic/memory_layout.h index 0d7ce3fe02..5cfd2a43a0 100644 --- a/include/asm-generic/memory_layout.h +++ b/include/asm-generic/memory_layout.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __ASM_GENERIC_MEMORY_LAYOUT_H #define __ASM_GENERIC_MEMORY_LAYOUT_H diff --git a/include/asm-generic/posix_types.h b/include/asm-generic/posix_types.h index 136f161e15..35123c776a 100644 --- a/include/asm-generic/posix_types.h +++ b/include/asm-generic/posix_types.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __ASM_GENERIC_POSIX_TYPES_H #define __ASM_GENERIC_POSIX_TYPES_H diff --git a/include/asm-generic/sections.h b/include/asm-generic/sections.h index 870bff21f6..0b2ed5615b 100644 --- a/include/asm-generic/sections.h +++ b/include/asm-generic/sections.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _ASM_GENERIC_SECTIONS_H_ #define _ASM_GENERIC_SECTIONS_H_ diff --git a/include/asm-generic/swab.h b/include/asm-generic/swab.h index 3ab5add54f..f652dfe93f 100644 --- a/include/asm-generic/swab.h +++ b/include/asm-generic/swab.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _ASM_GENERIC_SWAB_H #define _ASM_GENERIC_SWAB_H diff --git a/include/ata_drive.h b/include/ata_drive.h index 6b8915c9cb..e11172ba39 100644 --- a/include/ata_drive.h +++ b/include/ata_drive.h @@ -67,7 +67,12 @@ enum { ATA_ID_MWDMA_MODES = 63, ATA_ID_PIO_MODES = 64, ATA_ID_QUEUE_DEPTH = 75, + ATA_ID_SATA_CAPAB_1 = 76, + ATA_ID_SATA_CAPAB_2 = 77, + ATA_ID_SATA_FEAT_SUPP = 78, + ATA_ID_SATA_FEAT_ENABLE = 79, ATA_ID_MAJOR_VER = 80, + ATA_ID_MINOR_VER = 81, ATA_ID_COMMAND_SET_1 = 82, ATA_ID_COMMAND_SET_2 = 83, ATA_ID_CFSSE = 84, diff --git a/include/base64.h b/include/base64.h index 0df510281d..993a366b48 100644 --- a/include/base64.h +++ b/include/base64.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __BASE64_H #define __BASE64_H diff --git a/include/common.h b/include/common.h index 4167d4676e..bd12035688 100644 --- a/include/common.h +++ b/include/common.h @@ -126,4 +126,10 @@ const char *barebox_get_hostname(void); void barebox_set_hostname(const char *); void barebox_set_hostname_no_overwrite(const char *); +const char *barebox_get_serial_number(void); +void barebox_set_serial_number(const char *); + +void barebox_set_of_machine_compatible(const char *); +const char *barebox_get_of_machine_compatible(void); + #endif /* __COMMON_H_ */ diff --git a/include/complete.h b/include/complete.h index 75a92fc86a..b0e675b559 100644 --- a/include/complete.h +++ b/include/complete.h @@ -23,5 +23,6 @@ int devicetree_nodepath_complete(struct string_list *sl, char *instr); int devicetree_complete(struct string_list *sl, char *instr); int devicetree_file_complete(struct string_list *sl, char *instr); int env_param_noeval_complete(struct string_list *sl, char *instr); +int tutorial_complete(struct string_list *sl, char *instr); #endif /* __COMPLETE_ */ diff --git a/include/cramfs/cramfs_fs.h b/include/cramfs/cramfs_fs.h index d2b67c5fe0..6b1d7a62d8 100644 --- a/include/cramfs/cramfs_fs.h +++ b/include/cramfs/cramfs_fs.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __CRAMFS_H #define __CRAMFS_H diff --git a/include/crypto/crc.h b/include/crypto/crc.h index 6428634d0a..f36c2d6445 100644 --- a/include/crypto/crc.h +++ b/include/crypto/crc.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + /* * Common values for CRC algorithms */ diff --git a/include/crypto/des.h b/include/crypto/des.h index 58fdaaa99d..abc3d9c59d 100644 --- a/include/crypto/des.h +++ b/include/crypto/des.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + /* * DES & Triple DES EDE Cipher Algorithms. */ diff --git a/include/crypto/sha.h b/include/crypto/sha.h index 190f8a0e02..17a489bd4a 100644 --- a/include/crypto/sha.h +++ b/include/crypto/sha.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + /* * Common values for SHA algorithms */ diff --git a/include/debug_ll/ns16550.h b/include/debug_ll/ns16550.h index 373c917d86..a4ca7332d3 100644 --- a/include/debug_ll/ns16550.h +++ b/include/debug_ll/ns16550.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __DEBUG_LL_NS16550_H #define __DEBUG_LL_NS16550_H diff --git a/include/debug_ll/pl011.h b/include/debug_ll/pl011.h index db015a373b..12f9ce1564 100644 --- a/include/debug_ll/pl011.h +++ b/include/debug_ll/pl011.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __INCLUDE_ARM_ASM_DEBUG_LL_PL011_H__ #define __INCLUDE_ARM_ASM_DEBUG_LL_PL011_H__ diff --git a/include/driver.h b/include/driver.h index 4f6d40e17c..b35b5f397e 100644 --- a/include/driver.h +++ b/include/driver.h @@ -141,6 +141,10 @@ void device_detect_all(void); */ int unregister_device(struct device_d *); +void free_device_res(struct device_d *dev); +void free_device(struct device_d *dev); + + /* Iterate over a devices children */ #define device_for_each_child(dev, child) \ @@ -328,6 +332,10 @@ extern struct list_head device_list; */ extern struct list_head driver_list; +/* linear list over all active devices + */ +extern struct list_head active_device_list; + /* Iterate over all devices */ #define for_each_device(dev) list_for_each_entry(dev, &device_list, list) @@ -447,7 +455,7 @@ struct cdev_operations { int (*truncate)(struct cdev*, size_t size); }; -#define MAX_PARTUUID_STR sizeof("00112233-4455-6677-8899-AABBCCDDEEFF") +#define MAX_UUID_STR sizeof("00112233-4455-6677-8899-AABBCCDDEEFF") struct cdev { const struct cdev_operations *ops; @@ -460,7 +468,7 @@ struct cdev { char *partname; /* the partition name, usually the above without the * device part, i.e. name = "nand0.barebox" -> partname = "barebox" */ - char partuuid[MAX_PARTUUID_STR]; + char uuid[MAX_UUID_STR]; loff_t offset; loff_t size; unsigned int flags; @@ -484,18 +492,28 @@ struct cdev *lcdev_by_name(const char *filename); struct cdev *cdev_readlink(struct cdev *cdev); struct cdev *cdev_by_device_node(struct device_node *node); struct cdev *cdev_by_partuuid(const char *partuuid); -struct cdev *cdev_open(const char *name, unsigned long flags); +struct cdev *cdev_by_diskuuid(const char *partuuid); +struct cdev *cdev_open_by_name(const char *name, unsigned long flags); struct cdev *cdev_create_loop(const char *path, ulong flags, loff_t offset); void cdev_remove_loop(struct cdev *cdev); -int cdev_do_open(struct cdev *, unsigned long flags); +int cdev_open(struct cdev *, unsigned long flags); void cdev_close(struct cdev *cdev); int cdev_flush(struct cdev *cdev); ssize_t cdev_read(struct cdev *cdev, void *buf, size_t count, loff_t offset, ulong flags); ssize_t cdev_write(struct cdev *cdev, const void *buf, size_t count, loff_t offset, ulong flags); int cdev_ioctl(struct cdev *cdev, int cmd, void *buf); int cdev_erase(struct cdev *cdev, loff_t count, loff_t offset); +int cdev_lseek(struct cdev*, loff_t); +int cdev_protect(struct cdev*, size_t count, loff_t offset, int prot); +int cdev_discard_range(struct cdev*, loff_t count, loff_t offset); +int cdev_memmap(struct cdev*, void **map, int flags); +int cdev_truncate(struct cdev*, size_t size); loff_t cdev_unallocated_space(struct cdev *cdev); +extern struct list_head cdev_list; +#define for_each_cdev(c) \ + list_for_each_entry(cdev, &cdev_list, list) + #define DEVFS_PARTITION_FIXED (1U << 0) #define DEVFS_PARTITION_READONLY (1U << 1) #define DEVFS_IS_CHARACTER_DEV (1U << 3) @@ -577,4 +595,17 @@ const void *device_get_match_data(struct device_d *dev); int device_match_of_modalias(struct device_d *dev, struct driver_d *drv); +struct device_d *device_find_child(struct device_d *parent, void *data, + int (*match)(struct device_d *dev, void *data)); + +static inline struct device_node *dev_of_node(struct device_d *dev) +{ + return IS_ENABLED(CONFIG_OFDEVICE) ? dev->device_node : NULL; +} + +static inline void *dev_get_priv(struct device_d *dev) +{ + return dev->priv; +} + #endif /* DRIVER_H */ diff --git a/include/dsa.h b/include/dsa.h new file mode 100644 index 0000000000..75a939f2cb --- /dev/null +++ b/include/dsa.h @@ -0,0 +1,90 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Copyright 2019-2021 NXP + */ + +#ifndef __DSA_H__ +#define __DSA_H__ + +#include <linux/phy.h> +#include <net.h> + +/** + * DSA stands for Distributed Switch Architecture and it is infrastructure + * intended to support drivers for Switches that rely on an intermediary + * Ethernet device for I/O. These switches may support cascading allowing + * them to be arranged as a tree. + * DSA is documented in detail in the Linux kernel documentation under + * Documentation/networking/dsa/dsa.txt + * The network layout of such a switch is shown below: + * + * |------| + * | eth0 | <--- master eth device (regular eth driver) + * |------| + * ^ | + * tag added by switch -->| | + * | | + * | |<-- tag added by DSA driver + * | v + * |--------------------------------------| + * | | CPU port | | <-- DSA (switch) device + * | ------------ | (DSA driver) + * | _________ _________ _________ | + * | | port0 | | port1 | ... | portn | | <-- ports as eth devices + * |-+-------+--+-------+-------+-------+-| ('dsa-port' eth driver) + * + */ + +#define DSA_MAX_PORTS 12 +#define DSA_PKTSIZE 1538 + +struct dsa_port; +struct dsa_switch; + +struct dsa_ops { + int (*port_probe)(struct dsa_port *dp, int port, + phy_interface_t phy_mode); + int (*port_pre_enable)(struct dsa_port *dp, int port, + phy_interface_t phy_mode); + int (*port_enable)(struct dsa_port *dp, int port, + struct phy_device *phy); + void (*port_disable)(struct dsa_port *dp, int port, + struct phy_device *phy); + int (*xmit)(struct dsa_port *dp, int port, void *packet, int length); + int (*rcv)(struct dsa_switch *ds, int *portp, void *packet, int length); + + int (*phy_read)(struct dsa_switch *ds, int port, int regnum); + int (*phy_write)(struct dsa_switch *ds, int port, int regnum, u16 val); +}; + +struct dsa_port { + struct device_d dev; + struct dsa_switch *ds; + unsigned int index; + struct eth_device edev; + unsigned char *rx_buf; + size_t rx_buf_length; + bool enabled; +}; + +struct dsa_switch { + struct device_d *dev; + const struct dsa_ops *ops; + size_t num_ports; + u32 cpu_port; + int cpu_port_users; + struct eth_device *edev_master; + struct phy_device *cpu_port_fixed_phy; + struct dsa_port *dp[DSA_MAX_PORTS]; + size_t needed_headroom; + size_t needed_rx_tailroom; + size_t needed_tx_tailroom; + void *tx_buf; + struct mii_bus *slave_mii_bus; + u32 phys_mii_mask; +}; + +int dsa_register_switch(struct dsa_switch *ds); +u32 dsa_user_ports(struct dsa_switch *ds); + +#endif /* __DSA_H__ */ diff --git a/include/elf.h b/include/elf.h index 7970fd2c95..12673e93ed 100644 --- a/include/elf.h +++ b/include/elf.h @@ -414,6 +414,7 @@ static inline size_t elf_get_mem_size(struct elf_image *elf) return elf->high_addr - elf->low_addr; } +struct elf_image *elf_open_binary(void *buf); struct elf_image *elf_open(const char *filename); void elf_close(struct elf_image *elf); int elf_load(struct elf_image *elf); diff --git a/include/fastboot.h b/include/fastboot.h index cf8a177bf1..8a98b482fe 100644 --- a/include/fastboot.h +++ b/include/fastboot.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __FASTBOOT__ #define __FASTBOOT__ diff --git a/include/filetype.h b/include/filetype.h index 2640847e1f..9b7499fdf3 100644 --- a/include/filetype.h +++ b/include/filetype.h @@ -28,6 +28,7 @@ enum filetype { filetype_mbr, filetype_bmp, filetype_png, + filetype_qoi, filetype_ext, filetype_gpt, filetype_ubifs, @@ -55,6 +56,7 @@ enum filetype { filetype_zynq_image, filetype_mxs_sd_image, filetype_rockchip_rkns_image, + filetype_fip, filetype_max, }; diff --git a/include/fpga-bridge.h b/include/fpga-bridge.h index fef2a9ccbb..300ab17b25 100644 --- a/include/fpga-bridge.h +++ b/include/fpga-bridge.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ #include <common.h> #ifndef _LINUX_FPGA_BRIDGE_H diff --git a/include/gpio.h b/include/gpio.h index 81beb47309..6134190138 100644 --- a/include/gpio.h +++ b/include/gpio.h @@ -5,6 +5,7 @@ #include <linux/types.h> #include <linux/list.h> #include <linux/iopoll.h> +#include <linux/bitops.h> #ifdef CONFIG_GENERIC_GPIO void gpio_set_value(unsigned gpio, int value); diff --git a/include/gpiod.h b/include/gpiod.h index c8b2cd47a3..adac50b4c3 100644 --- a/include/gpiod.h +++ b/include/gpiod.h @@ -14,7 +14,7 @@ enum gpiod_flags { GPIOD_IN = GPIOF_IN, /* * To change this later to a different logic level (i.e. taking - * active low into account), use gpio_direction_active() + * active low into account), use gpiod_set_value() */ GPIOD_OUT_LOW = GPIOF_OUT_INIT_INACTIVE, GPIOD_OUT_HIGH = GPIOF_OUT_INIT_ACTIVE, @@ -23,4 +23,10 @@ enum gpiod_flags { /* returned gpio descriptor can be passed to any normal gpio_* function */ int gpiod_get(struct device_d *dev, const char *_con_id, enum gpiod_flags flags); +static inline void gpiod_set_value(unsigned gpio, bool value) +{ + if (gpio != -ENOENT) + gpio_direction_active(gpio, value); +} + #endif diff --git a/include/gui/2d-primitives.h b/include/gui/2d-primitives.h index 06216bb03c..4fbddfae25 100644 --- a/include/gui/2d-primitives.h +++ b/include/gui/2d-primitives.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __2D_PRIMITIVES__ #define __2D_PRIMITIVES__ diff --git a/include/i2c/i2c-early.h b/include/i2c/i2c-early.h index d64c1a4384..fa93656e28 100644 --- a/include/i2c/i2c-early.h +++ b/include/i2c/i2c-early.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __I2C_EARLY_H #define __I2C_EARLY_H diff --git a/include/i2c/i2c.h b/include/i2c/i2c.h index af6287602c..7207b1180e 100644 --- a/include/i2c/i2c.h +++ b/include/i2c/i2c.h @@ -333,9 +333,14 @@ static inline int i2c_driver_register(struct driver_d *drv) return register_driver(drv); } +#ifdef CONFIG_I2C #define coredevice_i2c_driver(drv) \ register_driver_macro(coredevice, i2c, drv) #define device_i2c_driver(drv) \ register_driver_macro(device, i2c, drv) +#else +#define coredevice_i2c_driver(drv) +#define device_i2c_driver(drv) +#endif #endif /* I2C_I2C_H */ diff --git a/include/input/input.h b/include/input/input.h index dbf3e7f574..d169c647bd 100644 --- a/include/input/input.h +++ b/include/input/input.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __INPUT_H #define __INPUT_H diff --git a/include/input/keyboard.h b/include/input/keyboard.h index d1f5bf553a..5761273a4f 100644 --- a/include/input/keyboard.h +++ b/include/input/keyboard.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __INPUT_KEYBOARD_H #define __INPUT_KEYBOARD_H diff --git a/include/input/matrix_keypad.h b/include/input/matrix_keypad.h index 03d963af0e..7b78944f9b 100644 --- a/include/input/matrix_keypad.h +++ b/include/input/matrix_keypad.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _MATRIX_KEYPAD_H #define _MATRIX_KEYPAD_H diff --git a/include/libfile.h b/include/libfile.h index 3c2fe1714d..a353ccfa9e 100644 --- a/include/libfile.h +++ b/include/libfile.h @@ -2,6 +2,7 @@ #ifndef __LIBFILE_H #define __LIBFILE_H +int pread_full(int fd, void *buf, size_t size, loff_t offset); int pwrite_full(int fd, const void *buf, size_t size, loff_t offset); int write_full(int fd, const void *buf, size_t size); int read_full(int fd, void *buf, size_t size); diff --git a/include/linux/amba/mmci.h b/include/linux/amba/mmci.h index 0bf558124c..719daadbb7 100644 --- a/include/linux/amba/mmci.h +++ b/include/linux/amba/mmci.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + /* * include/linux/amba/mmci.h */ diff --git a/include/linux/amba/pl061.h b/include/linux/amba/pl061.h index d498cd7a8c..e1b2fac152 100644 --- a/include/linux/amba/pl061.h +++ b/include/linux/amba/pl061.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __AMBA_PL061_H__ #define __AMBA_PL061_H__ diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h index 1b38b7b372..64ee3863a6 100644 --- a/include/linux/arm-smccc.h +++ b/include/linux/arm-smccc.h @@ -1,28 +1,22 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2015, Linaro Limited - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * */ #ifndef __LINUX_ARM_SMCCC_H #define __LINUX_ARM_SMCCC_H +#include <linux/const.h> + /* * This file provides common defines for ARM SMC Calling Convention as * specified in - * http://infocenter.arm.com/help/topic/com.arm.doc.den0028a/index.html + * https://developer.arm.com/docs/den0028/latest + * + * This code is up-to-date with version DEN 0028 C */ -/* This constant is shifted by 31, make sure it's of an unsigned type */ -#define ARM_SMCCC_STD_CALL 0UL -#define ARM_SMCCC_FAST_CALL 1UL +#define ARM_SMCCC_STD_CALL _AC(0,U) +#define ARM_SMCCC_FAST_CALL _AC(1,U) #define ARM_SMCCC_TYPE_SHIFT 31 #define ARM_SMCCC_SMC_32 0 @@ -53,18 +47,178 @@ #define ARM_SMCCC_OWNER_SIP 2 #define ARM_SMCCC_OWNER_OEM 3 #define ARM_SMCCC_OWNER_STANDARD 4 +#define ARM_SMCCC_OWNER_STANDARD_HYP 5 +#define ARM_SMCCC_OWNER_VENDOR_HYP 6 #define ARM_SMCCC_OWNER_TRUSTED_APP 48 #define ARM_SMCCC_OWNER_TRUSTED_APP_END 49 #define ARM_SMCCC_OWNER_TRUSTED_OS 50 #define ARM_SMCCC_OWNER_TRUSTED_OS_END 63 +#define ARM_SMCCC_FUNC_QUERY_CALL_UID 0xff01 + #define ARM_SMCCC_QUIRK_NONE 0 #define ARM_SMCCC_QUIRK_QCOM_A6 1 /* Save/restore register a6 */ +#define ARM_SMCCC_VERSION_1_0 0x10000 +#define ARM_SMCCC_VERSION_1_1 0x10001 +#define ARM_SMCCC_VERSION_1_2 0x10002 + +#define ARM_SMCCC_VERSION_FUNC_ID \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_32, \ + 0, 0) + +#define ARM_SMCCC_ARCH_FEATURES_FUNC_ID \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_32, \ + 0, 1) + +#define ARM_SMCCC_ARCH_SOC_ID \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_32, \ + 0, 2) + +#define ARM_SMCCC_ARCH_WORKAROUND_1 \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_32, \ + 0, 0x8000) + +#define ARM_SMCCC_ARCH_WORKAROUND_2 \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_32, \ + 0, 0x7fff) + +#define ARM_SMCCC_VENDOR_HYP_CALL_UID_FUNC_ID \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_32, \ + ARM_SMCCC_OWNER_VENDOR_HYP, \ + ARM_SMCCC_FUNC_QUERY_CALL_UID) + +/* KVM UID value: 28b46fb6-2ec5-11e9-a9ca-4b564d003a74 */ +#define ARM_SMCCC_VENDOR_HYP_UID_KVM_REG_0 0xb66fb428U +#define ARM_SMCCC_VENDOR_HYP_UID_KVM_REG_1 0xe911c52eU +#define ARM_SMCCC_VENDOR_HYP_UID_KVM_REG_2 0x564bcaa9U +#define ARM_SMCCC_VENDOR_HYP_UID_KVM_REG_3 0x743a004dU + +/* KVM "vendor specific" services */ +#define ARM_SMCCC_KVM_FUNC_FEATURES 0 +#define ARM_SMCCC_KVM_FUNC_PTP 1 +#define ARM_SMCCC_KVM_FUNC_FEATURES_2 127 +#define ARM_SMCCC_KVM_NUM_FUNCS 128 + +#define ARM_SMCCC_VENDOR_HYP_KVM_FEATURES_FUNC_ID \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_32, \ + ARM_SMCCC_OWNER_VENDOR_HYP, \ + ARM_SMCCC_KVM_FUNC_FEATURES) + +#define SMCCC_ARCH_WORKAROUND_RET_UNAFFECTED 1 + +/* + * ptp_kvm is a feature used for time sync between vm and host. + * ptp_kvm module in guest kernel will get service from host using + * this hypercall ID. + */ +#define ARM_SMCCC_VENDOR_HYP_KVM_PTP_FUNC_ID \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_32, \ + ARM_SMCCC_OWNER_VENDOR_HYP, \ + ARM_SMCCC_KVM_FUNC_PTP) + +/* ptp_kvm counter type ID */ +#define KVM_PTP_VIRT_COUNTER 0 +#define KVM_PTP_PHYS_COUNTER 1 + +/* Paravirtualised time calls (defined by ARM DEN0057A) */ +#define ARM_SMCCC_HV_PV_TIME_FEATURES \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_64, \ + ARM_SMCCC_OWNER_STANDARD_HYP, \ + 0x20) + +#define ARM_SMCCC_HV_PV_TIME_ST \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_64, \ + ARM_SMCCC_OWNER_STANDARD_HYP, \ + 0x21) + +/* TRNG entropy source calls (defined by ARM DEN0098) */ +#define ARM_SMCCC_TRNG_VERSION \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_32, \ + ARM_SMCCC_OWNER_STANDARD, \ + 0x50) + +#define ARM_SMCCC_TRNG_FEATURES \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_32, \ + ARM_SMCCC_OWNER_STANDARD, \ + 0x51) + +#define ARM_SMCCC_TRNG_GET_UUID \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_32, \ + ARM_SMCCC_OWNER_STANDARD, \ + 0x52) + +#define ARM_SMCCC_TRNG_RND32 \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_32, \ + ARM_SMCCC_OWNER_STANDARD, \ + 0x53) + +#define ARM_SMCCC_TRNG_RND64 \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_64, \ + ARM_SMCCC_OWNER_STANDARD, \ + 0x53) + +/* + * Return codes defined in ARM DEN 0070A + * ARM DEN 0070A is now merged/consolidated into ARM DEN 0028 C + */ +#define SMCCC_RET_SUCCESS 0 +#define SMCCC_RET_NOT_SUPPORTED -1 +#define SMCCC_RET_NOT_REQUIRED -2 +#define SMCCC_RET_INVALID_PARAMETER -3 + #ifndef __ASSEMBLY__ #include <linux/linkage.h> #include <linux/types.h> + +enum arm_smccc_conduit { + SMCCC_CONDUIT_NONE, + SMCCC_CONDUIT_SMC, + SMCCC_CONDUIT_HVC, +}; + +/** + * arm_smccc_1_1_get_conduit() + * + * Returns the conduit to be used for SMCCCv1.1 or later. + * + * When SMCCCv1.1 is not present, returns SMCCC_CONDUIT_NONE. + */ +static inline enum arm_smccc_conduit arm_smccc_1_1_get_conduit(void) +{ + /* No HVC support yet */ + return SMCCC_CONDUIT_SMC; +} + +/** + * arm_smccc_get_version() + * + * Returns the version to be used for SMCCCv1.1 or later. + * + * When SMCCCv1.1 or above is not present, returns SMCCCv1.0, but this + * does not imply the presence of firmware or a valid conduit. Caller + * handling SMCCCv1.0 must determine the conduit by other means. + */ +u32 arm_smccc_get_version(void); + +void arm_smccc_version_init(u32 version, enum arm_smccc_conduit conduit); + /** * struct arm_smccc_res - Result from SMC/HVC call * @a0-a3 result values from registers 0 to 3 @@ -131,5 +285,186 @@ asmlinkage void __arm_smccc_hvc(unsigned long a0, unsigned long a1, #define arm_smccc_hvc_quirk(...) __arm_smccc_hvc(__VA_ARGS__) +/* SMCCC v1.1 implementation madness follows */ +#ifdef CONFIG_ARM64 + +#define SMCCC_SMC_INST "smc #0" +#define SMCCC_HVC_INST "hvc #0" + +#elif defined(CONFIG_ARM) +#include <asm/opcodes-sec.h> +#include <asm/opcodes-virt.h> + +#define SMCCC_SMC_INST __SMC(0) +#define SMCCC_HVC_INST __HVC(0) + +#endif + +#define ___count_args(_0, _1, _2, _3, _4, _5, _6, _7, _8, x, ...) x + +#define __count_args(...) \ + ___count_args(__VA_ARGS__, 7, 6, 5, 4, 3, 2, 1, 0) + +#define __constraint_read_0 "r" (arg0) +#define __constraint_read_1 __constraint_read_0, "r" (arg1) +#define __constraint_read_2 __constraint_read_1, "r" (arg2) +#define __constraint_read_3 __constraint_read_2, "r" (arg3) +#define __constraint_read_4 __constraint_read_3, "r" (arg4) +#define __constraint_read_5 __constraint_read_4, "r" (arg5) +#define __constraint_read_6 __constraint_read_5, "r" (arg6) +#define __constraint_read_7 __constraint_read_6, "r" (arg7) + +#define __declare_arg_0(a0, res) \ + struct arm_smccc_res *___res = res; \ + register unsigned long arg0 asm("r0") = (u32)a0 + +#define __declare_arg_1(a0, a1, res) \ + typeof(a1) __a1 = a1; \ + struct arm_smccc_res *___res = res; \ + register unsigned long arg0 asm("r0") = (u32)a0; \ + register typeof(a1) arg1 asm("r1") = __a1 + +#define __declare_arg_2(a0, a1, a2, res) \ + typeof(a1) __a1 = a1; \ + typeof(a2) __a2 = a2; \ + struct arm_smccc_res *___res = res; \ + register unsigned long arg0 asm("r0") = (u32)a0; \ + register typeof(a1) arg1 asm("r1") = __a1; \ + register typeof(a2) arg2 asm("r2") = __a2 + +#define __declare_arg_3(a0, a1, a2, a3, res) \ + typeof(a1) __a1 = a1; \ + typeof(a2) __a2 = a2; \ + typeof(a3) __a3 = a3; \ + struct arm_smccc_res *___res = res; \ + register unsigned long arg0 asm("r0") = (u32)a0; \ + register typeof(a1) arg1 asm("r1") = __a1; \ + register typeof(a2) arg2 asm("r2") = __a2; \ + register typeof(a3) arg3 asm("r3") = __a3 + +#define __declare_arg_4(a0, a1, a2, a3, a4, res) \ + typeof(a4) __a4 = a4; \ + __declare_arg_3(a0, a1, a2, a3, res); \ + register typeof(a4) arg4 asm("r4") = __a4 + +#define __declare_arg_5(a0, a1, a2, a3, a4, a5, res) \ + typeof(a5) __a5 = a5; \ + __declare_arg_4(a0, a1, a2, a3, a4, res); \ + register typeof(a5) arg5 asm("r5") = __a5 + +#define __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res) \ + typeof(a6) __a6 = a6; \ + __declare_arg_5(a0, a1, a2, a3, a4, a5, res); \ + register typeof(a6) arg6 asm("r6") = __a6 + +#define __declare_arg_7(a0, a1, a2, a3, a4, a5, a6, a7, res) \ + typeof(a7) __a7 = a7; \ + __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res); \ + register typeof(a7) arg7 asm("r7") = __a7 + +#define ___declare_args(count, ...) __declare_arg_ ## count(__VA_ARGS__) +#define __declare_args(count, ...) ___declare_args(count, __VA_ARGS__) + +#define ___constraints(count) \ + : __constraint_read_ ## count \ + : "memory" +#define __constraints(count) ___constraints(count) + +/* + * We have an output list that is not necessarily used, and GCC feels + * entitled to optimise the whole sequence away. "volatile" is what + * makes it stick. + */ +#define __arm_smccc_1_1(inst, ...) \ + do { \ + register unsigned long r0 asm("r0"); \ + register unsigned long r1 asm("r1"); \ + register unsigned long r2 asm("r2"); \ + register unsigned long r3 asm("r3"); \ + __declare_args(__count_args(__VA_ARGS__), __VA_ARGS__); \ + asm volatile(inst "\n" : \ + "=r" (r0), "=r" (r1), "=r" (r2), "=r" (r3) \ + __constraints(__count_args(__VA_ARGS__))); \ + if (___res) \ + *___res = (typeof(*___res)){r0, r1, r2, r3}; \ + } while (0) + +/* + * arm_smccc_1_1_smc() - make an SMCCC v1.1 compliant SMC call + * + * This is a variadic macro taking one to eight source arguments, and + * an optional return structure. + * + * @a0-a7: arguments passed in registers 0 to 7 + * @res: result values from registers 0 to 3 + * + * This macro is used to make SMC calls following SMC Calling Convention v1.1. + * The content of the supplied param are copied to registers 0 to 7 prior + * to the SMC instruction. The return values are updated with the content + * from register 0 to 3 on return from the SMC instruction if not NULL. + */ +#define arm_smccc_1_1_smc(...) __arm_smccc_1_1(SMCCC_SMC_INST, __VA_ARGS__) + +/* + * arm_smccc_1_1_hvc() - make an SMCCC v1.1 compliant HVC call + * + * This is a variadic macro taking one to eight source arguments, and + * an optional return structure. + * + * @a0-a7: arguments passed in registers 0 to 7 + * @res: result values from registers 0 to 3 + * + * This macro is used to make HVC calls following SMC Calling Convention v1.1. + * The content of the supplied param are copied to registers 0 to 7 prior + * to the HVC instruction. The return values are updated with the content + * from register 0 to 3 on return from the HVC instruction if not NULL. + */ +#define arm_smccc_1_1_hvc(...) __arm_smccc_1_1(SMCCC_HVC_INST, __VA_ARGS__) + +/* + * Like arm_smccc_1_1* but always returns SMCCC_RET_NOT_SUPPORTED. + * Used when the SMCCC conduit is not defined. The empty asm statement + * avoids compiler warnings about unused variables. + */ +#define __fail_smccc_1_1(...) \ + do { \ + __declare_args(__count_args(__VA_ARGS__), __VA_ARGS__); \ + asm ("" : __constraints(__count_args(__VA_ARGS__))); \ + if (___res) \ + ___res->a0 = SMCCC_RET_NOT_SUPPORTED; \ + } while (0) + +/* + * arm_smccc_1_1_invoke() - make an SMCCC v1.1 compliant call + * + * This is a variadic macro taking one to eight source arguments, and + * an optional return structure. + * + * @a0-a7: arguments passed in registers 0 to 7 + * @res: result values from registers 0 to 3 + * + * This macro will make either an HVC call or an SMC call depending on the + * current SMCCC conduit. If no valid conduit is available then -1 + * (SMCCC_RET_NOT_SUPPORTED) is returned in @res.a0 (if supplied). + * + * The return value also provides the conduit that was used. + */ +#define arm_smccc_1_1_invoke(...) ({ \ + int method = arm_smccc_1_1_get_conduit(); \ + switch (method) { \ + case SMCCC_CONDUIT_HVC: \ + arm_smccc_1_1_hvc(__VA_ARGS__); \ + break; \ + case SMCCC_CONDUIT_SMC: \ + arm_smccc_1_1_smc(__VA_ARGS__); \ + break; \ + default: \ + __fail_smccc_1_1(__VA_ARGS__); \ + method = SMCCC_CONDUIT_NONE; \ + break; \ + } \ + method; \ + }) + #endif /*__ASSEMBLY__*/ #endif /*__LINUX_ARM_SMCCC_H*/ diff --git a/include/linux/bcd.h b/include/linux/bcd.h index 18fff11fb3..718f305bf7 100644 --- a/include/linux/bcd.h +++ b/include/linux/bcd.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _BCD_H #define _BCD_H diff --git a/include/linux/bitmap.h b/include/linux/bitmap.h index 4b98521a83..adaf5428fe 100644 --- a/include/linux/bitmap.h +++ b/include/linux/bitmap.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __LINUX_BITMAP_H #define __LINUX_BITMAP_H diff --git a/include/linux/bitops.h b/include/linux/bitops.h index dd13bf9311..645fd2e6f6 100644 --- a/include/linux/bitops.h +++ b/include/linux/bitops.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _LINUX_BITOPS_H #define _LINUX_BITOPS_H #include <asm/types.h> diff --git a/include/linux/bitrev.h b/include/linux/bitrev.h index 7ffe03f469..ba2965977d 100644 --- a/include/linux/bitrev.h +++ b/include/linux/bitrev.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _LINUX_BITREV_H #define _LINUX_BITREV_H diff --git a/include/linux/bug.h b/include/linux/bug.h index 8367a11ec2..d8fc328a07 100644 --- a/include/linux/bug.h +++ b/include/linux/bug.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _LINUX_BUG_H #define _LINUX_BUG_H diff --git a/include/linux/byteorder/big_endian.h b/include/linux/byteorder/big_endian.h index 539f710a39..ba07edf0ae 100644 --- a/include/linux/byteorder/big_endian.h +++ b/include/linux/byteorder/big_endian.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _LINUX_BYTEORDER_BIG_ENDIAN_H #define _LINUX_BYTEORDER_BIG_ENDIAN_H diff --git a/include/linux/byteorder/generic.h b/include/linux/byteorder/generic.h index e59ba455e3..d5252959d8 100644 --- a/include/linux/byteorder/generic.h +++ b/include/linux/byteorder/generic.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _LINUX_BYTEORDER_GENERIC_H #define _LINUX_BYTEORDER_GENERIC_H diff --git a/include/linux/byteorder/little_endian.h b/include/linux/byteorder/little_endian.h index dfe9531fba..e23111d4cd 100644 --- a/include/linux/byteorder/little_endian.h +++ b/include/linux/byteorder/little_endian.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _LINUX_BYTEORDER_LITTLE_ENDIAN_H #define _LINUX_BYTEORDER_LITTLE_ENDIAN_H diff --git a/include/linux/circ_buf.h b/include/linux/circ_buf.h index 90f2471dc6..36b3be9c14 100644 --- a/include/linux/circ_buf.h +++ b/include/linux/circ_buf.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + /* * See Documentation/circular-buffers.txt for more information. */ diff --git a/include/linux/clk.h b/include/linux/clk.h index 6565429a9b..42c64d650d 100644 --- a/include/linux/clk.h +++ b/include/linux/clk.h @@ -13,6 +13,7 @@ #include <linux/err.h> #include <linux/spinlock.h> #include <linux/stringify.h> +#include <xfuncs.h> struct device_d; @@ -62,63 +63,6 @@ struct clk_bulk_data { struct clk *clk_get(struct device_d *dev, const char *id); /** - * clk_bulk_get - lookup and obtain a number of references to clock producer. - * @dev: device for clock "consumer" - * @num_clks: the number of clk_bulk_data - * @clks: the clk_bulk_data table of consumer - * - * This helper function allows drivers to get several clk consumers in one - * operation. If any of the clk cannot be acquired then any clks - * that were obtained will be freed before returning to the caller. - * - * Returns 0 if all clocks specified in clk_bulk_data table are obtained - * successfully, or valid IS_ERR() condition containing errno. - * The implementation uses @dev and @clk_bulk_data.id to determine the - * clock consumer, and thereby the clock producer. - * The clock returned is stored in each @clk_bulk_data.clk field. - * - * Drivers must assume that the clock source is not enabled. - * - * clk_bulk_get should not be called from within interrupt context. - */ -int __must_check clk_bulk_get(struct device_d *dev, int num_clks, - struct clk_bulk_data *clks); - -/** - * clk_bulk_get_optional - lookup and obtain a number of references to clock producer - * @dev: device for clock "consumer" - * @num_clks: the number of clk_bulk_data - * @clks: the clk_bulk_data table of consumer - * - * Behaves the same as clk_bulk_get() except where there is no clock producer. - * In this case, instead of returning -ENOENT, the function returns 0 and - * NULL for a clk for which a clock producer could not be determined. - */ -int __must_check clk_bulk_get_optional(struct device_d *dev, int num_clks, - struct clk_bulk_data *clks); - -/** - * clk_bulk_get_all - lookup and obtain all available references to clock - * producer. - * @dev: device for clock "consumer" - * @clks: pointer to the clk_bulk_data table of consumer - * - * This helper function allows drivers to get all clk consumers in one - * operation. If any of the clk cannot be acquired then any clks - * that were obtained will be freed before returning to the caller. - * - * Returns a positive value for the number of clocks obtained while the - * clock references are stored in the clk_bulk_data table in @clks field. - * Returns 0 if there're none and a negative value if something failed. - * - * Drivers must assume that the clock source is not enabled. - * - * clk_bulk_get should not be called from within interrupt context. - */ -int __must_check clk_bulk_get_all(struct device_d *dev, - struct clk_bulk_data **clks); - -/** * clk_enable - inform the system when the clock source should be running. * @clk: clock source * @@ -129,18 +73,6 @@ int __must_check clk_bulk_get_all(struct device_d *dev, int clk_enable(struct clk *clk); /** - * clk_bulk_enable - inform the system when the set of clks should be running. - * @num_clks: the number of clk_bulk_data - * @clks: the clk_bulk_data table of consumer - * - * May be called from atomic contexts. - * - * Returns success (0) or negative errno. - */ -int __must_check clk_bulk_enable(int num_clks, - const struct clk_bulk_data *clks); - -/** * clk_disable - inform the system when the clock source is no longer required. * @clk: clock source * @@ -155,24 +87,6 @@ int __must_check clk_bulk_enable(int num_clks, void clk_disable(struct clk *clk); /** - * clk_bulk_disable - inform the system when the set of clks is no - * longer required. - * @num_clks: the number of clk_bulk_data - * @clks: the clk_bulk_data table of consumer - * - * Inform the system that a set of clks is no longer required by - * a driver and may be shut down. - * - * May be called from atomic contexts. - * - * Implementation detail: if the set of clks is shared between - * multiple drivers, clk_bulk_enable() calls must be balanced by the - * same number of clk_bulk_disable() calls for the clock source to be - * disabled. - */ -void clk_bulk_disable(int num_clks, const struct clk_bulk_data *clks); - -/** * clk_get_rate - obtain the current clock rate (in Hz) for a clock source. * This is only valid once the clock source has been enabled. * @clk: clock source @@ -180,32 +94,6 @@ void clk_bulk_disable(int num_clks, const struct clk_bulk_data *clks); unsigned long clk_get_rate(struct clk *clk); unsigned long clk_hw_get_rate(struct clk_hw *hw); -/** - * clk_bulk_put - "free" the clock source - * @num_clks: the number of clk_bulk_data - * @clks: the clk_bulk_data table of consumer - * - * Note: drivers must ensure that all clk_bulk_enable calls made on this - * clock source are balanced by clk_bulk_disable calls prior to calling - * this function. - * - * clk_bulk_put should not be called from within interrupt context. - */ -void clk_bulk_put(int num_clks, struct clk_bulk_data *clks); - -/** - * clk_bulk_put_all - "free" all the clock source - * @num_clks: the number of clk_bulk_data - * @clks: the clk_bulk_data table of consumer - * - * Note: drivers must ensure that all clk_bulk_enable calls made on this - * clock source are balanced by clk_bulk_disable calls prior to calling - * this function. - * - * clk_bulk_put_all should not be called from within interrupt context. - */ -void clk_bulk_put_all(int num_clks, struct clk_bulk_data *clks); - /* * The remaining APIs are optional for machine class support. */ @@ -290,46 +178,15 @@ static inline struct clk *clk_get(struct device_d *dev, const char *id) return NULL; } -static inline int __must_check clk_bulk_get(struct device_d *dev, int num_clks, - struct clk_bulk_data *clks) -{ - return 0; -} - -static inline int __must_check clk_bulk_get_optional(struct device_d *dev, - int num_clks, - struct clk_bulk_data *clks) -{ - return 0; -} - -static inline int __must_check clk_bulk_get_all(struct device_d *dev, - struct clk_bulk_data **clks) -{ - return 0; -} - -static inline void clk_bulk_put(int num_clks, struct clk_bulk_data *clks) {} - -static inline void clk_bulk_put_all(int num_clks, struct clk_bulk_data *clks) {} - static inline int clk_enable(struct clk *clk) { return 0; } -static inline int __must_check clk_bulk_enable(int num_clks, struct clk_bulk_data *clks) -{ - return 0; -} - static inline void clk_disable(struct clk *clk) { } -static inline void clk_bulk_disable(int num_clks, - struct clk_bulk_data *clks) {} - static inline unsigned long clk_get_rate(struct clk *clk) { return 0; @@ -430,14 +287,14 @@ struct clk_hw { const struct clk_init_data *init; }; -static inline struct clk *clk_hw_to_clk(struct clk_hw *hw) +static inline struct clk *clk_hw_to_clk(const struct clk_hw *hw) { - return &hw->clk; + return IS_ERR(hw) ? ERR_CAST(hw) : (struct clk *)&hw->clk; } -static inline struct clk_hw *clk_to_clk_hw(struct clk *clk) +static inline struct clk_hw *clk_to_clk_hw(const struct clk *clk) { - return container_of(clk, struct clk_hw, clk); + return IS_ERR(clk) ? ERR_CAST(clk) : (struct clk_hw *)container_of(clk, struct clk_hw, clk); } struct clk_div_table { @@ -449,6 +306,10 @@ struct clk *clk_register_fixed_rate(const char *name, const char *parent_name, unsigned long flags, unsigned long fixed_rate); +struct clk_hw *clk_hw_register_fixed_rate(struct device_d *dev, const char *name, + const char *parent_name, unsigned long flags, + unsigned long rate); + static inline struct clk *clk_fixed(const char *name, int rate) { return clk_register_fixed_rate(name, NULL, 0, rate); @@ -519,6 +380,17 @@ struct clk *clk_register_divider_table(struct device_d *dev, const char *name, u8 clk_divider_flags, const struct clk_div_table *table, spinlock_t *lock); +struct clk_hw *clk_hw_register_divider_table(struct device_d *dev, const char *name, + const char *parent_name, unsigned long flags, + void __iomem *reg, u8 shift, u8 width, + u8 clk_divider_flags, const struct clk_div_table *table, + spinlock_t *lock); + +struct clk_hw *clk_hw_register_divider(struct device_d *dev, const char *name, + const char *parent_name, unsigned long flags, + void __iomem *reg, u8 shift, u8 width, + u8 clk_divider_flags, spinlock_t *lock); + struct clk_fixed_factor { struct clk_hw hw; int mult; @@ -540,6 +412,10 @@ struct clk *clk_register_fixed_factor(struct device_d *dev, const char *name, const char *parent_name, unsigned long flags, unsigned int mult, unsigned int div); +struct clk_hw *clk_hw_register_fixed_factor(struct device_d *dev, + const char *name, const char *parent_name, unsigned long flags, + unsigned int mult, unsigned int div); + /** * struct clk_fractional_divider - adjustable fractional divider clock * @@ -600,6 +476,7 @@ struct clk_mux { int shift; int width; unsigned flags; + u32 *table; spinlock_t *lock; }; @@ -622,6 +499,35 @@ struct clk *clk_register_mux(struct device_d *dev, const char *name, void __iomem *reg, u8 shift, u8 width, u8 clk_mux_flags, spinlock_t *lock); +struct clk_hw *__clk_hw_register_mux(struct device_d *dev, + const char *name, u8 num_parents, + const char * const *parent_names, + unsigned long flags, void __iomem *reg, u8 shift, u32 mask, + u8 clk_mux_flags, u32 *table, spinlock_t *lock); + +#define clk_hw_register_mux(dev, name, parent_names, \ + num_parents, flags, reg, shift, mask, \ + clk_mux_flags, lock) \ + __clk_hw_register_mux((dev), (name), (num_parents), \ + (parent_names), \ + (flags), (reg), (shift), (mask), \ + (clk_mux_flags), NULL, (lock)) + +#define clk_hw_register_mux_table(dev, name, parent_names, num_parents, \ + flags, reg, shift, mask, clk_mux_flags, \ + table, lock) \ + __clk_hw_register_mux((dev), (name), (num_parents), \ + (parent_names), (flags), (reg), \ + (shift), (mask), (clk_mux_flags), (table), \ + (lock)) + +int clk_mux_val_to_index(struct clk_hw *hw, u32 *table, unsigned int flags, + unsigned int val); +unsigned int clk_mux_index_to_val(u32 *table, unsigned int flags, u8 index); + +long clk_mux_round_rate(struct clk_hw *hw, unsigned long rate, + unsigned long *prate); + struct clk_gate { struct clk_hw hw; void __iomem *reg; @@ -652,6 +558,16 @@ struct clk *clk_register_gate(struct device_d *dev, const char *name, void __iomem *reg, u8 bit_idx, u8 clk_gate_flags, spinlock_t *lock); +static inline struct clk_hw *clk_hw_register_gate(struct device_d *dev, + const char *name, const char *parent_name, + unsigned long flags, void __iomem *reg, u8 bit_idx, + u8 clk_gate_flags, spinlock_t *lock) +{ + return clk_to_clk_hw(clk_register_gate(dev, xstrdup(name), xstrdup(parent_name), + flags, reg, bit_idx, + clk_gate_flags, lock)); +} + int clk_is_enabled(struct clk *clk); int clk_hw_is_enabled(struct clk_hw *hw); @@ -664,6 +580,11 @@ int clk_parent_set_rate(struct clk_hw *hw, unsigned long rate, int bclk_register(struct clk *clk); struct clk *clk_register(struct device_d *dev, struct clk_hw *hw); +static inline int clk_hw_register(struct device_d *dev, struct clk_hw *hw) +{ + return PTR_ERR_OR_ZERO(clk_register(dev, hw)); +} + struct clk *clk_lookup(const char *name); void clk_dump(int verbose); @@ -676,11 +597,29 @@ struct clk *clk_register_composite(const char *name, struct clk *gate_clk, unsigned long flags); +struct clk_hw *clk_hw_register_composite(struct device_d *dev, + const char *name, const char * const *parent_names, + int num_parents, + struct clk_hw *mux_hw, const struct clk_ops *mux_ops, + struct clk_hw *rate_hw, const struct clk_ops *rate_ops, + struct clk_hw *gate_hw, const struct clk_ops *gate_ops, + unsigned long flags); + static inline const char *clk_hw_get_name(struct clk_hw *hw) { return hw->clk.name; } +static inline unsigned int clk_hw_get_num_parents(const struct clk_hw *hw) +{ + return hw->clk.num_parents; +} + +static inline unsigned long clk_hw_get_flags(const struct clk_hw *hw) +{ + return hw->clk.flags; +} + int clk_name_set_parent(const char *clkname, const char *clkparentname); int clk_name_set_rate(const char *clkname, unsigned long rate); @@ -695,6 +634,11 @@ struct clk_onecell_data { unsigned int clk_num; }; +struct clk_hw_onecell_data { + unsigned int num; + struct clk_hw *hws[]; +}; + #if defined(CONFIG_COMMON_CLK_OF_PROVIDER) #define CLK_OF_DECLARE(name, compat, fn) \ @@ -708,6 +652,8 @@ typedef int (*of_clk_init_cb_t)(struct device_node *); struct clk *of_clk_src_onecell_get(struct of_phandle_args *clkspec, void *data); struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec, void *data); +struct clk_hw *of_clk_hw_onecell_get(struct of_phandle_args *clkspec, void *data); +struct clk_hw *of_clk_hw_simple_get(struct of_phandle_args *clkspec, void *data); struct clk *of_clk_get(struct device_node *np, int index); struct clk *of_clk_get_by_name(struct device_node *np, const char *name); @@ -721,10 +667,10 @@ int of_clk_add_provider(struct device_node *np, void *data), void *data); -static inline unsigned int clk_get_num_parents(const struct clk *hw) -{ - return hw->num_parents; -} +int of_clk_add_hw_provider(struct device_node *np, + struct clk_hw *(*clk_hw_src_get)(struct of_phandle_args *clkspec, + void *data), + void *data); #else @@ -743,11 +689,21 @@ static inline struct clk *of_clk_src_onecell_get(struct of_phandle_args *clkspec { return ERR_PTR(-ENOENT); } +static inline struct clk_hw *of_clk_hw_onecell_get(struct of_phandle_args *clkspec, + void *data) +{ + return ERR_PTR(-ENOENT); +} static inline struct clk * of_clk_src_simple_get(struct of_phandle_args *clkspec, void *data) { return ERR_PTR(-ENOENT); } +static inline struct clk * +of_clk_hw_simple_get(struct of_phandle_args *clkspec, void *data) +{ + return ERR_PTR(-ENOENT); +} static inline struct clk *of_clk_get(struct device_node *np, int index) { return ERR_PTR(-ENOENT); @@ -773,6 +729,14 @@ static inline int of_clk_add_provider(struct device_node *np, { return 0; } + +static inline int of_clk_add_hw_provider(struct device_node *np, + struct clk_hw *(*clk_hw_src_get)(struct of_phandle_args *clkspec, + void *data), + void *data) +{ + return 0; +} #endif #define CLK_OF_DECLARE_DRIVER(name, compat, fn) CLK_OF_DECLARE(name, compat, fn) @@ -787,4 +751,153 @@ static inline void clk_unregister(struct clk *clk) { } +#ifdef CONFIG_COMMON_CLK + +/** + * clk_bulk_get - lookup and obtain a number of references to clock producer. + * @dev: device for clock "consumer" + * @num_clks: the number of clk_bulk_data + * @clks: the clk_bulk_data table of consumer + * + * This helper function allows drivers to get several clk consumers in one + * operation. If any of the clk cannot be acquired then any clks + * that were obtained will be freed before returning to the caller. + * + * Returns 0 if all clocks specified in clk_bulk_data table are obtained + * successfully, or valid IS_ERR() condition containing errno. + * The implementation uses @dev and @clk_bulk_data.id to determine the + * clock consumer, and thereby the clock producer. + * The clock returned is stored in each @clk_bulk_data.clk field. + * + * Drivers must assume that the clock source is not enabled. + * + * clk_bulk_get should not be called from within interrupt context. + */ +int __must_check clk_bulk_get(struct device_d *dev, int num_clks, + struct clk_bulk_data *clks); + +/** + * clk_bulk_get_optional - lookup and obtain a number of references to clock producer + * @dev: device for clock "consumer" + * @num_clks: the number of clk_bulk_data + * @clks: the clk_bulk_data table of consumer + * + * Behaves the same as clk_bulk_get() except where there is no clock producer. + * In this case, instead of returning -ENOENT, the function returns 0 and + * NULL for a clk for which a clock producer could not be determined. + */ +int __must_check clk_bulk_get_optional(struct device_d *dev, int num_clks, + struct clk_bulk_data *clks); + +/** + * clk_bulk_get_all - lookup and obtain all available references to clock + * producer. + * @dev: device for clock "consumer" + * @clks: pointer to the clk_bulk_data table of consumer + * + * This helper function allows drivers to get all clk consumers in one + * operation. If any of the clk cannot be acquired then any clks + * that were obtained will be freed before returning to the caller. + * + * Returns a positive value for the number of clocks obtained while the + * clock references are stored in the clk_bulk_data table in @clks field. + * Returns 0 if there're none and a negative value if something failed. + * + * Drivers must assume that the clock source is not enabled. + * + * clk_bulk_get should not be called from within interrupt context. + */ +int __must_check clk_bulk_get_all(struct device_d *dev, + struct clk_bulk_data **clks); + +/** + * clk_bulk_put - "free" the clock source + * @num_clks: the number of clk_bulk_data + * @clks: the clk_bulk_data table of consumer + * + * Note: drivers must ensure that all clk_bulk_enable calls made on this + * clock source are balanced by clk_bulk_disable calls prior to calling + * this function. + * + * clk_bulk_put should not be called from within interrupt context. + */ +void clk_bulk_put(int num_clks, struct clk_bulk_data *clks); + +/** + * clk_bulk_put_all - "free" all the clock source + * @num_clks: the number of clk_bulk_data + * @clks: the clk_bulk_data table of consumer + * + * Note: drivers must ensure that all clk_bulk_enable calls made on this + * clock source are balanced by clk_bulk_disable calls prior to calling + * this function. + * + * clk_bulk_put_all should not be called from within interrupt context. + */ +void clk_bulk_put_all(int num_clks, struct clk_bulk_data *clks); + +/** + * clk_bulk_enable - inform the system when the set of clks should be running. + * @num_clks: the number of clk_bulk_data + * @clks: the clk_bulk_data table of consumer + * + * May be called from atomic contexts. + * + * Returns success (0) or negative errno. + */ +int __must_check clk_bulk_enable(int num_clks, + const struct clk_bulk_data *clks); + +/** + * clk_bulk_disable - inform the system when the set of clks is no + * longer required. + * @num_clks: the number of clk_bulk_data + * @clks: the clk_bulk_data table of consumer + * + * Inform the system that a set of clks is no longer required by + * a driver and may be shut down. + * + * May be called from atomic contexts. + * + * Implementation detail: if the set of clks is shared between + * multiple drivers, clk_bulk_enable() calls must be balanced by the + * same number of clk_bulk_disable() calls for the clock source to be + * disabled. + */ +void clk_bulk_disable(int num_clks, const struct clk_bulk_data *clks); + +#else +static inline int __must_check clk_bulk_get(struct device_d *dev, int num_clks, + struct clk_bulk_data *clks) +{ + return 0; +} + +static inline int __must_check clk_bulk_get_optional(struct device_d *dev, + int num_clks, + struct clk_bulk_data *clks) +{ + return 0; +} + +static inline int __must_check clk_bulk_get_all(struct device_d *dev, + struct clk_bulk_data **clks) +{ + return 0; +} + +static inline void clk_bulk_put(int num_clks, struct clk_bulk_data *clks) {} + +static inline void clk_bulk_put_all(int num_clks, struct clk_bulk_data *clks) {} + +static inline int __must_check clk_bulk_enable(int num_clks, struct clk_bulk_data *clks) +{ + return 0; +} + +static inline void clk_bulk_disable(int num_clks, + struct clk_bulk_data *clks) {} + +#endif + #endif diff --git a/include/linux/compiler.h b/include/linux/compiler.h index f61a458414..6654c164f5 100644 --- a/include/linux/compiler.h +++ b/include/linux/compiler.h @@ -276,16 +276,6 @@ unsigned long read_word_at_a_time(const void *addr) #endif /* __KERNEL__ */ -/* - * Force the compiler to emit 'sym' as a symbol, so that we can reference - * it from inline assembler. Necessary in case 'sym' could be inlined - * otherwise, or eliminated entirely due to lack of references that are - * visible to the compiler. - */ -#define __ADDRESSABLE(sym) \ - static void * __attribute__((section(".discard.addressable"), used)) \ - __PASTE(__addressable_##sym, __LINE__) = (void *)&sym; - /** * offset_to_ptr - convert a relative memory offset to an absolute pointer * @off: the address of the 32-bit offset value diff --git a/include/linux/compiler_types.h b/include/linux/compiler_types.h index db192becfe..bc1b43aab0 100644 --- a/include/linux/compiler_types.h +++ b/include/linux/compiler_types.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __LINUX_COMPILER_TYPES_H #define __LINUX_COMPILER_TYPES_H @@ -110,6 +112,27 @@ struct ftrace_likely_data { #define __deprecated #define __deprecated_for_modules +#ifndef __has_attribute +#define __has_attribute(...) 0 +#endif + +/* + * Add the pseudo keyword 'fallthrough' so case statement blocks + * must end with any of these keywords: + * break; + * fallthrough; + * continue; + * goto <label>; + * return [expression]; + * + * gcc: https://gcc.gnu.org/onlinedocs/gcc/Statement-Attributes.html#Statement-Attributes + */ +#if __has_attribute(__fallthrough__) +# define fallthrough __attribute__((__fallthrough__)) +#else +# define fallthrough do {} while (0) /* fallthrough */ +#endif + #endif /* __KERNEL__ */ #endif /* __ASSEMBLY__ */ @@ -199,8 +222,8 @@ struct ftrace_likely_data { #define __pure __attribute__((pure)) #define __aligned(x) __attribute__((aligned(x))) #define __aligned_largest __attribute__((aligned)) -#define __printf(a, b) __attribute__((format(printf, a, b))) -#define __scanf(a, b) __attribute__((format(scanf, a, b))) +#define __printf(a, b) __attribute__((format(__printf__, a, b))) +#define __scanf(a, b) __attribute__((format(__scanf__, a, b))) #define __maybe_unused __attribute__((unused)) #define __always_unused __attribute__((unused)) #define __mode(x) __attribute__((mode(x))) diff --git a/include/linux/const.h b/include/linux/const.h index c872bfd25e..07f886d271 100644 --- a/include/linux/const.h +++ b/include/linux/const.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + /* const.h: Macros for dealing with constants. */ #ifndef _LINUX_CONST_H diff --git a/include/linux/crc8.h b/include/linux/crc8.h index 13c8dabb04..8fcd6d1324 100644 --- a/include/linux/crc8.h +++ b/include/linux/crc8.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + /* * Copyright (c) 2011 Broadcom Corporation * diff --git a/include/linux/ctype.h b/include/linux/ctype.h index 633c3862d8..ab9bf910d8 100644 --- a/include/linux/ctype.h +++ b/include/linux/ctype.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _LINUX_CTYPE_H #define _LINUX_CTYPE_H diff --git a/include/linux/dcache.h b/include/linux/dcache.h index a961942201..ed7e5c2cbc 100644 --- a/include/linux/dcache.h +++ b/include/linux/dcache.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __LINUX_DCACHE_H #define __LINUX_DCACHE_H diff --git a/include/linux/decompress/mm.h b/include/linux/decompress/mm.h index 81676ae906..ac0702dfb1 100644 --- a/include/linux/decompress/mm.h +++ b/include/linux/decompress/mm.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + /* * linux/compr_mm.h * diff --git a/include/linux/decompress/unlz4.h b/include/linux/decompress/unlz4.h index 7aaafc2b1c..0ad189d2d9 100644 --- a/include/linux/decompress/unlz4.h +++ b/include/linux/decompress/unlz4.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef DECOMPRESS_UNLZ4_H #define DECOMPRESS_UNLZ4_H diff --git a/include/linux/err.h b/include/linux/err.h index ed563f2c4a..69efc7c4ac 100644 --- a/include/linux/err.h +++ b/include/linux/err.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _LINUX_ERR_H #define _LINUX_ERR_H diff --git a/include/linux/ethtool.h b/include/linux/ethtool.h index 324e40cdeb..f47e17ea31 100644 --- a/include/linux/ethtool.h +++ b/include/linux/ethtool.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + /* * ethtool.h: Defines for Linux ethtool. * diff --git a/include/linux/fs.h b/include/linux/fs.h index a72bc066c3..fc1357137a 100644 --- a/include/linux/fs.h +++ b/include/linux/fs.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _LINUX_FS_H #define _LINUX_FS_H diff --git a/include/linux/gcd.h b/include/linux/gcd.h index 0ac262162d..affb402f22 100644 --- a/include/linux/gcd.h +++ b/include/linux/gcd.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _GCD_H #define _GCD_H diff --git a/include/linux/hash.h b/include/linux/hash.h index ad6fa21d97..5e62f1bd8c 100644 --- a/include/linux/hash.h +++ b/include/linux/hash.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _LINUX_HASH_H #define _LINUX_HASH_H /* Fast hashing routine for ints, longs and pointers. diff --git a/include/linux/idr.h b/include/linux/idr.h new file mode 100644 index 0000000000..8a0f452d76 --- /dev/null +++ b/include/linux/idr.h @@ -0,0 +1,79 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * include/linux/idr.h + * + * 2002-10-18 written by Jim Houston jim.houston@ccur.com + * Copyright (C) 2002 by Concurrent Computer Corporation + * + * Small id to pointer translation service avoiding fixed sized + * tables. + */ + +#ifndef __IDR_H__ +#define __IDR_H__ + +#include <errno.h> +#include <linux/list.h> + +struct idr { + int id; + void *ptr; + struct list_head list; +}; + +#define DEFINE_IDR(name) \ + struct idr name = { .list = LIST_HEAD_INIT((name).list) } + +#define __idr_for_each_entry(head, idr) \ + list_for_each_entry((idr), &(head)->list, list) + +static inline struct idr *__idr_find(struct idr *head, int id) +{ + struct idr *idr; + + __idr_for_each_entry(head, idr) { + if (idr->id == id) + return idr; + } + + return NULL; +} + +static inline void *idr_find(struct idr *head, int id) +{ + struct idr *idr = __idr_find(head, id); + + return idr ? idr->ptr : NULL; +} + +static inline int idr_alloc_one(struct idr *head, void *ptr, int start) +{ + struct idr *idr; + + if (__idr_find(head, start)) + return -EBUSY; + + idr = malloc(sizeof(*idr)); + + idr->id = start; + idr->ptr = ptr; + + list_add(&idr->list, &head->list); + + return start; +} + +static inline void idr_init(struct idr *idr) +{ + INIT_LIST_HEAD(&idr->list); +} + +static inline void idr_remove(struct idr *head, int id) +{ + struct idr *idr = __idr_find(head, id); + + list_del(&idr->list); + free(idr); +} + +#endif /* __IDR_H__ */ diff --git a/include/linux/if_vlan.h b/include/linux/if_vlan.h new file mode 100644 index 0000000000..9e54685064 --- /dev/null +++ b/include/linux/if_vlan.h @@ -0,0 +1,56 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * VLAN An implementation of 802.1Q VLAN tagging. + * + * Authors: Ben Greear <greearb@candelatech.com> + */ +#ifndef _LINUX_IF_VLAN_H_ +#define _LINUX_IF_VLAN_H_ + +#define VLAN_HLEN 4 /* The additional bytes required by VLAN + * (in addition to the Ethernet header) + */ +#define VLAN_ETH_HLEN 18 /* Total octets in header. */ +#define VLAN_ETH_ZLEN 64 /* Min. octets in frame sans FCS */ + +/* + * According to 802.3ac, the packet can be 4 bytes longer. --Klika Jan + */ +#define VLAN_ETH_DATA_LEN 1500 /* Max. octets in payload */ +#define VLAN_ETH_FRAME_LEN 1518 /* Max. octets in frame sans FCS */ + +#define VLAN_MAX_DEPTH 8 /* Max. number of nested VLAN tags parsed */ + +/* + * struct vlan_hdr - vlan header + * @h_vlan_TCI: priority and VLAN ID + * @h_vlan_encapsulated_proto: packet type ID or len + */ +struct vlan_hdr { + __be16 h_vlan_TCI; + __be16 h_vlan_encapsulated_proto; +}; + +/** + * struct vlan_ethhdr - vlan ethernet header (ethhdr + vlan_hdr) + * @h_dest: destination ethernet address + * @h_source: source ethernet address + * @h_vlan_proto: ethernet protocol + * @h_vlan_TCI: priority and VLAN ID + * @h_vlan_encapsulated_proto: packet type ID or len + */ +struct vlan_ethhdr { + unsigned char h_dest[ETH_ALEN]; + unsigned char h_source[ETH_ALEN]; + __be16 h_vlan_proto; + __be16 h_vlan_TCI; + __be16 h_vlan_encapsulated_proto; +}; + +#define VLAN_PRIO_MASK 0xe000 /* Priority Code Point */ +#define VLAN_PRIO_SHIFT 13 +#define VLAN_CFI_MASK 0x1000 /* Canonical Format Indicator / Drop Eligible Indicator */ +#define VLAN_VID_MASK 0x0fff /* VLAN Identifier */ +#define VLAN_N_VID 4096 + +#endif /* !(_LINUX_IF_VLAN_H_) */ diff --git a/include/linux/ioport.h b/include/linux/ioport.h index 295ab4a49d..ee9587ba0f 100644 --- a/include/linux/ioport.h +++ b/include/linux/ioport.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + /* * ioport.h Definitions of routines for detecting, reserving and * allocating system resources. diff --git a/include/linux/jffs2.h b/include/linux/jffs2.h index ed2ebcfc42..e34465263c 100644 --- a/include/linux/jffs2.h +++ b/include/linux/jffs2.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + /* * JFFS2 -- Journalling Flash File System, Version 2. * diff --git a/include/linux/kbuild.h b/include/linux/kbuild.h index 359d4a8682..de0f9bdb95 100644 --- a/include/linux/kbuild.h +++ b/include/linux/kbuild.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __LINUX_KBUILD_H #define __LINUX_KBUILD_H diff --git a/include/linux/linkage.h b/include/linux/linkage.h index 9fd1f85902..efb2d6fa40 100644 --- a/include/linux/linkage.h +++ b/include/linux/linkage.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _LINUX_LINKAGE_H #define _LINUX_LINKAGE_H diff --git a/include/linux/list_sort.h b/include/linux/list_sort.h index 1a2df2efb7..9260df2fb1 100644 --- a/include/linux/list_sort.h +++ b/include/linux/list_sort.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _LINUX_LIST_SORT_H #define _LINUX_LIST_SORT_H diff --git a/include/linux/magic.h b/include/linux/magic.h index 0de181ad73..2af9665075 100644 --- a/include/linux/magic.h +++ b/include/linux/magic.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __LINUX_MAGIC_H__ #define __LINUX_MAGIC_H__ diff --git a/include/linux/mdio-bitbang.h b/include/linux/mdio-bitbang.h index 76f52bbbb2..a6e6057886 100644 --- a/include/linux/mdio-bitbang.h +++ b/include/linux/mdio-bitbang.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __LINUX_MDIO_BITBANG_H #define __LINUX_MDIO_BITBANG_H diff --git a/include/linux/mdio.h b/include/linux/mdio.h index 4bcb41c71b..b910b05cec 100644 --- a/include/linux/mdio.h +++ b/include/linux/mdio.h @@ -324,4 +324,6 @@ static inline __u16 mdio_phy_id_c45(int prtad, int devad) return MDIO_PHY_ID_C45 | (prtad << 5) | devad; } +#define MDIO_DEVAD_NONE (-1) + #endif /* _UAPI__LINUX_MDIO_H__ */ diff --git a/include/linux/mii.h b/include/linux/mii.h index 5bac6c229a..257dfd1790 100644 --- a/include/linux/mii.h +++ b/include/linux/mii.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + /* * linux/mii.h: definitions for MII-compatible transceivers * Originally drivers/net/sunhme.h. diff --git a/include/linux/mod_devicetable.h b/include/linux/mod_devicetable.h index 2c04454260..dac3c6e8a5 100644 --- a/include/linux/mod_devicetable.h +++ b/include/linux/mod_devicetable.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + /* * Device tables which are exported to userspace via * scripts/mod/file2alias.c. You must keep that file in sync with this diff --git a/include/linux/mount.h b/include/linux/mount.h index 9557365fb5..4abeda6b79 100644 --- a/include/linux/mount.h +++ b/include/linux/mount.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + /* * * Definitions for mount interface. This describes the in the kernel build diff --git a/include/linux/mtd/mtd-abi.h b/include/linux/mtd/mtd-abi.h index b7a8955880..b74f4b8348 100644 --- a/include/linux/mtd/mtd-abi.h +++ b/include/linux/mtd/mtd-abi.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + /* * $Id: mtd-abi.h,v 1.13 2005/11/07 11:14:56 gleixner Exp $ * diff --git a/include/linux/mtd/nftl.h b/include/linux/mtd/nftl.h index 438130625d..36b80dea77 100644 --- a/include/linux/mtd/nftl.h +++ b/include/linux/mtd/nftl.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + /* Defines for NAND Flash Translation Layer */ /* (c) 1999 Machine Vision Holdings, Inc. */ diff --git a/include/linux/mutex.h b/include/linux/mutex.h index de698dbc4f..41eda79b76 100644 --- a/include/linux/mutex.h +++ b/include/linux/mutex.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + /* * Mutexes: blocking mutual exclusion locks * diff --git a/include/linux/overflow.h b/include/linux/overflow.h index 6590450464..50c93ca0c3 100644 --- a/include/linux/overflow.h +++ b/include/linux/overflow.h @@ -3,6 +3,7 @@ #define __LINUX_OVERFLOW_H #include <linux/compiler.h> +#include <linux/limits.h> /* * In the fallback code below, we need to compute the minimum and diff --git a/include/linux/pagemap.h b/include/linux/pagemap.h index 345bd402b7..20c38a0b89 100644 --- a/include/linux/pagemap.h +++ b/include/linux/pagemap.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _LINUX_PAGEMAP_H #define _LINUX_PAGEMAP_H diff --git a/include/linux/path.h b/include/linux/path.h index cbebdc5c9a..3891c784d2 100644 --- a/include/linux/path.h +++ b/include/linux/path.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _LINUX_PATH_H #define _LINUX_PATH_H diff --git a/include/linux/pci.h b/include/linux/pci.h index 486d4251d4..269e7b354c 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + /* * pci.h * diff --git a/include/linux/pci_regs.h b/include/linux/pci_regs.h index efe3443572..2c335f5835 100644 --- a/include/linux/pci_regs.h +++ b/include/linux/pci_regs.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + /* * pci_regs.h * diff --git a/include/linux/phy.h b/include/linux/phy.h index d9fb514277..a4c3f43c06 100644 --- a/include/linux/phy.h +++ b/include/linux/phy.h @@ -46,6 +46,7 @@ typedef enum { PHY_INTERFACE_MODE_TBI, PHY_INTERFACE_MODE_REVMII, PHY_INTERFACE_MODE_RMII, + PHY_INTERFACE_MODE_REVRMII, PHY_INTERFACE_MODE_RGMII, PHY_INTERFACE_MODE_RGMII_ID, PHY_INTERFACE_MODE_RGMII_RXID, @@ -280,6 +281,8 @@ int phy_drivers_register(struct phy_driver *new_driver, int n); struct phy_device *get_phy_device(struct mii_bus *bus, int addr); int phy_init(void); int phy_init_hw(struct phy_device *phydev); +struct phy_device *of_phy_register_fixed_link(struct device_node *np, + struct eth_device *edev); #define phy_register_drivers_macro(level, drvs) \ static int __init drvs##_register(void) \ diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h index 679ce6e420..321e546f90 100644 --- a/include/linux/phy/phy.h +++ b/include/linux/phy/phy.h @@ -195,7 +195,7 @@ static inline struct phy *phy_get(struct device_d *dev, const char *string) static inline struct phy *phy_optional_get(struct device_d *dev, const char *string) { - return ERR_PTR(-ENOSYS); + return NULL; } static inline struct phy *of_phy_get_by_phandle(struct device_d *dev, diff --git a/include/linux/posix_types.h b/include/linux/posix_types.h index bd37e1faf4..4a0b852b27 100644 --- a/include/linux/posix_types.h +++ b/include/linux/posix_types.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _LINUX_POSIX_TYPES_H #define _LINUX_POSIX_TYPES_H diff --git a/include/linux/processor.h b/include/linux/processor.h new file mode 100644 index 0000000000..94a458c3d1 --- /dev/null +++ b/include/linux/processor.h @@ -0,0 +1,29 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Misc low level processor primitives */ +#ifndef _LINUX_PROCESSOR_H +#define _LINUX_PROCESSOR_H + +#include <linux/barebox-wrapper.h> + +/* + * spin_until_cond can be used to wait for a condition to become true. It + * may be expected that the first iteration will true in the common case + * (no spinning), so that callers should not require a first "likely" test + * for the uncontended case before using this primitive. + * + * Usage and implementation guidelines are the same as for the spin_begin + * primitives, above. + */ +#ifndef spin_until_cond +#define spin_until_cond(cond) \ +do { \ + if (unlikely(!(cond))) { \ + do { \ + cpu_relax(); \ + } while (!(cond)); \ + } \ +} while (0) + +#endif + +#endif /* _LINUX_PROCESSOR_H */ diff --git a/include/linux/reset-controller.h b/include/linux/reset-controller.h index aff03a9c62..a9047e947e 100644 --- a/include/linux/reset-controller.h +++ b/include/linux/reset-controller.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _LINUX_RESET_CONTROLLER_H_ #define _LINUX_RESET_CONTROLLER_H_ @@ -12,11 +14,13 @@ struct reset_controller_dev; * things to reset the device * @assert: manually assert the reset line, if supported * @deassert: manually deassert the reset line, if supported + * @status: return the status of the reset line, if supported */ struct reset_control_ops { int (*reset)(struct reset_controller_dev *rcdev, unsigned long id); int (*assert)(struct reset_controller_dev *rcdev, unsigned long id); int (*deassert)(struct reset_controller_dev *rcdev, unsigned long id); + int (*status)(struct reset_controller_dev *rcdev, unsigned long id); }; struct device_node; diff --git a/include/linux/reset.h b/include/linux/reset.h index 818b06412f..d0677b1d9f 100644 --- a/include/linux/reset.h +++ b/include/linux/reset.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _LINUX_RESET_H_ #define _LINUX_RESET_H_ @@ -6,6 +8,7 @@ struct reset_control; #ifdef CONFIG_RESET_CONTROLLER +int reset_control_status(struct reset_control *rstc); int reset_control_reset(struct reset_control *rstc); int reset_control_assert(struct reset_control *rstc); int reset_control_deassert(struct reset_control *rstc); @@ -23,6 +26,11 @@ int __must_check device_reset_all(struct device_d *dev); #else +static inline int reset_control_status(struct reset_control *rstc) +{ + return 0; +} + static inline int reset_control_reset(struct reset_control *rstc) { return 0; diff --git a/include/linux/reset/reset-simple.h b/include/linux/reset/reset-simple.h new file mode 100644 index 0000000000..cb38a4b597 --- /dev/null +++ b/include/linux/reset/reset-simple.h @@ -0,0 +1,45 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Simple Reset Controller ops + * + * Based on Allwinner SoCs Reset Controller driver + * + * Copyright 2013 Maxime Ripard + * + * Maxime Ripard <maxime.ripard@free-electrons.com> + */ + +#ifndef __RESET_SIMPLE_H__ +#define __RESET_SIMPLE_H__ + +#include <io.h> +#include <linux/reset-controller.h> + +/** + * struct reset_simple_data - driver data for simple reset controllers + * @membase: memory mapped I/O register range + * @rcdev: reset controller device base structure + * @active_low: if true, bits are cleared to assert the reset. Otherwise, bits + * are set to assert the reset. Note that this says nothing about + * the voltage level of the actual reset line. + * @status_active_low: if true, bits read back as cleared while the reset is + * asserted. Otherwise, bits read back as set while the + * reset is asserted. + * @reset_us: Minimum delay in microseconds needed that needs to be + * waited for between an assert and a deassert to reset the + * device. If multiple consumers with different delay + * requirements are connected to this controller, it must + * be the largest minimum delay. 0 means that such a delay is + * unknown and the reset operation is unsupported. + */ +struct reset_simple_data { + void __iomem *membase; + struct reset_controller_dev rcdev; + bool active_low; + bool status_active_low; + unsigned int reset_us; +}; + +extern const struct reset_control_ops reset_simple_ops; + +#endif /* __RESET_SIMPLE_H__ */ diff --git a/include/linux/rtc.h b/include/linux/rtc.h index 2dacb14239..632bc9b7bc 100644 --- a/include/linux/rtc.h +++ b/include/linux/rtc.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + /* * Generic RTC interface. * This version contains the part of the user interface to the Real Time Clock diff --git a/include/linux/rwsem.h b/include/linux/rwsem.h index 5259957ed2..4ed693dc2c 100644 --- a/include/linux/rwsem.h +++ b/include/linux/rwsem.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + /* rwsem.h: R/W semaphores, public interface * * Written by David Howells (dhowells@redhat.com). diff --git a/include/linux/sched.h b/include/linux/sched.h index 3375a09f2d..18b90ad884 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _LINUX_SCHED_H #define _LINUX_SCHED_H diff --git a/include/linux/scmi_protocol.h b/include/linux/scmi_protocol.h new file mode 100644 index 0000000000..5b6de7bb87 --- /dev/null +++ b/include/linux/scmi_protocol.h @@ -0,0 +1,654 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * SCMI Message Protocol driver header + * + * Copyright (C) 2018-2021 ARM Ltd. + */ + +#ifndef _LINUX_SCMI_PROTOCOL_H +#define _LINUX_SCMI_PROTOCOL_H + +#include <linux/bitfield.h> +#include <driver.h> +#include <linux/types.h> + +#define SCMI_MAX_STR_SIZE 16 +#define SCMI_MAX_NUM_RATES 16 + +/** + * struct scmi_revision_info - version information structure + * + * @major_ver: Major ABI version. Change here implies risk of backward + * compatibility break. + * @minor_ver: Minor ABI version. Change here implies new feature addition, + * or compatible change in ABI. + * @num_protocols: Number of protocols that are implemented, excluding the + * base protocol. + * @num_agents: Number of agents in the system. + * @impl_ver: A vendor-specific implementation version. + * @vendor_id: A vendor identifier(Null terminated ASCII string) + * @sub_vendor_id: A sub-vendor identifier(Null terminated ASCII string) + */ +struct scmi_revision_info { + u16 major_ver; + u16 minor_ver; + u8 num_protocols; + u8 num_agents; + u32 impl_ver; + char vendor_id[SCMI_MAX_STR_SIZE]; + char sub_vendor_id[SCMI_MAX_STR_SIZE]; +}; + +struct scmi_clock_info { + char name[SCMI_MAX_STR_SIZE]; + bool rate_discrete; + union { + struct { + int num_rates; + u64 rates[SCMI_MAX_NUM_RATES]; + } list; + struct { + u64 min_rate; + u64 max_rate; + u64 step_size; + } range; + }; +}; + +struct scmi_handle; +struct scmi_device; +struct scmi_protocol_handle; + +/** + * struct scmi_clk_proto_ops - represents the various operations provided + * by SCMI Clock Protocol + * + * @count_get: get the count of clocks provided by SCMI + * @info_get: get the information of the specified clock + * @rate_get: request the current clock rate of a clock + * @rate_set: set the clock rate of a clock + * @enable: enables the specified clock + * @disable: disables the specified clock + */ +struct scmi_clk_proto_ops { + int (*count_get)(const struct scmi_protocol_handle *ph); + + const struct scmi_clock_info *(*info_get) + (const struct scmi_protocol_handle *ph, u32 clk_id); + int (*rate_get)(const struct scmi_protocol_handle *ph, u32 clk_id, + u64 *rate); + int (*rate_set)(const struct scmi_protocol_handle *ph, u32 clk_id, + u64 rate); + int (*enable)(const struct scmi_protocol_handle *ph, u32 clk_id); + int (*disable)(const struct scmi_protocol_handle *ph, u32 clk_id); +}; + +/** + * struct scmi_perf_proto_ops - represents the various operations provided + * by SCMI Performance Protocol + * + * @limits_set: sets limits on the performance level of a domain + * @limits_get: gets limits on the performance level of a domain + * @level_set: sets the performance level of a domain + * @level_get: gets the performance level of a domain + * @device_domain_id: gets the scmi domain id for a given device_d + * @transition_latency_get: gets the DVFS transition latency for a given device_d + * @device_opps_add: adds all the OPPs for a given device_d + * @freq_set: sets the frequency for a given device_d using sustained frequency + * to sustained performance level mapping + * @freq_get: gets the frequency for a given device_d using sustained frequency + * to sustained performance level mapping + * @est_power_get: gets the estimated power cost for a given performance domain + * at a given frequency + */ +struct scmi_perf_proto_ops { + int (*limits_set)(const struct scmi_protocol_handle *ph, u32 domain, + u32 max_perf, u32 min_perf); + int (*limits_get)(const struct scmi_protocol_handle *ph, u32 domain, + u32 *max_perf, u32 *min_perf); + int (*level_set)(const struct scmi_protocol_handle *ph, u32 domain, + u32 level, bool poll); + int (*level_get)(const struct scmi_protocol_handle *ph, u32 domain, + u32 *level, bool poll); + int (*device_domain_id)(struct device_d *dev); + int (*transition_latency_get)(const struct scmi_protocol_handle *ph, + struct device_d *dev); + int (*device_opps_add)(const struct scmi_protocol_handle *ph, + struct device_d *dev); + int (*freq_set)(const struct scmi_protocol_handle *ph, u32 domain, + unsigned long rate, bool poll); + int (*freq_get)(const struct scmi_protocol_handle *ph, u32 domain, + unsigned long *rate, bool poll); + int (*est_power_get)(const struct scmi_protocol_handle *ph, u32 domain, + unsigned long *rate, unsigned long *power); + bool (*fast_switch_possible)(const struct scmi_protocol_handle *ph, + struct device_d *dev); + bool (*power_scale_mw_get)(const struct scmi_protocol_handle *ph); +}; + +/** + * struct scmi_power_proto_ops - represents the various operations provided + * by SCMI Power Protocol + * + * @num_domains_get: get the count of power domains provided by SCMI + * @name_get: gets the name of a power domain + * @state_set: sets the power state of a power domain + * @state_get: gets the power state of a power domain + */ +struct scmi_power_proto_ops { + int (*num_domains_get)(const struct scmi_protocol_handle *ph); + char *(*name_get)(const struct scmi_protocol_handle *ph, u32 domain); +#define SCMI_POWER_STATE_TYPE_SHIFT 30 +#define SCMI_POWER_STATE_ID_MASK (BIT(28) - 1) +#define SCMI_POWER_STATE_PARAM(type, id) \ + ((((type) & BIT(0)) << SCMI_POWER_STATE_TYPE_SHIFT) | \ + ((id) & SCMI_POWER_STATE_ID_MASK)) +#define SCMI_POWER_STATE_GENERIC_ON SCMI_POWER_STATE_PARAM(0, 0) +#define SCMI_POWER_STATE_GENERIC_OFF SCMI_POWER_STATE_PARAM(1, 0) + int (*state_set)(const struct scmi_protocol_handle *ph, u32 domain, + u32 state); + int (*state_get)(const struct scmi_protocol_handle *ph, u32 domain, + u32 *state); +}; + +/** + * scmi_sensor_reading - represent a timestamped read + * + * Used by @reading_get_timestamped method. + * + * @value: The signed value sensor read. + * @timestamp: An unsigned timestamp for the sensor read, as provided by + * SCMI platform. Set to zero when not available. + */ +struct scmi_sensor_reading { + long long value; + unsigned long long timestamp; +}; + +/** + * scmi_range_attrs - specifies a sensor or axis values' range + * @min_range: The minimum value which can be represented by the sensor/axis. + * @max_range: The maximum value which can be represented by the sensor/axis. + */ +struct scmi_range_attrs { + long long min_range; + long long max_range; +}; + +/** + * scmi_sensor_axis_info - describes one sensor axes + * @id: The axes ID. + * @type: Axes type. Chosen amongst one of @enum scmi_sensor_class. + * @scale: Power-of-10 multiplier applied to the axis unit. + * @name: NULL-terminated string representing axes name as advertised by + * SCMI platform. + * @extended_attrs: Flag to indicate the presence of additional extended + * attributes for this axes. + * @resolution: Extended attribute representing the resolution of the axes. + * Set to 0 if not reported by this axes. + * @exponent: Extended attribute representing the power-of-10 multiplier that + * is applied to the resolution field. Set to 0 if not reported by + * this axes. + * @attrs: Extended attributes representing minimum and maximum values + * measurable by this axes. Set to 0 if not reported by this sensor. + */ +struct scmi_sensor_axis_info { + unsigned int id; + unsigned int type; + int scale; + char name[SCMI_MAX_STR_SIZE]; + bool extended_attrs; + unsigned int resolution; + int exponent; + struct scmi_range_attrs attrs; +}; + +/** + * scmi_sensor_intervals_info - describes number and type of available update + * intervals + * @segmented: Flag for segmented intervals' representation. When True there + * will be exactly 3 intervals in @desc, with each entry + * representing a member of a segment in this order: + * {lowest update interval, highest update interval, step size} + * @count: Number of intervals described in @desc. + * @desc: Array of @count interval descriptor bitmask represented as detailed in + * the SCMI specification: it can be accessed using the accompanying + * macros. + * @prealloc_pool: A minimal preallocated pool of desc entries used to avoid + * lesser-than-64-bytes dynamic allocation for small @count + * values. + */ +struct scmi_sensor_intervals_info { + bool segmented; + unsigned int count; +#define SCMI_SENS_INTVL_SEGMENT_LOW 0 +#define SCMI_SENS_INTVL_SEGMENT_HIGH 1 +#define SCMI_SENS_INTVL_SEGMENT_STEP 2 + unsigned int *desc; +#define SCMI_SENS_INTVL_GET_SECS(x) FIELD_GET(GENMASK(20, 5), (x)) +#define SCMI_SENS_INTVL_GET_EXP(x) \ + ({ \ + int __signed_exp = FIELD_GET(GENMASK(4, 0), (x)); \ + \ + if (__signed_exp & BIT(4)) \ + __signed_exp |= GENMASK(31, 5); \ + __signed_exp; \ + }) +#define SCMI_MAX_PREALLOC_POOL 16 + unsigned int prealloc_pool[SCMI_MAX_PREALLOC_POOL]; +}; + +/** + * struct scmi_sensor_info - represents information related to one of the + * available sensors. + * @id: Sensor ID. + * @type: Sensor type. Chosen amongst one of @enum scmi_sensor_class. + * @scale: Power-of-10 multiplier applied to the sensor unit. + * @num_trip_points: Number of maximum configurable trip points. + * @async: Flag for asynchronous read support. + * @update: Flag for continuouos update notification support. + * @timestamped: Flag for timestamped read support. + * @tstamp_scale: Power-of-10 multiplier applied to the sensor timestamps to + * represent it in seconds. + * @num_axis: Number of supported axis if any. Reported as 0 for scalar sensors. + * @axis: Pointer to an array of @num_axis descriptors. + * @intervals: Descriptor of available update intervals. + * @sensor_config: A bitmask reporting the current sensor configuration as + * detailed in the SCMI specification: it can accessed and + * modified through the accompanying macros. + * @name: NULL-terminated string representing sensor name as advertised by + * SCMI platform. + * @extended_scalar_attrs: Flag to indicate the presence of additional extended + * attributes for this sensor. + * @sensor_power: Extended attribute representing the average power + * consumed by the sensor in microwatts (uW) when it is active. + * Reported here only for scalar sensors. + * Set to 0 if not reported by this sensor. + * @resolution: Extended attribute representing the resolution of the sensor. + * Reported here only for scalar sensors. + * Set to 0 if not reported by this sensor. + * @exponent: Extended attribute representing the power-of-10 multiplier that is + * applied to the resolution field. + * Reported here only for scalar sensors. + * Set to 0 if not reported by this sensor. + * @scalar_attrs: Extended attributes representing minimum and maximum + * measurable values by this sensor. + * Reported here only for scalar sensors. + * Set to 0 if not reported by this sensor. + */ +struct scmi_sensor_info { + unsigned int id; + unsigned int type; + int scale; + unsigned int num_trip_points; + bool async; + bool update; + bool timestamped; + int tstamp_scale; + unsigned int num_axis; + struct scmi_sensor_axis_info *axis; + struct scmi_sensor_intervals_info intervals; + unsigned int sensor_config; +#define SCMI_SENS_CFG_UPDATE_SECS_MASK GENMASK(31, 16) +#define SCMI_SENS_CFG_GET_UPDATE_SECS(x) \ + FIELD_GET(SCMI_SENS_CFG_UPDATE_SECS_MASK, (x)) + +#define SCMI_SENS_CFG_UPDATE_EXP_MASK GENMASK(15, 11) +#define SCMI_SENS_CFG_GET_UPDATE_EXP(x) \ + ({ \ + int __signed_exp = \ + FIELD_GET(SCMI_SENS_CFG_UPDATE_EXP_MASK, (x)); \ + \ + if (__signed_exp & BIT(4)) \ + __signed_exp |= GENMASK(31, 5); \ + __signed_exp; \ + }) + +#define SCMI_SENS_CFG_ROUND_MASK GENMASK(10, 9) +#define SCMI_SENS_CFG_ROUND_AUTO 2 +#define SCMI_SENS_CFG_ROUND_UP 1 +#define SCMI_SENS_CFG_ROUND_DOWN 0 + +#define SCMI_SENS_CFG_TSTAMP_ENABLED_MASK BIT(1) +#define SCMI_SENS_CFG_TSTAMP_ENABLE 1 +#define SCMI_SENS_CFG_TSTAMP_DISABLE 0 +#define SCMI_SENS_CFG_IS_TSTAMP_ENABLED(x) \ + FIELD_GET(SCMI_SENS_CFG_TSTAMP_ENABLED_MASK, (x)) + +#define SCMI_SENS_CFG_SENSOR_ENABLED_MASK BIT(0) +#define SCMI_SENS_CFG_SENSOR_ENABLE 1 +#define SCMI_SENS_CFG_SENSOR_DISABLE 0 + char name[SCMI_MAX_STR_SIZE]; +#define SCMI_SENS_CFG_IS_ENABLED(x) FIELD_GET(BIT(0), (x)) + bool extended_scalar_attrs; + unsigned int sensor_power; + unsigned int resolution; + int exponent; + struct scmi_range_attrs scalar_attrs; +}; + +/* + * Partial list from Distributed Management Task Force (DMTF) specification: + * DSP0249 (Platform Level Data Model specification) + */ +enum scmi_sensor_class { + NONE = 0x0, + UNSPEC = 0x1, + TEMPERATURE_C = 0x2, + TEMPERATURE_F = 0x3, + TEMPERATURE_K = 0x4, + VOLTAGE = 0x5, + CURRENT = 0x6, + POWER = 0x7, + ENERGY = 0x8, + CHARGE = 0x9, + VOLTAMPERE = 0xA, + NITS = 0xB, + LUMENS = 0xC, + LUX = 0xD, + CANDELAS = 0xE, + KPA = 0xF, + PSI = 0x10, + NEWTON = 0x11, + CFM = 0x12, + RPM = 0x13, + HERTZ = 0x14, + SECS = 0x15, + MINS = 0x16, + HOURS = 0x17, + DAYS = 0x18, + WEEKS = 0x19, + MILS = 0x1A, + INCHES = 0x1B, + FEET = 0x1C, + CUBIC_INCHES = 0x1D, + CUBIC_FEET = 0x1E, + METERS = 0x1F, + CUBIC_CM = 0x20, + CUBIC_METERS = 0x21, + LITERS = 0x22, + FLUID_OUNCES = 0x23, + RADIANS = 0x24, + STERADIANS = 0x25, + REVOLUTIONS = 0x26, + CYCLES = 0x27, + GRAVITIES = 0x28, + OUNCES = 0x29, + POUNDS = 0x2A, + FOOT_POUNDS = 0x2B, + OUNCE_INCHES = 0x2C, + GAUSS = 0x2D, + GILBERTS = 0x2E, + HENRIES = 0x2F, + FARADS = 0x30, + OHMS = 0x31, + SIEMENS = 0x32, + MOLES = 0x33, + BECQUERELS = 0x34, + PPM = 0x35, + DECIBELS = 0x36, + DBA = 0x37, + DBC = 0x38, + GRAYS = 0x39, + SIEVERTS = 0x3A, + COLOR_TEMP_K = 0x3B, + BITS = 0x3C, + BYTES = 0x3D, + WORDS = 0x3E, + DWORDS = 0x3F, + QWORDS = 0x40, + PERCENTAGE = 0x41, + PASCALS = 0x42, + COUNTS = 0x43, + GRAMS = 0x44, + NEWTON_METERS = 0x45, + HITS = 0x46, + MISSES = 0x47, + RETRIES = 0x48, + OVERRUNS = 0x49, + UNDERRUNS = 0x4A, + COLLISIONS = 0x4B, + PACKETS = 0x4C, + MESSAGES = 0x4D, + CHARS = 0x4E, + ERRORS = 0x4F, + CORRECTED_ERRS = 0x50, + UNCORRECTABLE_ERRS = 0x51, + SQ_MILS = 0x52, + SQ_INCHES = 0x53, + SQ_FEET = 0x54, + SQ_CM = 0x55, + SQ_METERS = 0x56, + RADIANS_SEC = 0x57, + BPM = 0x58, + METERS_SEC_SQUARED = 0x59, + METERS_SEC = 0x5A, + CUBIC_METERS_SEC = 0x5B, + MM_MERCURY = 0x5C, + RADIANS_SEC_SQUARED = 0x5D, + OEM_UNIT = 0xFF +}; + +/** + * struct scmi_sensor_proto_ops - represents the various operations provided + * by SCMI Sensor Protocol + * + * @count_get: get the count of sensors provided by SCMI + * @info_get: get the information of the specified sensor + * @trip_point_config: selects and configures a trip-point of interest + * @reading_get: gets the current value of the sensor + * @reading_get_timestamped: gets the current value and timestamp, when + * available, of the sensor. (as of v3.0 spec) + * Supports multi-axis sensors for sensors which + * supports it and if the @reading array size of + * @count entry equals the sensor num_axis + * @config_get: Get sensor current configuration + * @config_set: Set sensor current configuration + */ +struct scmi_sensor_proto_ops { + int (*count_get)(const struct scmi_protocol_handle *ph); + const struct scmi_sensor_info *(*info_get) + (const struct scmi_protocol_handle *ph, u32 sensor_id); + int (*trip_point_config)(const struct scmi_protocol_handle *ph, + u32 sensor_id, u8 trip_id, u64 trip_value); + int (*reading_get)(const struct scmi_protocol_handle *ph, u32 sensor_id, + u64 *value); + int (*reading_get_timestamped)(const struct scmi_protocol_handle *ph, + u32 sensor_id, u8 count, + struct scmi_sensor_reading *readings); + int (*config_get)(const struct scmi_protocol_handle *ph, + u32 sensor_id, u32 *sensor_config); + int (*config_set)(const struct scmi_protocol_handle *ph, + u32 sensor_id, u32 sensor_config); +}; + +/** + * struct scmi_reset_proto_ops - represents the various operations provided + * by SCMI Reset Protocol + * + * @num_domains_get: get the count of reset domains provided by SCMI + * @name_get: gets the name of a reset domain + * @latency_get: gets the reset latency for the specified reset domain + * @reset: resets the specified reset domain + * @assert: explicitly assert reset signal of the specified reset domain + * @deassert: explicitly deassert reset signal of the specified reset domain + */ +struct scmi_reset_proto_ops { + int (*num_domains_get)(const struct scmi_protocol_handle *ph); + char *(*name_get)(const struct scmi_protocol_handle *ph, u32 domain); + int (*latency_get)(const struct scmi_protocol_handle *ph, u32 domain); + int (*reset)(const struct scmi_protocol_handle *ph, u32 domain); + int (*assert)(const struct scmi_protocol_handle *ph, u32 domain); + int (*deassert)(const struct scmi_protocol_handle *ph, u32 domain); +}; + +/** + * struct scmi_voltage_info - describe one available SCMI Voltage Domain + * + * @id: the domain ID as advertised by the platform + * @segmented: defines the layout of the entries of array @levels_uv. + * - when True the entries are to be interpreted as triplets, + * each defining a segment representing a range of equally + * space voltages: <lowest_volts>, <highest_volt>, <step_uV> + * - when False the entries simply represent a single discrete + * supported voltage level + * @negative_volts_allowed: True if any of the entries of @levels_uv represent + * a negative voltage. + * @attributes: represents Voltage Domain advertised attributes + * @name: name assigned to the Voltage Domain by platform + * @num_levels: number of total entries in @levels_uv. + * @levels_uv: array of entries describing the available voltage levels for + * this domain. + */ +struct scmi_voltage_info { + unsigned int id; + bool segmented; + bool negative_volts_allowed; + unsigned int attributes; + char name[SCMI_MAX_STR_SIZE]; + unsigned int num_levels; +#define SCMI_VOLTAGE_SEGMENT_LOW 0 +#define SCMI_VOLTAGE_SEGMENT_HIGH 1 +#define SCMI_VOLTAGE_SEGMENT_STEP 2 + int *levels_uv; +}; + +/** + * struct scmi_voltage_proto_ops - represents the various operations provided + * by SCMI Voltage Protocol + * + * @num_domains_get: get the count of voltage domains provided by SCMI + * @info_get: get the information of the specified domain + * @config_set: set the config for the specified domain + * @config_get: get the config of the specified domain + * @level_set: set the voltage level for the specified domain + * @level_get: get the voltage level of the specified domain + */ +struct scmi_voltage_proto_ops { + int (*num_domains_get)(const struct scmi_protocol_handle *ph); + const struct scmi_voltage_info __must_check *(*info_get) + (const struct scmi_protocol_handle *ph, u32 domain_id); + int (*config_set)(const struct scmi_protocol_handle *ph, u32 domain_id, + u32 config); +#define SCMI_VOLTAGE_ARCH_STATE_OFF 0x0 +#define SCMI_VOLTAGE_ARCH_STATE_ON 0x7 + int (*config_get)(const struct scmi_protocol_handle *ph, u32 domain_id, + u32 *config); + int (*level_set)(const struct scmi_protocol_handle *ph, u32 domain_id, + u32 flags, s32 volt_uV); + int (*level_get)(const struct scmi_protocol_handle *ph, u32 domain_id, + s32 *volt_uV); +}; + +/** + * struct scmi_handle - Handle returned to ARM SCMI clients for usage. + * + * @dev: pointer to the SCMI device_d + * @version: pointer to the structure containing SCMI version information + * @protocol_get: method to acquire a protocol and get specific + * operations and a dedicated protocol handler + */ +struct scmi_handle { + struct device_d *dev; + struct scmi_revision_info *version; + + const void __must_check * + (*protocol_get)(struct scmi_device *sdev, u8 proto, + struct scmi_protocol_handle **ph); +}; + +enum scmi_std_protocol { + SCMI_PROTOCOL_BASE = 0x10, + SCMI_PROTOCOL_POWER = 0x11, + SCMI_PROTOCOL_SYSTEM = 0x12, + SCMI_PROTOCOL_PERF = 0x13, + SCMI_PROTOCOL_CLOCK = 0x14, + SCMI_PROTOCOL_SENSOR = 0x15, + SCMI_PROTOCOL_RESET = 0x16, + SCMI_PROTOCOL_VOLTAGE = 0x17, +}; + +enum scmi_system_events { + SCMI_SYSTEM_SHUTDOWN, + SCMI_SYSTEM_COLDRESET, + SCMI_SYSTEM_WARMRESET, + SCMI_SYSTEM_POWERUP, + SCMI_SYSTEM_SUSPEND, + SCMI_SYSTEM_MAX +}; + +struct scmi_device { + u8 protocol_id; + const char *name; + struct device_d dev; + struct scmi_handle *handle; +}; + +#define to_scmi_dev(d) container_of(d, struct scmi_device, dev) + +struct scmi_device * +scmi_device_alloc(struct device_node *np, struct device_d *parent, int protocol, + const char *name); +void scmi_device_destroy(struct scmi_device *scmi_dev); + +struct scmi_device_id { + u8 protocol_id; + const char *name; +}; + +struct scmi_driver { + const char *name; + int (*probe)(struct scmi_device *sdev); + void (*remove)(struct scmi_device *sdev); + const struct scmi_device_id *id_table; + + struct driver_d driver; +}; + +#define to_scmi_driver(d) container_of(d, struct scmi_driver, driver) + +#if IS_REACHABLE(CONFIG_ARM_SCMI_PROTOCOL) +int scmi_driver_register(struct scmi_driver *driver); +#else +static inline int +scmi_driver_register(struct scmi_driver *driver) +{ + return -EINVAL; +} + +#endif /* CONFIG_ARM_SCMI_PROTOCOL */ + +#define scmi_register(driver) \ + scmi_driver_register(driver) + +/** + * coredevice_scmi_driver() - Helper macro for registering a scmi driver + * @__scmi_driver: scmi_driver structure + * + * Helper macro for scmi drivers to set up proper module init / exit + * functions. Replaces module_init() and module_exit() and keeps people from + * printing pointless things to the kernel log when their driver is loaded. + */ +#define coredevice_scmi_driver(__scmi_driver) \ + register_driver_macro(coredevice,scmi,__scmi_driver) + +#define core_scmi_driver(__scmi_driver) \ + register_driver_macro(core,scmi,__scmi_driver) + +/** + * module_scmi_protocol() - Helper macro for registering a scmi protocol + * @__scmi_protocol: scmi_protocol structure + * + * Helper macro for scmi drivers to set up proper module init / exit + * functions. Replaces module_init() and module_exit() and keeps people from + * printing pointless things to the kernel log when their driver is loaded. + */ +#define module_scmi_protocol(__scmi_protocol) \ + module_driver(__scmi_protocol, \ + scmi_protocol_register, scmi_protocol_unregister) + +struct scmi_protocol; +int scmi_protocol_register(const struct scmi_protocol *proto); +void scmi_protocol_unregister(const struct scmi_protocol *proto); + +#endif /* _LINUX_SCMI_PROTOCOL_H */ diff --git a/include/linux/slab.h b/include/linux/slab.h index 806d5bfb21..eb14c58e34 100644 --- a/include/linux/slab.h +++ b/include/linux/slab.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _LINUX_SLAB_H #define _LINUX_SLAB_H @@ -101,4 +103,7 @@ static inline void *kcalloc(size_t n, size_t size, gfp_t flags) return calloc(n, size); } +#define kstrdup_const(str, flags) strdup(str) +#define kfree_const(ptr) kfree((void *)ptr) + #endif /* _LINUX_SLAB_H */ diff --git a/include/linux/smscphy.h b/include/linux/smscphy.h index ce718cbce4..45e1192384 100644 --- a/include/linux/smscphy.h +++ b/include/linux/smscphy.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __LINUX_SMSCPHY_H__ #define __LINUX_SMSCPHY_H__ diff --git a/include/linux/spinlock.h b/include/linux/spinlock.h index b32114f4f0..12af3dab23 100644 --- a/include/linux/spinlock.h +++ b/include/linux/spinlock.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __LINUX_SPINLOCK_H #define __LINUX_SPINLOCK_H @@ -8,4 +10,6 @@ typedef int spinlock_t; #define spin_lock_irqsave(lock, flags) do { flags = 0; } while (0) #define spin_unlock_irqrestore(lock, flags) do { flags = flags; } while (0) +#define DEFINE_SPINLOCK(lock) spinlock_t lock + #endif /* __LINUX_SPINLOCK_H */ diff --git a/include/linux/stat.h b/include/linux/stat.h index f5043d8bce..2bdf3ec9c9 100644 --- a/include/linux/stat.h +++ b/include/linux/stat.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _LINUX_STAT_H #define _LINUX_STAT_H diff --git a/include/linux/stddef.h b/include/linux/stddef.h index 680d0c7662..5429a7b582 100644 --- a/include/linux/stddef.h +++ b/include/linux/stddef.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _LINUX_STDDEF_H #define _LINUX_STDDEF_H diff --git a/include/linux/string.h b/include/linux/string.h index 47a27a391f..ae5e5bca8d 100644 --- a/include/linux/string.h +++ b/include/linux/string.h @@ -1,8 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _LINUX_STRING_H_ #define _LINUX_STRING_H_ #include <linux/types.h> /* for size_t */ #include <linux/stddef.h> /* for NULL */ +#include <linux/overflow.h> /* for array_size */ #ifdef __cplusplus extern "C" { @@ -131,6 +134,8 @@ static inline const char *kbasename(const char *path) void *memdup(const void *, size_t); +#define memdup_array(arr, count) memdup(arr, array_size(count, sizeof(*arr))); + static inline void *kmemdup(const void *src, size_t len, gfp_t gfp) { return memdup(src, len); diff --git a/include/linux/stringify.h b/include/linux/stringify.h index 841cec8ed5..55f6d04d48 100644 --- a/include/linux/stringify.h +++ b/include/linux/stringify.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __LINUX_STRINGIFY_H #define __LINUX_STRINGIFY_H diff --git a/include/linux/swab.h b/include/linux/swab.h index ea0c02fd51..243315184e 100644 --- a/include/linux/swab.h +++ b/include/linux/swab.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _LINUX_SWAB_H #define _LINUX_SWAB_H diff --git a/include/linux/time.h b/include/linux/time.h index 7903139a65..ebb7cb82ee 100644 --- a/include/linux/time.h +++ b/include/linux/time.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _LINUX_TIME_H #define _LINUX_TIME_H diff --git a/include/linux/types.h b/include/linux/types.h index dfef336c19..5872bd8e38 100644 --- a/include/linux/types.h +++ b/include/linux/types.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _LINUX_TYPES_H #define _LINUX_TYPES_H #ifndef __ASSEMBLY__ diff --git a/include/linux/unaligned/access_ok.h b/include/linux/unaligned/access_ok.h index 99c1b4d20b..7039ec8ed0 100644 --- a/include/linux/unaligned/access_ok.h +++ b/include/linux/unaligned/access_ok.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _LINUX_UNALIGNED_ACCESS_OK_H #define _LINUX_UNALIGNED_ACCESS_OK_H diff --git a/include/linux/unaligned/be_byteshift.h b/include/linux/unaligned/be_byteshift.h index 9356b24223..632a7308b5 100644 --- a/include/linux/unaligned/be_byteshift.h +++ b/include/linux/unaligned/be_byteshift.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _LINUX_UNALIGNED_BE_BYTESHIFT_H #define _LINUX_UNALIGNED_BE_BYTESHIFT_H diff --git a/include/linux/unaligned/be_memmove.h b/include/linux/unaligned/be_memmove.h index c2a76c5c9e..0723c286fc 100644 --- a/include/linux/unaligned/be_memmove.h +++ b/include/linux/unaligned/be_memmove.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _LINUX_UNALIGNED_BE_MEMMOVE_H #define _LINUX_UNALIGNED_BE_MEMMOVE_H diff --git a/include/linux/unaligned/be_struct.h b/include/linux/unaligned/be_struct.h index 132415836c..3cc8fcd68d 100644 --- a/include/linux/unaligned/be_struct.h +++ b/include/linux/unaligned/be_struct.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _LINUX_UNALIGNED_BE_STRUCT_H #define _LINUX_UNALIGNED_BE_STRUCT_H diff --git a/include/linux/unaligned/generic.h b/include/linux/unaligned/generic.h index 43d5f2af24..298e977fb7 100644 --- a/include/linux/unaligned/generic.h +++ b/include/linux/unaligned/generic.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _LINUX_UNALIGNED_GENERIC_H #define _LINUX_UNALIGNED_GENERIC_H diff --git a/include/linux/unaligned/le_byteshift.h b/include/linux/unaligned/le_byteshift.h index be376fb79b..aa425707f8 100644 --- a/include/linux/unaligned/le_byteshift.h +++ b/include/linux/unaligned/le_byteshift.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _LINUX_UNALIGNED_LE_BYTESHIFT_H #define _LINUX_UNALIGNED_LE_BYTESHIFT_H diff --git a/include/linux/unaligned/le_memmove.h b/include/linux/unaligned/le_memmove.h index 269849bee4..e21fccc9b9 100644 --- a/include/linux/unaligned/le_memmove.h +++ b/include/linux/unaligned/le_memmove.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _LINUX_UNALIGNED_LE_MEMMOVE_H #define _LINUX_UNALIGNED_LE_MEMMOVE_H diff --git a/include/linux/unaligned/le_struct.h b/include/linux/unaligned/le_struct.h index 088c4572fa..4bbeba5778 100644 --- a/include/linux/unaligned/le_struct.h +++ b/include/linux/unaligned/le_struct.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _LINUX_UNALIGNED_LE_STRUCT_H #define _LINUX_UNALIGNED_LE_STRUCT_H diff --git a/include/linux/unaligned/memmove.h b/include/linux/unaligned/memmove.h index eeb5a779a4..c44dff67ab 100644 --- a/include/linux/unaligned/memmove.h +++ b/include/linux/unaligned/memmove.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _LINUX_UNALIGNED_MEMMOVE_H #define _LINUX_UNALIGNED_MEMMOVE_H diff --git a/include/linux/unaligned/packed_struct.h b/include/linux/unaligned/packed_struct.h index 2498bb9fe0..7caf433fae 100644 --- a/include/linux/unaligned/packed_struct.h +++ b/include/linux/unaligned/packed_struct.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _LINUX_UNALIGNED_PACKED_STRUCT_H #define _LINUX_UNALIGNED_PACKED_STRUCT_H diff --git a/include/linux/wait.h b/include/linux/wait.h index e2df8878ed..e4b0e2a492 100644 --- a/include/linux/wait.h +++ b/include/linux/wait.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _LINUX_WAIT_H #define _LINUX_WAIT_H /* diff --git a/include/linux/xz.h b/include/linux/xz.h index d1afab0562..77e80ce4b1 100644 --- a/include/linux/xz.h +++ b/include/linux/xz.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + /* * XZ decompressor * diff --git a/include/linux/zutil.h b/include/linux/zutil.h index 6adfa9a6ff..b10b50d097 100644 --- a/include/linux/zutil.h +++ b/include/linux/zutil.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + /* zutil.h -- internal interface and configuration of the compression library * Copyright (C) 1995-1998 Jean-loup Gailly. * For conditions of distribution and use, see copyright notice in zlib.h diff --git a/include/machine_id.h b/include/machine_id.h index 31d5e0bb28..e30bbada1a 100644 --- a/include/machine_id.h +++ b/include/machine_id.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __MACHINE_ID_H__ #define __MACHINE_ID_H__ diff --git a/include/mfd/lp3972.h b/include/mfd/lp3972.h index edb5801118..40ab986657 100644 --- a/include/mfd/lp3972.h +++ b/include/mfd/lp3972.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __ASM_ARCH_LP3972_H #define __ASM_ARCH_LP3972_H diff --git a/include/mfd/pfuze.h b/include/mfd/pfuze.h index 8e021680ef..4fb3863a72 100644 --- a/include/mfd/pfuze.h +++ b/include/mfd/pfuze.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __INCLUDE_PFUZE_H #define __INCLUDE_PFUZE_H diff --git a/include/mtd/mtd-peb.h b/include/mtd/mtd-peb.h index 311f25c3df..cf8d8ff8da 100644 --- a/include/mtd/mtd-peb.h +++ b/include/mtd/mtd-peb.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __LINUX_MTD_MTDPEB_H #define __LINUX_MTD_MTDPEB_H @@ -21,6 +23,8 @@ int mtd_num_pebs(struct mtd_info *mtd); int mtd_peb_create_bitflips(struct mtd_info *mtd, int pnum, int offset, int len, int num_bitflips, int random, int info); +int mtd_peb_read_file(struct mtd_info *mtd, unsigned int peb_start, + unsigned int peb_last, void *buf, size_t len); int mtd_peb_write_file(struct mtd_info *mtd, int peb_start, int max_pebs, const void *buf, size_t len); diff --git a/include/net.h b/include/net.h index aad28e4f4c..b50b6e76c8 100644 --- a/include/net.h +++ b/include/net.h @@ -44,9 +44,14 @@ struct eth_device { void (*halt) (struct eth_device*); int (*get_ethaddr) (struct eth_device*, u8 adr[6]); int (*set_ethaddr) (struct eth_device*, const unsigned char *adr); + int (*rx_preprocessor) (struct eth_device*, unsigned char **packet, + int *length); + void (*rx_monitor) (struct eth_device*, void *packet, int length); + void (*tx_monitor) (struct eth_device*, void *packet, int length); struct eth_device *next; void *priv; + void *rx_preprocessor_priv; /* phy device may attach itself for hardware timestamping */ struct phy_device *phydev; @@ -87,6 +92,15 @@ static inline const char *eth_name(struct eth_device *edev) return edev->devname; } +static inline int eth_send_raw(struct eth_device *edev, void *packet, + int length) +{ + if (edev->tx_monitor) + edev->tx_monitor(edev, packet, length); + + return edev->send(edev, packet, length); +} + int eth_register(struct eth_device* dev); /* Register network device */ void eth_unregister(struct eth_device* dev); /* Unregister network device */ int eth_set_ethaddr(struct eth_device *edev, const char *ethaddr); @@ -94,6 +108,7 @@ int eth_open(struct eth_device *edev); void eth_close(struct eth_device *edev); int eth_send(struct eth_device *edev, void *packet, int length); /* Send a packet */ int eth_rx(void); /* Check for received packets */ +struct eth_device *of_find_eth_device_by_node(struct device_node *np); /* associate a MAC address to a ethernet device. Should be called by * board code for boards which store their MAC address at some unusual diff --git a/include/of.h b/include/of.h index e5df4cab4a..3a8e32f69c 100644 --- a/include/of.h +++ b/include/of.h @@ -107,7 +107,7 @@ void of_print_cmdline(struct device_node *root); void of_print_nodes(struct device_node *node, int indent); void of_print_properties(struct device_node *node); -void of_diff(struct device_node *a, struct device_node *b, int indent); +int of_diff(struct device_node *a, struct device_node *b, int indent); int of_probe(void); int of_parse_dtb(struct fdt_header *fdt); struct device_node *of_unflatten_dtb(const void *fdt, int size); @@ -120,6 +120,7 @@ extern int of_bus_n_addr_cells(struct device_node *np); extern int of_n_addr_cells(struct device_node *np); extern int of_bus_n_size_cells(struct device_node *np); extern int of_n_size_cells(struct device_node *np); +extern bool of_node_name_eq(const struct device_node *np, const char *name); extern struct property *of_find_property(const struct device_node *np, const char *name, int *lenp); @@ -138,6 +139,8 @@ extern void of_delete_property(struct property *pp); extern struct device_node *of_find_node_by_name(struct device_node *from, const char *name); +extern struct device_node *of_find_node_by_name_address(struct device_node *from, + const char *name); extern struct device_node *of_find_node_by_path_from(struct device_node *from, const char *path); extern struct device_node *of_find_node_by_path(const char *path); @@ -281,10 +284,10 @@ extern struct device_d *of_device_enable_and_register_by_name(const char *name); extern struct device_d *of_device_enable_and_register_by_alias( const char *alias); -extern struct device_d *of_device_create_on_demand(struct device_node *np); extern int of_device_ensure_probed(struct device_node *np); extern int of_device_ensure_probed_by_alias(const char *alias); extern int of_devices_ensure_probed_by_property(const char *property_name); +extern int of_devices_ensure_probed_by_name(const char *name); extern int of_devices_ensure_probed_by_dev_id(const struct of_device_id *ids); extern int of_partition_ensure_probed(struct device_node *np); @@ -313,7 +316,13 @@ struct device_node *of_find_node_by_path_or_alias(struct device_node *root, const char *str); int of_autoenable_device_by_path(char *path); int of_autoenable_i2c_by_component(char *path); +int of_prepend_machine_compatible(struct device_node *root, const char *compat); #else +static inline bool of_node_name_eq(const struct device_node *np, const char *name) +{ + return false; +} + static inline int of_parse_partitions(struct cdev *cdev, struct device_node *node) { @@ -375,11 +384,6 @@ static inline void of_platform_device_dummy_drv(struct device_d *dev) { } -static inline struct device_d *of_device_create_on_demand(struct device_node *np) -{ - return NULL; -} - static inline int of_device_ensure_probed(struct device_node *np) { return 0; @@ -665,6 +669,12 @@ static inline struct device_node *of_find_node_by_name(struct device_node *from, return NULL; } +static inline struct device_node *of_find_node_by_name_address(struct device_node *from, + const char *name) +{ + return NULL; +} + static inline struct device_node *of_find_node_by_phandle(phandle phandle) { return NULL; @@ -825,6 +835,11 @@ static inline int of_autoenable_i2c_by_component(char *path) return -ENODEV; } +static int of_prepend_machine_compatible(struct device_node *root, + const char *compat) +{ + return -ENODEV; +} #endif @@ -833,12 +848,18 @@ static inline int of_autoenable_i2c_by_component(char *path) #define for_each_node_by_name(dn, name) \ for (dn = of_find_node_by_name(NULL, name); dn; \ dn = of_find_node_by_name(dn, name)) +#define for_each_node_by_name_address(dn, name) \ + for (dn = of_find_node_by_name_address(NULL, name); dn; \ + dn = of_find_node_by_name_address(dn, name)) #define for_each_node_by_type(dn, type) \ for (dn = of_find_node_by_type(NULL, type); dn; \ dn = of_find_node_by_type(dn, type)) #define for_each_node_by_name_from(dn, root, name) \ for (dn = of_find_node_by_name(root, name); dn; \ dn = of_find_node_by_name(dn, name)) +#define for_each_node_by_name_address_from(dn, root, name) \ + for (dn = of_find_node_by_name_address(root, name); dn; \ + dn = of_find_node_by_name_address(dn, name)) /* Iterate over compatible nodes starting from given root */ #define for_each_compatible_node_from(dn, root, type, compatible) \ for (dn = of_find_compatible_node(root, type, compatible); dn; \ diff --git a/include/parseopt.h b/include/parseopt.h index 5a40bdc219..a944c3655f 100644 --- a/include/parseopt.h +++ b/include/parseopt.h @@ -6,7 +6,6 @@ void parseopt_llu_suffix(const char *options, const char *opt, void parseopt_b(const char *options, const char *opt, bool *val); void parseopt_hu(const char *options, const char *opt, unsigned short *val); -void parseopt_u16(const char *options, const char *opt, uint16_t *val); void parseopt_str(const char *options, const char *opt, char **val); #endif /* __PARSEOPT_H__ */ diff --git a/include/platform_data/atmel-mci.h b/include/platform_data/atmel-mci.h index d99ee3d138..53c2e4dfa5 100644 --- a/include/platform_data/atmel-mci.h +++ b/include/platform_data/atmel-mci.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef PLATFORM_DATA_ATMEL_MCI_H #define PLATFORM_DATA_ATMEL_MCI_H diff --git a/include/platform_data/cadence_qspi.h b/include/platform_data/cadence_qspi.h index ad1a680c9f..e1095cf6b8 100644 --- a/include/platform_data/cadence_qspi.h +++ b/include/platform_data/cadence_qspi.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __INCLUDE_PLATFORM_DATA_CADENCE_QSPI_H #define __INCLUDE_PLATFORM_DATA_CADENCE_QSPI_H diff --git a/include/platform_data/dw_mmc.h b/include/platform_data/dw_mmc.h index 4325a4f483..6c648d7073 100644 --- a/include/platform_data/dw_mmc.h +++ b/include/platform_data/dw_mmc.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __INCLUDE_PLATFORM_DATA_DW_MMC_H #define __INCLUDE_PLATFORM_DATA_DW_MMC_H diff --git a/include/platform_data/eth-designware.h b/include/platform_data/eth-designware.h index 7a7a26abfd..df00c5e64f 100644 --- a/include/platform_data/eth-designware.h +++ b/include/platform_data/eth-designware.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __DWC_UNIMAC_H #define __DWC_UNIMAC_H diff --git a/include/platform_data/eth-dm9000.h b/include/platform_data/eth-dm9000.h index a9a4635d2a..241552cee2 100644 --- a/include/platform_data/eth-dm9000.h +++ b/include/platform_data/eth-dm9000.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ #ifndef __DM9000_H__ #define __DM9000_H__ diff --git a/include/platform_data/ksz9477_reg.h b/include/platform_data/ksz9477_reg.h new file mode 100644 index 0000000000..2938e892b6 --- /dev/null +++ b/include/platform_data/ksz9477_reg.h @@ -0,0 +1,1665 @@ +/* SPDX-License-Identifier: GPL-2.0 + * + * Microchip KSZ9477 register definitions + * + * Copyright (C) 2017-2018 Microchip Technology Inc. + */ + +#ifndef __KSZ9477_REGS_H +#define __KSZ9477_REGS_H + +#define KS_PRIO_M 0x7 +#define KS_PRIO_S 4 + +/* 0 - Operation */ +#define REG_CHIP_ID0__1 0x0000 + +#define REG_CHIP_ID1__1 0x0001 + +#define FAMILY_ID 0x95 +#define FAMILY_ID_94 0x94 +#define FAMILY_ID_95 0x95 +#define FAMILY_ID_85 0x85 +#define FAMILY_ID_98 0x98 +#define FAMILY_ID_88 0x88 + +#define REG_CHIP_ID2__1 0x0002 + +#define CHIP_ID_63 0x63 +#define CHIP_ID_66 0x66 +#define CHIP_ID_67 0x67 +#define CHIP_ID_77 0x77 +#define CHIP_ID_93 0x93 +#define CHIP_ID_96 0x96 +#define CHIP_ID_97 0x97 + +#define REG_CHIP_ID3__1 0x0003 + +#define SWITCH_REVISION_M 0x0F +#define SWITCH_REVISION_S 4 +#define SWITCH_RESET 0x01 + +#define REG_SW_PME_CTRL 0x0006 + +#define PME_ENABLE BIT(1) +#define PME_POLARITY BIT(0) + +#define REG_GLOBAL_OPTIONS 0x000F + +#define SW_GIGABIT_ABLE BIT(6) +#define SW_REDUNDANCY_ABLE BIT(5) +#define SW_AVB_ABLE BIT(4) +#define SW_9567_RL_5_2 0xC +#define SW_9477_SL_5_2 0xD + +#define SW_9896_GL_5_1 0xB +#define SW_9896_RL_5_1 0x8 +#define SW_9896_SL_5_1 0x9 + +#define SW_9895_GL_4_1 0x7 +#define SW_9895_RL_4_1 0x4 +#define SW_9895_SL_4_1 0x5 + +#define SW_9896_RL_4_2 0x6 + +#define SW_9893_RL_2_1 0x0 +#define SW_9893_SL_2_1 0x1 +#define SW_9893_GL_2_1 0x3 + +#define SW_QW_ABLE BIT(5) +#define SW_9893_RN_2_1 0xC + +#define REG_SW_INT_STATUS__4 0x0010 +#define REG_SW_INT_MASK__4 0x0014 + +#define LUE_INT BIT(31) +#define TRIG_TS_INT BIT(30) +#define APB_TIMEOUT_INT BIT(29) + +#define SWITCH_INT_MASK (TRIG_TS_INT | APB_TIMEOUT_INT) + +#define REG_SW_PORT_INT_STATUS__4 0x0018 +#define REG_SW_PORT_INT_MASK__4 0x001C +#define REG_SW_PHY_INT_STATUS 0x0020 +#define REG_SW_PHY_INT_ENABLE 0x0024 + +/* 1 - Global */ +#define REG_SW_GLOBAL_SERIAL_CTRL_0 0x0100 +#define SW_SPARE_REG_2 BIT(7) +#define SW_SPARE_REG_1 BIT(6) +#define SW_SPARE_REG_0 BIT(5) +#define SW_BIG_ENDIAN BIT(4) +#define SPI_AUTO_EDGE_DETECTION BIT(1) +#define SPI_CLOCK_OUT_RISING_EDGE BIT(0) + +#define REG_SW_GLOBAL_OUTPUT_CTRL__1 0x0103 +#define SW_ENABLE_REFCLKO BIT(1) +#define SW_REFCLKO_IS_125MHZ BIT(0) + +#define REG_SW_IBA__4 0x0104 + +#define SW_IBA_ENABLE BIT(31) +#define SW_IBA_DA_MATCH BIT(30) +#define SW_IBA_INIT BIT(29) +#define SW_IBA_QID_M 0xF +#define SW_IBA_QID_S 22 +#define SW_IBA_PORT_M 0x2F +#define SW_IBA_PORT_S 16 +#define SW_IBA_FRAME_TPID_M 0xFFFF + +#define REG_SW_APB_TIMEOUT_ADDR__4 0x0108 + +#define APB_TIMEOUT_ACKNOWLEDGE BIT(31) + +#define REG_SW_IBA_SYNC__1 0x010C + +#define REG_SW_IO_STRENGTH__1 0x010D +#define SW_DRIVE_STRENGTH_M 0x7 +#define SW_DRIVE_STRENGTH_2MA 0 +#define SW_DRIVE_STRENGTH_4MA 1 +#define SW_DRIVE_STRENGTH_8MA 2 +#define SW_DRIVE_STRENGTH_12MA 3 +#define SW_DRIVE_STRENGTH_16MA 4 +#define SW_DRIVE_STRENGTH_20MA 5 +#define SW_DRIVE_STRENGTH_24MA 6 +#define SW_DRIVE_STRENGTH_28MA 7 +#define SW_HI_SPEED_DRIVE_STRENGTH_S 4 +#define SW_LO_SPEED_DRIVE_STRENGTH_S 0 + +#define REG_SW_IBA_STATUS__4 0x0110 + +#define SW_IBA_REQ BIT(31) +#define SW_IBA_RESP BIT(30) +#define SW_IBA_DA_MISMATCH BIT(14) +#define SW_IBA_FMT_MISMATCH BIT(13) +#define SW_IBA_CODE_ERROR BIT(12) +#define SW_IBA_CMD_ERROR BIT(11) +#define SW_IBA_CMD_LOC_M (BIT(6) - 1) + +#define REG_SW_IBA_STATES__4 0x0114 + +#define SW_IBA_BUF_STATE_S 30 +#define SW_IBA_CMD_STATE_S 28 +#define SW_IBA_RESP_STATE_S 26 +#define SW_IBA_STATE_M 0x3 +#define SW_IBA_PACKET_SIZE_M 0x7F +#define SW_IBA_PACKET_SIZE_S 16 +#define SW_IBA_FMT_ID_M 0xFFFF + +#define REG_SW_IBA_RESULT__4 0x0118 + +#define SW_IBA_SIZE_S 24 + +#define SW_IBA_RETRY_CNT_M (BIT(5) - 1) + +/* 2 - PHY */ +#define REG_SW_POWER_MANAGEMENT_CTRL 0x0201 + +#define SW_PLL_POWER_DOWN BIT(5) +#define SW_POWER_DOWN_MODE 0x3 +#define SW_ENERGY_DETECTION 1 +#define SW_SOFT_POWER_DOWN 2 +#define SW_POWER_SAVING 3 + +/* 3 - Operation Control */ +#define REG_SW_OPERATION 0x0300 + +#define SW_DOUBLE_TAG BIT(7) +#define SW_RESET BIT(1) +#define SW_START BIT(0) + +#define REG_SW_MAC_ADDR_0 0x0302 +#define REG_SW_MAC_ADDR_1 0x0303 +#define REG_SW_MAC_ADDR_2 0x0304 +#define REG_SW_MAC_ADDR_3 0x0305 +#define REG_SW_MAC_ADDR_4 0x0306 +#define REG_SW_MAC_ADDR_5 0x0307 + +#define REG_SW_MTU__2 0x0308 + +#define REG_SW_ISP_TPID__2 0x030A + +#define REG_SW_HSR_TPID__2 0x030C + +#define REG_AVB_STRATEGY__2 0x030E + +#define SW_SHAPING_CREDIT_ACCT BIT(1) +#define SW_POLICING_CREDIT_ACCT BIT(0) + +#define REG_SW_LUE_CTRL_0 0x0310 + +#define SW_VLAN_ENABLE BIT(7) +#define SW_DROP_INVALID_VID BIT(6) +#define SW_AGE_CNT_M 0x7 +#define SW_AGE_CNT_S 3 +#define SW_RESV_MCAST_ENABLE BIT(2) +#define SW_HASH_OPTION_M 0x03 +#define SW_HASH_OPTION_CRC 1 +#define SW_HASH_OPTION_XOR 2 +#define SW_HASH_OPTION_DIRECT 3 + +#define REG_SW_LUE_CTRL_1 0x0311 + +#define UNICAST_LEARN_DISABLE BIT(7) +#define SW_SRC_ADDR_FILTER BIT(6) +#define SW_FLUSH_STP_TABLE BIT(5) +#define SW_FLUSH_MSTP_TABLE BIT(4) +#define SW_FWD_MCAST_SRC_ADDR BIT(3) +#define SW_AGING_ENABLE BIT(2) +#define SW_FAST_AGING BIT(1) +#define SW_LINK_AUTO_AGING BIT(0) + +#define REG_SW_LUE_CTRL_2 0x0312 + +#define SW_TRAP_DOUBLE_TAG BIT(6) +#define SW_EGRESS_VLAN_FILTER_DYN BIT(5) +#define SW_EGRESS_VLAN_FILTER_STA BIT(4) +#define SW_FLUSH_OPTION_M 0x3 +#define SW_FLUSH_OPTION_S 2 +#define SW_FLUSH_OPTION_DYN_MAC 1 +#define SW_FLUSH_OPTION_STA_MAC 2 +#define SW_FLUSH_OPTION_BOTH 3 +#define SW_PRIO_M 0x3 +#define SW_PRIO_DA 0 +#define SW_PRIO_SA 1 +#define SW_PRIO_HIGHEST_DA_SA 2 +#define SW_PRIO_LOWEST_DA_SA 3 + +#define REG_SW_LUE_CTRL_3 0x0313 + +#define REG_SW_LUE_INT_STATUS 0x0314 +#define REG_SW_LUE_INT_ENABLE 0x0315 + +#define LEARN_FAIL_INT BIT(2) +#define ALMOST_FULL_INT BIT(1) +#define WRITE_FAIL_INT BIT(0) + +#define REG_SW_LUE_INDEX_0__2 0x0316 + +#define ENTRY_INDEX_M 0x0FFF + +#define REG_SW_LUE_INDEX_1__2 0x0318 + +#define FAIL_INDEX_M 0x03FF + +#define REG_SW_LUE_INDEX_2__2 0x031A + +#define REG_SW_LUE_UNK_UCAST_CTRL__4 0x0320 + +#define SW_UNK_UCAST_ENABLE BIT(31) + +#define REG_SW_LUE_UNK_MCAST_CTRL__4 0x0324 + +#define SW_UNK_MCAST_ENABLE BIT(31) + +#define REG_SW_LUE_UNK_VID_CTRL__4 0x0328 + +#define SW_UNK_VID_ENABLE BIT(31) + +#define REG_SW_MAC_CTRL_0 0x0330 + +#define SW_NEW_BACKOFF BIT(7) +#define SW_CHECK_LENGTH BIT(3) +#define SW_PAUSE_UNH_MODE BIT(1) +#define SW_AGGR_BACKOFF BIT(0) + +#define REG_SW_MAC_CTRL_1 0x0331 + +#define MULTICAST_STORM_DISABLE BIT(6) +#define SW_BACK_PRESSURE BIT(5) +#define FAIR_FLOW_CTRL BIT(4) +#define NO_EXC_COLLISION_DROP BIT(3) +#define SW_JUMBO_PACKET BIT(2) +#define SW_LEGAL_PACKET_DISABLE BIT(1) +#define SW_PASS_SHORT_FRAME BIT(0) + +#define REG_SW_MAC_CTRL_2 0x0332 + +#define SW_REPLACE_VID BIT(3) +#define BROADCAST_STORM_RATE_HI 0x07 + +#define REG_SW_MAC_CTRL_3 0x0333 + +#define BROADCAST_STORM_RATE_LO 0xFF +#define BROADCAST_STORM_RATE 0x07FF + +#define REG_SW_MAC_CTRL_4 0x0334 + +#define SW_PASS_PAUSE BIT(3) + +#define REG_SW_MAC_CTRL_5 0x0335 + +#define SW_OUT_RATE_LIMIT_QUEUE_BASED BIT(3) + +#define REG_SW_MAC_CTRL_6 0x0336 + +#define SW_MIB_COUNTER_FLUSH BIT(7) +#define SW_MIB_COUNTER_FREEZE BIT(6) + +#define REG_SW_MAC_802_1P_MAP_0 0x0338 +#define REG_SW_MAC_802_1P_MAP_1 0x0339 +#define REG_SW_MAC_802_1P_MAP_2 0x033A +#define REG_SW_MAC_802_1P_MAP_3 0x033B + +#define SW_802_1P_MAP_M KS_PRIO_M +#define SW_802_1P_MAP_S KS_PRIO_S + +#define REG_SW_MAC_ISP_CTRL 0x033C + +#define REG_SW_MAC_TOS_CTRL 0x033E + +#define SW_TOS_DSCP_REMARK BIT(1) +#define SW_TOS_DSCP_REMAP BIT(0) + +#define REG_SW_MAC_TOS_PRIO_0 0x0340 +#define REG_SW_MAC_TOS_PRIO_1 0x0341 +#define REG_SW_MAC_TOS_PRIO_2 0x0342 +#define REG_SW_MAC_TOS_PRIO_3 0x0343 +#define REG_SW_MAC_TOS_PRIO_4 0x0344 +#define REG_SW_MAC_TOS_PRIO_5 0x0345 +#define REG_SW_MAC_TOS_PRIO_6 0x0346 +#define REG_SW_MAC_TOS_PRIO_7 0x0347 +#define REG_SW_MAC_TOS_PRIO_8 0x0348 +#define REG_SW_MAC_TOS_PRIO_9 0x0349 +#define REG_SW_MAC_TOS_PRIO_10 0x034A +#define REG_SW_MAC_TOS_PRIO_11 0x034B +#define REG_SW_MAC_TOS_PRIO_12 0x034C +#define REG_SW_MAC_TOS_PRIO_13 0x034D +#define REG_SW_MAC_TOS_PRIO_14 0x034E +#define REG_SW_MAC_TOS_PRIO_15 0x034F +#define REG_SW_MAC_TOS_PRIO_16 0x0350 +#define REG_SW_MAC_TOS_PRIO_17 0x0351 +#define REG_SW_MAC_TOS_PRIO_18 0x0352 +#define REG_SW_MAC_TOS_PRIO_19 0x0353 +#define REG_SW_MAC_TOS_PRIO_20 0x0354 +#define REG_SW_MAC_TOS_PRIO_21 0x0355 +#define REG_SW_MAC_TOS_PRIO_22 0x0356 +#define REG_SW_MAC_TOS_PRIO_23 0x0357 +#define REG_SW_MAC_TOS_PRIO_24 0x0358 +#define REG_SW_MAC_TOS_PRIO_25 0x0359 +#define REG_SW_MAC_TOS_PRIO_26 0x035A +#define REG_SW_MAC_TOS_PRIO_27 0x035B +#define REG_SW_MAC_TOS_PRIO_28 0x035C +#define REG_SW_MAC_TOS_PRIO_29 0x035D +#define REG_SW_MAC_TOS_PRIO_30 0x035E +#define REG_SW_MAC_TOS_PRIO_31 0x035F + +#define REG_SW_MRI_CTRL_0 0x0370 + +#define SW_IGMP_SNOOP BIT(6) +#define SW_IPV6_MLD_OPTION BIT(3) +#define SW_IPV6_MLD_SNOOP BIT(2) +#define SW_MIRROR_RX_TX BIT(0) + +#define REG_SW_CLASS_D_IP_CTRL__4 0x0374 + +#define SW_CLASS_D_IP_ENABLE BIT(31) + +#define REG_SW_MRI_CTRL_8 0x0378 + +#define SW_NO_COLOR_S 6 +#define SW_RED_COLOR_S 4 +#define SW_YELLOW_COLOR_S 2 +#define SW_GREEN_COLOR_S 0 +#define SW_COLOR_M 0x3 + +#define REG_SW_QM_CTRL__4 0x0390 + +#define PRIO_SCHEME_SELECT_M KS_PRIO_M +#define PRIO_SCHEME_SELECT_S 6 +#define PRIO_MAP_3_HI 0 +#define PRIO_MAP_2_HI 2 +#define PRIO_MAP_0_LO 3 +#define UNICAST_VLAN_BOUNDARY BIT(1) + +#define REG_SW_EEE_QM_CTRL__2 0x03C0 + +#define REG_SW_EEE_TXQ_WAIT_TIME__2 0x03C2 + +/* 4 - */ +#define REG_SW_VLAN_ENTRY__4 0x0400 + +#define VLAN_VALID BIT(31) +#define VLAN_FORWARD_OPTION BIT(27) +#define VLAN_PRIO_M KS_PRIO_M +#define VLAN_PRIO_S 24 +#define VLAN_MSTP_M 0x7 +#define VLAN_MSTP_S 12 +#define VLAN_FID_M 0x7F + +#define REG_SW_VLAN_ENTRY_UNTAG__4 0x0404 +#define REG_SW_VLAN_ENTRY_PORTS__4 0x0408 + +#define REG_SW_VLAN_ENTRY_INDEX__2 0x040C + +#define VLAN_INDEX_M 0x0FFF + +#define REG_SW_VLAN_CTRL 0x040E + +#define VLAN_START BIT(7) +#define VLAN_ACTION 0x3 +#define VLAN_WRITE 1 +#define VLAN_READ 2 +#define VLAN_CLEAR 3 + +#define REG_SW_ALU_INDEX_0 0x0410 + +#define ALU_FID_INDEX_S 16 +#define ALU_MAC_ADDR_HI 0xFFFF + +#define REG_SW_ALU_INDEX_1 0x0414 + +#define ALU_DIRECT_INDEX_M (BIT(12) - 1) + +#define REG_SW_ALU_CTRL__4 0x0418 + +#define ALU_VALID_CNT_M (BIT(14) - 1) +#define ALU_VALID_CNT_S 16 +#define ALU_START BIT(7) +#define ALU_VALID BIT(6) +#define ALU_DIRECT BIT(2) +#define ALU_ACTION 0x3 +#define ALU_WRITE 1 +#define ALU_READ 2 +#define ALU_SEARCH 3 + +#define REG_SW_ALU_STAT_CTRL__4 0x041C + +#define ALU_STAT_INDEX_M (BIT(4) - 1) +#define ALU_STAT_INDEX_S 16 +#define ALU_RESV_MCAST_INDEX_M (BIT(6) - 1) +#define ALU_STAT_START BIT(7) +#define ALU_RESV_MCAST_ADDR BIT(1) +#define ALU_STAT_READ BIT(0) + +#define REG_SW_ALU_VAL_A 0x0420 + +#define ALU_V_STATIC_VALID BIT(31) +#define ALU_V_SRC_FILTER BIT(30) +#define ALU_V_DST_FILTER BIT(29) +#define ALU_V_PRIO_AGE_CNT_M (BIT(3) - 1) +#define ALU_V_PRIO_AGE_CNT_S 26 +#define ALU_V_MSTP_M 0x7 + +#define REG_SW_ALU_VAL_B 0x0424 + +#define ALU_V_OVERRIDE BIT(31) +#define ALU_V_USE_FID BIT(30) +#define ALU_V_PORT_MAP (BIT(24) - 1) + +#define REG_SW_ALU_VAL_C 0x0428 + +#define ALU_V_FID_M (BIT(16) - 1) +#define ALU_V_FID_S 16 +#define ALU_V_MAC_ADDR_HI 0xFFFF + +#define REG_SW_ALU_VAL_D 0x042C + +#define REG_HSR_ALU_INDEX_0 0x0440 + +#define REG_HSR_ALU_INDEX_1 0x0444 + +#define HSR_DST_MAC_INDEX_LO_S 16 +#define HSR_SRC_MAC_INDEX_HI 0xFFFF + +#define REG_HSR_ALU_INDEX_2 0x0448 + +#define HSR_INDEX_MAX BIT(9) +#define HSR_DIRECT_INDEX_M (HSR_INDEX_MAX - 1) + +#define REG_HSR_ALU_INDEX_3 0x044C + +#define HSR_PATH_INDEX_M (BIT(4) - 1) + +#define REG_HSR_ALU_CTRL__4 0x0450 + +#define HSR_VALID_CNT_M (BIT(14) - 1) +#define HSR_VALID_CNT_S 16 +#define HSR_START BIT(7) +#define HSR_VALID BIT(6) +#define HSR_SEARCH_END BIT(5) +#define HSR_DIRECT BIT(2) +#define HSR_ACTION 0x3 +#define HSR_WRITE 1 +#define HSR_READ 2 +#define HSR_SEARCH 3 + +#define REG_HSR_ALU_VAL_A 0x0454 + +#define HSR_V_STATIC_VALID BIT(31) +#define HSR_V_AGE_CNT_M (BIT(3) - 1) +#define HSR_V_AGE_CNT_S 26 +#define HSR_V_PATH_ID_M (BIT(4) - 1) + +#define REG_HSR_ALU_VAL_B 0x0458 + +#define REG_HSR_ALU_VAL_C 0x045C + +#define HSR_V_DST_MAC_ADDR_LO_S 16 +#define HSR_V_SRC_MAC_ADDR_HI 0xFFFF + +#define REG_HSR_ALU_VAL_D 0x0460 + +#define REG_HSR_ALU_VAL_E 0x0464 + +#define HSR_V_START_SEQ_1_S 16 +#define HSR_V_START_SEQ_2_S 0 + +#define REG_HSR_ALU_VAL_F 0x0468 + +#define HSR_V_EXP_SEQ_1_S 16 +#define HSR_V_EXP_SEQ_2_S 0 + +#define REG_HSR_ALU_VAL_G 0x046C + +#define HSR_V_SEQ_CNT_1_S 16 +#define HSR_V_SEQ_CNT_2_S 0 + +#define HSR_V_SEQ_M (BIT(16) - 1) + +/* 5 - PTP Clock */ +#define REG_PTP_CLK_CTRL 0x0500 + +#define PTP_STEP_ADJ BIT(6) +#define PTP_STEP_DIR BIT(5) +#define PTP_READ_TIME BIT(4) +#define PTP_LOAD_TIME BIT(3) +#define PTP_CLK_ADJ_ENABLE BIT(2) +#define PTP_CLK_ENABLE BIT(1) +#define PTP_CLK_RESET BIT(0) + +#define REG_PTP_RTC_SUB_NANOSEC__2 0x0502 + +#define PTP_RTC_SUB_NANOSEC_M 0x0007 + +#define REG_PTP_RTC_NANOSEC 0x0504 +#define REG_PTP_RTC_NANOSEC_H 0x0504 +#define REG_PTP_RTC_NANOSEC_L 0x0506 + +#define REG_PTP_RTC_SEC 0x0508 +#define REG_PTP_RTC_SEC_H 0x0508 +#define REG_PTP_RTC_SEC_L 0x050A + +#define REG_PTP_SUBNANOSEC_RATE 0x050C +#define REG_PTP_SUBNANOSEC_RATE_H 0x050C + +#define PTP_RATE_DIR BIT(31) +#define PTP_TMP_RATE_ENABLE BIT(30) + +#define REG_PTP_SUBNANOSEC_RATE_L 0x050E + +#define REG_PTP_RATE_DURATION 0x0510 +#define REG_PTP_RATE_DURATION_H 0x0510 +#define REG_PTP_RATE_DURATION_L 0x0512 + +#define REG_PTP_MSG_CONF1 0x0514 + +#define PTP_802_1AS BIT(7) +#define PTP_ENABLE BIT(6) +#define PTP_ETH_ENABLE BIT(5) +#define PTP_IPV4_UDP_ENABLE BIT(4) +#define PTP_IPV6_UDP_ENABLE BIT(3) +#define PTP_TC_P2P BIT(2) +#define PTP_MASTER BIT(1) +#define PTP_1STEP BIT(0) + +#define REG_PTP_MSG_CONF2 0x0516 + +#define PTP_UNICAST_ENABLE BIT(12) +#define PTP_ALTERNATE_MASTER BIT(11) +#define PTP_ALL_HIGH_PRIO BIT(10) +#define PTP_SYNC_CHECK BIT(9) +#define PTP_DELAY_CHECK BIT(8) +#define PTP_PDELAY_CHECK BIT(7) +#define PTP_DROP_SYNC_DELAY_REQ BIT(5) +#define PTP_DOMAIN_CHECK BIT(4) +#define PTP_UDP_CHECKSUM BIT(2) + +#define REG_PTP_DOMAIN_VERSION 0x0518 +#define PTP_VERSION_M 0xFF00 +#define PTP_DOMAIN_M 0x00FF + +#define REG_PTP_UNIT_INDEX__4 0x0520 + +#define PTP_UNIT_M 0xF + +#define PTP_GPIO_INDEX_S 16 +#define PTP_TSI_INDEX_S 8 +#define PTP_TOU_INDEX_S 0 + +#define REG_PTP_TRIG_STATUS__4 0x0524 + +#define TRIG_ERROR_S 16 +#define TRIG_DONE_S 0 + +#define REG_PTP_INT_STATUS__4 0x0528 + +#define TRIG_INT_S 16 +#define TS_INT_S 0 + +#define TRIG_UNIT_M 0x7 +#define TS_UNIT_M 0x3 + +#define REG_PTP_CTRL_STAT__4 0x052C + +#define GPIO_IN BIT(7) +#define GPIO_OUT BIT(6) +#define TS_INT_ENABLE BIT(5) +#define TRIG_ACTIVE BIT(4) +#define TRIG_ENABLE BIT(3) +#define TRIG_RESET BIT(2) +#define TS_ENABLE BIT(1) +#define TS_RESET BIT(0) + +#define GPIO_CTRL_M (GPIO_IN | GPIO_OUT) + +#define TRIG_CTRL_M \ + (TRIG_ACTIVE | TRIG_ENABLE | TRIG_RESET) + +#define TS_CTRL_M \ + (TS_INT_ENABLE | TS_ENABLE | TS_RESET) + +#define REG_TRIG_TARGET_NANOSEC 0x0530 +#define REG_TRIG_TARGET_SEC 0x0534 + +#define REG_TRIG_CTRL__4 0x0538 + +#define TRIG_CASCADE_ENABLE BIT(31) +#define TRIG_CASCADE_TAIL BIT(30) +#define TRIG_CASCADE_UPS_M 0xF +#define TRIG_CASCADE_UPS_S 26 +#define TRIG_NOW BIT(25) +#define TRIG_NOTIFY BIT(24) +#define TRIG_EDGE BIT(23) +#define TRIG_PATTERN_S 20 +#define TRIG_PATTERN_M 0x7 +#define TRIG_NEG_EDGE 0 +#define TRIG_POS_EDGE 1 +#define TRIG_NEG_PULSE 2 +#define TRIG_POS_PULSE 3 +#define TRIG_NEG_PERIOD 4 +#define TRIG_POS_PERIOD 5 +#define TRIG_REG_OUTPUT 6 +#define TRIG_GPO_S 16 +#define TRIG_GPO_M 0xF +#define TRIG_CASCADE_ITERATE_CNT_M 0xFFFF + +#define REG_TRIG_CYCLE_WIDTH 0x053C + +#define REG_TRIG_CYCLE_CNT 0x0540 + +#define TRIG_CYCLE_CNT_M 0xFFFF +#define TRIG_CYCLE_CNT_S 16 +#define TRIG_BIT_PATTERN_M 0xFFFF + +#define REG_TRIG_ITERATE_TIME 0x0544 + +#define REG_TRIG_PULSE_WIDTH__4 0x0548 + +#define TRIG_PULSE_WIDTH_M 0x00FFFFFF + +#define REG_TS_CTRL_STAT__4 0x0550 + +#define TS_EVENT_DETECT_M 0xF +#define TS_EVENT_DETECT_S 17 +#define TS_EVENT_OVERFLOW BIT(16) +#define TS_GPI_M 0xF +#define TS_GPI_S 8 +#define TS_DETECT_RISE BIT(7) +#define TS_DETECT_FALL BIT(6) +#define TS_DETECT_S 6 +#define TS_CASCADE_TAIL BIT(5) +#define TS_CASCADE_UPS_M 0xF +#define TS_CASCADE_UPS_S 1 +#define TS_CASCADE_ENABLE BIT(0) + +#define DETECT_RISE (TS_DETECT_RISE >> TS_DETECT_S) +#define DETECT_FALL (TS_DETECT_FALL >> TS_DETECT_S) + +#define REG_TS_EVENT_0_NANOSEC 0x0554 +#define REG_TS_EVENT_0_SEC 0x0558 +#define REG_TS_EVENT_0_SUB_NANOSEC 0x055C + +#define REG_TS_EVENT_1_NANOSEC 0x0560 +#define REG_TS_EVENT_1_SEC 0x0564 +#define REG_TS_EVENT_1_SUB_NANOSEC 0x0568 + +#define REG_TS_EVENT_2_NANOSEC 0x056C +#define REG_TS_EVENT_2_SEC 0x0570 +#define REG_TS_EVENT_2_SUB_NANOSEC 0x0574 + +#define REG_TS_EVENT_3_NANOSEC 0x0578 +#define REG_TS_EVENT_3_SEC 0x057C +#define REG_TS_EVENT_3_SUB_NANOSEC 0x0580 + +#define REG_TS_EVENT_4_NANOSEC 0x0584 +#define REG_TS_EVENT_4_SEC 0x0588 +#define REG_TS_EVENT_4_SUB_NANOSEC 0x058C + +#define REG_TS_EVENT_5_NANOSEC 0x0590 +#define REG_TS_EVENT_5_SEC 0x0594 +#define REG_TS_EVENT_5_SUB_NANOSEC 0x0598 + +#define REG_TS_EVENT_6_NANOSEC 0x059C +#define REG_TS_EVENT_6_SEC 0x05A0 +#define REG_TS_EVENT_6_SUB_NANOSEC 0x05A4 + +#define REG_TS_EVENT_7_NANOSEC 0x05A8 +#define REG_TS_EVENT_7_SEC 0x05AC +#define REG_TS_EVENT_7_SUB_NANOSEC 0x05B0 + +#define TS_EVENT_EDGE_M 0x1 +#define TS_EVENT_EDGE_S 30 +#define TS_EVENT_NANOSEC_M (BIT(30) - 1) + +#define TS_EVENT_SUB_NANOSEC_M 0x7 + +#define TS_EVENT_SAMPLE \ + (REG_TS_EVENT_1_NANOSEC - REG_TS_EVENT_0_NANOSEC) + +#define PORT_CTRL_ADDR(port, addr) ((addr) | (((port) + 1) << 12)) + +#define REG_GLOBAL_RR_INDEX__1 0x0600 + +/* DLR */ +#define REG_DLR_SRC_PORT__4 0x0604 + +#define DLR_SRC_PORT_UNICAST BIT(31) +#define DLR_SRC_PORT_M 0x3 +#define DLR_SRC_PORT_BOTH 0 +#define DLR_SRC_PORT_EACH 1 + +#define REG_DLR_IP_ADDR__4 0x0608 + +#define REG_DLR_CTRL__1 0x0610 + +#define DLR_RESET_SEQ_ID BIT(3) +#define DLR_BACKUP_AUTO_ON BIT(2) +#define DLR_BEACON_TX_ENABLE BIT(1) +#define DLR_ASSIST_ENABLE BIT(0) + +#define REG_DLR_STATE__1 0x0611 + +#define DLR_NODE_STATE_M 0x3 +#define DLR_NODE_STATE_S 1 +#define DLR_NODE_STATE_IDLE 0 +#define DLR_NODE_STATE_FAULT 1 +#define DLR_NODE_STATE_NORMAL 2 +#define DLR_RING_STATE_FAULT 0 +#define DLR_RING_STATE_NORMAL 1 + +#define REG_DLR_PRECEDENCE__1 0x0612 + +#define REG_DLR_BEACON_INTERVAL__4 0x0614 + +#define REG_DLR_BEACON_TIMEOUT__4 0x0618 + +#define REG_DLR_TIMEOUT_WINDOW__4 0x061C + +#define DLR_TIMEOUT_WINDOW_M (BIT(22) - 1) + +#define REG_DLR_VLAN_ID__2 0x0620 + +#define DLR_VLAN_ID_M (BIT(12) - 1) + +#define REG_DLR_DEST_ADDR_0 0x0622 +#define REG_DLR_DEST_ADDR_1 0x0623 +#define REG_DLR_DEST_ADDR_2 0x0624 +#define REG_DLR_DEST_ADDR_3 0x0625 +#define REG_DLR_DEST_ADDR_4 0x0626 +#define REG_DLR_DEST_ADDR_5 0x0627 + +#define REG_DLR_PORT_MAP__4 0x0628 + +#define REG_DLR_CLASS__1 0x062C + +#define DLR_FRAME_QID_M 0x3 + +/* HSR */ +#define REG_HSR_PORT_MAP__4 0x0640 + +#define REG_HSR_ALU_CTRL_0__1 0x0644 + +#define HSR_DUPLICATE_DISCARD BIT(7) +#define HSR_NODE_UNICAST BIT(6) +#define HSR_AGE_CNT_DEFAULT_M 0x7 +#define HSR_AGE_CNT_DEFAULT_S 3 +#define HSR_LEARN_MCAST_DISABLE BIT(2) +#define HSR_HASH_OPTION_M 0x3 +#define HSR_HASH_DISABLE 0 +#define HSR_HASH_UPPER_BITS 1 +#define HSR_HASH_LOWER_BITS 2 +#define HSR_HASH_XOR_BOTH_BITS 3 + +#define REG_HSR_ALU_CTRL_1__1 0x0645 + +#define HSR_LEARN_UCAST_DISABLE BIT(7) +#define HSR_FLUSH_TABLE BIT(5) +#define HSR_PROC_MCAST_SRC BIT(3) +#define HSR_AGING_ENABLE BIT(2) + +#define REG_HSR_ALU_CTRL_2__2 0x0646 + +#define REG_HSR_ALU_AGE_PERIOD__4 0x0648 + +#define REG_HSR_ALU_INT_STATUS__1 0x064C +#define REG_HSR_ALU_INT_MASK__1 0x064D + +#define HSR_WINDOW_OVERFLOW_INT BIT(3) +#define HSR_LEARN_FAIL_INT BIT(2) +#define HSR_ALMOST_FULL_INT BIT(1) +#define HSR_WRITE_FAIL_INT BIT(0) + +#define REG_HSR_ALU_ENTRY_0__2 0x0650 + +#define HSR_ENTRY_INDEX_M (BIT(10) - 1) +#define HSR_FAIL_INDEX_M (BIT(8) - 1) + +#define REG_HSR_ALU_ENTRY_1__2 0x0652 + +#define HSR_FAIL_LEARN_INDEX_M (BIT(8) - 1) + +#define REG_HSR_ALU_ENTRY_3__2 0x0654 + +#define HSR_CPU_ACCESS_ENTRY_INDEX_M (BIT(8) - 1) + +/* 0 - Operation */ +#define REG_PORT_DEFAULT_VID 0x0000 + +#define REG_PORT_CUSTOM_VID 0x0002 +#define REG_PORT_AVB_SR_1_VID 0x0004 +#define REG_PORT_AVB_SR_2_VID 0x0006 + +#define REG_PORT_AVB_SR_1_TYPE 0x0008 +#define REG_PORT_AVB_SR_2_TYPE 0x000A + +#define REG_PORT_PME_STATUS 0x0013 +#define REG_PORT_PME_CTRL 0x0017 + +#define PME_WOL_MAGICPKT BIT(2) +#define PME_WOL_LINKUP BIT(1) +#define PME_WOL_ENERGY BIT(0) + +#define REG_PORT_INT_STATUS 0x001B +#define REG_PORT_INT_MASK 0x001F + +#define PORT_SGMII_INT BIT(3) +#define PORT_PTP_INT BIT(2) +#define PORT_PHY_INT BIT(1) +#define PORT_ACL_INT BIT(0) + +#define PORT_INT_MASK \ + (PORT_SGMII_INT | PORT_PTP_INT | PORT_PHY_INT | PORT_ACL_INT) + +#define REG_PORT_CTRL_0 0x0020 + +#define PORT_MAC_LOOPBACK BIT(7) +#define PORT_FORCE_TX_FLOW_CTRL BIT(4) +#define PORT_FORCE_RX_FLOW_CTRL BIT(3) +#define PORT_TAIL_TAG_ENABLE BIT(2) +#define PORT_QUEUE_SPLIT_ENABLE 0x3 + +#define REG_PORT_CTRL_1 0x0021 + +#define PORT_SRP_ENABLE 0x3 + +#define REG_PORT_STATUS_0 0x0030 + +#define PORT_INTF_SPEED_M 0x3 +#define PORT_INTF_SPEED_S 3 +#define PORT_INTF_FULL_DUPLEX BIT(2) +#define PORT_TX_FLOW_CTRL BIT(1) +#define PORT_RX_FLOW_CTRL BIT(0) + +#define REG_PORT_STATUS_1 0x0034 + +/* 1 - PHY */ +#define REG_PORT_PHY_CTRL 0x0100 + +#define PORT_PHY_RESET BIT(15) +#define PORT_PHY_LOOPBACK BIT(14) +#define PORT_SPEED_100MBIT BIT(13) +#define PORT_AUTO_NEG_ENABLE BIT(12) +#define PORT_POWER_DOWN BIT(11) +#define PORT_ISOLATE BIT(10) +#define PORT_AUTO_NEG_RESTART BIT(9) +#define PORT_FULL_DUPLEX BIT(8) +#define PORT_COLLISION_TEST BIT(7) +#define PORT_SPEED_1000MBIT BIT(6) + +#define REG_PORT_PHY_STATUS 0x0102 + +#define PORT_100BT4_CAPABLE BIT(15) +#define PORT_100BTX_FD_CAPABLE BIT(14) +#define PORT_100BTX_CAPABLE BIT(13) +#define PORT_10BT_FD_CAPABLE BIT(12) +#define PORT_10BT_CAPABLE BIT(11) +#define PORT_EXTENDED_STATUS BIT(8) +#define PORT_MII_SUPPRESS_CAPABLE BIT(6) +#define PORT_AUTO_NEG_ACKNOWLEDGE BIT(5) +#define PORT_REMOTE_FAULT BIT(4) +#define PORT_AUTO_NEG_CAPABLE BIT(3) +#define PORT_LINK_STATUS BIT(2) +#define PORT_JABBER_DETECT BIT(1) +#define PORT_EXTENDED_CAPABILITY BIT(0) + +#define REG_PORT_PHY_ID_HI 0x0104 +#define REG_PORT_PHY_ID_LO 0x0106 + +#define KSZ9477_ID_HI 0x0022 +#define KSZ9477_ID_LO 0x1622 + +#define REG_PORT_PHY_AUTO_NEGOTIATION 0x0108 + +#define PORT_AUTO_NEG_NEXT_PAGE BIT(15) +#define PORT_AUTO_NEG_REMOTE_FAULT BIT(13) +#define PORT_AUTO_NEG_ASYM_PAUSE BIT(11) +#define PORT_AUTO_NEG_SYM_PAUSE BIT(10) +#define PORT_AUTO_NEG_100BT4 BIT(9) +#define PORT_AUTO_NEG_100BTX_FD BIT(8) +#define PORT_AUTO_NEG_100BTX BIT(7) +#define PORT_AUTO_NEG_10BT_FD BIT(6) +#define PORT_AUTO_NEG_10BT BIT(5) +#define PORT_AUTO_NEG_SELECTOR 0x001F +#define PORT_AUTO_NEG_802_3 0x0001 + +#define PORT_AUTO_NEG_PAUSE \ + (PORT_AUTO_NEG_ASYM_PAUSE | PORT_AUTO_NEG_SYM_PAUSE) + +#define REG_PORT_PHY_REMOTE_CAPABILITY 0x010A + +#define PORT_REMOTE_NEXT_PAGE BIT(15) +#define PORT_REMOTE_ACKNOWLEDGE BIT(14) +#define PORT_REMOTE_REMOTE_FAULT BIT(13) +#define PORT_REMOTE_ASYM_PAUSE BIT(11) +#define PORT_REMOTE_SYM_PAUSE BIT(10) +#define PORT_REMOTE_100BTX_FD BIT(8) +#define PORT_REMOTE_100BTX BIT(7) +#define PORT_REMOTE_10BT_FD BIT(6) +#define PORT_REMOTE_10BT BIT(5) + +#define REG_PORT_PHY_1000_CTRL 0x0112 + +#define PORT_AUTO_NEG_MANUAL BIT(12) +#define PORT_AUTO_NEG_MASTER BIT(11) +#define PORT_AUTO_NEG_MASTER_PREFERRED BIT(10) +#define PORT_AUTO_NEG_1000BT_FD BIT(9) +#define PORT_AUTO_NEG_1000BT BIT(8) + +#define REG_PORT_PHY_1000_STATUS 0x0114 + +#define PORT_MASTER_FAULT BIT(15) +#define PORT_LOCAL_MASTER BIT(14) +#define PORT_LOCAL_RX_OK BIT(13) +#define PORT_REMOTE_RX_OK BIT(12) +#define PORT_REMOTE_1000BT_FD BIT(11) +#define PORT_REMOTE_1000BT BIT(10) +#define PORT_REMOTE_IDLE_CNT_M 0x0F + +#define PORT_PHY_1000_STATIC_STATUS \ + (PORT_LOCAL_RX_OK | \ + PORT_REMOTE_RX_OK | \ + PORT_REMOTE_1000BT_FD | \ + PORT_REMOTE_1000BT) + +#define REG_PORT_PHY_MMD_SETUP 0x011A + +#define PORT_MMD_OP_MODE_M 0x3 +#define PORT_MMD_OP_MODE_S 14 +#define PORT_MMD_OP_INDEX 0 +#define PORT_MMD_OP_DATA_NO_INCR 1 +#define PORT_MMD_OP_DATA_INCR_RW 2 +#define PORT_MMD_OP_DATA_INCR_W 3 +#define PORT_MMD_DEVICE_ID_M 0x1F + +#define MMD_SETUP(mode, dev) \ + (((u16)(mode) << PORT_MMD_OP_MODE_S) | (dev)) + +#define REG_PORT_PHY_MMD_INDEX_DATA 0x011C + +#define MMD_DEVICE_ID_DSP 1 + +#define MMD_DSP_SQI_CHAN_A 0xAC +#define MMD_DSP_SQI_CHAN_B 0xAD +#define MMD_DSP_SQI_CHAN_C 0xAE +#define MMD_DSP_SQI_CHAN_D 0xAF + +#define DSP_SQI_ERR_DETECTED BIT(15) +#define DSP_SQI_AVG_ERR 0x7FFF + +#define MMD_DEVICE_ID_COMMON 2 + +#define MMD_DEVICE_ID_EEE_ADV 7 + +#define MMD_EEE_ADV 0x3C +#define EEE_ADV_100MBIT BIT(1) +#define EEE_ADV_1GBIT BIT(2) + +#define MMD_EEE_LP_ADV 0x3D +#define MMD_EEE_MSG_CODE 0x3F + +#define MMD_DEVICE_ID_AFED 0x1C + +#define REG_PORT_PHY_EXTENDED_STATUS 0x011E + +#define PORT_100BTX_FD_ABLE BIT(15) +#define PORT_100BTX_ABLE BIT(14) +#define PORT_10BT_FD_ABLE BIT(13) +#define PORT_10BT_ABLE BIT(12) + +#define REG_PORT_SGMII_ADDR__4 0x0200 +#define PORT_SGMII_AUTO_INCR BIT(23) +#define PORT_SGMII_DEVICE_ID_M 0x1F +#define PORT_SGMII_DEVICE_ID_S 16 +#define PORT_SGMII_ADDR_M (BIT(21) - 1) + +#define REG_PORT_SGMII_DATA__4 0x0204 +#define PORT_SGMII_DATA_M (BIT(16) - 1) + +#define MMD_DEVICE_ID_PMA 0x01 +#define MMD_DEVICE_ID_PCS 0x03 +#define MMD_DEVICE_ID_PHY_XS 0x04 +#define MMD_DEVICE_ID_DTE_XS 0x05 +#define MMD_DEVICE_ID_AN 0x07 +#define MMD_DEVICE_ID_VENDOR_CTRL 0x1E +#define MMD_DEVICE_ID_VENDOR_MII 0x1F + +#define SR_MII MMD_DEVICE_ID_VENDOR_MII + +#define MMD_SR_MII_CTRL 0x0000 + +#define SR_MII_RESET BIT(15) +#define SR_MII_LOOPBACK BIT(14) +#define SR_MII_SPEED_100MBIT BIT(13) +#define SR_MII_AUTO_NEG_ENABLE BIT(12) +#define SR_MII_POWER_DOWN BIT(11) +#define SR_MII_AUTO_NEG_RESTART BIT(9) +#define SR_MII_FULL_DUPLEX BIT(8) +#define SR_MII_SPEED_1000MBIT BIT(6) + +#define MMD_SR_MII_STATUS 0x0001 +#define MMD_SR_MII_ID_1 0x0002 +#define MMD_SR_MII_ID_2 0x0003 +#define MMD_SR_MII_AUTO_NEGOTIATION 0x0004 + +#define SR_MII_AUTO_NEG_NEXT_PAGE BIT(15) +#define SR_MII_AUTO_NEG_REMOTE_FAULT_M 0x3 +#define SR_MII_AUTO_NEG_REMOTE_FAULT_S 12 +#define SR_MII_AUTO_NEG_NO_ERROR 0 +#define SR_MII_AUTO_NEG_OFFLINE 1 +#define SR_MII_AUTO_NEG_LINK_FAILURE 2 +#define SR_MII_AUTO_NEG_ERROR 3 +#define SR_MII_AUTO_NEG_PAUSE_M 0x3 +#define SR_MII_AUTO_NEG_PAUSE_S 7 +#define SR_MII_AUTO_NEG_NO_PAUSE 0 +#define SR_MII_AUTO_NEG_ASYM_PAUSE_TX 1 +#define SR_MII_AUTO_NEG_SYM_PAUSE 2 +#define SR_MII_AUTO_NEG_ASYM_PAUSE_RX 3 +#define SR_MII_AUTO_NEG_HALF_DUPLEX BIT(6) +#define SR_MII_AUTO_NEG_FULL_DUPLEX BIT(5) + +#define MMD_SR_MII_REMOTE_CAPABILITY 0x0005 +#define MMD_SR_MII_AUTO_NEG_EXP 0x0006 +#define MMD_SR_MII_AUTO_NEG_EXT 0x000F + +#define MMD_SR_MII_DIGITAL_CTRL_1 0x8000 + +#define MMD_SR_MII_AUTO_NEG_CTRL 0x8001 + +#define SR_MII_8_BIT BIT(8) +#define SR_MII_SGMII_LINK_UP BIT(4) +#define SR_MII_TX_CFG_PHY_MASTER BIT(3) +#define SR_MII_PCS_MODE_M 0x3 +#define SR_MII_PCS_MODE_S 1 +#define SR_MII_PCS_SGMII 2 +#define SR_MII_AUTO_NEG_COMPLETE_INTR BIT(0) + +#define MMD_SR_MII_AUTO_NEG_STATUS 0x8002 + +#define SR_MII_STAT_LINK_UP BIT(4) +#define SR_MII_STAT_M 0x3 +#define SR_MII_STAT_S 2 +#define SR_MII_STAT_10_MBPS 0 +#define SR_MII_STAT_100_MBPS 1 +#define SR_MII_STAT_1000_MBPS 2 +#define SR_MII_STAT_FULL_DUPLEX BIT(1) + +#define MMD_SR_MII_PHY_CTRL 0x80A0 + +#define SR_MII_PHY_LANE_SEL_M 0xF +#define SR_MII_PHY_LANE_SEL_S 8 +#define SR_MII_PHY_WRITE BIT(1) +#define SR_MII_PHY_START_BUSY BIT(0) + +#define MMD_SR_MII_PHY_ADDR 0x80A1 + +#define SR_MII_PHY_ADDR_M (BIT(16) - 1) + +#define MMD_SR_MII_PHY_DATA 0x80A2 + +#define SR_MII_PHY_DATA_M (BIT(16) - 1) + +#define SR_MII_PHY_JTAG_CHIP_ID_HI 0x000C +#define SR_MII_PHY_JTAG_CHIP_ID_LO 0x000D + +#define REG_PORT_PHY_REMOTE_LB_LED 0x0122 + +#define PORT_REMOTE_LOOPBACK BIT(8) +#define PORT_LED_SELECT (3 << 6) +#define PORT_LED_CTRL (3 << 4) +#define PORT_LED_CTRL_TEST BIT(3) +#define PORT_10BT_PREAMBLE BIT(2) +#define PORT_LINK_MD_10BT_ENABLE BIT(1) +#define PORT_LINK_MD_PASS BIT(0) + +#define REG_PORT_PHY_LINK_MD 0x0124 + +#define PORT_START_CABLE_DIAG BIT(15) +#define PORT_TX_DISABLE BIT(14) +#define PORT_CABLE_DIAG_PAIR_M 0x3 +#define PORT_CABLE_DIAG_PAIR_S 12 +#define PORT_CABLE_DIAG_SELECT_M 0x3 +#define PORT_CABLE_DIAG_SELECT_S 10 +#define PORT_CABLE_DIAG_RESULT_M 0x3 +#define PORT_CABLE_DIAG_RESULT_S 8 +#define PORT_CABLE_STAT_NORMAL 0 +#define PORT_CABLE_STAT_OPEN 1 +#define PORT_CABLE_STAT_SHORT 2 +#define PORT_CABLE_STAT_FAILED 3 +#define PORT_CABLE_FAULT_COUNTER 0x00FF + +#define REG_PORT_PHY_PMA_STATUS 0x0126 + +#define PORT_1000_LINK_GOOD BIT(1) +#define PORT_100_LINK_GOOD BIT(0) + +#define REG_PORT_PHY_DIGITAL_STATUS 0x0128 + +#define PORT_LINK_DETECT BIT(14) +#define PORT_SIGNAL_DETECT BIT(13) +#define PORT_PHY_STAT_MDI BIT(12) +#define PORT_PHY_STAT_MASTER BIT(11) + +#define REG_PORT_PHY_RXER_COUNTER 0x012A + +#define REG_PORT_PHY_INT_ENABLE 0x0136 +#define REG_PORT_PHY_INT_STATUS 0x0137 + +#define JABBER_INT BIT(7) +#define RX_ERR_INT BIT(6) +#define PAGE_RX_INT BIT(5) +#define PARALLEL_DETECT_FAULT_INT BIT(4) +#define LINK_PARTNER_ACK_INT BIT(3) +#define LINK_DOWN_INT BIT(2) +#define REMOTE_FAULT_INT BIT(1) +#define LINK_UP_INT BIT(0) + +#define REG_PORT_PHY_DIGITAL_DEBUG_1 0x0138 + +#define PORT_REG_CLK_SPEED_25_MHZ BIT(14) +#define PORT_PHY_FORCE_MDI BIT(7) +#define PORT_PHY_AUTO_MDIX_DISABLE BIT(6) + +/* Same as PORT_PHY_LOOPBACK */ +#define PORT_PHY_PCS_LOOPBACK BIT(0) + +#define REG_PORT_PHY_DIGITAL_DEBUG_2 0x013A + +#define REG_PORT_PHY_DIGITAL_DEBUG_3 0x013C + +#define PORT_100BT_FIXED_LATENCY BIT(15) + +#define REG_PORT_PHY_PHY_CTRL 0x013E + +#define PORT_INT_PIN_HIGH BIT(14) +#define PORT_ENABLE_JABBER BIT(9) +#define PORT_STAT_SPEED_1000MBIT BIT(6) +#define PORT_STAT_SPEED_100MBIT BIT(5) +#define PORT_STAT_SPEED_10MBIT BIT(4) +#define PORT_STAT_FULL_DUPLEX BIT(3) + +/* Same as PORT_PHY_STAT_MASTER */ +#define PORT_STAT_MASTER BIT(2) +#define PORT_RESET BIT(1) +#define PORT_LINK_STATUS_FAIL BIT(0) + +/* 3 - xMII */ +#define REG_PORT_XMII_CTRL_0 0x0300 + +#define PORT_SGMII_SEL BIT(7) +#define PORT_MII_FULL_DUPLEX BIT(6) +#define PORT_MII_100MBIT BIT(4) +#define PORT_GRXC_ENABLE BIT(0) + +#define REG_PORT_XMII_CTRL_1 0x0301 + +#define PORT_RMII_CLK_SEL BIT(7) +/* S1 */ +#define PORT_MII_1000MBIT_S1 BIT(6) +/* S2 */ +#define PORT_MII_NOT_1GBIT BIT(6) +#define PORT_MII_SEL_EDGE BIT(5) +#define PORT_RGMII_ID_IG_ENABLE BIT(4) +#define PORT_RGMII_ID_EG_ENABLE BIT(3) +#define PORT_MII_MAC_MODE BIT(2) +#define PORT_MII_SEL_M 0x3 +/* S1 */ +#define PORT_MII_SEL_S1 0x0 +#define PORT_RMII_SEL_S1 0x1 +#define PORT_GMII_SEL_S1 0x2 +#define PORT_RGMII_SEL_S1 0x3 +/* S2 */ +#define PORT_RGMII_SEL 0x0 +#define PORT_RMII_SEL 0x1 +#define PORT_GMII_SEL 0x2 +#define PORT_MII_SEL 0x3 + +/* 4 - MAC */ +#define REG_PORT_MAC_CTRL_0 0x0400 + +#define PORT_BROADCAST_STORM BIT(1) +#define PORT_JUMBO_FRAME BIT(0) + +#define REG_PORT_MAC_CTRL_1 0x0401 + +#define PORT_BACK_PRESSURE BIT(3) +#define PORT_PASS_ALL BIT(0) + +#define REG_PORT_MAC_CTRL_2 0x0402 + +#define PORT_100BT_EEE_DISABLE BIT(7) +#define PORT_1000BT_EEE_DISABLE BIT(6) + +#define REG_PORT_MAC_IN_RATE_LIMIT 0x0403 + +#define PORT_IN_PORT_BASED_S 6 +#define PORT_RATE_PACKET_BASED_S 5 +#define PORT_IN_FLOW_CTRL_S 4 +#define PORT_COUNT_IFG_S 1 +#define PORT_COUNT_PREAMBLE_S 0 +#define PORT_IN_PORT_BASED BIT(6) +#define PORT_IN_PACKET_BASED BIT(5) +#define PORT_IN_FLOW_CTRL BIT(4) +#define PORT_IN_LIMIT_MODE_M 0x3 +#define PORT_IN_LIMIT_MODE_S 2 +#define PORT_IN_ALL 0 +#define PORT_IN_UNICAST 1 +#define PORT_IN_MULTICAST 2 +#define PORT_IN_BROADCAST 3 +#define PORT_COUNT_IFG BIT(1) +#define PORT_COUNT_PREAMBLE BIT(0) + +#define REG_PORT_IN_RATE_0 0x0410 +#define REG_PORT_IN_RATE_1 0x0411 +#define REG_PORT_IN_RATE_2 0x0412 +#define REG_PORT_IN_RATE_3 0x0413 +#define REG_PORT_IN_RATE_4 0x0414 +#define REG_PORT_IN_RATE_5 0x0415 +#define REG_PORT_IN_RATE_6 0x0416 +#define REG_PORT_IN_RATE_7 0x0417 + +#define REG_PORT_OUT_RATE_0 0x0420 +#define REG_PORT_OUT_RATE_1 0x0421 +#define REG_PORT_OUT_RATE_2 0x0422 +#define REG_PORT_OUT_RATE_3 0x0423 + +#define PORT_RATE_LIMIT_M (BIT(7) - 1) + +/* 5 - MIB Counters */ +#define REG_PORT_MIB_CTRL_STAT__4 0x0500 + +#define MIB_COUNTER_OVERFLOW BIT(31) +#define MIB_COUNTER_VALID BIT(30) +#define MIB_COUNTER_READ BIT(25) +#define MIB_COUNTER_FLUSH_FREEZE BIT(24) +#define MIB_COUNTER_INDEX_M (BIT(8) - 1) +#define MIB_COUNTER_INDEX_S 16 +#define MIB_COUNTER_DATA_HI_M 0xF + +#define REG_PORT_MIB_DATA 0x0504 + +/* 6 - ACL */ +#define REG_PORT_ACL_0 0x0600 + +#define ACL_FIRST_RULE_M 0xF + +#define REG_PORT_ACL_1 0x0601 + +#define ACL_MODE_M 0x3 +#define ACL_MODE_S 4 +#define ACL_MODE_DISABLE 0 +#define ACL_MODE_LAYER_2 1 +#define ACL_MODE_LAYER_3 2 +#define ACL_MODE_LAYER_4 3 +#define ACL_ENABLE_M 0x3 +#define ACL_ENABLE_S 2 +#define ACL_ENABLE_2_COUNT 0 +#define ACL_ENABLE_2_TYPE 1 +#define ACL_ENABLE_2_MAC 2 +#define ACL_ENABLE_2_BOTH 3 +#define ACL_ENABLE_3_IP 1 +#define ACL_ENABLE_3_SRC_DST_COMP 2 +#define ACL_ENABLE_4_PROTOCOL 0 +#define ACL_ENABLE_4_TCP_PORT_COMP 1 +#define ACL_ENABLE_4_UDP_PORT_COMP 2 +#define ACL_ENABLE_4_TCP_SEQN_COMP 3 +#define ACL_SRC BIT(1) +#define ACL_EQUAL BIT(0) + +#define REG_PORT_ACL_2 0x0602 +#define REG_PORT_ACL_3 0x0603 + +#define ACL_MAX_PORT 0xFFFF + +#define REG_PORT_ACL_4 0x0604 +#define REG_PORT_ACL_5 0x0605 + +#define ACL_MIN_PORT 0xFFFF +#define ACL_IP_ADDR 0xFFFFFFFF +#define ACL_TCP_SEQNUM 0xFFFFFFFF + +#define REG_PORT_ACL_6 0x0606 + +#define ACL_RESERVED 0xF8 +#define ACL_PORT_MODE_M 0x3 +#define ACL_PORT_MODE_S 1 +#define ACL_PORT_MODE_DISABLE 0 +#define ACL_PORT_MODE_EITHER 1 +#define ACL_PORT_MODE_IN_RANGE 2 +#define ACL_PORT_MODE_OUT_OF_RANGE 3 + +#define REG_PORT_ACL_7 0x0607 + +#define ACL_TCP_FLAG_ENABLE BIT(0) + +#define REG_PORT_ACL_8 0x0608 + +#define ACL_TCP_FLAG_M 0xFF + +#define REG_PORT_ACL_9 0x0609 + +#define ACL_TCP_FLAG 0xFF +#define ACL_ETH_TYPE 0xFFFF +#define ACL_IP_M 0xFFFFFFFF + +#define REG_PORT_ACL_A 0x060A + +#define ACL_PRIO_MODE_M 0x3 +#define ACL_PRIO_MODE_S 6 +#define ACL_PRIO_MODE_DISABLE 0 +#define ACL_PRIO_MODE_HIGHER 1 +#define ACL_PRIO_MODE_LOWER 2 +#define ACL_PRIO_MODE_REPLACE 3 +#define ACL_PRIO_M KS_PRIO_M +#define ACL_PRIO_S 3 +#define ACL_VLAN_PRIO_REPLACE BIT(2) +#define ACL_VLAN_PRIO_M KS_PRIO_M +#define ACL_VLAN_PRIO_HI_M 0x3 + +#define REG_PORT_ACL_B 0x060B + +#define ACL_VLAN_PRIO_LO_M 0x8 +#define ACL_VLAN_PRIO_S 7 +#define ACL_MAP_MODE_M 0x3 +#define ACL_MAP_MODE_S 5 +#define ACL_MAP_MODE_DISABLE 0 +#define ACL_MAP_MODE_OR 1 +#define ACL_MAP_MODE_AND 2 +#define ACL_MAP_MODE_REPLACE 3 + +#define ACL_CNT_M (BIT(11) - 1) +#define ACL_CNT_S 5 + +#define REG_PORT_ACL_C 0x060C + +#define REG_PORT_ACL_D 0x060D +#define ACL_MSEC_UNIT BIT(6) +#define ACL_INTR_MODE BIT(5) +#define ACL_PORT_MAP 0x7F + +#define REG_PORT_ACL_E 0x060E +#define REG_PORT_ACL_F 0x060F + +#define REG_PORT_ACL_BYTE_EN_MSB 0x0610 +#define REG_PORT_ACL_BYTE_EN_LSB 0x0611 + +#define ACL_ACTION_START 0xA +#define ACL_ACTION_LEN 4 +#define ACL_INTR_CNT_START 0xD +#define ACL_RULESET_START 0xE +#define ACL_RULESET_LEN 2 +#define ACL_TABLE_LEN 16 + +#define ACL_ACTION_ENABLE 0x003C +#define ACL_MATCH_ENABLE 0x7FC3 +#define ACL_RULESET_ENABLE 0x8003 +#define ACL_BYTE_ENABLE 0xFFFF + +#define REG_PORT_ACL_CTRL_0 0x0612 + +#define PORT_ACL_WRITE_DONE BIT(6) +#define PORT_ACL_READ_DONE BIT(5) +#define PORT_ACL_WRITE BIT(4) +#define PORT_ACL_INDEX_M 0xF + +#define REG_PORT_ACL_CTRL_1 0x0613 + +/* 8 - Classification and Policing */ +#define REG_PORT_MRI_MIRROR_CTRL 0x0800 + +#define PORT_MIRROR_RX BIT(6) +#define PORT_MIRROR_TX BIT(5) +#define PORT_MIRROR_SNIFFER BIT(1) + +#define REG_PORT_MRI_PRIO_CTRL 0x0801 + +#define PORT_HIGHEST_PRIO BIT(7) +#define PORT_OR_PRIO BIT(6) +#define PORT_MAC_PRIO_ENABLE BIT(4) +#define PORT_VLAN_PRIO_ENABLE BIT(3) +#define PORT_802_1P_PRIO_ENABLE BIT(2) +#define PORT_DIFFSERV_PRIO_ENABLE BIT(1) +#define PORT_ACL_PRIO_ENABLE BIT(0) + +#define REG_PORT_MRI_MAC_CTRL 0x0802 + +#define PORT_USER_PRIO_CEILING BIT(7) +#define PORT_DROP_NON_VLAN BIT(4) +#define PORT_DROP_TAG BIT(3) +#define PORT_BASED_PRIO_M KS_PRIO_M +#define PORT_BASED_PRIO_S 0 + +#define REG_PORT_MRI_AUTHEN_CTRL 0x0803 + +#define PORT_ACL_ENABLE BIT(2) +#define PORT_AUTHEN_MODE 0x3 +#define PORT_AUTHEN_PASS 0 +#define PORT_AUTHEN_BLOCK 1 +#define PORT_AUTHEN_TRAP 2 + +#define REG_PORT_MRI_INDEX__4 0x0804 + +#define MRI_INDEX_P_M 0x7 +#define MRI_INDEX_P_S 16 +#define MRI_INDEX_Q_M 0x3 +#define MRI_INDEX_Q_S 0 + +#define REG_PORT_MRI_TC_MAP__4 0x0808 + +#define PORT_TC_MAP_M 0xf +#define PORT_TC_MAP_S 4 + +#define REG_PORT_MRI_POLICE_CTRL__4 0x080C + +#define POLICE_DROP_ALL BIT(10) +#define POLICE_PACKET_TYPE_M 0x3 +#define POLICE_PACKET_TYPE_S 8 +#define POLICE_PACKET_DROPPED 0 +#define POLICE_PACKET_GREEN 1 +#define POLICE_PACKET_YELLOW 2 +#define POLICE_PACKET_RED 3 +#define PORT_BASED_POLICING BIT(7) +#define NON_DSCP_COLOR_M 0x3 +#define NON_DSCP_COLOR_S 5 +#define COLOR_MARK_ENABLE BIT(4) +#define COLOR_REMAP_ENABLE BIT(3) +#define POLICE_DROP_SRP BIT(2) +#define POLICE_COLOR_NOT_AWARE BIT(1) +#define POLICE_ENABLE BIT(0) + +#define REG_PORT_POLICE_COLOR_0__4 0x0810 +#define REG_PORT_POLICE_COLOR_1__4 0x0814 +#define REG_PORT_POLICE_COLOR_2__4 0x0818 +#define REG_PORT_POLICE_COLOR_3__4 0x081C + +#define POLICE_COLOR_MAP_S 2 +#define POLICE_COLOR_MAP_M (BIT(POLICE_COLOR_MAP_S) - 1) + +#define REG_PORT_POLICE_RATE__4 0x0820 + +#define POLICE_CIR_S 16 +#define POLICE_PIR_S 0 + +#define REG_PORT_POLICE_BURST_SIZE__4 0x0824 + +#define POLICE_BURST_SIZE_M 0x3FFF +#define POLICE_CBS_S 16 +#define POLICE_PBS_S 0 + +#define REG_PORT_WRED_PM_CTRL_0__4 0x0830 + +#define WRED_PM_CTRL_M (BIT(11) - 1) + +#define WRED_PM_MAX_THRESHOLD_S 16 +#define WRED_PM_MIN_THRESHOLD_S 0 + +#define REG_PORT_WRED_PM_CTRL_1__4 0x0834 + +#define WRED_PM_MULTIPLIER_S 16 +#define WRED_PM_AVG_QUEUE_SIZE_S 0 + +#define REG_PORT_WRED_QUEUE_CTRL_0__4 0x0840 +#define REG_PORT_WRED_QUEUE_CTRL_1__4 0x0844 + +#define REG_PORT_WRED_QUEUE_PMON__4 0x0848 + +#define WRED_RANDOM_DROP_ENABLE BIT(31) +#define WRED_PMON_FLUSH BIT(30) +#define WRED_DROP_GYR_DISABLE BIT(29) +#define WRED_DROP_YR_DISABLE BIT(28) +#define WRED_DROP_R_DISABLE BIT(27) +#define WRED_DROP_ALL BIT(26) +#define WRED_PMON_M (BIT(24) - 1) + +/* 9 - Shaping */ + +#define REG_PORT_MTI_QUEUE_INDEX__4 0x0900 + +#define REG_PORT_MTI_QUEUE_CTRL_0__4 0x0904 + +#define MTI_PVID_REPLACE BIT(0) + +#define REG_PORT_MTI_QUEUE_CTRL_0 0x0914 + +#define MTI_SCHEDULE_MODE_M 0x3 +#define MTI_SCHEDULE_MODE_S 6 +#define MTI_SCHEDULE_STRICT_PRIO 0 +#define MTI_SCHEDULE_WRR 2 +#define MTI_SHAPING_M 0x3 +#define MTI_SHAPING_S 4 +#define MTI_SHAPING_OFF 0 +#define MTI_SHAPING_SRP 1 +#define MTI_SHAPING_TIME_AWARE 2 + +#define REG_PORT_MTI_QUEUE_CTRL_1 0x0915 + +#define MTI_TX_RATIO_M (BIT(7) - 1) + +#define REG_PORT_MTI_QUEUE_CTRL_2__2 0x0916 +#define REG_PORT_MTI_HI_WATER_MARK 0x0916 +#define REG_PORT_MTI_QUEUE_CTRL_3__2 0x0918 +#define REG_PORT_MTI_LO_WATER_MARK 0x0918 +#define REG_PORT_MTI_QUEUE_CTRL_4__2 0x091A +#define REG_PORT_MTI_CREDIT_INCREMENT 0x091A + +/* A - QM */ + +#define REG_PORT_QM_CTRL__4 0x0A00 + +#define PORT_QM_DROP_PRIO_M 0x3 + +#define REG_PORT_VLAN_MEMBERSHIP__4 0x0A04 + +#define REG_PORT_QM_QUEUE_INDEX__4 0x0A08 + +#define PORT_QM_QUEUE_INDEX_S 24 +#define PORT_QM_BURST_SIZE_S 16 +#define PORT_QM_MIN_RESV_SPACE_M (BIT(11) - 1) + +#define REG_PORT_QM_WATER_MARK__4 0x0A0C + +#define PORT_QM_HI_WATER_MARK_S 16 +#define PORT_QM_LO_WATER_MARK_S 0 +#define PORT_QM_WATER_MARK_M (BIT(11) - 1) + +#define REG_PORT_QM_TX_CNT_0__4 0x0A10 + +#define PORT_QM_TX_CNT_USED_S 0 +#define PORT_QM_TX_CNT_M (BIT(11) - 1) + +#define REG_PORT_QM_TX_CNT_1__4 0x0A14 + +#define PORT_QM_TX_CNT_CALCULATED_S 16 +#define PORT_QM_TX_CNT_AVAIL_S 0 + +/* B - LUE */ +#define REG_PORT_LUE_CTRL 0x0B00 + +#define PORT_VLAN_LOOKUP_VID_0 BIT(7) +#define PORT_INGRESS_FILTER BIT(6) +#define PORT_DISCARD_NON_VID BIT(5) +#define PORT_MAC_BASED_802_1X BIT(4) +#define PORT_SRC_ADDR_FILTER BIT(3) + +#define REG_PORT_LUE_MSTP_INDEX 0x0B01 + +#define REG_PORT_LUE_MSTP_STATE 0x0B04 + +#define PORT_TX_ENABLE BIT(2) +#define PORT_RX_ENABLE BIT(1) +#define PORT_LEARN_DISABLE BIT(0) + +/* C - PTP */ + +#define REG_PTP_PORT_RX_DELAY__2 0x0C00 +#define REG_PTP_PORT_TX_DELAY__2 0x0C02 +#define REG_PTP_PORT_ASYM_DELAY__2 0x0C04 + +#define REG_PTP_PORT_XDELAY_TS 0x0C08 +#define REG_PTP_PORT_XDELAY_TS_H 0x0C08 +#define REG_PTP_PORT_XDELAY_TS_L 0x0C0A + +#define REG_PTP_PORT_SYNC_TS 0x0C0C +#define REG_PTP_PORT_SYNC_TS_H 0x0C0C +#define REG_PTP_PORT_SYNC_TS_L 0x0C0E + +#define REG_PTP_PORT_PDRESP_TS 0x0C10 +#define REG_PTP_PORT_PDRESP_TS_H 0x0C10 +#define REG_PTP_PORT_PDRESP_TS_L 0x0C12 + +#define REG_PTP_PORT_TX_INT_STATUS__2 0x0C14 +#define REG_PTP_PORT_TX_INT_ENABLE__2 0x0C16 + +#define PTP_PORT_SYNC_INT BIT(15) +#define PTP_PORT_XDELAY_REQ_INT BIT(14) +#define PTP_PORT_PDELAY_RESP_INT BIT(13) + +#define REG_PTP_PORT_LINK_DELAY__4 0x0C18 + +#define PRIO_QUEUES 4 +#define RX_PRIO_QUEUES 8 + +#define KS_PRIO_IN_REG 2 + +#define TOTAL_PORT_NUM 7 + +#define KSZ9477_COUNTER_NUM 0x20 +#define TOTAL_KSZ9477_COUNTER_NUM (KSZ9477_COUNTER_NUM + 2 + 2) + +#define SWITCH_COUNTER_NUM KSZ9477_COUNTER_NUM +#define TOTAL_SWITCH_COUNTER_NUM TOTAL_KSZ9477_COUNTER_NUM + +#define P_BCAST_STORM_CTRL REG_PORT_MAC_CTRL_0 +#define P_PRIO_CTRL REG_PORT_MRI_PRIO_CTRL +#define P_MIRROR_CTRL REG_PORT_MRI_MIRROR_CTRL +#define P_STP_CTRL REG_PORT_LUE_MSTP_STATE +#define P_PHY_CTRL REG_PORT_PHY_CTRL +#define P_NEG_RESTART_CTRL REG_PORT_PHY_CTRL +#define P_LINK_STATUS REG_PORT_PHY_STATUS +#define P_SPEED_STATUS REG_PORT_PHY_PHY_CTRL +#define P_RATE_LIMIT_CTRL REG_PORT_MAC_IN_RATE_LIMIT + +#define S_LINK_AGING_CTRL REG_SW_LUE_CTRL_1 +#define S_MIRROR_CTRL REG_SW_MRI_CTRL_0 +#define S_REPLACE_VID_CTRL REG_SW_MAC_CTRL_2 +#define S_802_1P_PRIO_CTRL REG_SW_MAC_802_1P_MAP_0 +#define S_TOS_PRIO_CTRL REG_SW_MAC_TOS_PRIO_0 +#define S_FLUSH_TABLE_CTRL REG_SW_LUE_CTRL_1 + +#define SW_FLUSH_DYN_MAC_TABLE SW_FLUSH_MSTP_TABLE + +#define MAX_TIMESTAMP_UNIT 2 +#define MAX_TRIG_UNIT 3 +#define MAX_TIMESTAMP_EVENT_UNIT 8 +#define MAX_GPIO 4 + +#define PTP_TRIG_UNIT_M (BIT(MAX_TRIG_UNIT) - 1) +#define PTP_TS_UNIT_M (BIT(MAX_TIMESTAMP_UNIT) - 1) + +/* Driver set switch broadcast storm protection at 10% rate. */ +#define BROADCAST_STORM_PROT_RATE 10 + +/* 148,800 frames * 67 ms / 100 */ +#define BROADCAST_STORM_VALUE 9969 + +#endif /* KSZ9477_REGS_H */ diff --git a/include/platform_data/pca953x.h b/include/platform_data/pca953x.h index cfd253ebce..de71c86481 100644 --- a/include/platform_data/pca953x.h +++ b/include/platform_data/pca953x.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _LINUX_PCA953X_H #define _LINUX_PCA953X_H diff --git a/include/pm_domain.h b/include/pm_domain.h index 6d59587ece..48fd170007 100644 --- a/include/pm_domain.h +++ b/include/pm_domain.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _PM_DOMAIN_H #define _PM_DOMAIN_H @@ -79,4 +81,4 @@ of_genpd_add_provider_simple(struct device_node *np, #endif -#endif
\ No newline at end of file +#endif diff --git a/include/printk.h b/include/printk.h index baf2cca202..8de8202af9 100644 --- a/include/printk.h +++ b/include/printk.h @@ -2,6 +2,10 @@ #ifndef __PRINTK_H #define __PRINTK_H +#include <linux/types.h> + +struct device_d; + #define KERN_EMERG "" /* system is unusable */ #define KERN_ALERT "" /* action must be taken immediately */ #define KERN_CRIT "" /* critical conditions */ @@ -43,9 +47,15 @@ enum { extern int hex_dump_to_buffer(const void *buf, size_t len, int rowsize, int groupsize, char *linebuf, size_t linebuflen, bool ascii); -extern void print_hex_dump(const char *level, const char *prefix_str, - int prefix_type, int rowsize, int groupsize, - const void *buf, size_t len, bool ascii); +extern void dev_print_hex_dump(struct device_d *dev, const char *level, + const char *prefix_str, int prefix_type, + int rowsize, int groupsize, const void *buf, + size_t len, bool ascii); + +#define print_hex_dump(level, prefix_str, prefix_type, rowsize, \ + groupsize, buf, len, ascii) \ + dev_print_hex_dump(NULL, level, prefix_str, prefix_type, rowsize, \ + groupsize, buf, len, ascii) #ifdef CONFIG_ARCH_HAS_STACK_DUMP void dump_stack(void); diff --git a/include/regmap.h b/include/regmap.h index db84c7a534..4b30c21776 100644 --- a/include/regmap.h +++ b/include/regmap.h @@ -130,6 +130,18 @@ int regmap_write_bits(struct regmap *map, unsigned int reg, int regmap_update_bits(struct regmap *map, unsigned int reg, unsigned int mask, unsigned int val); +static inline int regmap_set_bits(struct regmap *map, + unsigned int reg, unsigned int bits) +{ + return regmap_update_bits(map, reg, bits, bits); +} + +static inline int regmap_clear_bits(struct regmap *map, + unsigned int reg, unsigned int bits) +{ + return regmap_update_bits(map, reg, bits, 0); +} + /** * regmap_read_poll_timeout - Poll until a condition is met or a timeout occurs * diff --git a/include/rsa.h b/include/rsa.h index 803660d19a..650fb234f2 100644 --- a/include/rsa.h +++ b/include/rsa.h @@ -29,6 +29,7 @@ struct rsa_public_key { uint32_t *rr; /* R^2 as little endian array */ uint64_t exponent; /* public exponent */ char *key_name_hint; + struct list_head list; }; /** @@ -52,6 +53,10 @@ int rsa_verify(const struct rsa_public_key *key, const uint8_t *sig, struct rsa_public_key *rsa_of_read_key(struct device_node *node); void rsa_key_free(struct rsa_public_key *key); -struct rsa_public_key *rsa_get_key(const char *name); +const struct rsa_public_key *rsa_get_key(const char *name); +const struct rsa_public_key *rsa_key_next(const struct rsa_public_key *prev); + +#define for_each_rsa_key(key) \ + for (key = rsa_key_next(NULL); key; key = rsa_key_next(key)) #endif diff --git a/include/serial/cadence.h b/include/serial/cadence.h index f08b5b0cba..9105883dd6 100644 --- a/include/serial/cadence.h +++ b/include/serial/cadence.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __CADENCE_UART_H__ #define __CADENCE_UART_H__ diff --git a/include/serial/imx-uart.h b/include/serial/imx-uart.h index c0a03ac054..516f318b68 100644 --- a/include/serial/imx-uart.h +++ b/include/serial/imx-uart.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __IMX_UART_H__ #define __IMX_UART_H__ diff --git a/include/slice.h b/include/slice.h index 6c4688e308..800c5b2de0 100644 --- a/include/slice.h +++ b/include/slice.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __SLICE_H #define __SLICE_H diff --git a/include/soc/fsl/fsl_udc.h b/include/soc/fsl/fsl_udc.h index 0b409a9f6b..9fb6da58a1 100644 --- a/include/soc/fsl/fsl_udc.h +++ b/include/soc/fsl/fsl_udc.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __FSL_UDC_H #define __FSL_UDC_H diff --git a/include/soc/imx/imx-nand-bcb.h b/include/soc/imx/imx-nand-bcb.h index b60205bd59..6c42d80428 100644 --- a/include/soc/imx/imx-nand-bcb.h +++ b/include/soc/imx/imx-nand-bcb.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __MACH_IMX_NAND_BCB_H #define __MACH_IMX_NAND_BCB_H diff --git a/include/soc/imx8m/clk-early.h b/include/soc/imx8m/clk-early.h index 1e1ca59543..c2034e54f0 100644 --- a/include/soc/imx8m/clk-early.h +++ b/include/soc/imx8m/clk-early.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __SOC_IMX8M_CLK_EARLY_H #define __SOC_IMX8M_CLK_EARLY_H diff --git a/include/soc/stm32/gpio.h b/include/soc/stm32/gpio.h index 13b492a693..448fb19e2e 100644 --- a/include/soc/stm32/gpio.h +++ b/include/soc/stm32/gpio.h @@ -25,6 +25,10 @@ #define STM32_PIN_AF(x) ((x) + 1) #define STM32_PIN_ANALOG (STM32_PIN_AF(15) + 1) +#define STM32_PINMODE_GPIO 0 +#define STM32_PINMODE_AF 2 +#define STM32_PINMODE_ANALOG 3 + #define STM32_GPIO_PINS_PER_BANK 16 enum stm32_pin_bias { STM32_PIN_NO_BIAS, STM32_PIN_PULL_UP, STM32_PIN_PULL_DOWN }; diff --git a/include/soc/stm32/reboot.h b/include/soc/stm32/reboot.h new file mode 100644 index 0000000000..d6c731f59f --- /dev/null +++ b/include/soc/stm32/reboot.h @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifndef __SOC_STM32_REBOOT_H_ +#define __SOC_STM32_REBOOT_H_ + +#include <linux/compiler.h> + +#ifdef CONFIG_RESET_STM32 +void stm32mp_system_restart_init(void __iomem *rcc); +#else +static inline void stm32mp_system_restart_init(void __iomem *rcc) +{ +} +#endif + +#endif diff --git a/include/spi/spi.h b/include/spi/spi.h index c5efca1cc3..b6d08592a3 100644 --- a/include/spi/spi.h +++ b/include/spi/spi.h @@ -108,6 +108,11 @@ struct spi_device { */ }; +static inline struct spi_device *to_spi_device(struct device_d *dev) +{ + return dev ? container_of(dev, struct spi_device, dev) : NULL; +} + struct spi_message; /** @@ -404,6 +409,26 @@ spi_message_add_tail(struct spi_transfer *t, struct spi_message *m) list_add_tail(&t->transfer_list, &m->transfers); } +/** + * spi_message_init_with_transfers - Initialize spi_message and append transfers + * @m: spi_message to be initialized + * @xfers: An array of spi transfers + * @num_xfers: Number of items in the xfer array + * + * This function initializes the given spi_message and adds each spi_transfer in + * the given array to the message. + */ +static inline void +spi_message_init_with_transfers(struct spi_message *m, +struct spi_transfer *xfers, unsigned int num_xfers) +{ + unsigned int i; + + spi_message_init(m); + for (i = 0; i < num_xfers; ++i) + spi_message_add_tail(&xfers[i], m); +} + static inline void spi_transfer_del(struct spi_transfer *t) { @@ -417,6 +442,30 @@ spi_transfer_del(struct spi_transfer *t) int spi_sync(struct spi_device *spi, struct spi_message *message); +/** + * spi_sync_transfer - synchronous SPI data transfer + * @spi: device with which data will be exchanged + * @xfers: An array of spi_transfers + * @num_xfers: Number of items in the xfer array + * Context: can sleep + * + * Does a synchronous SPI data transfer of the given spi_transfer array. + * + * For more specific semantics see spi_sync(). + * + * Return: zero on success, else a negative error code. + */ +static inline int +spi_sync_transfer(struct spi_device *spi, struct spi_transfer *xfers, + unsigned int num_xfers) +{ + struct spi_message msg; + + spi_message_init_with_transfers(&msg, xfers, num_xfers); + + return spi_sync(spi, &msg); +} + struct spi_device *spi_new_device(struct spi_controller *ctrl, struct spi_board_info *chip); int spi_register_controller(struct spi_controller *ctrl); @@ -515,9 +564,14 @@ static inline int spi_driver_register(struct driver_d *drv) return register_driver(drv); } +#ifdef CONFIG_SPI #define coredevice_spi_driver(drv) \ register_driver_macro(coredevice,spi,drv) #define device_spi_driver(drv) \ register_driver_macro(device,spi,drv) +#else +#define coredevice_spi_driver(drv) +#define device_spi_driver(drv) +#endif #endif /* __INCLUDE_SPI_H */ diff --git a/include/state.h b/include/state.h index be1b592576..bffcd5a900 100644 --- a/include/state.h +++ b/include/state.h @@ -12,7 +12,8 @@ struct state *state_new_from_node(struct device_node *node, bool readonly); void state_release(struct state *state); struct state *state_by_name(const char *name); -struct state *state_by_node(const struct device_node *node); +struct state *state_by_node(struct device_node *node); +struct state *state_by_alias(const char *alias); int state_load_no_auth(struct state *state); int state_load(struct state *state); @@ -34,10 +35,15 @@ static inline struct state *state_by_name(const char *name) return NULL; } -static inline struct state *state_by_node(const struct device_node *node) +static inline struct state *state_by_node(struct device_node *node) { return NULL; -}; +} + +static inline struct state *state_by_alias(const char *alias) +{ + return NULL; +} static inline int state_load(struct state *state) { diff --git a/include/sys/ioctl.h b/include/sys/ioctl.h index 6d6d3f5c00..5a949f1f3c 100644 --- a/include/sys/ioctl.h +++ b/include/sys/ioctl.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __SYS_IOCTL_H #define __SYS_IOCTL_H diff --git a/include/sys/mount.h b/include/sys/mount.h index 978f3406e8..368e54a343 100644 --- a/include/sys/mount.h +++ b/include/sys/mount.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __SYS_MOUNT_H #define __SYS_MOUNT_H diff --git a/include/sys/stat.h b/include/sys/stat.h index 037e5f136d..0dd43d1f02 100644 --- a/include/sys/stat.h +++ b/include/sys/stat.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __STAT_H #define __STAT_H diff --git a/include/system-partitions.h b/include/system-partitions.h index 86de3612cc..e6d1a0f88b 100644 --- a/include/system-partitions.h +++ b/include/system-partitions.h @@ -2,6 +2,7 @@ #ifndef SYSTEM_PARTITIONS_H_ #define SYSTEM_PARTITIONS_H_ +#include <linux/types.h> #include <file-list.h> #ifdef CONFIG_SYSTEM_PARTITIONS @@ -37,4 +38,11 @@ static inline bool system_partitions_empty(void) #endif +static inline struct file_list *system_partitions_get_null(void) +{ + if (system_partitions_empty()) + return NULL; + return system_partitions_get(); +} + #endif diff --git a/include/tlsf.h b/include/tlsf.h index 7015de0eb5..161176d5ac 100644 --- a/include/tlsf.h +++ b/include/tlsf.h @@ -42,9 +42,12 @@ extern "C" { #endif +#include <printk.h> + #define tlsf_assert(expr) do { \ if (unlikely(!(expr))) { \ printf(#expr "%s %d\n", __FILE__, __LINE__); \ + dump_stack(); \ } \ } while (0) diff --git a/include/uapi/linux/virtio_ids.h b/include/uapi/linux/virtio_ids.h index bc1c0621f5..80d76b75bc 100644 --- a/include/uapi/linux/virtio_ids.h +++ b/include/uapi/linux/virtio_ids.h @@ -51,8 +51,34 @@ #define VIRTIO_ID_PSTORE 22 /* virtio pstore device */ #define VIRTIO_ID_IOMMU 23 /* virtio IOMMU */ #define VIRTIO_ID_MEM 24 /* virtio mem */ +#define VIRTIO_ID_SOUND 25 /* virtio sound */ #define VIRTIO_ID_FS 26 /* virtio filesystem */ #define VIRTIO_ID_PMEM 27 /* virtio pmem */ +#define VIRTIO_ID_RPMB 28 /* virtio rpmb */ #define VIRTIO_ID_MAC80211_HWSIM 29 /* virtio mac80211-hwsim */ +#define VIRTIO_ID_VIDEO_ENCODER 30 /* virtio video encoder */ +#define VIRTIO_ID_VIDEO_DECODER 31 /* virtio video decoder */ +#define VIRTIO_ID_SCMI 32 /* virtio SCMI */ +#define VIRTIO_ID_NITRO_SEC_MOD 33 /* virtio nitro secure module*/ +#define VIRTIO_ID_I2C_ADAPTER 34 /* virtio i2c adapter */ +#define VIRTIO_ID_WATCHDOG 35 /* virtio watchdog */ +#define VIRTIO_ID_CAN 36 /* virtio can */ +#define VIRTIO_ID_DMABUF 37 /* virtio dmabuf */ +#define VIRTIO_ID_PARAM_SERV 38 /* virtio parameter server */ +#define VIRTIO_ID_AUDIO_POLICY 39 /* virtio audio policy */ +#define VIRTIO_ID_BT 40 /* virtio bluetooth */ +#define VIRTIO_ID_GPIO 41 /* virtio gpio */ + +/* + * Virtio Transitional IDs + */ + +#define VIRTIO_TRANS_ID_NET 1000 /* transitional virtio net */ +#define VIRTIO_TRANS_ID_BLOCK 1001 /* transitional virtio block */ +#define VIRTIO_TRANS_ID_BALLOON 1002 /* transitional virtio balloon */ +#define VIRTIO_TRANS_ID_CONSOLE 1003 /* transitional virtio console */ +#define VIRTIO_TRANS_ID_SCSI 1004 /* transitional virtio SCSI */ +#define VIRTIO_TRANS_ID_RNG 1005 /* transitional virtio rng */ +#define VIRTIO_TRANS_ID_9P 1009 /* transitional virtio 9p console */ #endif /* _LINUX_VIRTIO_IDS_H */ diff --git a/include/unistd.h b/include/unistd.h index 06ce355809..f7fe737d00 100644 --- a/include/unistd.h +++ b/include/unistd.h @@ -20,6 +20,8 @@ int rmdir (const char *pathname); int symlink(const char *pathname, const char *newpath); int readlink(const char *path, char *buf, size_t bufsiz); int chdir(const char *pathname); +char *pushd(const char *dir); +int popd(char *dir); const char *getcwd(void); int ftruncate(int fd, loff_t length); diff --git a/include/usb/cdc.h b/include/usb/cdc.h index c24124a42c..e29429d783 100644 --- a/include/usb/cdc.h +++ b/include/usb/cdc.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + /* * USB Communications Device Class (CDC) definitions * diff --git a/include/usb/ch11.h b/include/usb/ch11.h index 93f891aea7..c712d80275 100644 --- a/include/usb/ch11.h +++ b/include/usb/ch11.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + /* * This file holds Hub protocol constants and data structures that are * defined in chapter 11 (Hub Specification) of the USB 2.0 specification. diff --git a/include/usb/ch9.h b/include/usb/ch9.h index 2e06dd89fd..4c1e765326 100644 --- a/include/usb/ch9.h +++ b/include/usb/ch9.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + /* * This file holds USB constants and structures that are needed for * USB device APIs. These are used by the USB device model, which is diff --git a/include/usb/chipidea-imx.h b/include/usb/chipidea-imx.h index dfd84a9650..772f48c631 100644 --- a/include/usb/chipidea-imx.h +++ b/include/usb/chipidea-imx.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __USB_CHIPIDEA_IMX_H #define __USB_CHIPIDEA_IMX_H diff --git a/include/usb/ehci.h b/include/usb/ehci.h index 327500d49a..d937146b4d 100644 --- a/include/usb/ehci.h +++ b/include/usb/ehci.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __USB_EHCI_H #define __USB_EHCI_H diff --git a/include/usb/fastboot.h b/include/usb/fastboot.h index a3609ba5db..7dc445455a 100644 --- a/include/usb/fastboot.h +++ b/include/usb/fastboot.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _USB_FASTBOOT_H #define _USB_FASTBOOT_H diff --git a/include/usb/fsl_usb2.h b/include/usb/fsl_usb2.h index 39757f71ad..01232da4f9 100644 --- a/include/usb/fsl_usb2.h +++ b/include/usb/fsl_usb2.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __USB_FSL_USB2_H #define __USB_FSL_USB2_H diff --git a/include/usb/gadget-multi.h b/include/usb/gadget-multi.h index 79b24ca4df..2d8d7533a8 100644 --- a/include/usb/gadget-multi.h +++ b/include/usb/gadget-multi.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __USB_GADGET_MULTI_H #define __USB_GADGET_MULTI_H diff --git a/include/usb/mass_storage.h b/include/usb/mass_storage.h index 084b3c8e8f..7be665ee47 100644 --- a/include/usb/mass_storage.h +++ b/include/usb/mass_storage.h @@ -20,6 +20,7 @@ struct f_ums_opts { struct file_list *files; unsigned int num_sectors; int fd; + int refcnt; char name[16]; }; diff --git a/include/usb/musb.h b/include/usb/musb.h index fef7dc5f2c..c21428dbf1 100644 --- a/include/usb/musb.h +++ b/include/usb/musb.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + /* * This is used to for host and peripheral modes of the driver for * Inventra (Multidrop) Highspeed Dual-Role Controllers: (M)HDRC. diff --git a/include/usb/phy.h b/include/usb/phy.h index 057ad1cd95..8f11e70dfd 100644 --- a/include/usb/phy.h +++ b/include/usb/phy.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + /* USB OTG (On The Go) defines */ /* * diff --git a/include/usb/ulpi.h b/include/usb/ulpi.h index e45ea6e0f9..efbfc63208 100644 --- a/include/usb/ulpi.h +++ b/include/usb/ulpi.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __MACH_ULPI_H #define __MACH_ULPI_H diff --git a/include/usb/usbserial.h b/include/usb/usbserial.h index c537eba900..e1375c489a 100644 --- a/include/usb/usbserial.h +++ b/include/usb/usbserial.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef _USB_SERIAL_H #define _USB_SERIAL_H diff --git a/include/video/backlight.h b/include/video/backlight.h index afa384cc9a..7810ec998e 100644 --- a/include/video/backlight.h +++ b/include/video/backlight.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __VIDEO_BACKLIGHT_H #define __VIDEO_BACKLIGHT_H diff --git a/include/video/fourcc.h b/include/video/fourcc.h index 211aabb1f3..4db1d0d001 100644 --- a/include/video/fourcc.h +++ b/include/video/fourcc.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __VIDEO_FOURCC_H #define __VIDEO_FOURCC_H diff --git a/include/video/mipi_dbi.h b/include/video/mipi_dbi.h new file mode 100644 index 0000000000..92fdc500d1 --- /dev/null +++ b/include/video/mipi_dbi.h @@ -0,0 +1,105 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * MIPI Display Bus Interface (DBI) LCD controller support + * + * Copyright 2016 Noralf Trønnes + */ + +#ifndef __LINUX_MIPI_DBI_H +#define __LINUX_MIPI_DBI_H + +#include <linux/types.h> +#include <spi/spi.h> +#include <driver.h> + +struct regulator; +struct fb_videomode; + +/** + * struct mipi_dbi - MIPI DBI interface + */ +struct mipi_dbi { + /** + * @command: Bus specific callback executing commands. + */ + int (*command)(struct mipi_dbi *dbi, u8 *cmd, u8 *param, size_t num); + + /** + * @read_commands: Array of read commands terminated by a zero entry. + * Reading is disabled if this is NULL. + */ + const u8 *read_commands; + + /** + * @swap_bytes: Swap bytes in buffer before transfer + */ + bool swap_bytes; + + /** + * @reset: Optional reset gpio + */ + int reset; + + /* Type C specific */ + + /** + * @spi: SPI device + */ + struct spi_device *spi; + + /** + * @dc: Optional D/C gpio. + */ + int dc; + + struct list_head list; +}; + +static inline const char *mipi_dbi_name(struct mipi_dbi *dbi) +{ + return dev_name(&dbi->spi->dev); +} + +int mipi_dbi_spi_init(struct spi_device *spi, struct mipi_dbi *dbi, + int dc); +void mipi_dbi_hw_reset(struct mipi_dbi *dbi); +bool mipi_dbi_display_is_on(struct mipi_dbi *dbi); + +u32 mipi_dbi_spi_cmd_max_speed(struct spi_device *spi, size_t len); +int mipi_dbi_spi_transfer(struct spi_device *spi, u32 speed_hz, + u8 bpw, const void *buf, size_t len); + +int mipi_dbi_command_read(struct mipi_dbi *dbi, u8 cmd, u8 *val); +int mipi_dbi_command_buf(struct mipi_dbi *dbi, u8 cmd, u8 *data, size_t len); +int mipi_dbi_command_stackbuf(struct mipi_dbi *dbi, u8 cmd, const u8 *data, + size_t len); + +/** + * mipi_dbi_command - MIPI DCS command with optional parameter(s) + * @dbi: MIPI DBI structure + * @cmd: Command + * @seq: Optional parameter(s) + * + * Send MIPI DCS command to the controller. Use mipi_dbi_command_read() for + * get/read. + * + * Returns: + * Zero on success, negative error code on failure. + */ +#define mipi_dbi_command(dbi, cmd, seq...) \ +({ \ + const u8 d[] = { seq }; \ + struct device_d *dev = &(dbi)->spi->dev; \ + int ret; \ + ret = mipi_dbi_command_stackbuf(dbi, cmd, d, ARRAY_SIZE(d)); \ + if (ret) \ + dev_err(dev, "error %pe when sending command %#02x\n", ERR_PTR(ret), cmd); \ + ret; \ +}) + +bool mipi_dbi_command_is_read(struct mipi_dbi *dbi, u8 cmd); +int mipi_dbi_command_read_len(int cmd); + +extern struct list_head mipi_dbi_list; + +#endif /* __LINUX_MIPI_DBI_H */ diff --git a/include/video/mipi_display.h b/include/video/mipi_display.h new file mode 100644 index 0000000000..b6d8b87423 --- /dev/null +++ b/include/video/mipi_display.h @@ -0,0 +1,150 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Defines for Mobile Industry Processor Interface (MIPI(R)) + * Display Working Group standards: DSI, DCS, DBI, DPI + * + * Copyright (C) 2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de> + * Copyright (C) 2006 Nokia Corporation + * Author: Imre Deak <imre.deak@nokia.com> + */ +#ifndef MIPI_DISPLAY_H +#define MIPI_DISPLAY_H + +/* MIPI DSI Processor-to-Peripheral transaction types */ +enum { + MIPI_DSI_V_SYNC_START = 0x01, + MIPI_DSI_V_SYNC_END = 0x11, + MIPI_DSI_H_SYNC_START = 0x21, + MIPI_DSI_H_SYNC_END = 0x31, + + MIPI_DSI_COMPRESSION_MODE = 0x07, + MIPI_DSI_END_OF_TRANSMISSION = 0x08, + + MIPI_DSI_COLOR_MODE_OFF = 0x02, + MIPI_DSI_COLOR_MODE_ON = 0x12, + MIPI_DSI_SHUTDOWN_PERIPHERAL = 0x22, + MIPI_DSI_TURN_ON_PERIPHERAL = 0x32, + + MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM = 0x03, + MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM = 0x13, + MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM = 0x23, + + MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM = 0x04, + MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM = 0x14, + MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM = 0x24, + + MIPI_DSI_DCS_SHORT_WRITE = 0x05, + MIPI_DSI_DCS_SHORT_WRITE_PARAM = 0x15, + + MIPI_DSI_DCS_READ = 0x06, + MIPI_DSI_EXECUTE_QUEUE = 0x16, + + MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE = 0x37, + + MIPI_DSI_NULL_PACKET = 0x09, + MIPI_DSI_BLANKING_PACKET = 0x19, + MIPI_DSI_GENERIC_LONG_WRITE = 0x29, + MIPI_DSI_DCS_LONG_WRITE = 0x39, + + MIPI_DSI_PICTURE_PARAMETER_SET = 0x0a, + MIPI_DSI_COMPRESSED_PIXEL_STREAM = 0x0b, + + MIPI_DSI_LOOSELY_PACKED_PIXEL_STREAM_YCBCR20 = 0x0c, + MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR24 = 0x1c, + MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16 = 0x2c, + + MIPI_DSI_PACKED_PIXEL_STREAM_30 = 0x0d, + MIPI_DSI_PACKED_PIXEL_STREAM_36 = 0x1d, + MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR12 = 0x3d, + + MIPI_DSI_PACKED_PIXEL_STREAM_16 = 0x0e, + MIPI_DSI_PACKED_PIXEL_STREAM_18 = 0x1e, + MIPI_DSI_PIXEL_STREAM_3BYTE_18 = 0x2e, + MIPI_DSI_PACKED_PIXEL_STREAM_24 = 0x3e, +}; + +/* MIPI DSI Peripheral-to-Processor transaction types */ +enum { + MIPI_DSI_RX_ACKNOWLEDGE_AND_ERROR_REPORT = 0x02, + MIPI_DSI_RX_END_OF_TRANSMISSION = 0x08, + MIPI_DSI_RX_GENERIC_SHORT_READ_RESPONSE_1BYTE = 0x11, + MIPI_DSI_RX_GENERIC_SHORT_READ_RESPONSE_2BYTE = 0x12, + MIPI_DSI_RX_GENERIC_LONG_READ_RESPONSE = 0x1a, + MIPI_DSI_RX_DCS_LONG_READ_RESPONSE = 0x1c, + MIPI_DSI_RX_DCS_SHORT_READ_RESPONSE_1BYTE = 0x21, + MIPI_DSI_RX_DCS_SHORT_READ_RESPONSE_2BYTE = 0x22, +}; + +/* MIPI DCS commands */ +enum { + MIPI_DCS_NOP = 0x00, + MIPI_DCS_SOFT_RESET = 0x01, + MIPI_DCS_GET_COMPRESSION_MODE = 0x03, + MIPI_DCS_GET_DISPLAY_ID = 0x04, + MIPI_DCS_GET_ERROR_COUNT_ON_DSI = 0x05, + MIPI_DCS_GET_RED_CHANNEL = 0x06, + MIPI_DCS_GET_GREEN_CHANNEL = 0x07, + MIPI_DCS_GET_BLUE_CHANNEL = 0x08, + MIPI_DCS_GET_DISPLAY_STATUS = 0x09, + MIPI_DCS_GET_POWER_MODE = 0x0A, + MIPI_DCS_GET_ADDRESS_MODE = 0x0B, + MIPI_DCS_GET_PIXEL_FORMAT = 0x0C, + MIPI_DCS_GET_DISPLAY_MODE = 0x0D, + MIPI_DCS_GET_SIGNAL_MODE = 0x0E, + MIPI_DCS_GET_DIAGNOSTIC_RESULT = 0x0F, + MIPI_DCS_ENTER_SLEEP_MODE = 0x10, + MIPI_DCS_EXIT_SLEEP_MODE = 0x11, + MIPI_DCS_ENTER_PARTIAL_MODE = 0x12, + MIPI_DCS_ENTER_NORMAL_MODE = 0x13, + MIPI_DCS_GET_IMAGE_CHECKSUM_RGB = 0x14, + MIPI_DCS_GET_IMAGE_CHECKSUM_CT = 0x15, + MIPI_DCS_EXIT_INVERT_MODE = 0x20, + MIPI_DCS_ENTER_INVERT_MODE = 0x21, + MIPI_DCS_SET_GAMMA_CURVE = 0x26, + MIPI_DCS_SET_DISPLAY_OFF = 0x28, + MIPI_DCS_SET_DISPLAY_ON = 0x29, + MIPI_DCS_SET_COLUMN_ADDRESS = 0x2A, + MIPI_DCS_SET_PAGE_ADDRESS = 0x2B, + MIPI_DCS_WRITE_MEMORY_START = 0x2C, + MIPI_DCS_WRITE_LUT = 0x2D, + MIPI_DCS_READ_MEMORY_START = 0x2E, + MIPI_DCS_SET_PARTIAL_ROWS = 0x30, /* MIPI DCS 1.02 - MIPI_DCS_SET_PARTIAL_AREA before that */ + MIPI_DCS_SET_PARTIAL_COLUMNS = 0x31, + MIPI_DCS_SET_SCROLL_AREA = 0x33, + MIPI_DCS_SET_TEAR_OFF = 0x34, + MIPI_DCS_SET_TEAR_ON = 0x35, + MIPI_DCS_SET_ADDRESS_MODE = 0x36, + MIPI_DCS_SET_SCROLL_START = 0x37, + MIPI_DCS_EXIT_IDLE_MODE = 0x38, + MIPI_DCS_ENTER_IDLE_MODE = 0x39, + MIPI_DCS_SET_PIXEL_FORMAT = 0x3A, + MIPI_DCS_WRITE_MEMORY_CONTINUE = 0x3C, + MIPI_DCS_SET_3D_CONTROL = 0x3D, + MIPI_DCS_READ_MEMORY_CONTINUE = 0x3E, + MIPI_DCS_GET_3D_CONTROL = 0x3F, + MIPI_DCS_SET_VSYNC_TIMING = 0x40, + MIPI_DCS_SET_TEAR_SCANLINE = 0x44, + MIPI_DCS_GET_SCANLINE = 0x45, + MIPI_DCS_SET_DISPLAY_BRIGHTNESS = 0x51, /* MIPI DCS 1.3 */ + MIPI_DCS_GET_DISPLAY_BRIGHTNESS = 0x52, /* MIPI DCS 1.3 */ + MIPI_DCS_WRITE_CONTROL_DISPLAY = 0x53, /* MIPI DCS 1.3 */ + MIPI_DCS_GET_CONTROL_DISPLAY = 0x54, /* MIPI DCS 1.3 */ + MIPI_DCS_WRITE_POWER_SAVE = 0x55, /* MIPI DCS 1.3 */ + MIPI_DCS_GET_POWER_SAVE = 0x56, /* MIPI DCS 1.3 */ + MIPI_DCS_SET_CABC_MIN_BRIGHTNESS = 0x5E, /* MIPI DCS 1.3 */ + MIPI_DCS_GET_CABC_MIN_BRIGHTNESS = 0x5F, /* MIPI DCS 1.3 */ + MIPI_DCS_READ_DDB_START = 0xA1, + MIPI_DCS_READ_PPS_START = 0xA2, + MIPI_DCS_READ_DDB_CONTINUE = 0xA8, + MIPI_DCS_READ_PPS_CONTINUE = 0xA9, +}; + +/* MIPI DCS pixel formats */ +#define MIPI_DCS_PIXEL_FMT_24BIT 7 +#define MIPI_DCS_PIXEL_FMT_18BIT 6 +#define MIPI_DCS_PIXEL_FMT_16BIT 5 +#define MIPI_DCS_PIXEL_FMT_12BIT 3 +#define MIPI_DCS_PIXEL_FMT_8BIT 2 +#define MIPI_DCS_PIXEL_FMT_3BIT 1 + +#endif diff --git a/include/video/omap-fb.h b/include/video/omap-fb.h new file mode 100644 index 0000000000..519460f0d5 --- /dev/null +++ b/include/video/omap-fb.h @@ -0,0 +1,45 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef OMAP_FB_H +#define OMAP_FB_H + +#include <fb.h> + +#define OMAP_DSS_LCD_TFT (1u << 0) +#define OMAP_DSS_LCD_IVS (1u << 1) +#define OMAP_DSS_LCD_IHS (1u << 2) +#define OMAP_DSS_LCD_IPC (1u << 3) +#define OMAP_DSS_LCD_IEO (1u << 4) +#define OMAP_DSS_LCD_RF (1u << 5) +#define OMAP_DSS_LCD_ONOFF (1u << 6) + +#define OMAP_DSS_LCD_DATALINES(_l) ((_l) << 10) +#define OMAP_DSS_LCD_DATALINES_msk OMAP_DSS_LCD_DATALINES(3u) +#define OMAP_DSS_LCD_DATALINES_12 OMAP_DSS_LCD_DATALINES(0u) +#define OMAP_DSS_LCD_DATALINES_16 OMAP_DSS_LCD_DATALINES(1u) +#define OMAP_DSS_LCD_DATALINES_18 OMAP_DSS_LCD_DATALINES(2u) +#define OMAP_DSS_LCD_DATALINES_24 OMAP_DSS_LCD_DATALINES(3u) + +struct omapfb_display { + struct fb_videomode mode; + + unsigned long config; + + unsigned int power_on_delay; + unsigned int power_off_delay; +}; + +struct omapfb_platform_data { + struct omapfb_display const *displays; + size_t num_displays; + + unsigned int dss_clk_hz; + + unsigned int bpp; + + struct resource const *screen; + + void (*enable)(int p); +}; + +#endif /* OMAP_FB_H */ diff --git a/include/video/vpl.h b/include/video/vpl.h index 6ae7b0f3e0..15711b4701 100644 --- a/include/video/vpl.h +++ b/include/video/vpl.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __VIDEO_VPL_H #define __VIDEO_VPL_H diff --git a/include/work.h b/include/work.h index 0785bb3a88..e6de867f53 100644 --- a/include/work.h +++ b/include/work.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __WORK_H #define __WORK_H |