summaryrefslogtreecommitdiffstats
path: root/include
diff options
context:
space:
mode:
Diffstat (limited to 'include')
-rw-r--r--include/aiodev.h2
-rw-r--r--include/bootm.h7
-rw-r--r--include/bootsource.h1
-rw-r--r--include/console.h2
-rw-r--r--include/debug_ll.h2
-rw-r--r--include/dma.h16
-rw-r--r--include/driver.h4
-rw-r--r--include/dt-bindings/clock/tegra30-car.h265
-rw-r--r--include/dt-bindings/pinctrl/pinctrl-tegra.h45
-rw-r--r--include/dt-bindings/pinctrl/rockchip.h32
-rw-r--r--include/filetype.h1
-rw-r--r--include/linux/bitfield.h152
-rw-r--r--include/linux/bug.h25
-rw-r--r--include/linux/build_bug.h83
-rw-r--r--include/linux/clk.h1
-rw-r--r--include/linux/crc-ccitt.h23
-rw-r--r--include/linux/fs.h5
-rw-r--r--include/linux/mfd/rave-sp.h78
-rw-r--r--include/linux/mtd/nand.h1
-rw-r--r--include/memory.h13
-rw-r--r--include/mfd/mc13xxx.h19
-rw-r--r--include/mfd/twl-core.h2
-rw-r--r--include/reset_source.h17
-rw-r--r--include/serial/lpuart.h21
-rw-r--r--include/watchdog.h9
25 files changed, 435 insertions, 391 deletions
diff --git a/include/aiodev.h b/include/aiodev.h
index 0d4f7a2940..5e38b4fab5 100644
--- a/include/aiodev.h
+++ b/include/aiodev.h
@@ -23,7 +23,7 @@
struct aiodevice;
struct aiochannel {
int index;
- char *unit;
+ const char *unit;
struct aiodevice *aiodev;
int value;
diff --git a/include/bootm.h b/include/bootm.h
index 35c18dc276..62951d6058 100644
--- a/include/bootm.h
+++ b/include/bootm.h
@@ -81,6 +81,13 @@ struct image_data {
struct fdt_header *oftree;
struct resource *oftree_res;
+ /*
+ * The first PAGE_SIZE bytes of the OS image. Can be used by the image
+ * handlers to analyze the OS image before actually loading the bulk of
+ * it.
+ */
+ void *os_header;
+
enum bootm_verify verify;
int verbose;
int force;
diff --git a/include/bootsource.h b/include/bootsource.h
index c6d3b3a98b..064f6b9a28 100644
--- a/include/bootsource.h
+++ b/include/bootsource.h
@@ -16,6 +16,7 @@ enum bootsource {
BOOTSOURCE_HD,
BOOTSOURCE_USB,
BOOTSOURCE_NET,
+ BOOTSOURCE_CAN,
};
#define BOOTSOURCE_INSTANCE_UNKNOWN -1
diff --git a/include/console.h b/include/console.h
index a8b2663a4c..3c14e35935 100644
--- a/include/console.h
+++ b/include/console.h
@@ -63,7 +63,7 @@ struct console_device {
const char *linux_console_name;
struct cdev devfs;
- struct file_operations fops;
+ struct cdev_operations fops;
};
int console_register(struct console_device *cdev);
diff --git a/include/debug_ll.h b/include/debug_ll.h
index b0eb7cd7d9..5047516399 100644
--- a/include/debug_ll.h
+++ b/include/debug_ll.h
@@ -42,7 +42,7 @@ static inline void puthex_ll(unsigned long value)
{
int i; unsigned char ch;
- for (i = 8; i--; ) {
+ for (i = sizeof(unsigned long) * 2; i--; ) {
ch = ((value >> (i * 4)) & 0xf);
ch += (ch >= 10) ? 'a' - 10 : '0';
putc_ll(ch);
diff --git a/include/dma.h b/include/dma.h
index 4d31797968..5fdcb1733c 100644
--- a/include/dma.h
+++ b/include/dma.h
@@ -30,11 +30,23 @@ static inline void dma_free(void *mem)
}
#endif
+dma_addr_t dma_map_single(struct device_d *dev, void *ptr, size_t size,
+ enum dma_data_direction dir);
+void dma_unmap_single(struct device_d *dev, dma_addr_t addr, size_t size,
+ enum dma_data_direction dir);
+
+#define DMA_ERROR_CODE (~(dma_addr_t)0)
+
+static inline int dma_mapping_error(struct device_d *dev, dma_addr_t dma_addr)
+{
+ return dma_addr == DMA_ERROR_CODE;
+}
+
/* streaming DMA - implement the below calls to support HAS_DMA */
-void dma_sync_single_for_cpu(unsigned long address, size_t size,
+void dma_sync_single_for_cpu(dma_addr_t address, size_t size,
enum dma_data_direction dir);
-void dma_sync_single_for_device(unsigned long address, size_t size,
+void dma_sync_single_for_device(dma_addr_t address, size_t size,
enum dma_data_direction dir);
void *dma_alloc_coherent(size_t size, dma_addr_t *dma_handle);
diff --git a/include/driver.h b/include/driver.h
index f37805db17..91653b7946 100644
--- a/include/driver.h
+++ b/include/driver.h
@@ -420,7 +420,7 @@ int platform_driver_register(struct driver_d *drv);
int platform_device_register(struct device_d *new_device);
-struct file_operations {
+struct cdev_operations {
/*! Called in response of reading from this device. Required */
ssize_t (*read)(struct cdev*, void* buf, size_t count, loff_t offset, ulong flags);
@@ -441,7 +441,7 @@ struct file_operations {
#define MAX_PARTUUID_STR sizeof("00112233-4455-6677-8899-AABBCCDDEEFF")
struct cdev {
- const struct file_operations *ops;
+ const struct cdev_operations *ops;
void *priv;
struct device_d *dev;
struct device_node *device_node;
diff --git a/include/dt-bindings/clock/tegra30-car.h b/include/dt-bindings/clock/tegra30-car.h
deleted file mode 100644
index e40fae8f9a..0000000000
--- a/include/dt-bindings/clock/tegra30-car.h
+++ /dev/null
@@ -1,265 +0,0 @@
-/*
- * This header provides constants for binding nvidia,tegra30-car.
- *
- * The first 130 clocks are numbered to match the bits in the CAR's CLK_OUT_ENB
- * registers. These IDs often match those in the CAR's RST_DEVICES registers,
- * but not in all cases. Some bits in CLK_OUT_ENB affect multiple clocks. In
- * this case, those clocks are assigned IDs above 160 in order to highlight
- * this issue. Implementations that interpret these clock IDs as bit values
- * within the CLK_OUT_ENB or RST_DEVICES registers should be careful to
- * explicitly handle these special cases.
- *
- * The balance of the clocks controlled by the CAR are assigned IDs of 160 and
- * above.
- */
-
-#ifndef _DT_BINDINGS_CLOCK_TEGRA30_CAR_H
-#define _DT_BINDINGS_CLOCK_TEGRA30_CAR_H
-
-#define TEGRA30_CLK_CPU 0
-/* 1 */
-/* 2 */
-/* 3 */
-#define TEGRA30_CLK_RTC 4
-#define TEGRA30_CLK_TIMER 5
-#define TEGRA30_CLK_UARTA 6
-/* 7 (register bit affects uartb and vfir) */
-#define TEGRA30_CLK_GPIO 8
-#define TEGRA30_CLK_SDMMC2 9
-/* 10 (register bit affects spdif_in and spdif_out) */
-#define TEGRA30_CLK_I2S1 11
-#define TEGRA30_CLK_I2C1 12
-#define TEGRA30_CLK_NDFLASH 13
-#define TEGRA30_CLK_SDMMC1 14
-#define TEGRA30_CLK_SDMMC4 15
-/* 16 */
-#define TEGRA30_CLK_PWM 17
-#define TEGRA30_CLK_I2S2 18
-#define TEGRA30_CLK_EPP 19
-/* 20 (register bit affects vi and vi_sensor) */
-#define TEGRA30_CLK_GR2D 21
-#define TEGRA30_CLK_USBD 22
-#define TEGRA30_CLK_ISP 23
-#define TEGRA30_CLK_GR3D 24
-/* 25 */
-#define TEGRA30_CLK_DISP2 26
-#define TEGRA30_CLK_DISP1 27
-#define TEGRA30_CLK_HOST1X 28
-#define TEGRA30_CLK_VCP 29
-#define TEGRA30_CLK_I2S0 30
-#define TEGRA30_CLK_COP_CACHE 31
-
-#define TEGRA30_CLK_MC 32
-#define TEGRA30_CLK_AHBDMA 33
-#define TEGRA30_CLK_APBDMA 34
-/* 35 */
-#define TEGRA30_CLK_KBC 36
-#define TEGRA30_CLK_STATMON 37
-#define TEGRA30_CLK_PMC 38
-/* 39 (register bit affects fuse and fuse_burn) */
-#define TEGRA30_CLK_KFUSE 40
-#define TEGRA30_CLK_SBC1 41
-#define TEGRA30_CLK_NOR 42
-/* 43 */
-#define TEGRA30_CLK_SBC2 44
-/* 45 */
-#define TEGRA30_CLK_SBC3 46
-#define TEGRA30_CLK_I2C5 47
-#define TEGRA30_CLK_DSIA 48
-/* 49 (register bit affects cve and tvo) */
-#define TEGRA30_CLK_MIPI 50
-#define TEGRA30_CLK_HDMI 51
-#define TEGRA30_CLK_CSI 52
-#define TEGRA30_CLK_TVDAC 53
-#define TEGRA30_CLK_I2C2 54
-#define TEGRA30_CLK_UARTC 55
-/* 56 */
-#define TEGRA30_CLK_EMC 57
-#define TEGRA30_CLK_USB2 58
-#define TEGRA30_CLK_USB3 59
-#define TEGRA30_CLK_MPE 60
-#define TEGRA30_CLK_VDE 61
-#define TEGRA30_CLK_BSEA 62
-#define TEGRA30_CLK_BSEV 63
-
-#define TEGRA30_CLK_SPEEDO 64
-#define TEGRA30_CLK_UARTD 65
-#define TEGRA30_CLK_UARTE 66
-#define TEGRA30_CLK_I2C3 67
-#define TEGRA30_CLK_SBC4 68
-#define TEGRA30_CLK_SDMMC3 69
-#define TEGRA30_CLK_PCIE 70
-#define TEGRA30_CLK_OWR 71
-#define TEGRA30_CLK_AFI 72
-#define TEGRA30_CLK_CSITE 73
-#define TEGRA30_CLK_PCIEX 74
-#define TEGRA30_CLK_AVPUCQ 75
-#define TEGRA30_CLK_LA 76
-/* 77 */
-/* 78 */
-#define TEGRA30_CLK_DTV 79
-#define TEGRA30_CLK_NDSPEED 80
-#define TEGRA30_CLK_I2CSLOW 81
-#define TEGRA30_CLK_DSIB 82
-/* 83 */
-#define TEGRA30_CLK_IRAMA 84
-#define TEGRA30_CLK_IRAMB 85
-#define TEGRA30_CLK_IRAMC 86
-#define TEGRA30_CLK_IRAMD 87
-#define TEGRA30_CLK_CRAM2 88
-/* 89 */
-#define TEGRA30_CLK_AUDIO_2X 90 /* a/k/a audio_2x_sync_clk */
-/* 91 */
-#define TEGRA30_CLK_CSUS 92
-#define TEGRA30_CLK_CDEV2 93
-#define TEGRA30_CLK_CDEV1 94
-/* 95 */
-
-#define TEGRA30_CLK_CPU_G 96
-#define TEGRA30_CLK_CPU_LP 97
-#define TEGRA30_CLK_GR3D2 98
-#define TEGRA30_CLK_MSELECT 99
-#define TEGRA30_CLK_TSENSOR 100
-#define TEGRA30_CLK_I2S3 101
-#define TEGRA30_CLK_I2S4 102
-#define TEGRA30_CLK_I2C4 103
-#define TEGRA30_CLK_SBC5 104
-#define TEGRA30_CLK_SBC6 105
-#define TEGRA30_CLK_D_AUDIO 106
-#define TEGRA30_CLK_APBIF 107
-#define TEGRA30_CLK_DAM0 108
-#define TEGRA30_CLK_DAM1 109
-#define TEGRA30_CLK_DAM2 110
-#define TEGRA30_CLK_HDA2CODEC_2X 111
-#define TEGRA30_CLK_ATOMICS 112
-#define TEGRA30_CLK_AUDIO0_2X 113
-#define TEGRA30_CLK_AUDIO1_2X 114
-#define TEGRA30_CLK_AUDIO2_2X 115
-#define TEGRA30_CLK_AUDIO3_2X 116
-#define TEGRA30_CLK_AUDIO4_2X 117
-#define TEGRA30_CLK_SPDIF_2X 118
-#define TEGRA30_CLK_ACTMON 119
-#define TEGRA30_CLK_EXTERN1 120
-#define TEGRA30_CLK_EXTERN2 121
-#define TEGRA30_CLK_EXTERN3 122
-#define TEGRA30_CLK_SATA_OOB 123
-#define TEGRA30_CLK_SATA 124
-#define TEGRA30_CLK_HDA 125
-/* 126 */
-#define TEGRA30_CLK_SE 127
-
-#define TEGRA30_CLK_HDA2HDMI 128
-#define TEGRA30_CLK_SATA_COLD 129
-/* 130 */
-/* 131 */
-/* 132 */
-/* 133 */
-/* 134 */
-/* 135 */
-/* 136 */
-/* 137 */
-/* 138 */
-/* 139 */
-/* 140 */
-/* 141 */
-/* 142 */
-/* 143 */
-/* 144 */
-/* 145 */
-/* 146 */
-/* 147 */
-/* 148 */
-/* 149 */
-/* 150 */
-/* 151 */
-/* 152 */
-/* 153 */
-/* 154 */
-/* 155 */
-/* 156 */
-/* 157 */
-/* 158 */
-/* 159 */
-
-#define TEGRA30_CLK_UARTB 160
-#define TEGRA30_CLK_VFIR 161
-#define TEGRA30_CLK_SPDIF_IN 162
-#define TEGRA30_CLK_SPDIF_OUT 163
-#define TEGRA30_CLK_VI 164
-#define TEGRA30_CLK_VI_SENSOR 165
-#define TEGRA30_CLK_FUSE 166
-#define TEGRA30_CLK_FUSE_BURN 167
-#define TEGRA30_CLK_CVE 168
-#define TEGRA30_CLK_TVO 169
-#define TEGRA30_CLK_CLK_32K 170
-#define TEGRA30_CLK_CLK_M 171
-#define TEGRA30_CLK_CLK_M_DIV2 172
-#define TEGRA30_CLK_CLK_M_DIV4 173
-#define TEGRA30_CLK_PLL_REF 174
-#define TEGRA30_CLK_PLL_C 175
-#define TEGRA30_CLK_PLL_C_OUT1 176
-#define TEGRA30_CLK_PLL_M 177
-#define TEGRA30_CLK_PLL_M_OUT1 178
-#define TEGRA30_CLK_PLL_P 179
-#define TEGRA30_CLK_PLL_P_OUT1 180
-#define TEGRA30_CLK_PLL_P_OUT2 181
-#define TEGRA30_CLK_PLL_P_OUT3 182
-#define TEGRA30_CLK_PLL_P_OUT4 183
-#define TEGRA30_CLK_PLL_A 184
-#define TEGRA30_CLK_PLL_A_OUT0 185
-#define TEGRA30_CLK_PLL_D 186
-#define TEGRA30_CLK_PLL_D_OUT0 187
-#define TEGRA30_CLK_PLL_D2 188
-#define TEGRA30_CLK_PLL_D2_OUT0 189
-#define TEGRA30_CLK_PLL_U 190
-#define TEGRA30_CLK_PLL_X 191
-
-#define TEGRA30_CLK_PLL_X_OUT0 192
-#define TEGRA30_CLK_PLL_E 193
-#define TEGRA30_CLK_SPDIF_IN_SYNC 194
-#define TEGRA30_CLK_I2S0_SYNC 195
-#define TEGRA30_CLK_I2S1_SYNC 196
-#define TEGRA30_CLK_I2S2_SYNC 197
-#define TEGRA30_CLK_I2S3_SYNC 198
-#define TEGRA30_CLK_I2S4_SYNC 199
-#define TEGRA30_CLK_VIMCLK_SYNC 200
-#define TEGRA30_CLK_AUDIO0 201
-#define TEGRA30_CLK_AUDIO1 202
-#define TEGRA30_CLK_AUDIO2 203
-#define TEGRA30_CLK_AUDIO3 204
-#define TEGRA30_CLK_AUDIO4 205
-#define TEGRA30_CLK_SPDIF 206
-#define TEGRA30_CLK_CLK_OUT_1 207 /* (extern1) */
-#define TEGRA30_CLK_CLK_OUT_2 208 /* (extern2) */
-#define TEGRA30_CLK_CLK_OUT_3 209 /* (extern3) */
-#define TEGRA30_CLK_SCLK 210
-#define TEGRA30_CLK_BLINK 211
-#define TEGRA30_CLK_CCLK_G 212
-#define TEGRA30_CLK_CCLK_LP 213
-#define TEGRA30_CLK_TWD 214
-#define TEGRA30_CLK_CML0 215
-#define TEGRA30_CLK_CML1 216
-#define TEGRA30_CLK_HCLK 217
-#define TEGRA30_CLK_PCLK 218
-/* 219 */
-/* 220 */
-/* 221 */
-/* 222 */
-/* 223 */
-
-/* 288 */
-/* 289 */
-/* 290 */
-/* 291 */
-/* 292 */
-/* 293 */
-/* 294 */
-/* 295 */
-/* 296 */
-/* 297 */
-/* 298 */
-/* 299 */
-#define TEGRA30_CLK_CLK_OUT_1_MUX 300
-#define TEGRA30_CLK_CLK_MAX 301
-
-#endif /* _DT_BINDINGS_CLOCK_TEGRA30_CAR_H */
diff --git a/include/dt-bindings/pinctrl/pinctrl-tegra.h b/include/dt-bindings/pinctrl/pinctrl-tegra.h
deleted file mode 100644
index ebafa498be..0000000000
--- a/include/dt-bindings/pinctrl/pinctrl-tegra.h
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * This header provides constants for Tegra pinctrl bindings.
- *
- * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
- *
- * Author: Laxman Dewangan <ldewangan@nvidia.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- */
-
-#ifndef _DT_BINDINGS_PINCTRL_TEGRA_H
-#define _DT_BINDINGS_PINCTRL_TEGRA_H
-
-/*
- * Enable/disable for diffeent dt properties. This is applicable for
- * properties nvidia,enable-input, nvidia,tristate, nvidia,open-drain,
- * nvidia,lock, nvidia,rcv-sel, nvidia,high-speed-mode, nvidia,schmitt.
- */
-#define TEGRA_PIN_DISABLE 0
-#define TEGRA_PIN_ENABLE 1
-
-#define TEGRA_PIN_PULL_NONE 0
-#define TEGRA_PIN_PULL_DOWN 1
-#define TEGRA_PIN_PULL_UP 2
-
-/* Low power mode driver */
-#define TEGRA_PIN_LP_DRIVE_DIV_8 0
-#define TEGRA_PIN_LP_DRIVE_DIV_4 1
-#define TEGRA_PIN_LP_DRIVE_DIV_2 2
-#define TEGRA_PIN_LP_DRIVE_DIV_1 3
-
-/* Rising/Falling slew rate */
-#define TEGRA_PIN_SLEW_RATE_FASTEST 0
-#define TEGRA_PIN_SLEW_RATE_FAST 1
-#define TEGRA_PIN_SLEW_RATE_SLOW 2
-#define TEGRA_PIN_SLEW_RATE_SLOWEST 3
-
-#endif
diff --git a/include/dt-bindings/pinctrl/rockchip.h b/include/dt-bindings/pinctrl/rockchip.h
deleted file mode 100644
index cd5788be82..0000000000
--- a/include/dt-bindings/pinctrl/rockchip.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * Header providing constants for Rockchip pinctrl bindings.
- *
- * Copyright (c) 2013 MundoReader S.L.
- * Author: Heiko Stuebner <heiko@sntech.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef __DT_BINDINGS_ROCKCHIP_PINCTRL_H__
-#define __DT_BINDINGS_ROCKCHIP_PINCTRL_H__
-
-#define RK_GPIO0 0
-#define RK_GPIO1 1
-#define RK_GPIO2 2
-#define RK_GPIO3 3
-#define RK_GPIO4 4
-#define RK_GPIO6 6
-
-#define RK_FUNC_GPIO 0
-#define RK_FUNC_1 1
-#define RK_FUNC_2 2
-
-#endif
diff --git a/include/filetype.h b/include/filetype.h
index ec5aea2635..9986938ddb 100644
--- a/include/filetype.h
+++ b/include/filetype.h
@@ -40,6 +40,7 @@ enum filetype {
filetype_socfpga_xload,
filetype_kwbimage_v1,
filetype_android_sparse,
+ filetype_arm64_linux_image,
filetype_max,
};
diff --git a/include/linux/bitfield.h b/include/linux/bitfield.h
new file mode 100644
index 0000000000..cf2588d811
--- /dev/null
+++ b/include/linux/bitfield.h
@@ -0,0 +1,152 @@
+/*
+ * Copyright (C) 2014 Felix Fietkau <nbd@nbd.name>
+ * Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _LINUX_BITFIELD_H
+#define _LINUX_BITFIELD_H
+
+#include <linux/build_bug.h>
+#include <asm/byteorder.h>
+
+/*
+ * Bitfield access macros
+ *
+ * FIELD_{GET,PREP} macros take as first parameter shifted mask
+ * from which they extract the base mask and shift amount.
+ * Mask must be a compilation time constant.
+ *
+ * Example:
+ *
+ * #define REG_FIELD_A GENMASK(6, 0)
+ * #define REG_FIELD_B BIT(7)
+ * #define REG_FIELD_C GENMASK(15, 8)
+ * #define REG_FIELD_D GENMASK(31, 16)
+ *
+ * Get:
+ * a = FIELD_GET(REG_FIELD_A, reg);
+ * b = FIELD_GET(REG_FIELD_B, reg);
+ *
+ * Set:
+ * reg = FIELD_PREP(REG_FIELD_A, 1) |
+ * FIELD_PREP(REG_FIELD_B, 0) |
+ * FIELD_PREP(REG_FIELD_C, c) |
+ * FIELD_PREP(REG_FIELD_D, 0x40);
+ *
+ * Modify:
+ * reg &= ~REG_FIELD_C;
+ * reg |= FIELD_PREP(REG_FIELD_C, c);
+ */
+
+#define __bf_shf(x) (__builtin_ffsll(x) - 1)
+
+#define __BF_FIELD_CHECK(_mask, _reg, _val, _pfx) \
+ ({ \
+ BUILD_BUG_ON_MSG(!__builtin_constant_p(_mask), \
+ _pfx "mask is not constant"); \
+ BUILD_BUG_ON_MSG(!(_mask), _pfx "mask is zero"); \
+ BUILD_BUG_ON_MSG(__builtin_constant_p(_val) ? \
+ ~((_mask) >> __bf_shf(_mask)) & (_val) : 0, \
+ _pfx "value too large for the field"); \
+ BUILD_BUG_ON_MSG((_mask) > (typeof(_reg))~0ull, \
+ _pfx "type of reg too small for mask"); \
+ __BUILD_BUG_ON_NOT_POWER_OF_2((_mask) + \
+ (1ULL << __bf_shf(_mask))); \
+ })
+
+/**
+ * FIELD_FIT() - check if value fits in the field
+ * @_mask: shifted mask defining the field's length and position
+ * @_val: value to test against the field
+ *
+ * Return: true if @_val can fit inside @_mask, false if @_val is too big.
+ */
+#define FIELD_FIT(_mask, _val) \
+ ({ \
+ __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_FIT: "); \
+ !((((typeof(_mask))_val) << __bf_shf(_mask)) & ~(_mask)); \
+ })
+
+/**
+ * FIELD_PREP() - prepare a bitfield element
+ * @_mask: shifted mask defining the field's length and position
+ * @_val: value to put in the field
+ *
+ * FIELD_PREP() masks and shifts up the value. The result should
+ * be combined with other fields of the bitfield using logical OR.
+ */
+#define FIELD_PREP(_mask, _val) \
+ ({ \
+ __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_PREP: "); \
+ ((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask); \
+ })
+
+/**
+ * FIELD_GET() - extract a bitfield element
+ * @_mask: shifted mask defining the field's length and position
+ * @_reg: value of entire bitfield
+ *
+ * FIELD_GET() extracts the field specified by @_mask from the
+ * bitfield passed in as @_reg by masking and shifting it down.
+ */
+#define FIELD_GET(_mask, _reg) \
+ ({ \
+ __BF_FIELD_CHECK(_mask, _reg, 0U, "FIELD_GET: "); \
+ (typeof(_mask))(((_reg) & (_mask)) >> __bf_shf(_mask)); \
+ })
+
+extern void __compiletime_warning("value doesn't fit into mask")
+__field_overflow(void);
+extern void __compiletime_error("bad bitfield mask")
+__bad_mask(void);
+static __always_inline u64 field_multiplier(u64 field)
+{
+ if ((field | (field - 1)) & ((field | (field - 1)) + 1))
+ __bad_mask();
+ return field & -field;
+}
+static __always_inline u64 field_mask(u64 field)
+{
+ return field / field_multiplier(field);
+}
+#define ____MAKE_OP(type,base,to,from) \
+static __always_inline __##type type##_encode_bits(base v, base field) \
+{ \
+ if (__builtin_constant_p(v) && (v & ~field_multiplier(field))) \
+ __field_overflow(); \
+ return to((v & field_mask(field)) * field_multiplier(field)); \
+} \
+static __always_inline __##type type##_replace_bits(__##type old, \
+ base val, base field) \
+{ \
+ return (old & ~to(field)) | type##_encode_bits(val, field); \
+} \
+static __always_inline void type##p_replace_bits(__##type *p, \
+ base val, base field) \
+{ \
+ *p = (*p & ~to(field)) | type##_encode_bits(val, field); \
+} \
+static __always_inline base type##_get_bits(__##type v, base field) \
+{ \
+ return (from(v) & field)/field_multiplier(field); \
+}
+#define __MAKE_OP(size) \
+ ____MAKE_OP(le##size,u##size,cpu_to_le##size,le##size##_to_cpu) \
+ ____MAKE_OP(be##size,u##size,cpu_to_be##size,be##size##_to_cpu) \
+ ____MAKE_OP(u##size,u##size,,)
+__MAKE_OP(16)
+__MAKE_OP(32)
+__MAKE_OP(64)
+#undef __MAKE_OP
+#undef ____MAKE_OP
+
+#endif
diff --git a/include/linux/bug.h b/include/linux/bug.h
index 7295618c98..8367a11ec2 100644
--- a/include/linux/bug.h
+++ b/include/linux/bug.h
@@ -2,29 +2,6 @@
#define _LINUX_BUG_H
#include <asm-generic/bug.h>
-
-#ifdef __CHECKER__
-#define BUILD_BUG_ON_NOT_POWER_OF_2(n) (0)
-#define BUILD_BUG_ON_ZERO(e) (0)
-#define BUILD_BUG_ON_NULL(e) ((void*)0)
-#define BUILD_BUG_ON(condition) (0)
-#else /* __CHECKER__ */
-
-/* Force a compilation error if a constant expression is not a power of 2 */
-#define BUILD_BUG_ON_NOT_POWER_OF_2(n) \
- BUILD_BUG_ON((n) == 0 || (((n) & ((n) - 1)) != 0))
-
-/* Force a compilation error if condition is true, but also produce a
- result (of value 0 and type size_t), so the expression can be used
- e.g. in a structure initializer (or where-ever else comma expressions
- aren't permitted). */
-#define BUILD_BUG_ON_ZERO(e) (sizeof(struct { int:-!!(e); }))
-#define BUILD_BUG_ON_NULL(e) ((void *)sizeof(struct { int:-!!(e); }))
-
-/* Force a compilation error if condition is true */
-#define BUILD_BUG_ON(condition) ((void)BUILD_BUG_ON_ZERO(condition))
-
-#endif
-
+#include <linux/build_bug.h>
#endif /* _LINUX_BUG_H */
diff --git a/include/linux/build_bug.h b/include/linux/build_bug.h
new file mode 100644
index 0000000000..43d1fd50d4
--- /dev/null
+++ b/include/linux/build_bug.h
@@ -0,0 +1,83 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef _LINUX_BUILD_BUG_H
+#define _LINUX_BUILD_BUG_H
+
+#include <linux/compiler.h>
+
+#ifdef __CHECKER__
+#define __BUILD_BUG_ON_NOT_POWER_OF_2(n) (0)
+#define BUILD_BUG_ON_NOT_POWER_OF_2(n) (0)
+#define BUILD_BUG_ON_ZERO(e) (0)
+#define BUILD_BUG_ON_INVALID(e) (0)
+#define BUILD_BUG_ON_MSG(cond, msg) (0)
+#define BUILD_BUG_ON(condition) (0)
+#define BUILD_BUG() (0)
+#else /* __CHECKER__ */
+
+/* Force a compilation error if a constant expression is not a power of 2 */
+#define __BUILD_BUG_ON_NOT_POWER_OF_2(n) \
+ BUILD_BUG_ON(((n) & ((n) - 1)) != 0)
+#define BUILD_BUG_ON_NOT_POWER_OF_2(n) \
+ BUILD_BUG_ON((n) == 0 || (((n) & ((n) - 1)) != 0))
+
+/*
+ * Force a compilation error if condition is true, but also produce a
+ * result (of value 0 and type size_t), so the expression can be used
+ * e.g. in a structure initializer (or where-ever else comma expressions
+ * aren't permitted).
+ */
+#define BUILD_BUG_ON_ZERO(e) (sizeof(struct { int:(-!!(e)); }))
+
+/*
+ * BUILD_BUG_ON_INVALID() permits the compiler to check the validity of the
+ * expression but avoids the generation of any code, even if that expression
+ * has side-effects.
+ */
+#define BUILD_BUG_ON_INVALID(e) ((void)(sizeof((__force long)(e))))
+
+/**
+ * BUILD_BUG_ON_MSG - break compile if a condition is true & emit supplied
+ * error message.
+ * @condition: the condition which the compiler should know is false.
+ *
+ * See BUILD_BUG_ON for description.
+ */
+#define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg)
+
+/**
+ * BUILD_BUG_ON - break compile if a condition is true.
+ * @condition: the condition which the compiler should know is false.
+ *
+ * If you have some code which relies on certain constants being equal, or
+ * some other compile-time-evaluated condition, you should use BUILD_BUG_ON to
+ * detect if someone changes it.
+ *
+ * The implementation uses gcc's reluctance to create a negative array, but gcc
+ * (as of 4.4) only emits that error for obvious cases (e.g. not arguments to
+ * inline functions). Luckily, in 4.3 they added the "error" function
+ * attribute just for this type of case. Thus, we use a negative sized array
+ * (should always create an error on gcc versions older than 4.4) and then call
+ * an undefined function with the error attribute (should always create an
+ * error on gcc 4.3 and later). If for some reason, neither creates a
+ * compile-time error, we'll still have a link-time error, which is harder to
+ * track down.
+ */
+#ifndef __OPTIMIZE__
+#define BUILD_BUG_ON(condition) ((void)sizeof(char[1 - 2*!!(condition)]))
+#else
+#define BUILD_BUG_ON(condition) \
+ BUILD_BUG_ON_MSG(condition, "BUILD_BUG_ON failed: " #condition)
+#endif
+
+/**
+ * BUILD_BUG - break compile if used.
+ *
+ * If you have some code that you expect the compiler to eliminate at
+ * build time, you should use BUILD_BUG to detect if it is
+ * unexpectedly used.
+ */
+#define BUILD_BUG() BUILD_BUG_ON_MSG(1, "BUILD_BUG failed")
+
+#endif /* __CHECKER__ */
+
+#endif /* _LINUX_BUILD_BUG_H */
diff --git a/include/linux/clk.h b/include/linux/clk.h
index 081a859729..c6465b1c90 100644
--- a/include/linux/clk.h
+++ b/include/linux/clk.h
@@ -323,6 +323,7 @@ struct clk *clk_register_composite(const char *name,
struct device_node;
struct of_phandle_args;
+struct of_device_id;
#if defined(CONFIG_COMMON_CLK_OF_PROVIDER)
diff --git a/include/linux/crc-ccitt.h b/include/linux/crc-ccitt.h
new file mode 100644
index 0000000000..72c92c396b
--- /dev/null
+++ b/include/linux/crc-ccitt.h
@@ -0,0 +1,23 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef _LINUX_CRC_CCITT_H
+#define _LINUX_CRC_CCITT_H
+
+#include <linux/types.h>
+
+extern u16 const crc_ccitt_table[256];
+extern u16 const crc_ccitt_false_table[256];
+
+extern u16 crc_ccitt(u16 crc, const u8 *buffer, size_t len);
+extern u16 crc_ccitt_false(u16 crc, const u8 *buffer, size_t len);
+
+static inline u16 crc_ccitt_byte(u16 crc, const u8 c)
+{
+ return (crc >> 8) ^ crc_ccitt_table[(crc ^ c) & 0xff];
+}
+
+static inline u16 crc_ccitt_false_byte(u16 crc, const u8 c)
+{
+ return (crc << 8) ^ crc_ccitt_false_table[(crc >> 8) ^ c];
+}
+
+#endif /* _LINUX_CRC_CCITT_H */
diff --git a/include/linux/fs.h b/include/linux/fs.h
index c1a5802eea..153c464470 100644
--- a/include/linux/fs.h
+++ b/include/linux/fs.h
@@ -252,6 +252,11 @@ struct file {
#endif
};
+struct super_operations {
+ struct inode *(*alloc_inode)(struct super_block *sb);
+ void (*destroy_inode)(struct inode *);
+};
+
/*
* Inode flags - they have no relation to superblock flags now
*/
diff --git a/include/linux/mfd/rave-sp.h b/include/linux/mfd/rave-sp.h
new file mode 100644
index 0000000000..e0d97a55d9
--- /dev/null
+++ b/include/linux/mfd/rave-sp.h
@@ -0,0 +1,78 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+/*
+ * Core definitions for RAVE SP MFD driver.
+ *
+ * Copyright (C) 2017 Zodiac Inflight Innovations
+ */
+
+#ifndef _LINUX_RAVE_SP_H_
+#define _LINUX_RAVE_SP_H_
+
+/* #include <linux/notifier.h> */
+
+enum rave_sp_command {
+ RAVE_SP_CMD_GET_FIRMWARE_VERSION = 0x20,
+ RAVE_SP_CMD_GET_BOOTLOADER_VERSION = 0x21,
+ RAVE_SP_CMD_BOOT_SOURCE = 0x26,
+ RAVE_SP_CMD_GET_BOARD_COPPER_REV = 0x2B,
+ RAVE_SP_CMD_GET_GPIO_STATE = 0x2F,
+
+ RAVE_SP_CMD_STATUS = 0xA0,
+ RAVE_SP_CMD_SW_WDT = 0xA1,
+ RAVE_SP_CMD_PET_WDT = 0xA2,
+ RAVE_SP_CMD_SET_BACKLIGHT = 0xA6,
+ RAVE_SP_CMD_RESET = 0xA7,
+ RAVE_SP_CMD_RESET_REASON = 0xA8,
+
+ RAVE_SP_CMD_JUMP_TO_BOOTLOADER = 0xB0,
+ RAVE_SP_CMD_BOOTLOADER = 0xB1,
+ RAVE_SP_CMD_REQ_COPPER_REV = 0xB6,
+ RAVE_SP_CMD_GET_I2C_DEVICE_STATUS = 0xBA,
+ RAVE_SP_CMD_GET_SP_SILICON_REV = 0xB9,
+ RAVE_SP_CMD_CONTROL_EVENTS = 0xBB,
+
+ RAVE_SP_EVNT_BASE = 0xE0,
+};
+
+enum rave_sp_bootloader_command {
+ RAVE_SP_BOOTLOADER_CMD_QUERY_DEVICE = 0xA1,
+ RAVE_SP_BOOTLOADER_CMD_ERASE_APP = 0xA3,
+ RAVE_SP_BOOTLOADER_CMD_PROGRAM_DEVICE = 0xA4,
+ RAVE_SP_BOOTLOADER_CMD_PROGRAM_COMPLETE = 0xA5,
+ RAVE_SP_BOOTLOADER_CMD_READ_APP = 0xA6,
+ RAVE_SP_BOOTLOADER_CMD_RESET_DEVICE = 0xA7,
+ RAVE_SP_BOOTLOADER_CMD_LAUNCH_APP = 0xA8,
+};
+
+struct rave_sp;
+
+static inline unsigned long rave_sp_action_pack(u8 event, u8 value)
+{
+ return ((unsigned long)value << 8) | event;
+}
+
+static inline u8 rave_sp_action_unpack_event(unsigned long action)
+{
+ return action;
+}
+
+static inline u8 rave_sp_action_unpack_value(unsigned long action)
+{
+ return action >> 8;
+}
+
+int rave_sp_exec(struct rave_sp *sp,
+ void *__data, size_t data_size,
+ void *reply_data, size_t reply_data_size);
+
+struct device;
+/* int devm_rave_sp_register_event_notifier(struct device *dev, */
+/* struct notifier_block *nb); */
+
+bool rave_sp_is_in_bootloader_mode(struct rave_sp *sp);
+const struct firmware *rave_sp_get_firmware(struct rave_sp *sp);
+void rave_sp_release_firmware(struct rave_sp *sp);
+void rave_sp_set_update_fw_status(struct rave_sp *sp, int status);
+
+#endif /* _LINUX_RAVE_SP_H_ */
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 88a8fe9756..ec2237f7c9 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -560,6 +560,7 @@ struct nand_chip {
#define NAND_MFR_AMD 0x01
#define NAND_MFR_MACRONIX 0xc2
#define NAND_MFR_EON 0x92
+#define NAND_MFR_WINBOND 0xef
/* The maximum expected count of bytes in the NAND ID sequence */
#define NAND_MAX_ID_LEN 8
diff --git a/include/memory.h b/include/memory.h
index 165d2dc52a..73ee7661ef 100644
--- a/include/memory.h
+++ b/include/memory.h
@@ -27,4 +27,17 @@ struct resource *request_sdram_region(const char *name, resource_size_t start,
resource_size_t size);
int release_sdram_region(struct resource *res);
+void memory_bank_find_space(struct memory_bank *bank, resource_size_t *retstart,
+ resource_size_t *retend);
+int memory_bank_first_find_space(resource_size_t *retstart,
+ resource_size_t *retend);
+
+static inline u64 memory_sdram_size(unsigned int cols,
+ unsigned int rows,
+ unsigned int banks,
+ unsigned int width)
+{
+ return (u64)banks * width << (rows + cols);
+}
+
#endif
diff --git a/include/mfd/mc13xxx.h b/include/mfd/mc13xxx.h
index d351c473f4..b38918084d 100644
--- a/include/mfd/mc13xxx.h
+++ b/include/mfd/mc13xxx.h
@@ -16,6 +16,10 @@
#define MC13XXX_REG_IDENTIFICATION 0x07
+#define MC13783_TYPE 1
+#define MC13892_TYPE 2
+#define MC34708_TYPE 3
+
#define MC13783_REG_INT_STATUS0 0x00
#define MC13783_REG_INT_MASK0 0x01
#define MC13783_REG_INT_SENSE0 0x02
@@ -168,6 +172,7 @@ struct mc13xxx;
#ifdef CONFIG_MFD_MC13XXX
extern struct mc13xxx *mc13xxx_get(void);
+extern int mc13xxx_type(struct mc13xxx *mc13xxx);
extern int mc13xxx_revision(struct mc13xxx *mc13xxx);
extern int mc13xxx_reg_read(struct mc13xxx *mc13xxx, u8 reg, u32 *val);
extern int mc13xxx_reg_write(struct mc13xxx *mc13xxx, u8 reg, u32 val);
@@ -179,6 +184,11 @@ static inline struct mc13xxx *mc13xxx_get(void)
return NULL;
}
+static inline int mc13xxx_type(struct mc13xxx *mc13xxx)
+{
+ return -ENODEV;
+}
+
static inline int mc13xxx_revision(struct mc13xxx *mc13xxx)
{
return -ENODEV;
@@ -205,4 +215,13 @@ static inline int mc13xxx_register_init_callback(void(*callback)(struct mc13xxx
}
#endif
+#ifdef CONFIG_MC13XXX_ADC
+int mc13xxx_adc_probe(struct device_d *dev, struct mc13xxx *mc_dev);
+#else
+static inline int mc13xxx_adc_probe(struct device_d *dev, struct mc13xxx *mc_dev)
+{
+ return 0;
+}
+#endif
+
#endif /* __MFD_MC13XXX_H */
diff --git a/include/mfd/twl-core.h b/include/mfd/twl-core.h
index f090032b3f..88d29f019b 100644
--- a/include/mfd/twl-core.h
+++ b/include/mfd/twl-core.h
@@ -21,7 +21,7 @@ struct twlcore {
struct i2c_client *client;
};
-extern struct file_operations twl_fops;
+extern struct cdev_operations twl_fops;
extern int twlcore_reg_read(struct twlcore *twlcore, u16 reg, u8 *val);
extern int twlcore_reg_write(struct twlcore *twlcore, u16 reg, u8 val);
diff --git a/include/reset_source.h b/include/reset_source.h
index 3ff06b70ad..86e415abcf 100644
--- a/include/reset_source.h
+++ b/include/reset_source.h
@@ -27,22 +27,39 @@ enum reset_src_type {
#ifdef CONFIG_RESET_SOURCE
void reset_source_set_priority(enum reset_src_type, unsigned int priority);
enum reset_src_type reset_source_get(void);
+void reset_source_set_instance(enum reset_src_type type, int instance);
+int reset_source_get_instance(void);
unsigned int of_get_reset_source_priority(struct device_node *node);
+const char *reset_source_name(void);
#else
static inline void reset_source_set_priority(enum reset_src_type type,
unsigned int priority)
{
}
+static inline void reset_source_set_instance(enum reset_src_type type, int instance)
+{
+}
+
static inline enum reset_src_type reset_source_get(void)
{
return RESET_UKWN;
}
+static inline int reset_source_get_instance(void)
+{
+ return 0;
+}
+
static inline unsigned int of_get_reset_source_priority(struct device_node *node)
{
return 0;
}
+
+static inline const char *reset_source_name(void)
+{
+ return "unknown";
+}
#endif
#define RESET_SOURCE_DEFAULT_PRIORITY 100
diff --git a/include/serial/lpuart.h b/include/serial/lpuart.h
index 917f644a59..a920291dec 100644
--- a/include/serial/lpuart.h
+++ b/include/serial/lpuart.h
@@ -238,22 +238,17 @@ static inline void lpuart_setbrg(void __iomem *base,
writeb(bfra, base + UARTCR4);
}
-static inline void lpuart_setup_with_fifo(void __iomem *base,
- unsigned int refclock,
- unsigned int twfifo)
+static inline void lpuart_setup(void __iomem *base,
+ unsigned int refclock)
{
/* Disable UART */
writeb(0, base + UARTCR2);
writeb(0, base + UARTMODEM);
writeb(0, base + UARTCR1);
- if (twfifo) {
- writeb(UARTPFIFO_TXFE | UARTPFIFO_RXFE, base + UARTPFIFO);
- writeb((u8)twfifo, base + UARTTWFIFO);
- } else {
- writeb(0, base + UARTPFIFO);
- writeb(0, base + UARTTWFIFO);
- }
+ writeb(0, base + UARTPFIFO);
+ writeb(0, base + UARTTWFIFO);
+
writeb(1, base + UARTRWFIFO);
writeb(UARTCFIFO_RXFLUSH | UARTCFIFO_TXFLUSH, base + UARTCFIFO);
@@ -262,12 +257,6 @@ static inline void lpuart_setup_with_fifo(void __iomem *base,
writeb(UARTCR2_TE | UARTCR2_RE, base + UARTCR2);
}
-static inline void lpuart_setup(void __iomem *base,
- unsigned int refclock)
-{
- lpuart_setup_with_fifo(base, refclock, 0x00);
-}
-
static inline void lpuart_putc(void __iomem *base, int c)
{
if (!(readb(base + UARTCR2) & UARTCR2_TE))
diff --git a/include/watchdog.h b/include/watchdog.h
index 3e8a487a4d..0db4263a31 100644
--- a/include/watchdog.h
+++ b/include/watchdog.h
@@ -13,11 +13,18 @@
#ifndef INCLUDE_WATCHDOG_H
# define INCLUDE_WATCHDOG_H
+#include <poller.h>
+
struct watchdog {
int (*set_timeout)(struct watchdog *, unsigned);
const char *name;
- struct device_d *dev;
+ struct device_d *hwdev;
+ struct device_d dev;
unsigned int priority;
+ unsigned int timeout_max;
+ unsigned int timeout_cur;
+ unsigned int poller_enable;
+ struct poller_async poller;
struct list_head list;
};
generated by cgit v1.2.3 (git 2.39.1) at 2024-05-20 12:28:47 +0000