diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/common.h | 13 | ||||
| -rw-r--r-- | include/gpio.h | 1 | ||||
| -rw-r--r-- | include/hwspinlock.h | 31 | ||||
| -rw-r--r-- | include/linux/clk.h | 10 | ||||
| -rw-r--r-- | include/linux/nvmem-consumer.h | 2 | ||||
| -rw-r--r-- | include/linux/pstore.h | 6 | ||||
| -rw-r--r-- | include/mfd/syscon.h | 9 | ||||
| -rw-r--r-- | include/of_device.h | 4 | ||||
| -rw-r--r-- | include/reset_source.h | 1 | ||||
| -rw-r--r-- | include/soc/stm32/gpio.h | 120 |
10 files changed, 191 insertions, 6 deletions
diff --git a/include/common.h b/include/common.h index b1294978d7..8cc8e14fb7 100644 --- a/include/common.h +++ b/include/common.h @@ -93,6 +93,16 @@ unsigned long long strtoull_suffix(const char *str, char **endp, int base); */ extern int (*barebox_main)(void); +enum autoboot_state { + AUTOBOOT_UNKNOWN, + AUTOBOOT_ABORT, + AUTOBOOT_MENU, + AUTOBOOT_BOOT, +}; + +void set_autoboot_state(enum autoboot_state autoboot); +enum autoboot_state do_autoboot_countdown(void); + void __noreturn start_barebox(void); void shutdown_barebox(void); @@ -117,7 +127,8 @@ void shutdown_barebox(void); int mem_parse_options(int argc, char *argv[], char *optstr, int *mode, char **sourcefile, char **destfile, int *swab); int memcpy_parse_options(int argc, char *argv[], int *sourcefd, - int *destfd, loff_t *count); + int *destfd, loff_t *count, + int rwsize, int destmode); #define RW_BUF_SIZE (unsigned)4096 extern const char version_string[]; diff --git a/include/gpio.h b/include/gpio.h index 38d6ba2df9..e822fd5347 100644 --- a/include/gpio.h +++ b/include/gpio.h @@ -153,5 +153,6 @@ int gpiochip_add(struct gpio_chip *chip); void gpiochip_remove(struct gpio_chip *chip); int gpio_get_num(struct device_d *dev, int gpio); +struct gpio_chip *gpio_get_chip(int gpio); #endif /* __GPIO_H */ diff --git a/include/hwspinlock.h b/include/hwspinlock.h new file mode 100644 index 0000000000..ba21c6d296 --- /dev/null +++ b/include/hwspinlock.h @@ -0,0 +1,31 @@ +/* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */ +/* + * Copyright (C) 2018, STMicroelectronics - All Rights Reserved + */ + +#ifndef __HWSPINLOCK_H +#define __HWSPINLOCK_H + +struct hwspinlock { /* TODO to be implemented */ }; + +static inline int hwspinlock_get_by_index(struct device_d *dev, + int index, + struct hwspinlock *hws) +{ + return -ENOSYS; +} + +static inline int hwspinlock_lock_timeout(struct hwspinlock *hws, + int timeout_ms) +{ + return -ENOSYS; +} + +static inline int hwspinlock_unlock(struct hwspinlock *hws) +{ + return -ENOSYS; +} + +struct hwspinlock_ops { /* TODO to be implemented */ }; + +#endif /* __HWSPINLOCK_H */ diff --git a/include/linux/clk.h b/include/linux/clk.h index b9c5e0ab04..c3aeea80dd 100644 --- a/include/linux/clk.h +++ b/include/linux/clk.h @@ -340,6 +340,8 @@ struct clk_divider { int table_size; }; +#define clk_div_mask(width) ((1 << (width)) - 1) + #define CLK_DIVIDER_POWER_OF_TWO (1 << 1) #define CLK_DIVIDER_HIWORD_MASK (1 << 3) #define CLK_DIVIDER_READ_ONLY (1 << 5) @@ -354,6 +356,14 @@ unsigned long divider_recalc_rate(struct clk *clk, unsigned long parent_rate, const struct clk_div_table *table, unsigned long flags, unsigned long width); +long divider_round_rate(struct clk *clk, unsigned long rate, + unsigned long *prate, const struct clk_div_table *table, + u8 width, unsigned long flags); + +int divider_get_val(unsigned long rate, unsigned long parent_rate, + const struct clk_div_table *table, u8 width, + unsigned long flags); + struct clk *clk_divider_alloc(const char *name, const char *parent, unsigned clk_flags, void __iomem *reg, u8 shift, u8 width, unsigned div_flags); diff --git a/include/linux/nvmem-consumer.h b/include/linux/nvmem-consumer.h index 32ea46e3bf..9e0fd4265e 100644 --- a/include/linux/nvmem-consumer.h +++ b/include/linux/nvmem-consumer.h @@ -103,6 +103,6 @@ static inline struct nvmem_device *of_nvmem_device_get(struct device_node *np, { return ERR_PTR(-ENOSYS); } -#endif /* CONFIG_NVMEM && CONFIG_OF */ +#endif /* CONFIG_NVMEM && CONFIG_OFTREE */ #endif /* ifndef _LINUX_NVMEM_CONSUMER_H */ diff --git a/include/linux/pstore.h b/include/linux/pstore.h index 15e1e3d6fa..f598f31a54 100644 --- a/include/linux/pstore.h +++ b/include/linux/pstore.h @@ -64,8 +64,6 @@ struct pstore_record { struct pstore_info { struct module *owner; char *name; - char *buf; - size_t bufsize; int flags; int (*open)(struct pstore_info *psi); int (*close)(struct pstore_info *psi); @@ -85,6 +83,7 @@ struct pstore_info { #ifdef CONFIG_FS_PSTORE extern int pstore_register(struct pstore_info *); extern bool pstore_cannot_block_path(enum kmsg_dump_reason reason); +extern void pstore_log(const char *msg); #else static inline int pstore_register(struct pstore_info *psi) @@ -96,6 +95,9 @@ pstore_cannot_block_path(enum kmsg_dump_reason reason) { return false; } +static inline void pstore_log(const char *msg) +{ +} #endif #endif /*_LINUX_PSTORE_H*/ diff --git a/include/mfd/syscon.h b/include/mfd/syscon.h index 902f9fa2f3..ac33f2d347 100644 --- a/include/mfd/syscon.h +++ b/include/mfd/syscon.h @@ -22,6 +22,9 @@ void __iomem *syscon_base_lookup_by_phandle (struct device_node *np, const char *property); struct regmap *syscon_node_to_regmap(struct device_node *np); struct regmap *syscon_regmap_lookup_by_compatible(const char *s); +extern struct regmap *syscon_regmap_lookup_by_phandle( + struct device_node *np, + const char *property); #else static inline void __iomem *syscon_base_lookup_by_pdevname(const char *s) { @@ -42,6 +45,12 @@ static inline struct regmap *syscon_regmap_lookup_by_compatible(const char *s) { return ERR_PTR(-ENOSYS); } +static inline struct regmap *syscon_regmap_lookup_by_phandle( + struct device_node *np, + const char *property) +{ + return ERR_PTR(-ENOSYS); +} #endif #endif diff --git a/include/of_device.h b/include/of_device.h index 44c1c0f545..54410ad12f 100644 --- a/include/of_device.h +++ b/include/of_device.h @@ -22,7 +22,7 @@ static inline int of_driver_match_device(struct device_d *dev, extern const void *of_device_get_match_data(const struct device_d *dev); -#else /* CONFIG_OF */ +#else /* CONFIG_OFTREE */ static inline int of_driver_match_device(struct device_d *dev, const struct device_d *drv) @@ -43,6 +43,6 @@ static inline const struct of_device_id *__of_match_device( #define of_match_device(matches, dev) \ __of_match_device(matches, (dev)) -#endif /* CONFIG_OF */ +#endif /* CONFIG_OFTREE */ #endif /* _LINUX_OF_DEVICE_H */ diff --git a/include/reset_source.h b/include/reset_source.h index 86e415abcf..13bc3bcfde 100644 --- a/include/reset_source.h +++ b/include/reset_source.h @@ -22,6 +22,7 @@ enum reset_src_type { RESET_JTAG, /* JTAG reset */ RESET_THERM, /* SoC shut down because of overtemperature */ RESET_EXT, /* External reset through device pin */ + RESET_BROWNOUT, /* Brownout Reset */ }; #ifdef CONFIG_RESET_SOURCE diff --git a/include/soc/stm32/gpio.h b/include/soc/stm32/gpio.h new file mode 100644 index 0000000000..13b492a693 --- /dev/null +++ b/include/soc/stm32/gpio.h @@ -0,0 +1,120 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2015 Maxime Coquelin + * Copyright (C) 2017 STMicroelectronics + * Copyright (C) 2019 Ahmad Fatoum, Pengutronix + */ + +#ifndef __STM32_GPIO_H__ +#define __STM32_GPIO_H__ + +#include <io.h> + +#define STM32_GPIO_MODER 0x00 +#define STM32_GPIO_TYPER 0x04 +#define STM32_GPIO_SPEEDR 0x08 +#define STM32_GPIO_PUPDR 0x0c +#define STM32_GPIO_IDR 0x10 +#define STM32_GPIO_ODR 0x14 +#define STM32_GPIO_BSRR 0x18 +#define STM32_GPIO_LCKR 0x1c +#define STM32_GPIO_AFRL 0x20 +#define STM32_GPIO_AFRH 0x24 + +#define STM32_PIN_GPIO 0 +#define STM32_PIN_AF(x) ((x) + 1) +#define STM32_PIN_ANALOG (STM32_PIN_AF(15) + 1) + +#define STM32_GPIO_PINS_PER_BANK 16 + +enum stm32_pin_bias { STM32_PIN_NO_BIAS, STM32_PIN_PULL_UP, STM32_PIN_PULL_DOWN }; +enum stm32_pin_out_type { STM32_PIN_OUT_PUSHPULL, STM32_PIN_OUT_OPENDRAIN }; + +static inline void __stm32_pmx_set_speed(void __iomem *base, + unsigned offset, u32 speed) +{ + u32 val = readl(base + STM32_GPIO_SPEEDR); + val &= ~GENMASK(offset * 2 + 1, offset * 2); + val |= speed << (offset * 2); + writel(val, base + STM32_GPIO_SPEEDR); +} + +static inline void __stm32_pmx_set_bias(void __iomem *base, unsigned offset, + enum stm32_pin_bias bias) +{ + u32 val = readl(base + STM32_GPIO_PUPDR); + val &= ~GENMASK(offset * 2 + 1, offset * 2); + val |= bias << (offset * 2); + writel(val, base + STM32_GPIO_PUPDR); +} + +static inline void __stm32_pmx_set_mode(void __iomem *base, + int pin, u32 mode, u32 alt) +{ + u32 val; + int alt_shift = (pin % 8) * 4; + int alt_offset = STM32_GPIO_AFRL + (pin / 8) * 4; + + val = readl(base + alt_offset); + val &= ~GENMASK(alt_shift + 3, alt_shift); + val |= (alt << alt_shift); + writel(val, base + alt_offset); + + val = readl(base + STM32_GPIO_MODER); + val &= ~GENMASK(pin * 2 + 1, pin * 2); + val |= mode << (pin * 2); + writel(val, base + STM32_GPIO_MODER); +} + +static inline void __stm32_pmx_get_mode(void __iomem *base, int pin, + u32 *mode, u32 *alt) +{ + u32 val; + int alt_shift = (pin % 8) * 4; + int alt_offset = STM32_GPIO_AFRL + (pin / 8) * 4; + + val = readl(base + alt_offset); + val &= GENMASK(alt_shift + 3, alt_shift); + *alt = val >> alt_shift; + + val = readl(base + STM32_GPIO_MODER); + val &= GENMASK(pin * 2 + 1, pin * 2); + *mode = val >> (pin * 2); +} + +static inline int __stm32_pmx_gpio_get(void __iomem *base, unsigned offset) +{ + return !!(readl(base + STM32_GPIO_IDR) & BIT(offset)); +} + +static inline void __stm32_pmx_gpio_set(void __iomem *base, unsigned offset, + unsigned value) +{ + if (!value) + offset += STM32_GPIO_PINS_PER_BANK; + + writel(BIT(offset), base + STM32_GPIO_BSRR); +} + +static inline void __stm32_pmx_gpio_input(void __iomem *base, unsigned offset) +{ + __stm32_pmx_set_mode(base, offset, 0, 0); +} + +static inline void __stm32_pmx_gpio_output(void __iomem *base, unsigned offset, + unsigned value) +{ + __stm32_pmx_gpio_set(base, offset, value); + __stm32_pmx_set_mode(base, offset, 1, 0); +} + +static inline void __stm32_pmx_set_output_type(void __iomem *base, unsigned offset, + enum stm32_pin_out_type type) +{ + u32 val = readl(base + STM32_GPIO_TYPER); + val &= ~BIT(offset); + val |= type << offset; + writel(val, base + STM32_GPIO_TYPER); +} + +#endif /* __STM32_GPIO_H__ */ |