| Commit message (Collapse) | Author | Age | Files | Lines |
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So far, we only supported finding compatible configurations that have
a compatible property inside the configuration's device tree node.
According to spec, this is optional however, and e.g. Yocto's
kernel-fitimage.bbclass don't generate it.
Instead, the bootloader is expected to lookup the compatible inside the
referenced FDT. With fdt_machine_is_compatible, this is much less of a
performance hit than with of_machine_is_compatible, so let's implement
support for this.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20240301130445.171385-5-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Now that we have an fdt_machine_is_compatible that can operate on
flattened device trees, use it to speed up the process of finding
compatible bootloader spec entries.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20240301130445.171385-4-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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When finding compatible bootloader spec files, barebox will unflatten
each DTB in turn, allocating objects for each property and node, only to
compare a single property and then free all the allocations again.
Given that this operation is repeated for every device tree until a
match is found, it's a good idea to be able to compare machine
(top-level) compatibles without having to unflatten the whole FDT.
Implemnt fdt_machine_is_compatible() that does just that. This
intentionally opencodes the device tree iteration as to minimize
code and runtime size. Using libfdt without LTO would be slower
and bigger.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20240301130445.171385-3-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Follow-up commit will need to parse the FDT header without unflattening
the whole device tree at the same time. Therefore split off the header
verification into its own separate function.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20240301130445.171385-2-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Kalray Coolidge v2 SoC eMMC controller needs static tx delay tuning even
for basic standard or high speed modes.
Add vendor specific callback mechanism for init and implement it for
Coolidge v2 SoC.
Signed-off-by: Yann Sionneau <ysionneau@kalrayinc.com>
Link: https://lore.barebox.org/20240301102119.17914-1-ysionneau@kalrayinc.com
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This register is standardized by SDHCI (See SD Host Controller
Simplified Specification v4.20 "1.2 Register Map" and
"2.3.14 Pointer Registers to mFFh-100h Area").
It is necessary to access some vendor specific registers for
some controllers.
Signed-off-by: Yann Sionneau <ysionneau@kalrayinc.com>
Link: https://lore.barebox.org/20240229155700.17443-3-ysionneau@kalrayinc.com
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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f_max was possibly set from max-frequency DT property
by mci_of_parse() and then overwritten few lines later
with the clock frequency, making it impossible to
reduce the clock frequency from DT.
Move the call to mci_of_parse() after the first assignment
to f_max.
Signed-off-by: Yann Sionneau <ysionneau@kalrayinc.com>
Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20240229155700.17443-2-ysionneau@kalrayinc.com
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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sdhci_enable_v4_mode is already called from dwcmshc_mci_init which is
always called before using the controller from mci-core.c
Signed-off-by: Yann Sionneau <ysionneau@kalrayinc.com>
Link: https://lore.barebox.org/20240229155700.17443-1-ysionneau@kalrayinc.com
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Link: https://lore.barebox.org/20240227073923.148943-1-antonynpavlov@gmail.com
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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To inform the user which device is updated using which handler, also
emit a message with -y.
Also update the wording to make the output more similar between the
different cases.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.barebox.org/20240221103334.1925850-2-u.kleine-koenig@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Before reading GPIOs in a poller check if they are available.
Link: https://lore.barebox.org/20240221142800.1958810-5-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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GPIOs a sometimes slow to read out, for example when they are provided
by I2C GPIO expanders. Limit the poll rate so that we do not slow down
barebox more than necessary in these cases.
Link: https://lore.barebox.org/20240221142800.1958810-4-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The GPIOs provided by the pca953x cannot be used inside a poller while
the I2C controller is in use. Add a dependency to from the GPIO
controller to the I2C controller for this purpose.
Link: https://lore.barebox.org/20240221142800.1958810-3-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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GPIOs are not only provided by raw register accesses but also by I2C
devices. Add a slice to a gpio chip so that a gpio user can check if the
slice is acquired before using it in a poller.
Link: https://lore.barebox.org/20240221142800.1958810-2-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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While we set SION for all I2C pinmux configurations, board code may
need to set SION for other pads as well. Provide a MUX_MODE_SION
definition that can be OR-d into the pinmux argument of
imx8mm_setup_pad().
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20240313180026.3202602-1-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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ddrphy_trained_csr and ddrphy_trained_csr_num are generated by the
spreadsheet, but are unused. Instead a default array with fixed values
is unconditionally used. Add a deprecation warning to alert to this
fact.
It seems GCC doesn't print this deprecation when using C99
designated initializers, but clang(d) does, so it's useful to have for
those using clangd in their editors.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20240313154217.2747582-1-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The Ka-Ro QSXP is a i.MX8M Plus solder down system on module. This
commit adds support for the SOM on the QSBASE4 RDK.
[1]: https://www.karo-electronics.de/qsxp
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Stefan Kerkmann <s.kerkmann@pengutronix.de>
Link: https://lore.barebox.org/20240311-karo-imx8mp-som-board-upstreaming-v2-6-6ecda693adb2@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The Ka-Ro QSXP-QSBASE4[1] is the offical DK from Ka-Ro for their QSXP
i.MX8M Plus solder down system on module. It comes with an additional
Micrel KSZ9131 gigabit ethernet phy. The devicetree was adapted from the
offical Ka-Ro github[2], commit a49b38ec97854c0cd9cd83a9f4ae3b56e99a58b6.
[1]: https://karo-electronics.github.io/docs/getting-started/qsbase4/quickstart-qsbase4.html
[2]: https://github.com/karo-electronics/meta-karo-nxp.git
Signed-off-by: Stefan Kerkmann <s.kerkmann@pengutronix.de>
Link: https://lore.barebox.org/20240311-karo-imx8mp-som-board-upstreaming-v2-5-6ecda693adb2@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This imports the device tree for the Ka-Ro QSXP, which is a i.MX8M Plus
solder down system on module. The sources have been adapted from the
offical Ka-Ro github[1], commit a49b38ec97854c0cd9cd83a9f4ae3b56e99a58b6.
[1]: https://github.com/karo-electronics/meta-karo-nxp.git
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Stefan Kerkmann <s.kerkmann@pengutronix.de>
Link: https://lore.barebox.org/20240311-karo-imx8mp-som-board-upstreaming-v2-4-6ecda693adb2@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This imports the micrel KSZ9131 gigabit phy driver from Linux, commit
0316c7e66bbd16cf2d01a4e2f5afa6afb01278f2.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Stefan Kerkmann <s.kerkmann@pengutronix.de>
Link: https://lore.barebox.org/20240311-karo-imx8mp-som-board-upstreaming-v2-3-6ecda693adb2@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This syncs the known Micrel PHY IDs and register definitions with the
Linux kernel, commit f600bb612b06adf70ccdefbd3294c71275b650c2.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Stefan Kerkmann <s.kerkmann@pengutronix.de>
Link: https://lore.barebox.org/20240311-karo-imx8mp-som-board-upstreaming-v2-2-6ecda693adb2@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Introduce signed 32bit integer of_property_read method.
Signed-off-by: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Grant Likely <grant.likely@linaro.org>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Stefan Kerkmann <s.kerkmann@pengutronix.de>
Link: https://lore.barebox.org/20240311-karo-imx8mp-som-board-upstreaming-v2-1-6ecda693adb2@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This implements write support to imx-ocotp-ele. By default only the
shadow values are written which is harmless and nearly useless (as the
ROM doesn't seem use these values). Real write support is enabled by
setting imx_ocotp0.permanent_write_enable to true. A big warning is
printed and the next write access to /dev/imx_ocotp will then really
burn fuses.
Link: https://lore.barebox.org/20240311102152.360762-5-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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We'll want to add a device parameter to the imx_ocotp0 device in the
next step, but the device is private to the nvmem core. Add a getter
function for it.
Link: https://lore.barebox.org/20240311102152.360762-4-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The ocotp fuses have shadow values. For some fuses the shadow values
can be read from and written to. While it's not really clear where
the ROM really uses these shadow values, it still helps reading and
writing them to get an idea if we are about to write the correct
fuses before we finally enable permanent write.
Link: https://lore.barebox.org/20240311102152.360762-3-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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i.MX fuse numbers are sometimes referred to as the index of the 32bit
word, sometimes as bit offsets and the device in /dev/imx_ocotp counts
in bytes. To avoid more confusion add some comments to the function
headers of functions reading/writing the fuses that clearly state that
they take the 32bit word number as input.
Link: https://lore.barebox.org/20240311102152.360762-2-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The ELE request defines are in include/mach/imx/ele.h, move definition
of ELE_READ_SHADOW_REQ there as well.
Link: https://lore.barebox.org/20240311102152.360762-1-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add basic support for König+Bauer AlphaJet, based on a Congatec QMX8MP
SoM with an i.MX8MP SoC in the Industrial Temperature Grade 4GB Variant,
no inline ECC used.
Co-Developed-by: Juergen Borleis <j.borleis@pengutronix.de>
Signed-off-by: Juergen Borleis <j.borleis@pengutronix.de>
Signed-off-by: Johannes Zink <j.zink@pengutronix.de>
Signed-off-by: Roland Hieber <rhi@pengutronix.de>
Link: https://lore.barebox.org/20240311140455.3094462-1-rhi@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This enables barebox on i.MX25 to generate a per-machine eth address.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.barebox.org/20240312154827.638763-2-u.kleine-koenig@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Assign MAC address to the switch ports.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Link: https://lore.barebox.org/20240312142708.3766405-1-o.rempel@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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i2c data lines are bidirectional, so the SION bit should be set. Apply
them to all i2c mux options.
Suggested-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Bastian Krause <bst@pengutronix.de>
Link: https://lore.barebox.org/20240308142052.2683407-2-bst@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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i2c data lines are bidirectional, so the SION bit should be set. For
i2c1, this is already the case. Apply the same to the remaining i2c mux
options.
Suggested-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Bastian Krause <bst@pengutronix.de>
Link: https://lore.barebox.org/20240308142052.2683407-1-bst@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The get_response argument to imx9_s3mua_call() is always set to true by
the callers. It must be like that because in the ELE API Reference Guide
every call into the ELE has a response. Drop the unnecessary argument.
Link: https://lore.barebox.org/20240301111915.2439646-1-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The SabreSD comes with different SoC variants. This patch adds support
for the i.MX6DL based board. the DCD data has been taken from U-Boot
2023.04
Signed-off-by: Stefano Manni <stefano.manni@gmail.com>
Link: https://lore.barebox.org/4b448318f71f2677bc28c2241c5bf0c081073564.camel@gmail.com
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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getenv_ull() will parse values according to prefix:
- If it starts with 0x, it's hexadecimal
- If it's just 0, it's octal
- otherwise, it's decimal
Some variables like i.MX8M soc0.soc_uid are hexadecimal without leading
0x. Therefore add a getenv_ullx helper, so code that used to do:
uid = imx8m_uid();
can be replaced with
getenv_ullx("soc0.soc_uid", &uid);
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20240228175128.2734265-2-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The i.MX8M UID and some other SoC-related info is now available over
soc0.soc_uid and imx8m_uid's function definition was removed.
Therefore remove the prototype as well.
Fixes: d392a0aea330 ("ARM: i.MX8M: convert the machine init to the soc driver")
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20240228175128.2734265-1-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Instead of passing in configuration parameters at runtime we can utilize
the `cpu_is_mx8xyz` macro family to determine which bits should be set.
As the tzasc driver is imx specific, all functions are prefixed with
`imx8m_` as well.
Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Stefan Kerkmann <s.kerkmann@pengutronix.de>
Link: https://lore.barebox.org/20240228-v2024-02-0-topic-imx8m-n-p-tzac-v2-3-ee1ae48dc399@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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In order to use the `cpu_is_imxxyz` macro family in the pbl,
`__imx_cpu_type` has to be defined and initialized. As we don't have
access to the devicetree at this point, we resort to manual assignment.
Note: It is safe to build the same imx.o object file for both barebox
pbl and proper as the `imx_init` function is discarded during linking as
the whole `init_call` section is not linked into the final binary.
Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Stefan Kerkmann <s.kerkmann@pengutronix.de>
Link: https://lore.barebox.org/20240228-v2024-02-0-topic-imx8m-n-p-tzac-v2-2-ee1ae48dc399@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This commit ports U-Boot commit 1289ff7bd7e4 ("imx8m: lock
id_swap_bypass bit in tzc380 enable") to barebox. This is the original
commit message:
> According to TRM for i.MX8M Nano and Plus, GPR10 register contains lock
> bit for TZASC_ID_SWAP_BYPASS bit. This bit is required to be set in
> order to avoid AXI bus errors when GPU is enabled on the platform.
> TZASC_ID_SWAP_BYPASS bit is alread set for all imx8m applicable
> derivatives, but is missing a lock settings to be applied.
>
> Set the TZASC_ID_SWAP_BYPASS_LOCK bit for those derivatives which have
> it implemented.
>
> Since we're here, provide also names to bits from TRM instead of using
> BIT() macro in the code.
Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Reviewed-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Signed-off-by: Stefan Kerkmann <s.kerkmann@pengutronix.de>
Link: https://lore.barebox.org/20240228-v2024-02-0-topic-imx8m-n-p-tzac-v2-1-ee1ae48dc399@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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On i.MX93 the ROM API can be used to detect the bootsource. Implement
support for this.
Link: https://lore.barebox.org/20240220114508.3685478-1-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Install barebox on the eMMC boot partitions which offer enough space
for bigger barebox images and which also provides a failsafe update.
Link: https://lore.barebox.org/20240226141458.620463-2-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The TQMa6ul upstream device trees contain aliases which swap the order
of the mmc nodes, so what used to be mmc0 has now become mmc1 and vice
versa. With this mmc0 now is the eMMC and mmc1 is the SD card.
Introduce a imx6ul.dtsi which adds barebox,bootsource-mmcx aliases so
that bootsource_get_instance() matches our mmc numbering again. Also
register the eMMC BBU handler on /dev/mmc0 and the SD BBU handler on
/dev/mmc1.
Fixes: 5a23f05267 ("ARM: tqma6ul: use upstream device trees")
Link: https://lore.barebox.org/20240226141458.620463-1-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This adds OP-TEE support for the TQMa6ulx board. The OP-TEE binary is
loaded from PBL. Later on in barebox proper the OP-TEE provided overlay
node is applied to the barebox live tree for barebox to probe OP-TEE and
also to reserve the memory used by OP-TEE. The overlay is also
registered as a fixup to be applied on the Linux device tree.
Link: https://lore.barebox.org/20240223125922.2865359-1-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The same DTs we have in barebox have made it upstream with very minor
differences, so drop the copies inside barebox.
No functional change intended.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20240220123215.3758465-1-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Using basprintf to duplicate a string violates memory safety if
default_environment_path were to contain a format specifier.
clangd warns about this, so fix this by using strdup instead.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20240220122004.3725540-1-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The tqma6ul has several upstream device trees depending on the exact
board type. This removes the downstream device tree in favour for the
upstream device trees. The board type can be determined from an EEPROM
on the board. This patch also adds support for reading the EEPROM and
picking the right device tree for the board found.
The EEPROM has the board described as strings. I do not know the correct
strings for the boards I don't have, so right now only the device tree
for the "TQMa6UL2L-AB.0202" board is picked. A warning is printed when
an unknown board type is found, so this can be added as new board type
when found.
Link: https://lore.barebox.org/20240221150323.2715164-9-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The device node of a miibus parent device usually points to the ethernet
device node whereas the parent device node of a phy device usually
points to the mdio {} subnode between the ethernet node and the phy
node, so both can't match. Ethernet drivers usually provide a pointer
to the mdio {} subnode in miibus::dev.of_node, so use that to match
against the phy nodes parent.
This occured on a TQMa6UL where two FECs are registered, but both phys
are connected to the FEC2.
Link: https://lore.barebox.org/20240221150323.2715164-8-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The TQMa6ul needs the enet_ref_125m clk as phy clock. This is currently
not enabled, so ethernet on fec2 is not working. As there's no good
place to enable it currently do this in the board code.
Link: https://lore.barebox.org/20240221150323.2715164-7-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Link: https://lore.barebox.org/20240221150323.2715164-6-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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