| Commit message (Collapse) | Author | Age | Files | Lines |
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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got broken in commit:
commit 309a75baafc307c77aab2ebe6055ee89a963c626
Author: Sascha Hauer <s.hauer@pengutronix.de>
Date: Fri Feb 20 18:14:52 2009 +0100
i.MX use fecclk for fec and gtpclk for gpt
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Currently there are i.MX35 SoCs with 532MHz and 400MHz maximum
frequency. As there's some confusion about which SoCs are
available add frequency switching to the command line.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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If a NIC's MII isn't connected to a PHY but directly to a switch port,
the switch doesn't sent a link signal to the NIC. (Because strictly
speaking, there isn't any ethernet link at all.)
This patch adds a force link feature to the phy, to cope with this
situation.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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This patch adds the flag "AT91SAM_ETHER_MII" along to the existing
"AT91SAM_ETHER_RMII". This improves code readability in baords which
are using plain MII mode.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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When operating in plain MII mode, the driver assumes the RMII bit not
set. Although this is the power on reset value, clearing this bit helps
when playing with different network setups.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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If a flash chip has been added with the size of "0" the cfi's size is
used for the flash chip.
Signed-off-by: Karsten Schwinne <kartsten.schwinne@de.bucurus.com>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Signed-off-by: Karsten Schwinne <kartsten.schwinne@de.bucurus.com>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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use correct image ("jffs2") to flash root
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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workarount for drive strength issue
v2: optimized settings after temperature tests
Signed-off-by: Jan Weitzel <J.Weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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We used to initialize the PLLs on PCM038 in two
steps. The first was to initialize a basic setup
so that all peripheral clocks run at their final
speed and the second step was to push the processor
to full speed after the PMIC has been initialized
for the higher voltage.
Do this in one step instead to get an easier setup.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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instead of throwing all output away when the console
is not initialized, buffer it in a kfifo and print
it later when the first console gets initialized.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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...as we want to add an output buffer, too
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This is loosely based on the Linux notifier framework, but
stripped down to the bare minimum.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Support the on-board CS8900A ethernet controller of the
MX21ADS development board.
Signed-off-by: Ivo Clarysse <ivo.clarysse@gmail.com>
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Support for CS89X0 ethernet controllers.
Tested with CS8900A ref. F on MX21ADS.
Signed-off-by: Ivo Clarysse <ivo.clarysse@gmail.com>
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This breaks compilation on a hardfloat toolchain as we would need
AFLAGS += -msoft-float aswell. Since we do not use floating point
we can equally well remove the option completely.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Without the patch below, the result of the second READID will not
match that of the first READID, yielding
nand_get_flash_type: second ID read did not match ec,36 against a5,bd
instead of
NAND device: Manufacturer ID: 0xec, Chip ID: 0x36 (Samsung NAND
64MiB 1,8V 8-bit)
Signed-off-by: Ivo Clarysse <ivo.clarysse@gmail.com>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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We had some imx27 modules not starting through u-boot. The patch adds some
delay between switching the powerlevel up and changing the pll settings.
Please add the patch to the next release.
Signed-off-by: Jan Weitzel <J.Weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Set DDR type to MDDR, workarount for drive strength issue
Signed-off-by: Jan Weitzel <J.Weitzel@phytec.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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