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| * | | ubifs: Remove Linux struct definitions we already haveSascha Hauer2018-04-061-317/+1
| | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ubifs: remove dead codeSascha Hauer2018-04-061-187/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove stuff that was added to UBIFS for U-Boot which we do not need because we already have it in the Linux header files. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | rename file_operations -> cdev_operationsSascha Hauer2018-04-0634-41/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Linux also has struct file_operations which are something different. Rename our file_operations to cdev_operations which better matches what we have. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | Merge branch 'for-next/dts'Sascha Hauer2018-04-0658-141/+237
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| * | | | dts: update to v4.16Sascha Hauer2018-04-057-21/+80
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | dts: update to v4.16-rc7Sascha Hauer2018-04-054-26/+33
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | dts: update to v4.16-rc6Sascha Hauer2018-04-054-1/+4
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | dts: update to v4.16-rc5Sascha Hauer2018-04-052-1/+6
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | dts: update to v4.16-rc4Sascha Hauer2018-04-0543-92/+114
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | | Merge branch 'for-next/arm'Sascha Hauer2018-04-06138-1113/+1636
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| * | | | ARM: aarch64: Make early MMU support workSascha Hauer2018-04-044-129/+182
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Until now it was not possible to enable the MMU in PBL because create_section needs memory allocations which are not available. With this patch we move the early MMU support to a separate file and all necessary aux functions to mmu_64.h. create_sections is reimplmented for the early case to only create 1st level pagetables. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: change mmu_early_enable() prototypeSascha Hauer2018-04-047-13/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change the arguements to type unsigned long which is suitable for both arm32 and arm64. While at it move the prototype to arch/arm/include/. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: create separate mmu_64.h fileSascha Hauer2018-04-043-48/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | cpu/mmu.h has nothing in common for the 32bit and 64bit variant. Make it two separate files. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: Create own cache.c file for aarch64Sascha Hauer2018-04-043-18/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | cache.c does not work properly for aarch64. We create a struct cache_fns using C preprocessor foo which assumes the existence of cache maintenance operations with a certain name. These functions have other names on aarch64. While we could fix this we do not need the automatic cache function selection on aarch64 since here we only have one function set. Create a separate file and be done with this issue. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: build: Remove duplicate file compilationSascha Hauer2018-04-041-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | cache.o is already obj-y, drop unnecessary obj-$(CONFIG_MMU) Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: cache-armv4: Fix wrong sectionSascha Hauer2018-04-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The v4_mmu_cache_on function should be in a section with the same name. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: aarch64: Add support to start kernel and bareboxSascha Hauer2018-04-041-22/+98
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | aarch64 has its own image format. Add a bootm handler to handle this format. Also add a barebox handler. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: aarch64: disable 32bit boot commandsSascha Hauer2018-04-045-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 32bit boot support is full of legacy cruft. While it should be possible to merge the aarch64 support there, a fresh start looks more promising. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | bootm: provide handlers the start of the OS imageSascha Hauer2018-04-042-1/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The bootm code needs to read the beginning of the OS image in order to determine the filetype. If it does so already, then we can provide the handlers the buffer. This can help the handlers to find some image metadata before loading the full image. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | common: Add functions to find free RAMSascha Hauer2018-04-042-0/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The bootm code needs to put the Kernel image and initrd into free RAM. Add some functions to find free RAM chunks to help this code. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | filetype: Detect ARM aarch64 Linux imagesSascha Hauer2018-04-042-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ARM aarch64 Linux image have a special type. Allow to detect them. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: aarch64: Add barebox head supportSascha Hauer2018-04-042-4/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow aarch64 images to use the same image header as arm32 images. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | dt-bindings: Drop unused filesSascha Hauer2018-03-293-342/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | include/dt-bindings is not included in device tree builds anymore since 2014. Since then this directory is unused, so remove the files in it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: aarch64: implement ignoring data abortsSascha Hauer2018-03-291-3/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Data aborts can be masked using the data_abort_mask() function. Add the missing pieces for functionality on aarch64 so that the 'md' command is safe to call even with faulting addresses. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: aarch64: print more information on sync exceptionSascha Hauer2018-03-292-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On a sync exception more useful information can be printed than we currently do. Pass the ESR and FAR value to do_sync and print the reason for the exception along with the address that actually faulted. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: aarch64: Add esr stringsSascha Hauer2018-03-292-0/+163
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Exception Syndrome Register (ESR) holds information over an exception. This adds the strings necessary to dispatch this information. Based on Linux code. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: aarch64: Allow to leave exceptionsSascha Hauer2018-03-291-0/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | So far exceptions can only be entered but never left. Add code to leave exceptions based on U-Boot commit 4c2cc7c4e (arm64: Allow exceptions to return). This will be useful to implement ignoring data aborts on a 'md' command. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: aarch64: mmu: Make zero page faultingSascha Hauer2018-03-291-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make zero page faulting which allows us to catch NULL pointer derefs. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: aarch64: implement stacktracesSascha Hauer2018-03-295-2/+95
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement stacktraces as a great debugging aid. On aarch64 this is cheap enough to be enabled unconditionally. Unwinding code is taken from the Kernel. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: aarch64: implement show_regs()Sascha Hauer2018-03-292-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Do something useful in an exception and at least print the current register contents. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: aarch64: hide some config optionsSascha Hauer2018-03-291-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | EABI and ATAGS have no meaning on aarch64, so hide the options from the user. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: aarch64: remove dead code in linker scriptSascha Hauer2018-03-291-16/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_ARM_UNWIND does not exist for aarch64. Remove the dead code. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: aarch64: lowlevel: Use switch_elSascha Hauer2018-03-291-9/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use switch_el macro rather than open coded version. While at it rename the labels so that the name matches the exception level. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: aarch64: Setup exception vectors in initcallSascha Hauer2018-03-292-4/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The vectors are currently configured in arm_cpu_lowlevel_init(). This shall be callable from PBL, but here the vectors are not available so calling it from PBL will result in a linker error. Move the vector setup to an initcall. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: aarch64: fix exception level mixupSascha Hauer2018-03-292-8/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When entering an exception the we currently jump to the code handling EL1 when we are actually at EL3 and the other way round. Fix this by introducing and using the switch_el macro from U-Boot. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: aarch64: move aarch64 exception support to separate fileSascha Hauer2018-03-293-49/+118
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The exception support for arm32 and aarch64 does not have much in common. Move aarch64 exception support to a separate file to avoid more ifdeffery. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: aarch64: compile with strict alignmentSascha Hauer2018-03-291-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | barebox runs with MMU disabled at least during startup. We need -mstrict-alignment for these parts to avoid alignment aborts. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: aarch64: implement dma operationsSascha Hauer2018-03-291-0/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For proper DMA support dma_alloc_coherent and DMA sync operations are needed. Implement them. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: implement dma mapping functionsSascha Hauer2018-03-291-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement basic dma mapping functions. For now just assume every address is valid for dma mapping. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | dma: Add prototypes for dma mapping functionsSascha Hauer2018-03-291-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Right now we only have the dma_sync_single_* functions, but no functions for actually mapping a pointer. The mapping functions become necessary when casting a pointer to unsigned long to get a dma address is not enough. (I'm not even going so far that we'll add IOMMU support, but on some architectures we need a place where we can check if a pointer is DMA mappable at all) Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | dma: Use dma_addr_t as type for DMA addressesSascha Hauer2018-03-294-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DMA addresses are not necessarily the same as unsigned long. Fix the type for the dma_sync_single_* operations. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: Make some variables 64bit awareSascha Hauer2018-03-232-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use unsigned long as type for variables that are used as addresses. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: aarch64: mmu: Fix disabling the MMUSascha Hauer2018-03-231-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Do it as U-Boot: Disable MMU first, then flush caches and finally invalidate tlbs. I wish I could reference some document instead of U-Boot code, but I haven't found anything. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: aarch64: mmu: drop ttb check when disabling the MMUSascha Hauer2018-03-231-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the MMU is enabled then we should be able to disable it, no matter if we initialized it in barebox or not. This change is not really needed but helps when we are starting second stage from U-Boot with the 'go' command which leaves the MMU enabled. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: aarch64: mmu: No need to disable icacheSascha Hauer2018-03-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the MMU is disabled there is no need to disable the icache. Leave it enabled. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: aarch64: mmu: Fix TCR settingSascha Hauer2018-03-233-11/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A BITS_PER_VA value of 33 is a little small. Increase it to 39 which is the maximum size we can do with 3 level page tables. The TCR value depends on the current exception level, so we have to calculate the value during runtime. To do this use a function derived from U-Boots get_tcr function. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: aarch64: mmu: Fix PTE_TYPE_* flagsSascha Hauer2018-03-231-6/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When we reach level 3 page tables we set the PTE_TYPE_PAGE bit in attr. This is wrong since in the outer loop we can fall back to a lower level in which case the PTE_TYPE_PAGE may not be set. Fix this by not modifying attr and instead compose the *pte value when needed. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: aarch64: mmu: Fix adding additional page table levelsSascha Hauer2018-03-231-5/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When we create a higher level page table we have to initialize it with the settings from the previous lower level page table so that we do not modify unrelated mappings. split_block() is taken from U-Boot code and does this job. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: aarch64: mmu: use PTE_* definitions from U-BootSascha Hauer2018-03-232-54/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'PMD' (Page Middle Directory) is a Linuxism that is not really helpful in the barebox MMU code. Use the U-Boot definitions which only use PTE_* and seem to be more consistent for our usecase. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: aarch64: mmu: enable mmu in generic codeSascha Hauer2018-03-233-23/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using board code to enable the MMU is not nice. Do it in generic code. Since mmu_enable() is now done in mmu_64.c we no longer have to export it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>