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* Release v2020.01.0v2020.01.0Sascha Hauer2020-01-141-2/+2
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* usb: ehci: Do not use memset on dma coherent memorySascha Hauer2020-01-141-3/+12
| | | | | | | | | | | memset is an optimized operation that at least on ARM64 may only be called on cached memory, see 32e8842c40 ("ARM: lib64: Make string functions aware of MMU configuration"). To avoid crashes in the ehci driver we no longer call memset on memory allocated with dma_alloc_coherent(), but use a simple memzero32 function instead. Reported-by: Elmar Albert <EAlbert@data-modul.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* lds: align RO_DATA_SECTION membersLucas Stach2019-12-201-0/+11
| | | | | | | | | | | | When using the RO_DATA_SECTION macro, all the individual components are put into the rodata section. As they now end up in the same section there is no alignment enforced between them anymore. This leads to unaligned start pointers when any of the components have a unaligned size. Enforce some alignment between them. Fixes: c5d38e920101 (lds: Add and use RO_DATA_SECTION macro) Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX: Fix PBL size testSascha Hauer2019-12-201-2/+2
| | | | | | | | MAX_PBL_MEMORY_SIZE needs the start symbol name without any suffix. Fix this to make the PBL size tests effective. Reported-by: Ulrich Ölmann <u.oelmann@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/zynq'Sascha Hauer2019-12-1030-231/+572
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| * ARM: zynqmp: defconfig: reenable DRIVER_NET_MACBMichael Tretter2019-11-251-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Commit d952a0eeba37 ("Regenerate defconfig files") disabled the macb driver in the ZynqMP defconfig, because CONFIG_NET was not enabled in the defconfig. While not strictly required, you probably want to enable the macb driver on the ZynqMP. Enable CONFIG_NET and reenable CONFIG_DRIVER_NET_MACB. Signed-off-by: Michael Tretter <m.tretter@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: zynqmp: defconfig: fix FIRMWARE_ZYNQMP_FPGAMichael Tretter2019-11-251-1/+1
| | | | | | | | | | | | | | | | | | The config item has been renamed from FIRMWARE_ZYNQMP_PL to FIRMWARE_ZYNQMP_FPGA, but the defconfig has not been updated. Update it now. Signed-off-by: Michael Tretter <m.tretter@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: zynq: add bootsource detectionLucas Stach2019-11-112-2/+26
| | | | | | | | | | | | | | | | Implement the bootsource detection by reading the BOOT_MODE SLCR register which holds the strap values used to select the boot source. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * bootsource: add JTAG bootsourceLucas Stach2019-11-112-0/+2
| | | | | | | | | | | | | | | | Some SoCs are able to detect if they are booted from JTAG. Add the enum value to be able to represent this as a valid bootsource. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: zynq: switch to multi-image buildLucas Stach2019-11-114-14/+12
| | | | | | | | | | | | | | Finally move over to a multi-image based build. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * clk: zynq: remove clkdevsLucas Stach2019-11-111-9/+0
| | | | | | | | | | | | | | | | They aren't needed anymore, as all the Zynq devices now use a DT based clock lookup. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: zynq: switch to DT based probingLucas Stach2019-11-116-62/+4
| | | | | | | | | | | | | | | | All the currently supported devices can now be probed from the DT. Remove platform devices and switch to DT. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * clk: zynq: partially sync with LinuxLucas Stach2019-11-111-16/+71
| | | | | | | | | | | | | | | | | | | | Sync the clock enum with the clocks used by Linux and the DT binding. Implement AMBA bus clocks and SPI and SDIO peripheral clocks and register a DT clock controller, so the clocks can be looked up by DT handle. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * clk: zynq: fix up address from DTLucas Stach2019-11-111-1/+23
| | | | | | | | | | | | | | | | | | | | The upstream Zynq 7000 DT describes the SLCR child devices physical address as an offset within the SLCR. The driver thus needs to add the SLCR base offset to the address before trying to map the MMIO region. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * clk: zynq: improve PLL enable handlingLucas Stach2019-11-111-1/+12
| | | | | | | | | | | | | | | | | | | | | | Ensure that both the powerdown and reset bits are cleared when the PLL gets enabled, as any of those set would prevent the PLL from working. Also add a status readback function, so the real status of the PLL is reflected in the Barebox clock state. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * clk: zynq: use base address of clock controllerLucas Stach2019-11-112-16/+17
| | | | | | | | | | | | | | | | | | The clock controller is a subregion of the SLCR, use the real base of this region for mapping the registers. This will allow to switch to DT based probing later. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: zynq: move clock controller driver to drivers/clkLucas Stach2019-11-114-1/+3
| | | | | | | | | | | | | | No functional change, just adjusting the Zynq code to common practise. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * net: macb: add Zynq compatibleLucas Stach2019-11-111-0/+1
| | | | | | | | | | | | | | Add compatible for the GEM on the Zynq 7000 device. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * net: macb: handle more clocksLucas Stach2019-11-111-2/+22
| | | | | | | | | | | | | | | | | | Both pclk and hclk are required clocks in the DT binding. rx_clk and tx_clk are optional, but must be enabled if a system has separate gates for them. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: zynq: zedboard: provide DTBLucas Stach2019-11-113-1/+15
| | | | | | | | | | | | | | | | Provide the DTB to allow devices to be probed from there, instead of board code. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: zynq: add size check in zynq_mkimageLucas Stach2019-11-111-0/+5
| | | | | | | | | | | | | | | | | | Currently Barebox does not support 2 stage loading on Zynq, so the image must fit into the free OCRAM area. Add a check to the mkimage tool to validate this. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: zynq: move header generation to zynq_mkimageLucas Stach2019-11-1110-110/+320
| | | | | | | | | | | | | | | | | | | | Instead of generating a suitable image header with linker magic, move all of this into zynq_mkimage. The configuration file format and parsing is based on imx-image. This gets us one step further on the road to proper multi-image support. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: zynq: use getopt in zynq_mkimageLucas Stach2019-11-112-10/+37
| | | | | | | | | | | | | | Makes extending the command line much easier. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: zynq: add trivial image build mechanismLucas Stach2019-11-114-2/+15
| | | | | | | | | | | | | | | | | | | | | | | | Currently this just calls the zynq_mkimage script to stamp in the header checksum. Can be extended to a proper multi-image build later on. This requires a PBL to be build, but as the only supported Zynq board already selects the PBL option in the defconfig there is no big change to the previous status Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: zynq: zedboard: enable MACB driver in defconfigLucas Stach2019-11-111-0/+1
| | | | | | | | | | | | | | The board support is a bit more useful with active networking. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/watchdog'Sascha Hauer2019-12-109-27/+118
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| * | watchdog: core: use new dev_add_param_tristate helper for .running paramAhmad Fatoum2019-12-052-9/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | Previous commit added a dev_add_param_tristate_ro that can be readily used instead of the enum parameter here. Use it. This also fixes the issue that running_names had external linkage. Signed-off-by: Ahmad Fatoum <ahmad@a3f.at> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | param: add dev_add_param_tristate(_ro) helpersAhmad Fatoum2019-12-052-0/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is can be considered an extension to the dev_add_param_bool interfaces with a third value that's "unknown". This can be used for cases, where barebox can flip a bit somewhere, but it has no way of knowing what the initial state of the bit was, e.g. turn on/off the watchdog, but no watchdog status. Turn on/off a co-processor, but no co-processor online status. And so on. Not providing a way to customize the "unknown" string is a deliberate choice, so future device parameters follow the same naming scheme. Signed-off-by: Ahmad Fatoum <ahmad@a3f.at> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | watchdog: stm32_iwdg: explicitly set .running to UNSUPPORTEDAhmad Fatoum2019-11-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I've spent some time trying to get the ONF (Watchdog enable status) bit in the IWDG_SR register to read as something other than zero. It has since been confirmed to be non-functional[1]. To avoid someone else spending time on this, document that running status is unsupported on this hardware explicitly. No functional change as UNSUPPORTED is already the default. [1]: https://www.spinics.net/lists/arm-kernel/msg770527.html Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | watchdog: f71808e: support .running device parameterAhmad Fatoum2019-11-111-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | The American Megatrends BIOS I am using can be configured to start the Fintek watchdog prior to the UEFI payloads. To avoid BIOS updates that reset this functionality going unnoticed, implement support for WDOG_HW_RUNNING. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | watchdog: imxwd: support .running device parameter on i.MX2+Ahmad Fatoum2019-11-111-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | The i.MX can be fused to start the watchdog on power-on reset. To give users an easy way to determine whether the watchdog is running, implement support for WDOG_HW_RUNNING. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | watchdog: implement generic support for .running device parameterAhmad Fatoum2019-11-112-1/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Linux watchdog have an optional WDOG_HW_RUNNING bit that is used in conjunction with CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED to automatically ping running watchdogs until userspace takes over. So far, when we ported Linux drivers, we dropped this detection, but it would be useful to have this information in barebox as well: The American Megatrends BIOS I am using allows configuring the hardware watchdog from the BIOS. barebox enables the WDT as well, so in normal operation we would never notice if after a BIOS update, the watchdog is no longer enabled. If we maintain a running parameter on watchdog devices, board code can be written to check whether the watchdog device is indeed running. To achieve this, add the necessary bits to the watchdog API. How we go about it differs from Linux a little: - We use an enum instead of a single bit, so we can differentiate between watchdogs that are not running and watchdogs whose running status is unknown. - Because we can check whether watchdog_hw_running is supported, it now can fail and return a negative value in that case - We do the maintenance of the running parameter after barebox feeds/disables the watchdog in the core, so it doesn't need to be replicated across drivers. Drivers hould only initialize the running parameter once at probe time. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | watchdog: always populate watchdog priority from device tree if possibleAhmad Fatoum2019-11-114-25/+18
| |/ | | | | | | | | | | | | | | | | | | | | So far, only the da9063 and da9053 have made use of the optional barebox watchdog-priority binding. Move it into the core, so other device drivers automatically have their watchdog-priority property parsed as well. This patch doesn't introduce any functional changes for upstream boards. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/usb'Sascha Hauer2019-12-1014-132/+118
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| * | usb: musb: use usb_register_otg_device()Sascha Hauer2019-11-212-37/+8
| | | | | | | | | | | | | | | | | | | | | We now have usb_register_otg_device() to register an "otg" device. Use it and drop the custom code. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | usb: i.MX: Use usb_register_otg_device()Sascha Hauer2019-11-215-84/+18
| | | | | | | | | | | | | | | | | | | | | We now have usb_register_otg_device() to register an "otg" device. Use it and drop the custom code. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | usb: dwc3: register otg deviceSascha Hauer2019-11-213-4/+12
| | | | | | | | | | | | | | | | | | | | | When the role in the device tree is specified as "otg" then register a otg device in barebox so that the user can configure the desired mode. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | usb: Add function to register otg devSascha Hauer2019-11-214-1/+77
| | | | | | | | | | | | | | | | | | | | | | | | We have two drivers in the tree which register an "otg" device to configure the host/peripheral switching. Before introducing a third driver create a common function for it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | usb: dwc3: remove unnecessary warningSascha Hauer2019-11-211-6/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | The dwc3 driver warns when the value written to DWC3_GFLADJ happens to be same as already read from the register. This always happens when the driver was previously running when started 2nd stage from another barebox. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/stm32'Sascha Hauer2019-12-1020-56/+827
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| * | | remoteproc: add support for starting st,stm32mp1-m4Ahmad Fatoum2019-11-253-0/+210
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The STM32MP157C-DK2 has a Cortex-M4 MCU in addition to the two Cortex-A7 MPUs. This remoteproc driver allows barebox running on a Cortex-A7 core to bootstrap the MCU with an ELF binary. Code ported from Linux v5.3 with rpmsg bits removed. Signed-off-by: Ahmad Fatoum <ahmad@a3f.at> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | remoteproc: register a device for new remoteproc instancesAhmad Fatoum2019-11-252-7/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | struct rproc has a device_d dev field, but so far it was unregistered. The implementation had a few downsides: - dev_printf prints NULL, because the unique_name of the device is NULL - The name used by firmwareload is the device tree node's name, which might be unnecessarily verbose, e.g. mlahb:m4@10000000.of - All remoteproc devices are given the same (unused) name and index Fix these by registering a device for the remoteproc and using it where appropriate. While at it, allow the remoteproc name to come from a device tree alias as well. This breaks user behavior in that firmwareload now uses the alias or remoteprocN to reference the remoteproc instance. This is probably acceptable as the driver is a very recent addition. Cc: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Ahmad Fatoum <ahmad@a3f.at> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | nvmem: bsec: fix typo in function name (s/st32/stm32/)Ahmad Fatoum2019-11-151-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | A m was missing. Reinstate it. Signed-off-by: Ahmad Fatoum <ahmad@a3f.at> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: stm32mp: dk2: don't hard-code memory sizeAhmad Fatoum2019-11-133-16/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There's new infrastructure for runtime determining RAM size. Use it so we don't need to hard code it in PBL and board code. Because this new infrastructure has some nested function calls, my arm-v7a-linux-gnueabihf-gcc 9.2.1 (OSELAS.Toolchain-2019.09.0) spills to the stack. Add stm32mp_cpu_lowlevel_init, which also sets up a stack after barebox end so this works. Lastly, there's no upstream device tree node for the DDR controller. Add one in the barebox device tree, so we don't have to hardcode the DDRCTRL address into non-pbl code that's run everywhere. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: stm32mp: add stm32mp_cpu_lowlevel_init with stack set upAhmad Fatoum2019-11-131-1/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When barebox is invoked out of the TF-A v2.1, it's started with sp, r0, r1, r2 all equal to zero. To use the new RAM size calculating stm32mp1_barebox_entry, we need to have a stack to handle spillage. Add a stm32mp_cpu_lowlevel_init wrapper around arm_cpu_lowlevel_init, which additionally configures a 64 byte stack after the end of the barebox binary. This should be enough to help us through the RAM size calculation. If not, compression will fail because of data corruption and stack size can be increased as necessary. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: stm32mp: add basic DDR controller driverAhmad Fatoum2019-11-131-0/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The STM32MP DDR Controller has a very flexible way of mapping address bits to columns/rows/banks. This is so far configured by the ARM TF-A as part of the SDRAM setup, so we don't need to do this in barebox. Nevertheless reading it out in barebox, allows us to determine unused address bits and thus the total size of SDRAM configured. Add a simple driver that parses the ddrctrl node and adds an appropriate memory bank. This can later be used to remove explicit calls to arm_add_mem_device in board code. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: stm32mp: add helper for querying ram sizeAhmad Fatoum2019-11-135-0/+500
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The STM32MP DDR Controller has a very flexible way of mapping address bits to columns/rows/banks. This is so far configured by the ARM TF-A as part of the SDRAM setup, so we don't need to do this in barebox. Nevertheless reading it out in barebox, allows us to determine unused address bits and thus the total size of SDRAM configured. Add a barebox_arm_entry wrapper that computes the SDRAM size internally, so boards may drop their hard-coded RAM size specifications. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | Documentation: boards: stm32mp: document boot error LEDAhmad Fatoum2019-11-131-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The STM32MP Evaluation Kits place a LED on PA13 to display boot status. Document its blinking patterns. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | i2c: stm32: use device_reset_us helper instead of open-codingAhmad Fatoum2019-11-131-8/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The exact sequence is already available in form of device_reset_us. Make use of it. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | watchdog: stm32_iwdg: return -ENOSYS on attempt to disableAhmad Fatoum2019-11-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The stm32_iwdg watchdog can't be disabled. To have the wd commant report this fact correctly to the user, the ->set_timeout needs to return -ENOSYS which is interpreted as "Watchdog cannot be disabled" instead of -EINVAL which means "Timeout value out of range". Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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