summaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
...
| * | | net/e1000: allow to overwrite flash size from device treeUwe Kleine-König2018-07-131-14/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When barebox probes the e1000 driver and the flash on the i210 device is unprogrammed, the driver assumes the flash has a size of only 4 kiB. This is annoying because to program the flash an image must be written that is bigger than 4 kiB. So you first have to flash the first sector to make barebox detect the right size on the next boot. Then reset the board to be able to write the remaining data. To work around that limitation, try to read the actual size from the device tree. (Note however that barebox' pci code currently doesn't use the device tree and so currently this try always fails without further patching.) Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | Merge branch 'for-next/memcmds'Sascha Hauer2018-08-135-5/+23
|\ \ \ \
| * | | | fs: ramfs: get chunks zero initializedSascha Hauer2018-08-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Initialize new chunks to zero, otherwise a ->truncate call may result in uninitialized data in files. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | commands: teach commands that write to files to also create themUwe Kleine-König2018-08-103-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This allows to use the adapted commands on non-existing files which failed before with open: No such file or directory Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | libfile: open_and_lseek: enlarge small files enough to make lseek possibleUwe Kleine-König2018-08-101-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This makes the following do the expected thing: barebox@barebox sandbox:/ ls -l lala -rwxrwxrwx 4 lala barebox@barebox sandbox:/ mw -d lala 72 0 Without this patch mw dies with lseek: Invalid argument memset, memcpy and probably others benefit in the same way. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | libfile: open_and_lseek: don't imply O_RDONLYUwe Kleine-König2018-08-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are several users that pass O_RDWR or O_WRONLY in mode to open_and_lseek() and use the resulting file descriptor for writing. This is no real issue becauce O_RDONLY is 0 and so can be dropped without any side effects. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | | Merge branch 'for-next/imx'Sascha Hauer2018-08-1337-474/+766
|\ \ \ \ \
| * | | | | ARM: i.MX8MQ: Save boot location during initializationAndrey Smirnov2018-08-131-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | ARM: i.MX8MQ: Add code to detect reset reasonAndrey Smirnov2018-08-134-11/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reset reason bits and their meaning seem to be identical between i.MX7 and i.MX8MQ. Share the definitions for the former and used it for the latter. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | ARM: i.MX8MQ: Replace magic numbers with named constantsAndrey Smirnov2018-08-132-6/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | ARM: i.MX: boot: Rework boot source detection for i.MX7 and i.MX8MQAndrey Smirnov2018-08-131-67/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For both SoCs data found in SBMR registers reflects only the boot source that was selected via pins of fuses and not the final boot source that ended up being used by MaskROM code. Original i.MX7 boot source detection implementation worked around that fact by having a special code to correctly handle "Manufacturing Mode". MaskROM in i.MX8MQ changed what SoC uses as recovery device and switched it to be USDHC2. It also made recovery device switch always enabled. Since correct actual boot source detection is important to being able to properly boot i.MX8MQ (due to not using DCD to initialize RAM), change the code to handle described exception. Instead of trying to adapt original i.MX7 code with yet another special case if(), change the whole thing to do what U-Boot does on i.MX7 and i.MX8MQ and use "Boot information for software" provided by recent (found in i.MX7 and i.MX8MQ) versions of MaskROM. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | ARM: i.MX: boot: Fix accidental commaAndrey Smirnov2018-08-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | ARM: i.MX8M: Expose code to query cpu revisionAndrey Smirnov2018-08-132-42/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CPU revision information is needed for boot source detection, so expose it as a small helper function and convert existing code to use it. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | pinctrl: i.MX: Add code to parse "input-enable"Andrey Smirnov2018-08-131-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add code to parse "input-enable" and intepret it as SION bit. This is needed for I2C configuration on i.MX8MQ EVK board. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | i.MX: Select DRIVER_SPI_IMX_2_3 for i.MX8MQAndrey Smirnov2018-08-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Select DRIVER_SPI_IMX_2_3 for i.MX8MQ since that is the variant that's being used Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | i.MX: i2c: Fix build error in debug output codeAndrey Smirnov2018-08-131-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Looks like that particular chunk of the code have not been built in a while and bitrotted. Change function parameters appropriately to avoid breaking the build. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | ARM: i.MX: freescale-mx6sx-sabresdb: Make ar8031_phy_fixup staticAndrey Smirnov2018-08-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Declare ar8031_phy_fixup as static since it is not being exported to any other users. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | ARM: VFxxx: zii-vf610-dev: Make get_sytem_type() staticAndrey Smirnov2018-08-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There's no reason for that function to be non-static, so convert it. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | ARM: VFxxx: zii-vf610-dev: Add newline before error bannerAndrey Smirnov2018-08-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a cosmetic newline to the beginning of the error banner printed when we encounter unidentified board type. This way we'd avoid artifacts like: barebox@ZII RDU1 Board:/ >********************************* * Unknown system type: 00000004 Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | mx5: Implement Spectre v2 workaround for Cortex-A8Fabio Estevam2018-08-102-1/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since 4.18-rc1 kernel the following warning is seen on i.MX51 and i.MX53: CPU0: Spectre v2: firmware did not set auxiliary control register IBE bit, system vulnerable Implement the suggested workaround by setting the IBE bit in the auxiliary control register, which allows the kernel to flush the BTB properly. Based on commit 7b37a9c732bf ("ARM: Introduce ability to enable ACR::IBE on Cortex-A8 for CVE-2017-5715") from U-Boot. With this patch applied the kernel now reports: CPU0: Spectre v2: using BPIALL workaround Tested on a imx51 babbage. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | gpio: fix missing includes for bool and struct list_headRoland Hieber2018-08-091-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Roland Hieber <r.hieber@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | ARM: i.MX: OCOTP: fix missing include for uint32_t etc.Roland Hieber2018-08-091-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Roland Hieber <r.hieber@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | ARM: i.MX: HAB: fix missing include for EPERMRoland Hieber2018-08-091-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Roland Hieber <r.hieber@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | mci: imx-esdhc: send required clock pulses to card on initLucas Stach2018-08-091-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MMC cards need at least 74 clock pulses before any bus communication can occur. The i.MX SDHC controller auto-gates the clock when inactive, so if the SD enumeration is skipped for slots where we know that only a MMC card can be present (which is possible since b5289b742a89 "mmc: allow skipping SD card initialization") those inititialization clock pulses won't be sent out, resulting in command timeouts when trying to enumerate the card. Luckily the eSDHC controller has a hardware feature to send out 80 clock pulses. This has been validated to be available by checking the reference manual back to i.MX25. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | firmware: Fix copy-paste comment mistakeAndrey Smirnov2018-08-091-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | ARM: nxp-imx8mq-evk: Add bootflow commentsAndrey Smirnov2018-08-091-2/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add some notes on how the boot-flow goes while I still remember it. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | ARM: i.MX8MQ: Query and display ATF fimware hash if availableAndrey Smirnov2018-08-091-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | ARM: nxp-imx8mq-evk: Add code to load ATF BL31 blobAndrey Smirnov2018-08-092-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | ARM: i.MX: xload-esdhc: Allow placing image to align its entry pointAndrey Smirnov2018-08-091-5/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow placing image to align its entry point with a particular entry point address. This is needed for SoC's like i.MX8M where vendor-provided ARM Trusted Firmware blob will exit at specific pre-determined address and we need to be able to pick execution up from there. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | ARM: i.MX: xload-esdhc: Make use of <mach/imx-header.h>Andrey Smirnov2018-08-092-5/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert esdhc_start_image() to use constants and data types from <mach/imx-header.h>. Also, while at it, define a simple inline function to test if an arbitrary binary blob is i.MX flash header v2. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | ARM: i.MX: Move i.MX header definitions to mach-imxAndrey Smirnov2018-08-093-113/+120
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move i.MX header definitions from scripts to mach-imx in order to make it available to both script and bootloader code. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | ARM: i.MX: fimware: Add pre-built BL31 ATF blobAndrey Smirnov2018-08-083-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Running Linux on i.MX8M requires us to use and properly set up a ARM Trusted Firmware blob. For the sake of convenience, add a pre-built blob to our firmware tree, so it can be used by individual boards. This blob was built using Buildroot: - commit: 6b02b8210acb18773f2c4b26cfc11d1f9bc4fb88 - defconig: freescale_imx8mqevk_defconfig The resulting file of interest is output/images/bl31.bin Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | ARM: i.MX8MQ: Add code to load BL31 ATF blobAndrey Smirnov2018-08-083-1/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add imx8mq_atf_load_bl31() containing all of the code needed to load and transfer control to BL31 ATF blob on i.MX8M. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | ARM: i.MX8MQ: Configure cntfrq only in EL3Andrey Smirnov2018-08-081-6/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We only can (and should only need to) configure cntfrq when running in EL3 and executing this code in any other exception level will result in exception. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | ARM: Add code to support SMCCC on AArch64Andrey Smirnov2018-08-086-3/+200
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Port SMCCC code from Linux kernel. To accomodate that: - Introduce CONFIG_ARM_SMCCC, to allow enabling the code independent of CONFIG_ARM_SECURE_MONITOR - Bring <linux/arm-smccc.h> in - Add necessary constants to arch/arm/asm-offsets.c Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | ARM: nxp-imx8mq-evk: Update DDR initialization codeAndrey Smirnov2018-08-082-214/+125
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previous version of DDR initialization code was generated by a beta version of MX8_DDR_tool. This updates the code to the output of MX8_DDR_tool v1.0, which seem to fix the vendor Linux kernel hang* that was happening with the previous version. * The kernel would hang as soon as it tried to utilize DDR's DVFS features and switch DDR frequency (disabling busfreq-imx8mq.c would fix the problem). Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | ARM: i.MX: fix compilation with BBU disabledSascha Hauer2018-08-061-1/+1
| | |/ / / | |/| | | | | | | | | | | | | | | | | | | | | | | Make a static inline wrapper actually static inline. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | | Merge branch 'for-next/fs-dentry-cache'Sascha Hauer2018-08-1335-2812/+4490
|\ \ \ \ \
| * | | | | block: Adjust cache sizesSascha Hauer2018-07-131-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use four times more cache entries and divide the memory for each entry by four. This lowers the linear read throughput somewhat but increases the access speed for filesystems. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | fs: squashfs: Switch to dentry cache implementationSascha Hauer2018-07-139-177/+365
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While at it implement symlink support. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | fs: cramfs: Switch to dentry cache implementationSascha Hauer2018-07-132-251/+273
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | fs: tftp: Switch to dentry cache implementationSascha Hauer2018-07-132-43/+55
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | fs: nfs: Switch to dentry cache implementationSascha Hauer2018-07-132-309/+234
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | fs: ubifs: Switch to dentry cache implementationSascha Hauer2018-07-136-484/+313
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | fs: ext4: Switch to dentry cache implementationSascha Hauer2018-07-113-123/+160
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | fs: devfs: Switch to dentry cache implementationSascha Hauer2018-07-112-66/+85
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | fs: ramfs: Switch to dentry cache implementationSascha Hauer2018-07-112-303/+99
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | fs: dentry cache implementationSascha Hauer2018-07-1118-1064/+2914
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds the Linux dentry cache implementation to barebox. Until now every filesystem driver resolves the full path to a file for itself. This leads to code duplication and is error prone since resolving paths is a complicated task. Also it can narrow down the lookup performance since barebox only knows ASCII paths and has no way of caching lookups. With this patch we get the Linux dcache implementation. The path resolving code from fs/namei.c is nearly taken as-is, minus the RCU and locking code. Dcaching is made simple as of now: We simply cache everything and never release any dentries. Although we do reference counting for inodes and dentries it is effectively not used yet. We never free anything until a fs is unmounted in which case we free everything no matter if references are taken or not. This patch also contains a wrapper in fs/legacy.c to support filesystems with the old API. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | | | Merge branch 'for-next/dts'Sascha Hauer2018-08-1355-136/+185
|\ \ \ \ \ \
| * | | | | | dts: update to v4.18-rc7Sascha Hauer2018-08-131-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
generated by cgit v1.2.3 (git 2.39.1) at 2024-04-19 11:50:15 +0000