| Commit message (Collapse) | Author | Age | Files | Lines |
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The ZynqMP boots from an SDHCI device by reading a boot.bin file from
the FAT16/32 partition, which is the first partition in the MBR.
The update handler copies a boot.bin image to this partition, which
might be board specific.
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Link: https://lore.barebox.org/20210624150054.1205422-5-m.tretter@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Use the same partition on the SD-card that is used by the ROM loader to
find the BOOT.BIN (which contains the FSBL and Barebox) to store the
Barebox environment.
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Link: https://lore.barebox.org/20210624150054.1205422-4-m.tretter@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The pmu fw manages the permissions who can enable/disable the clocks.
There are a few clocks (TOPSW_LSBUS and LSBUS) which are exposed to
Barebox and Barebox assumes that is has to enable the clocks. However,
the pmu fw considers the clocks under its control and returns a
permission denied for the clock enable request.
Assume that clocks that are already enabled don't need to be enable by
Barebox to avoid the permission denied errors.
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Link: https://lore.barebox.org/20210624150054.1205422-3-m.tretter@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The reset reason is available in the APB register set on the ZynqMP.
Read the reset reason and set the reset source accordingly.
There might be multiple bits set in the APB register. Use the MSB for
determining the actual reset source.
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Link: https://lore.barebox.org/20210624150054.1205422-2-m.tretter@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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dev_request_mem_resource returns a possible error pointer. If it
succeeds mem->start will always be valid. Rectify the confusion.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20210621064719.19246-1-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Clock code sync with Linux got way more straight forward, now that
barebox knows about struct clk_hw. Remove the suggestion to replace
clk_hw with clk when porting.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20210621064646.19094-1-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Building with nvmem cell support disabled shows a mismatch in the stub
prototype. Fix it up.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20210619033212.3391-2-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Looking through all instances of struct nvmem_config in the tree shows
that only the new nvmem_regmap_register failed to initialize all
members, e.g. config::read_only was uninitialized. Fix this up.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20210619033212.3391-1-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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dw_wdt may be unstoppable once started when no reset line is available.
This behaviour is quite common for different watchdogs, it is not worth
issuing a warning.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Link: https://lore.barebox.org/20210610130613.27983-4-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Communicate the maximum possible timeout to the watchdog core.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Link: https://lore.barebox.org/20210610130613.27983-3-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Let the watchdog core know if the watchdog is currently running or not.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Link: https://lore.barebox.org/20210610130613.27983-2-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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At least some variants of the dwc watchdog controllers need the
value 0x76 written to the counter restart register to actually
take the value written to the Timeout range register. Happened
on Rockchip RK3568, without this the watchdog immediately resets
the system.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Link: https://lore.barebox.org/20210610130613.27983-1-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The bthread -v command already returns an appropriate exit code if
threads can't be scheduled. Have it spawn 16 threads and switch between
them for a second and verify that all of these threads were indeed
terminated.
Acked-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20210604084704.17410-14-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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We don't want to enable self tests in the normal configs as they may,
in future, bloat size needlessly. Enable it instead in the base.cfg
fragment and add a test that verifies the selftest command
runs without errors.
Selftests can be run on startup for CONFIG_SHELL_NONE systems. This is
not implemented here. For such systems the test will be skipped
as CONFIG_CMD_SELFTEST won't be defined. To manually skip with
emulate.pl, add --no-kconfig-base.
Acked-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20210604084704.17410-13-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This script is a wrapper around tuxmake, qemu and labgrid-pytest.
It parses the same YAML files, labgrid-pytest uses and instructs
tuxmake to build and collect the needed images.
By default, it will start an interactive emulator session, but with
--test, it can also run labgrid-pytest instead.
The script has some knowledge of QEMU options to make common tasks like
passing images straight-forward.
Script is written with both manual use and CI in mind.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20210604084704.17410-12-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The test can be run manually with e.g.
labgrid-pytest --lg-env test/arm/qemu_virt64_defconfig.yaml test/py
Acked-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20210604084704.17410-11-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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There are various ways barebox can run under emulation, some of them are
described in the documentation and some more in the git history.
Make running the emulators more convenient to use by collecting some
known-good emulator invocations in a machine readable format.
These files can be processed by a test/emulate.pl script added in a
follow-up commit. They contain enough information to configure, build
and run barebox inside an emulator. Those YAML files utilizing QEMUDriver
can also be directly parsed by labgrid for running tests.
Utilizing labgrid for this will allow using the same test suite for
physical targets as well in future.
Acked-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20210604084704.17410-10-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Port over the Linux v5.11 selftest for printf sans the parts we don't
support. This can be used to catch regressions if changes affecting the
printf code are made.
Acked-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20210604084704.17410-9-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Self tests is code written to run within barebox to exercise
functionality. They offer flexibility to test specific units of barebox
instead of the program as a whole. Add a very simple infrastructure
for registering and executing self-tests. This is based on the Linux
kselftest modules. We don't utilize modules for this, however, because
we only have module support on ARM, but we need a generic solution.
Selftests can be enabled individually and even tested without shell
support to allow tests to happen for size-restricted barebox images
as well.
Acked-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20210604084704.17410-8-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Adding the tinyemu files as separate files and including them has the
nice benefit that temu users can just use these files directly instead
of copy pasting. While at it, update the section as input, as support
was added meanwhile.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20210604084704.17410-7-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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For non-multi-image configuration, KBUILD_IMAGE is taken as the image to
install. It was so far not set for openRISC. Define it, so it can be
used by the make install stage, e.g. to collect artifacts after a CI
run.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20210604084704.17410-6-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Having to manually swap the words in the MIPS Malta image for QEMU
little endian emulation is annoying.
Have the multi-image build for Malta generate a second .swapped
image that can be readily used if needed.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20210604084704.17410-5-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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ARCH=um (User Mode) is the Linux kernel counterpart to our sandbox
architecture. Add um as an alias, so we can interoperate with tools that
handle ARCH=um specially.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20210604084704.17410-4-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Linux already does this. Follow suit so we can interoperate with tools
that assume Linux-like Kbuild structure.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20210604084704.17410-3-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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For CI, it would be useful to have the barebox build install the
artifacts into a directory. Add an install target that does this.
Example usage: make install INSTALL_PATH=install/
Unlike Linux, we don't set INSTALL_PATH to a default value, because
most barebox-enabled boards don't have barebox in a file system.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20210604084704.17410-2-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Unlike Linux, barebox doesn't propagate pinctrl probe deferrment from
the probe of other drivers. This driver here is registered at
console_initcall level, which may be too late to apply pin config for
console drivers. Move the driver to core_initcall level.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This adds support for the RK3568 SoC to the Rockchip pinctrl driver.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Link: https://lore.barebox.org/20210608140545.30696-6-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Newer SoCs support a drive strength setting per pin. This patch adds
support for it. Currently a no-op as no currently supported SoC in the
driver has support for this.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Link: https://lore.barebox.org/20210608140545.30696-5-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The Linux Rockchip pinctrl driver is more flexible when it comes
to register offsets which are different between SoCs. This patch
updates different pieces of the driver to prepare merging support
for newer SoCs.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Link: https://lore.barebox.org/20210608140545.30696-4-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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resource_size_t is correctly printed with %pa.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Link: https://lore.barebox.org/20210608140545.30696-3-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Rename variable to match with Linux Kernel.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Link: https://lore.barebox.org/20210608140545.30696-2-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Failure to add one memory bank shouldn't prevent the driver from trying
to add other memory banks, but the user should be informed as this
points at a misconfiguration. Have the probe functions eventually fail
with -EBUSY in such a case.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20210531071239.30653-7-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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barebox_add_memory_bank() can fail if the to-be-added memory region
has been requested before. This can happen most easily on i.MX and
STM32MP1 boards:
- The /memory node in the device tree requests a region
- The DDR controller driver requests an overlapping region after
reading back RAM configuration.
This most often leads to error messages down the road, but it can be
difficult to pinpoint the cause. Propagate the error code from
arm_add_mem_device(), so DDR controller drivers can fail their probe
on error.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20210531071239.30653-6-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Now that errors from of_probe are propagated to the respective initcalls
registering the device tree, propagate of_add_memory_bank errors as
well. This ensures that clashes of device-tree added regions with
previous ones don't go unnoticed. This can e.g. be the case if a device
tree happens to have both /memory@X { }; and /memory { }; nodes.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20210531071239.30653-5-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Errors during device tree registration, while uncommon, are really
annoying, because the system may limp along and it's not clear where
the misbehavior originates from.
Failing the initcall of the device tree would improve user experience in
that error case. There is intentionally no early exit on error cases
to give barebox a chance to probe the serial driver to actually report
errors when DEBUG_LL is disabled.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20210531071239.30653-4-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Some ARM subarchitectures read back RAM size from the SDRAM
controller and use the info to register memory banks.
If an overlapping memory region is already registered, e.g. via device
tree /memory, this second registration will fail.
This is especially annoying as it can regress after a device tree sync:
- Kind soul updates upstream device tree to describe minimal available
RAM across hardware variants
- barebox PBL has enough info about the board to set up larger RAM size
and relocates barebox to the end of the RAM
- barebox proper starts with new device tree and is upset to
find itself outside of registered memory
Account for this by growing the existing bank if a bank to be added
happens to overlap it. As a special case, if the existing bank
completely contains the new memory bank, the function is a no-op.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20210531071239.30653-3-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Follow-up commit will fuse overlapping RAM banks. As all memory is
supposed to be registered during mem_initcall or before, we can postpone
device creation to mmu_initcall, so we can directly allocate devices
spanning the correct region.
The mem driver and the devinfo command are the only consumers of these
devices, so it's ok to register the devices at mmu_initcall.
While at it, drop the struct memory_bank::dev member.
It's unused anywhere.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20210531071239.30653-2-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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A variant of the designware eqos core is used on Rockchip SoCs. Add
support for it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Link: https://lore.barebox.org/20210608093635.5749-5-s.hauer@pengutronix.de
Link: https://lore.barebox.org/20210609085512.3865-1-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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When the device node of the ethernet device has a mdio subnode then
attach it to the registered mdio bus. This allows the mdio driver
to handle the reset-gpios propertie in the phy nodes.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Link: https://lore.barebox.org/20210608093635.5749-4-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The designware eqos DT binding has support for specifying reset GPIOs.
Add support for them. This binding is deprecated for new boards, but
there are still some upstream dts files using it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Link: https://lore.barebox.org/20210608093635.5749-3-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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GPIO properties in the device tree can have a -gpios suffix or a -gpio
suffix. The latter was not handled, this patch changes that.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Link: https://lore.barebox.org/20210608093635.5749-2-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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