| Commit message (Collapse) | Author | Age | Files | Lines |
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Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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In order to accomodate SoCs that come with multiple watchdogs (or any
other reset sources of the same kind) add a notion of "reset source
instance", similar to what we already have for bootsource API.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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All of the instances of imx*_boot_save_loc() do exactly the same thing
with the only difference being SoC-specific imx*_get_boot_source
call. Convert the code into a generic function taking function pointer
to perform SoC specific bits.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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We use BOOTSOURCE_SPI to denote, among other things, QSPI on i.MX7 and
VFxxx, whereas on i.MX6 it is used to mean SPI-NOR. To make functions
like imx_xload() work consistently across various i.MX platforms use
already existent BOOTSOURCE_SPI_NOR constant to mean booting from
SPI-NOR on i.MX6 as well.
Replace all in-tree code that relying on the old value as well.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add BOOTSOURCE_CAN for SoCs that can boot from CAN interface.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Move magic numbers and algorithm for determining Serial ROM bootsource
and boot instance into utility functions. Add a comment on the logic
behing the latter while at it.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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We don't need to check if the boot source is NAND in cases when we
already know for a fact that we booted from something else. To avoid
that, move the NAND check to be done inside of default branch of
the preceeding switch statement.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Share code to detect NAND as a boot source between i.MX53 and i.MX6
which behave the same in that aspect.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Move code to extract appropiate BOOT_CFG bits to decode bootsource on
i.MX53, 6, and 7 into small functions for clarity and to allow sharing
the code between i.MX53 and i.MX6.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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As per "Table 6-33. Boot device selection" from "i.MX 7Dual
Applications Processor Reference Manual, Rev. 1, 01/2018" QSPI is
encoded with 0b0100 and Serial ROM with 0b0110. Fix the original code
to use correct values.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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i.MX7 differs from i.MX6 and i.MX53 and bit 7 in SBMR is not used to
signify boot from NAND.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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On both i.MX6 and i.MX7 (also true for VFxxx) there's an additional
path that leads mask ROM to switch into serial bootloader mode. Add
code to support it.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The algorithm to detect serial mode can be shared between i.M6 and
i.MX7 as wall as simplified a bit by replacing swich goto/break/return
termination logic with more trivial if statements.
This commit also sets the stage for additional improvements in the
commits that follow.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The location of BMDO field in SBMR/SBMR2 registers is consistent
across all i.MX SoCs starting from i.MX53. Add simple helper function
imx53_get_bmod and use it to avoid code duplication.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Port linux/build_bug.h needed by some of more recent kernel code.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Check if PLL2 PFD0 or PLL2 PFD2 is selected as clock source in
register CCM CBCMR->pre_periph_clk_sel or CCM CBCMR->pre_periph2_clk.
Don't reset the used PFDs to avoid system hang.
ported from https://github.com/Freescale/u-boot-fslc/
commit/9293d7fd502ce29302fadb8b4ccb9231ec0bcc66
Signed-off-by: Marc Ohlf <ohlf@mkt-sys.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add the following boards:
- ZII RDU2 (all variants)
- ZII Vybrid Dev Board (and its derivatives)
- Freescale/NXP i.MX7D SabreSD
- NXP i.MX6ULL EVK
- element 14 WaRP7
to be selected by default by imx_v7_defconfig.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Grepping for cpu_is_mx6 will not find the definitions of this function
because it is hidden behind a macro. Add a comment containing all
functions defined here to make it greppable.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Using FIFO in LPUART results in subtle serial input draining issues
which are quite difficult to reproduce and troubleshoot. Since the
change offered only moderate performance gain revert the code to
operate in no-FIFO mode to avoid FIFO-related problems alltogether.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The da9063 is used on some Phytec boards. Enable it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Use zImage instead of linuximage as kernel boot image name for mmc and
emmc.
Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
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Use the generic jedec-spi-nor compatible for the SPI NOR node to make it
generic.
Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
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Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
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Enable both USB ports (HOST and OTG) on the phyBOARD-Mira with i.MX
6Quad/Dual, i.MX 6Solo/DualLight and i.MX 6QuadPlus.
Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
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This patch adds USB support for the phyBOARD-Mira for the host port and
the OTG port.
Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
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Add Phytec phyCORE-i.MX6 Solo:
- imx6dl-phytec-phycore-som-nand:
- 1GiB RAM on 1 Bank with 32Bit
- 100Mbit Ethernet
- NAND
- SD
- UART
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
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Add Phytec phyCORE-i.MX6 QuadPlus:
- imx6qp-phytec-phycore-som-nand:
- 1GiB RAM on 2 Banks with 64Bit
- 1000Mbit Ethernet
- NAND
- SD
- UART
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
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Add the SPI NOR barebox-environment node to the devicetree to make it
possible to use the barebox-environment from SPI NOR when booting barebox
from SPI NOR.
Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
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The actual RAM timings in the phyFLEX BSP are generated for 528 MHz RAM clock
frequency, but the i.MX 6Solo/DualLite has only a 400 MHz RAM clock. These new
timings are accompanied by a speed increase of approx 10%.
Signed-off-by: michael grassmann <michael.grassmann@phytec.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
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Set the BUCK mode for all BUCKS (1-4) from BUCK_MODE_AUTO to
BUCK_MODE_SYNC. If the BUCKs are in BUCK_MODE_AUTO in very rare cases
it is possible that the BUCK goes in power down mode.
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
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Add boot file 'emmc' for phyCORE-i.MX6.
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
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Sync the USDCH drive strength muxing with kernel.
With this drive strength we saw no sd card errors.
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Acked-by: Stefan Lengfeld <s.lengfeld@phytec.de>
Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
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Set needed bootargs for android in mmc, emmc and nand boot.
Signed-off-by: Matthias Rabe <matthias.rabe@sigma-chemnitz.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
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add bootscript for emmc boot
Signed-off-by: Matthias Rabe <matthias.rabe@sigma-chemnitz.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
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added automount configuration for emmc, if available.
needed f.e. by the android boot.
Signed-off-by: Matthias Rabe <matthias.rabe@sigma-chemnitz.de>
Tested-by: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
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We store kernel and oftree in static UBI volumes now. No need
for separate partitions any more.
Signed-off-by: Christian Hemp <christian.hemp@gmail.com>
Acked-by: Stefan Lengfeld <s.lengfeld@phytec.de>
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The plus SoC variants have some differences in the clock controller.
For now fix the NAND controller clock. There are more differences
that might be relevant, but for now are left for a future excercise.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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We need to distinguish between the i.MX6d/q and the i.MX6d/q plus SoC
variants. Add a cpu type for them to make that possible in the next
steps.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The i.MX6sl has another silicon revision register offset than the
other i.MX6 SoCs. Finding the register is done twice. Factor out
a function to get a common place to find the register.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Having the i.MX6 type detection completely inline is less then optimal
in terms of binary size. Make the detection functions non-inline. While
at it ask the registers only once and store the result in a variable as
the i.MX6 type is unlikely to change during runtime.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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