| Commit message (Collapse) | Author | Age | Files | Lines |
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Since commit c4c2317fe8a2 (defaultenv: generate force-built-in
(zero) environment file), we have this generated file.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Correct the environment path for sama5d4 xplained board.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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When debugging the nand-bb devices also the raw position on the
device is interesting, print it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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in nand_bb_read() 'offset' contains the virtual position on the device,
but we have to test for a bad block on the raw physical position, so
use bb->offset instead of offset
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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mtd_erase does not skip bad blocks, we must skip them in nand_bb_erase
instead.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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When a block is marked bad after the bb device has been created
the real size of the bb device is smaller than the calculated size
on creation. In this case we can't rely on the upper layers anymore
that they won't pass read/write sizes in that fit into the device.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Partitions are mtd devices themselves, but the 'erasebad'
parameter is only set to the master mtd device. To allow to
erase bad blocks on partitions test the master device instead
of the partition devices.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This is broken since:
| commit 00f119a29387cfb1b188fcc4daa4aa94186ac7a9
| Author: Sascha Hauer <s.hauer@pengutronix.de>
| Date: Fri Aug 1 14:09:48 2014 +0200
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| mtd: omap gpmc: fix ecc bytes/size
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| The ecc bytes / size are per subpage, not per page.
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| Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The ecc code in omap_correct_data() expects to correct a whole page
at once, so we must tell the nand layer that we have 4 * 13 bytes of
ecc bytes and 4 * 512 bytes of ecc size. Otherwise the NAND layer will
iterate over 512 byte steps over a page and call the .correct callback
each time.
This only works for 2k pagesize and needs revisit once other page sizes
shall be supported. It would be better to tell the nand layer the real
ecc bytes (13) and ecc size (512) instead and drop the iteration in
omap_correct_bch(). However, this needs better testing so it isn't done
here now.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The configs grew too big to support both NAND and MMC at the
same time, so split them.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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So that they get deleted later when something else is booted.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This patch imports the sequencer code from uboot using the new script
scripts/socfpga_get_sequencer.
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Use the new socfpga_mem_calibration function. This is a sideeffect of
the new script to import generated sequencer code. The return value of
the function is 1 if the calibration succeeds, 0 otherwise.
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This script extracts the socfpga sequencer from a generated u-boot
automagically. The resulting changes of the barebox tree should be
enough to compile with the new sequencer.
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Altera's U-Boot tree has following commit
FogBugz #159721: Enhance Arria V MPU clock to 1050MHz
It writes to the two undocumented registers
CLKMGR_ALTERAGRP_MPUCLK
and
CLKMGR_ALTERAGRP_MAINCLK
to setup the SoC for higher clocks.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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From Altera U-Boot:
FogBugz #210587: Fixing PLL HW configuration issue
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Here is checkpatch.pl log:
WARNING: space prohibited between function name and open parenthesis '('
#134: FILE: arch/arm/mach-bcm2835/core.c:75:
+void __noreturn reset_cpu (unsigned long addr)
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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increase the mbox timeout as it take more time to retreive the mac
fix led register too
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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this will allow to handle IP power automatically and not at board level
Mainline kernel need this as they do not have the regulator driver support
as some IP such as USB are not power on at boot
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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this will use the device name as regulator name
with the same Algo as clkdev for lookup
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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as the name is very long, return ps1 to the next line
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add support for the Intel XScale PXA255 development system platform.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add support for the PXA25X SoC family, the oldest of the PXA serie.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Improve smc1111 driver debug messages by printing the register accessed,
the current bank, and the values.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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All the smcs family chips 91c94, 91c96, 91c100, 91c111 share almost the
same behavior and register sets. The noticeable exceptions are coped
with in this patch, ie :
- 91c94 and 91c96 only have an internal 10 Mbps phy
The registers used for phy discovery on later chips will corrupt the
91c96 state.
- 91c94 and 91c96 have a control and config register quite different
from their 91c1xx conterparts
A platform data user defined couple of registers is introduced. If
these values are 0, 91c1xx legacy behavior is assumed.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Smc network IPs can be wired up in different funny ways. For example the
lubbock pxa25x development platform wires all address lines shifted by
2, ie. bus A2 is smc91c96 A0, bus A3 is smc91c96 A1 etc ...
In order to cope with the different possible combination, add a shift
parameter for addresses.
By default, the old behaviour using the 32 bit accesses is kept.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add the first pxa3xx board, zylonite. Zylonite is the Marvell System
Development Platform.
Several version are available, based on either :
- PXA300
- PXA310
- PXA320
This version was only tested on a PXA310 based board, and uses :
- the ethernet controller
- the nand controller
These drivers seem to be common to all zylonite boards.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add the pxa3xx architecture, for pxa300, pxa310 and pxa320 SoCs.
This includes :
- the registers
- the cpu type
- the reset source handling
- a minimal set of clocks
- pin control definitions
In this last case, the big mfp-pxaxxx.h files were dropped, forcing
board developers to use MFP_LPM_* macros cunningly.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Move reset_source detection and poweroff to pxa2xx.c, to prepare the
incoming pxa3xx reset_source detection.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The driver is taken from the Linux kernel, with the following changes :
- all DMA removed
- all asynchronous handling removed, including the interrupt handler,
and the asynchronous state handling
- pxa armada support removed
Most the kernel structure was kept, to ease up future fixes integration
from the kernel driver.
The driver is tested on a pxa3xx system development
board (aka. zylonite), and reading, writing, erasing, and bad block
management were tested.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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it's done in the discover packet so let's do it also in the request packet.
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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we are not supposed to fill ciaddr, yiaddr and siaddr in the request packet.
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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In the request packet, we are supposed to copy the IP that the DHCP server
provided in the offer packet so that dhcp_extended can fill the option 50.
There is actually an error in barebox as the pointer to the packet currently
built is used as the source instead of the pointer to the offer packet.
With this patch, barebox now sends a request packet which includes the right
requested IP in option 50.
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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