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* RISC-V: StarFive: add board support for BeagleV StarlightAhmad Fatoum2021-06-2417-0/+1504
* misc: add power sequencing driver for initializing StarFive peripheralsAhmad Fatoum2021-06-243-0/+103
* gpio: add support for StarFive GPIO controllerAhmad Fatoum2021-06-245-2/+194
* reset: add device_reset_all helperAhmad Fatoum2021-06-242-10/+75
* hw_random: add driver for RNG on StarFive SoCAhmad Fatoum2021-06-243-0/+216
* watchdog: add StarFive watchdog driverAhmad Fatoum2021-06-243-0/+114
* reset: add StarFive reset controller driverAhmad Fatoum2021-06-246-0/+409
* clk: add initial StarFive clock supportAhmad Fatoum2021-06-245-0/+634
* mci: dw_mmc: match against StarFive MMC compatiblesAhmad Fatoum2021-06-241-3/+11
* mci: dw_mmc: add optional reset lineAhmad Fatoum2021-06-241-0/+11
* dma: allocate 32-byte aligned buffers by defaultAhmad Fatoum2021-06-241-1/+6
* mci: allocate sector_buf on demandAhmad Fatoum2021-06-241-9/+5
* mci: allocate DMA-able memoryAhmad Fatoum2021-06-241-1/+2
* net: designware: add support for IP integrated into StarFive SoCAhmad Fatoum2021-06-246-3/+139
* net: designware: fix non-1:1 mapped 64-bit systemsAhmad Fatoum2021-06-243-27/+68
* soc: sifive: l2_cache: enable maximum available cache waysAhmad Fatoum2021-06-241-0/+19
* soc: starfive: add support for JH7100 incoherent interconnectAhmad Fatoum2021-06-245-0/+63
* drivers: soc: sifive: add basic L2 cache controller driverAhmad Fatoum2021-06-247-1/+164
* RISC-V: support incoherent I-CacheAhmad Fatoum2021-06-248-0/+48
* RISC-V: add exception supportAhmad Fatoum2021-06-2412-0/+510
* RISC-V: dma: support multiple dma_alloc_coherent backendsAhmad Fatoum2021-06-243-35/+88
* nvmem: add StarFive OTP supportAhmad Fatoum2021-06-243-0/+211
* RISC-V: socs: add Kconfig entry for StarFive JH7100Ahmad Fatoum2021-06-241-0/+22
* RISC-V: erizo: make it easier to reuse ns16550 debug_llAhmad Fatoum2021-06-242-2/+11
* RISC-V: S-Mode: propagate Hart IDAhmad Fatoum2021-06-2410-11/+114
* RISC-V: cpuinfo: return some output for non-SBI systems as wellAhmad Fatoum2021-06-213-24/+43
* RISC-V: extend multi-image to support both S- and M-ModeAhmad Fatoum2021-06-2114-31/+102
* RISC-V: virt: select only one timerAhmad Fatoum2021-06-211-1/+0
* clocksource: RISC-V: demote probe success messages to debug levelAhmad Fatoum2021-06-212-2/+2
* watchdog: dw_wdt: fix resource reservation error checkAhmad Fatoum2021-06-211-2/+3
* Documentation: devel: porting: update after clk_hw syncAhmad Fatoum2021-06-211-1/+0
* nvmem: fix mismatch between extern and inline stub prototypesAhmad Fatoum2021-06-211-1/+1
* nvmem: regmap: fix use of uninitialized space with nvmem_regmap_registerAhmad Fatoum2021-06-211-1/+1
* Merge branch 'for-next/wdt'Sascha Hauer2021-06-161-4/+11
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| * watchdog: dw_wdt: denote message to debug levelSascha Hauer2021-06-111-1/+1
| * watchdog: dw_wdt: set maximum timeoutSascha Hauer2021-06-111-4/+5
| * watchdog: dw_wdt: Detect if running initiallySascha Hauer2021-06-111-0/+3
| * watchdog: dw_wdt: Write counter restart registerSascha Hauer2021-06-111-0/+3
* | Merge branch 'for-next/testing'Sascha Hauer2021-06-1656-25/+1810
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| * | test: add bthread testAhmad Fatoum2021-06-092-0/+25
| * | test: self: run selftests as part of the pytest suiteAhmad Fatoum2021-06-092-0/+12
| * | test: add emulate.pl, a runner for barebox on emulated targetsAhmad Fatoum2021-06-094-0/+603
| * | test: add first sample testsAhmad Fatoum2021-06-097-0/+155
| * | test: add labgrid-style configs for some emulated targetsAhmad Fatoum2021-06-0922-0/+393
| * | test: self: port Linux printf kselftestAhmad Fatoum2021-06-094-0/+314
| * | test: add basic barebox self-test infrastructureAhmad Fatoum2021-06-0911-1/+236
| * | Documentation: boards: RISC-V: update TinyEMU supportAhmad Fatoum2021-06-093-10/+24
| * | openrisc: set default KBUILD_IMAGEAhmad Fatoum2021-06-091-0/+2
| * | MIPS: qemu-malta: generate swapped image as part of multi-image buildAhmad Fatoum2021-06-094-14/+15
| * | kbuild: add ARCH=um alias for sandboxAhmad Fatoum2021-06-091-0/+4
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