| Commit message (Collapse) | Author | Age | Files | Lines |
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We are in the *NIX world, so keep a 'void' as is.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
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Include the board config first to be able to configure the memory management
in the documented way. If not used, the defaults are used.
On the other hand, there is no need to pollute the other source files with
these local management settings. So, move them from the header into the
C source file.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
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Remove unused code to get a better understanding what really is happen in the
source.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
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The 'size_t' declaration is needed for the function prototypes.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
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There is no need to init variables with 0. So, move them to the bss and let
the C runtime does this job for us.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
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Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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loop in i2c_imx_acked() in low bit rates it takes some time until the
ACK comes in.
Also add a delay before polling for bus not busy in i2c_imx_read.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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During i2c read the original pattern was:
1. write i2c slave address
2. wait for transmit complete + clear IIF
3. wait for receive acknowledge
4. wait for IIF interrupt
Due to the clear of the I2SR register, the IIF flag was cleared, too. So
in step 4 the Interrupt wasn't detected. To fix this problem, we move
the clean of IIF before the writing of the slave address. So that it
looks this way:
0. clear IIF
1. write i2c slave address
2. wait for transmit complete
3. wait for receive acknowledge
4. wait for IIF interrupt
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Currently all omap boards reside in boards/omap. This is
probably not a good idea as it leaves no good place to
put custom omap boards in. Anyway, make the boards compile
again until someone provides a better solution.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Eric Benard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The RESET command was removed during the nand_imx.c driver rework.
The reset commant is necessary in order to get Micron Nand running
as they need a RESET command before being able to get any command.
Signed-off-by: Eric Benard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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FMCR is (*((volatile u32 *)(x))) (0x10027814) and thus this leads
to a data abort.
Signed-off-by: Eric Benard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The PLL initialisation does not work properly if run from
SDRAM. Move the initialisation code to lowlevel init which
is run in NFC RAM.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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- Add support for booting from NAND
- Add support for internal Boot mode
- Add I2C PMIC support
- Enable FEC Ethernet controller
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The flash header is used on different i.MXs other than the
i.MX25, so rename it. Also, add a possibility to put a flash
header on different offsets (0x100, 0x400 and 0x1000), needed
for different boot mediums.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Acked-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Use the generic v1 driver instead
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Eric Benard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Eric Benard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Eric Benard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The SOM can integrate a 16550 Quad UART which can be used
for serial console.
Signed-off-by: Eric Benard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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64MB strataflash consist in 2x256Mb flashs. So we must declare
2 cfi_flash in order to have both 256Mb flash geometry properly
detected. For flash <= 32 MB we prefer not to register the second
cfi_flash which would be an alias of the first one.
Signed-off-by: Eric Benard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add a menu entry and proper settings for 128MB and 256MB
RAM size.
Signed-off-by: Eric Benard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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