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* efi: move x86 clocksource to device/driverJean-Christophe PLAGNIOL-VILLARD2017-03-096-13/+43
| | | | | | | | | | | | | | | so we can dynamicly register the device As we may need to use HW IP for clocksource. As on EFI we could use Timestamp GUID if present (Not often the case as it's not even enabled by default on any Target on EDK II not even OVMF) Or if we choose we could use a Simulated Timestamp driver that work on Event (Add Later) Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* clocksource: move dummy clock source to init_clockJean-Christophe PLAGNIOL-VILLARD2017-03-091-9/+24
| | | | | | | | | And registered it as soon as possible (at pure initcall). So we not need to check the cs all the time. As get_time_ns() is one of the most called function of barebox at runtime. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* clocksource: allow to have multiple device from clock sourceJean-Christophe PLAGNIOL-VILLARD2017-03-092-1/+13
| | | | | | | | | use the one with the most priority. We can not select the clocksource at user level. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* efi: move x86 clocksource init at core initcall levelJean-Christophe PLAGNIOL-VILLARD2017-03-093-4/+4
| | | | | | | so we can use device/driver model Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* efi: move LoaderTimeInitUSec and LoaderDevicePartUUID to postcore initcallJean-Christophe PLAGNIOL-VILLARD2017-03-091-4/+11
| | | | | | | so we can use device/driver for the timer Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* efi: add prototype and definition for setting timerJean-Christophe PLAGNIOL-VILLARD2017-03-091-1/+7
| | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* efi: add prototype and definition for creating and closing eventJean-Christophe PLAGNIOL-VILLARD2017-03-091-2/+15
| | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* efi: add serial driver supportJean-Christophe PLAGNIOL-VILLARD2017-03-093-0/+226
| | | | | | | | | | | | | | So now we can stop to use the efi-stdio as this driver print on the Framebuffer and the serial at the same time. This is specially usefull if we want to use the framebuffer via efi-gop for something else. Do not forget to disable the efi-stdio device before enabling the console otherwise you will get double printing. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* video: add EFI Graphics Output Protocol supportJean-Christophe PLAGNIOL-VILLARD2017-03-093-0/+273
| | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* efi: add efi handle dump commandJean-Christophe PLAGNIOL-VILLARD2017-03-093-0/+182
| | | | | | | so we can inspect easly what is supported by the EFI implementation we running on Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* efi-gui: add Timestamp Protocol GUID definitionJean-Christophe PLAGNIOL-VILLARD2017-03-092-0/+4
| | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* efi: add minor and major to the bus and display it at bootJean-Christophe PLAGNIOL-VILLARD2017-03-091-1/+10
| | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* efi: bus: add firmware vendor and resision and tables infoJean-Christophe PLAGNIOL-VILLARD2017-03-092-1/+29
| | | | | | | This alllow us to known where we boot from Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARCH: efi: Finally drop it as now we can build efi bootup from x86Jean-Christophe PLAGNIOL-VILLARD2017-03-0928-1010/+1
| | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* fixup! efi: move x86 efi boot support to x86 archMichael Olbrich2017-03-092-2/+3
| | | | | | | | | As I noted in my other mail, this got lost during the move. Regards, Michael Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* efi: move x86 efi boot support to x86 archJean-Christophe PLAGNIOL-VILLARD2017-02-2730-101/+894
| | | | | | | prepare to drop the efi arch as efi boot up is not arch sepecific Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* x86: move bios bootup code to arch/x86/biosJean-Christophe PLAGNIOL-VILLARD2017-02-246-3/+4
| | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* efi: move startup and payload to common/efiJean-Christophe PLAGNIOL-VILLARD2017-02-246-2/+3
| | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* efi: move debug_ll.h to include/efiJean-Christophe PLAGNIOL-VILLARD2017-02-242-20/+21
| | | | | | | so other arch could include it too Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* efi: move bus driver to driver/efiJean-Christophe PLAGNIOL-VILLARD2017-02-2418-21/+26
| | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* efi: move clocksource out of archJean-Christophe PLAGNIOL-VILLARD2017-02-245-1/+6
| | | | | | | as efi is not an arch but a boot mode from where barebox is started Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* efi: move block io driver to driver/blockJean-Christophe PLAGNIOL-VILLARD2017-02-244-1/+6
| | | | | | | so it can be reused on any ARCH Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* i.MX: esdhc: fix imx-esdhc driver for non-OF boardsAlexander Kurz2017-02-141-15/+15
| | | | | | | | | | Commit 39f7a7ee8b68 ("i.MX: esdhc: Do not rely on CPU type for quirks") made imx-esdhc dependent on OF and broke probing for all non-OF boards. Since newer platforms like mx6 and vf610 are restricted to OF, the non-OF probing only needs to distinguish mx5 vs earlier SoC. Signed-off-by: Alexander Kurz <akurz@blala.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* i.MX: i2c: fix i2c-fsl for non-OF boardsAlexander Kurz2017-02-141-4/+10
| | | | | | | | | | With commit 4ed5b778a56b ("i.MX: i2c: Add Vybrid support") i2c-fsl probe returns -EINVAL for all non-OF boards. Since newer planforms, especially vf610 are restricted OF-only it is safe to assume "fsl,imx21-i2c" if CONFIG_OFDEVICE is not set. Signed-off-by: Alexander Kurz <akurz@blala.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/net'Sascha Hauer2017-02-132-41/+314
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| * net/phy: marvell: add support for 88e1510 to marvell phy driverUwe Kleine-König2017-01-131-3/+201
| | | | | | | | | | | | | | This is mostly copied verbatim from the Linux driver. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * net/phy: marvell: improve config_aneg for 88E1121R and 88E1318SUwe Kleine-König2017-01-131-2/+76
| | | | | | | | | | | | | | This is taken from the Linux driver Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * net/phy: marvell: align definition of MII_88E1121_PHY_MSCR to Linux driverUwe Kleine-König2017-01-131-3/+3
| | | | | | | | | | Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * net/phy: marvell: change spacing to be more similar to the Linux driverUwe Kleine-König2017-01-131-28/+28
| | | | | | | | | | | | | | | | To make the barebox driver more similar to the Linux driver, only use a single space before the = in member initialisation. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * net/phy: marvell: rename phy_driver array to match Linux driverUwe Kleine-König2017-01-131-2/+3
| | | | | | | | | | Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * net/phy: marvell: 88E1540 LED registers already exist on 88E1121Uwe Kleine-König2017-01-131-5/+5
| | | | | | | | | | | | | | So rename accordingly to match the definition used by Linux Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * net/phy: marvell: rename 88E1545 to 88E1540Uwe Kleine-König2017-01-132-3/+3
| | | | | | | | | | | | | | The Linux driver calls it 88E1540 so do it here, too. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/mvebu'Sascha Hauer2017-02-132-3/+5
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| * | bus: mvebu-mbus: fixup correct device treeUwe Kleine-König2017-01-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | When booting with an external device tree this external tree must be adapted, not the internal tree again. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | of: provide for_each_matching_node_fromUwe Kleine-König2017-01-171-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | This is for_each_matching_node for a given root similar to the other ..._from functions. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/misc'Sascha Hauer2017-02-135-6/+445
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| * | | spi: i.MX: Add driver for DSPIAndrey Smirnov2017-01-303-0/+423
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add driver for DSPI - SPI IP core found on various Freescale/NXP products (including Vybrid/VF610). Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | usb: ehci: pass full speed devices to companion controllerPeter Mamonov2017-01-301-6/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to the "Enhanced Host Controller Interface Specification for Universal Serial Bus" after a USB port reset the EHCI Driver checks the PortEnable bit in the PORTSC register. If set to a one, the connected device is a high-speed device [...]. At the time the EHCI Driver receives the port reset and enable request the LineStatus bits might indicate a low-speed device. Additionally, when the port reset process is complete, the PortEnable field may indicate that a full-speed device is attached. In either case the EHCI driver sets the PortOwner bit in the PORTSC register to a one to release port ownership to a companion host controller. Signed-off-by: Peter Mamonov <pmamonov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | mtd: spi-nor: add support for s25fl208kPeter Mamonov2017-01-301-0/+1
| |/ / | | | | | | | | | | | | Signed-off-by: Peter Mamonov <pmamonov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/imx'Sascha Hauer2017-02-13116-265/+8713
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| * | | ARM: i.MX7: Add PSCI supportSascha Hauer2017-02-132-0/+90
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds the SoC specific PSCI bits for i.MX7. Based on the corresponding U-Boot code. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: Add PSCI supportSascha Hauer2017-02-1317-6/+1092
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch contains the barebox implementation for the ARM "Power State Coordination Interface" (PSCI). The interface is aimed at the generalization of code in the following power management scenarios: * Core idle management. * Dynamic addition and removal of cores, and secondary core boot. * big.LITTLE migration. * System shutdown and reset. In practice, all that's currently implemented is a way to enable the secondary core one some SoCs. With PSCI the Kernel is either started in nonsecure or in Hypervisor mode and PSCI is used to apply power to the secondary cores. The start mode is passed in the global.bootm.secure_state variable. This enum can contain "secure" (Kernel is started in secure mode, means no PSCI), "nonsecure" (Kernel is started in nonsecure mode, PSCI available) or "hyp" (Kernel is started in hyp mode, meaning it can support virtualization). We currently only support putting the secure monitor code into SDRAM, which means we always steal some amount of memory from the Kernel. To keep things simple for now we simply keep the whole barebox binary in memory The PSCI support has been tested on i.MX7 only so far. The only supported operations are CPU_ON and CPU_OFF. The PSCI and secure monitor code is based on the corresponding U-Boot code. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: Add smc call supportSascha Hauer2017-02-083-0/+170
| | | | | | | | | | | | | | | | | | | | | | | | Taken from the Kernel: A wrapper to make a smc call from C. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: Add UNWIND macroSascha Hauer2017-02-081-0/+6
| | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | i.MX: vf610: Add support for ZII VF610 Dev FamilyAndrey Smirnov2017-02-0718-0/+2853
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for ZII VF610 Dev based designs such as: - VF610 Dev, revision B - VF610 Dev, revision C - CFU1, revision A - SPU3, revision A - SCU4 AIB, revision C Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: i.MX7: Initialize CSUSascha Hauer2017-02-061-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The CSU needs to be initialized, otherwise we cannot access memory in non secure mode. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: i.MX7: Add imx7s.dtsiSascha Hauer2017-02-061-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Needed for compiling the i.MX7 warp board which already includes this file. This file is necessary because the upstream dtsi file currently assigns MX7D_CLK_DUMMY to the gpt1 clock we use, so we won't get a meaningful clock rate. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | pinctrl: i.MX7: Fix LPSR sel_imput settingSascha Hauer2017-02-062-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The i.MX7 has two pinmux controllers, the regular and the LPSR controller. The LPSR pinmux controller doesn't have any sel_input registers, instead they can be found in the regular pinmux controller. This means whenever we want to apply the the sel_input setting for the LPSR controller, we have to apply them to the regular controller instead. In barebox take the easy way out and just add the difference of the two base addresses to the register offset. The same issue is present in the Kernel aswell, but when the bootloader already configured the pins correctly nobody notices when the Kernel sel_input setup effectively is a no-op. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | clk: i.MX7: setup ethernet clocksSascha Hauer2017-02-061-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Reparent ethernet clocks so that they can be used by the fec driver. The values are the same as U-Boot uses. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | clk: i.MX7: do not register PLL bypass clocks as separate clocksSascha Hauer2017-02-061-119/+85
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the Kernel the bypass bits in the PLLs are now registered as separate clocks and are no longer handled in the PLL code. In barebox we haven't made this step and there currently seems to be no reason to do so. This means that the bypass bits are currently modified in both the PLL driver and in the separate clocks which does not work properly. Drop all the bypass clocks to let the bypass bits be handled in the PLL driver exclusively. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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