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| * | | i.MX: ocotp: Move OCOTP driver to drivers/nvmemAndrey Smirnov2018-05-315-22/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move OCOTP driver to drivers/nvmem to be consistent with Linux kerenel. Cc: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Tested-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | i.MX: ocotp: Simplify BF macroAndrey Smirnov2018-05-311-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Cc: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Tested-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | i.MX: ocotp: Simplify OCOTP field packing/unpackingAndrey Smirnov2018-05-312-13/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Simplify OCOTP field packing/unpacking with macros from <linux/bitfield.h>. Cc: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Tested-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | i.MX: ocotp: Change MAC address layout for VFxxxAndrey Smirnov2018-05-311-10/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For reasons unclear VFxxx port of U-Boot chose to store MAC address in OCOTP using a layout that is incompatible with rest of i.MX world (both in U-Boot and Barebox). Unfortunately for us, that means that there are a number of boards out there that have had their MAC addresses programmed using U-Boot and in order to properly support those boards we need to change VFxxx port of Barebox to be compatible. Since the number of Barebox users on VFxx is in single digits, just chage the layout to that of U-Boot without trying to make this a configurable option. Cc: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Tested-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | i.MX: ocotp: Unify code paths for reading MAC addressAndrey Smirnov2018-05-312-62/+65
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no reason why code handling MAC-address properties of "ocotp0" and code fetching this information to pass it along to networking subsystem couldn't share majority of their code. Convert the driver to do that. Cc: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Tested-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/imx'Sascha Hauer2018-06-1157-216/+4290
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| * | | ARM: i.MX8: Add DDRC PHY and DDR CTL base addressesAndrey Smirnov2018-06-111-1/+3
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: lib64: Make string functions aware of MMU configurationAndrey Smirnov2018-06-117-12/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Optimized version of memset() in memset.S if called as: memset(foo, 0, size) will try to explicitly zero out data cache with: dc zva, dst which will result in Alignement Exception (DABT) if MMU is not enabled. For more info see: - C4.4.8 "DC ZVA, Data Cache Zero by VA" - D5.2.8 "The effects of disabling a stage of address translation" in "ARM Architecture Reference Manual. ARMv8, for ARMv8-A architecture profile" In similar vein, using optimized version of memcpy() could lead to a unaligned 16-byte write (using 'stp'), which is not allowed for Device-nGnRnE type of memory (see D5.2.8) and would liead to Alignement Exception. To fix both problems expose non-optimized and optimzied versions of the function and created a wrapper to dispatch the call to either one based on if MMU is enabled or not. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | scripts: imx-image: Limit v2 header size to HEADER_LENAndrey Smirnov2018-06-111-12/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Given the following: 1. Assembly code, namely "b 0x1000" instruction, in bb_header[] assumes that i.MX image header occupies first HEADER_LEN bytes and bootloader executable is located right after. 2. Code in imx_image_size() assumes that i.MX image header is HEADER_LEN bytes 3. Original code handling v2 header allocated more than HEADER_LEN buffer to store IVT + boot data + DCD. However, the code writing that buffer to disk is only set up to use first HEADER_LEN bytes and to silently discard the rest as a side effect. Let's be conservative and limit total size of v2 header to not exceed Inital Load Region (4K or HEADER_LEN) to match what's being done for v1. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | scripts: imx-image: Drop error return from write_dcd()Andrey Smirnov2018-06-111-7/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Write_dcd() exits early in case of failure, so there's no realy reason to have it return a error code as a result. Drop it and simplify the caller code. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | clocksource: armv8-timer: Make use of postcore_platform_driver()Andrey Smirnov2018-06-111-5/+1
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | clocksource: armv8-timer: Make armv8_clocksource_read() staticAndrey Smirnov2018-06-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are no users of that function outside of the driver itself, so re-declare it as static. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | Documentation: i.MX: Add missing <soctype>Andrey Smirnov2018-06-111-1/+1
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | Documentation: imx: Change block size for 'dd' to 1024Andrey Smirnov2018-06-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Real image starts at offset 0x400 (1024), so we can skip copying extra 512 bytes of zeros. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | pinctrl: i.MX: Add support for i.MX8Andrey Smirnov2018-06-112-6/+59
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: i.MX: xload-esdhc: Add support for i.MX8Andrey Smirnov2018-06-112-0/+34
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: i.MX: xload-esdhc: Allow custom buffer address, device offsetAndrey Smirnov2018-06-111-7/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add code to support specifying different buffer address and SD/MMC device offset to read it from in esdhc_start_image(). This change is needed to support i.MX8. NOTE: We intentionnaly "emulate" reading at arbitrary offset in esdhc_start_image() as opposed to implementing it in esdhc_read_blocks() in order to avoid having to detect if units of blocks or bytes should be used to specify offset to CMD18. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: i.MX: xload-esdhc: Rework to make code be less i.MX6-specificAndrey Smirnov2018-06-112-47/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert imx6_esdhc_start_image() into a generic esdhc_start_image() by making accept already filled "struct esdhc" as well as use esdhc_read_blocks(). With that change, create new imx6_esdhc_start_image() whose sole task is to properly fill a struct esdhc with appropriate offset and to pass it on to esdhc_start_image(). Both changes are made with a goal of simplifying adding support of new SoC in mind (see following commits adding support for i.MX8 as example). NOTE: This commit does not re-implement imx6_esdhc_load_image(), instead opting for dropping it, due to lack of any users in the codebase. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: boot: Add trivial i.MX8 supportAndrey Smirnov2018-06-112-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It appears that boot sources for i.MX8 are just a subset of those of i.MX7 and both can be handled by the same code. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: i.MX: boot: Fix address casting on 64-bit platformsAndrey Smirnov2018-06-111-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add an intermediary casting step in order to avoid casting 32-bit integer to 64-bit pointer on 64-bit platforms. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: i.MX8: Initialize system counterAndrey Smirnov2018-06-111-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add code to properly initialize system counter, so it would be posible to get accurate time delays. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | clocksource: armv8-timer: Convert explicit assembly into helpersAndrey Smirnov2018-06-112-11/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move inline assembly related to querying and counter value as well as getting and setting counter frequency register into asm/system.h as well as converting it inot helper functions. This is done to make the code availible to other parts of the system. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: Add constants and helpers for system counter interfaceAndrey Smirnov2018-06-111-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add constants and helpers for system counter interface as can be found in section "I1.3 Generic Timer registers" of "ARM Architecture Reference Manual ARMv8, for ARMv8-A architecture" Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: i.MX: Add basic CCM constants for i.MX8Andrey Smirnov2018-06-111-0/+15
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: i.MX: Add IOMUX pad constants for i.MX8Andrey Smirnov2018-06-111-0/+645
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Ported from U-Boot Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: i.MX: Split shared CCM code into a separate fileAndrey Smirnov2018-06-112-15/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Both i.MX8 and i.MX7 have similar CCMs, so move any code that can be share into a separate file. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | gpio: i.MX: Add i.MX8mq supportSascha Hauer2018-06-111-0/+3
| | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | mmc: i.MX esdhc: Add i.MX8 supportSascha Hauer2018-06-111-0/+1
| | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | aarch64: Add i.MX8 debug UART supportSascha Hauer2018-06-112-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> [andrew.smirnov@gmail.com: Added imx8_uart_setup_ll()] Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | serial: i.MX: Add i.MX8 supportSascha Hauer2018-06-112-1/+9
| | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | clock: Add i.MX8MQ clock driverSascha Hauer2018-06-115-0/+1078
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is based on Lucas' patch sent as "[PATCH v2 4/4] clk: imx: add clock driver for i.MX8MQ CCM" to the mailing list. It will likely need some rework before it is finally merged, so apply the reworks here before merging into barebox. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> [andrew.smirnov@gmail.com: Fix pll type for IMX8MQ_VIDEO2_PLL1] Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | net: fec_imx: Make use of IS_ALIGNEDAndrey Smirnov2018-06-111-1/+1
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | net: fec_imx: Use dma mapping functionsSascha Hauer2018-06-112-6/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Rather than doing DMA on the input buffer address get a proper DMA address from the mapping functions. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | net: fec_imx: remove unnecessary DMA sync opsSascha Hauer2018-06-111-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The fec receive buffers are coherently mapped, no need to dma_sync on them. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | mci: imx-esdhc: use dma mapping functionsSascha Hauer2018-06-111-27/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rather than relying on the fact that addresses can be just casted into DMA addresses use proper DMA mapping functions. This fixes compiler warnings when we do DMA on this 32bit only device on aarch64 SoCs. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: include: dma: Add missing no-MMU stubsAndrey Smirnov2018-06-111-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add stubs for dma_map_single() and dma_unmap_single() that were needed for no-MMU build for ARM64 to succeed. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | Include our own include/dt-bindingsSascha Hauer2018-06-112-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow to use dt-bindings files that are not yet upstreamed. They can be put into include/dt-bindings. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: Add i.MX8 supportSascha Hauer2018-06-0810-0/+2091
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> [andrew.smirnov@gmail.com: fix B0 chips to report IMX_CHIP_REV_2_0] Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: i.MX: compile arm32 specific errata only for CPU32Sascha Hauer2018-06-081-0/+2
| | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: i.MX: xload: Fix compiler warningSascha Hauer2018-06-081-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | the ESDHC controller is a 32bit device, so can do DMA only on the lower 32bit. Fix the compiler warning about casting a pointer to integer of different size on aarch64 by casting to unsigned long first. Error out if the destination does not fit into 32bit though. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: i.MX50: fix Kindle-MX50 DT issues and warningsAlexander Kurz2018-06-044-25/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix warnings generated from the kindle-mx50 dts when used in linux with W=1: unit names should not have leading "0x"; reg property given, but no unit name; use stdout-path instead of linux,stdout-path. Also move the regulator-fixed node to the root node to match the convention. Signed-off-by: Alexander Kurz <akurz@blala.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | imx-usb-loader: dump memory bytewise on verification mismatchSascha Hauer2018-05-241-24/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dump_long only prints the full words and does not print the unaligned rest. This means that some bytes (and maybe actually the interesting ones) may not be printed. Use dump_bytes instead which does not have this problem. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | imx-usb-loader: Fix verify for non word aligned lengthsSascha Hauer2018-05-241-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Verifying the uploaded image fails when the length is not word aligned. This is because read_memory reads full words, so the input length must be word aligned. Align the length up to 4 bytes so that we do not pass unaligned lengths to read_memory. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | imx-usb-loader: Align uploaded file lengthSascha Hauer2018-05-241-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At least i.MX25 does not properly upload a non word aligned file length. Align the uploaded length to word length to make sure the end of the file is also transferred properly. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | nvmem: snvs_lpgpr: Drop stray commasAndrey Smirnov2018-05-231-4/+4
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: i.MX50: Record reset reason as a part of startupAlexander Kurz2018-05-141-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The given SRSR register location is also valid for the i.MX50. Signed-off-by: Alexander Kurz <akurz@blala.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: i.MX50: Replace expicit casts with IOMEMAlexander Kurz2018-05-141-5/+5
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Alexander Kurz <akurz@blala.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | bbu: imx-bbu-internal: add i.MX51 SPI/I2C flash handlerLucas Stach2018-05-142-0/+23
| | |/ | |/| | | | | | | | | | Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/dts'Sascha Hauer2018-06-1145-78/+259
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| * | | dts: update to v4.17Sascha Hauer2018-06-081-0/+1
| | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>