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* magicvar: Add support for dynamically added magicvarsSascha Hauer2014-11-061-13/+98
| | | | | | | | Add support to add a new magicvar using the magicvar command. This is useful for magicvars assigned and used only in the environment. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* environment: Only save changes to the defaultenvSascha Hauer2014-11-062-14/+108
| | | | | | | Instead of storing the complete files with a 'saveenv' command only store the files that have changes to the default environment. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* environment: refactor saveenvSascha Hauer2014-11-061-68/+75
| | | | | | | | Collect all files in a list first and iterate over the list when creating the actual environment image. Makes the next patches easier. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* environment: remove unused variableSascha Hauer2014-11-051-1/+0
| | | | | | fd is unused, remove it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* environment: drop unnecessary castsSascha Hauer2014-11-051-6/+6
| | | | | | No Need to cast void pointers. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/xz'Sascha Hauer2014-11-0521-0/+3782
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| * Add xz decompression supportSascha Hauer2014-11-0419-0/+3777
| | | | | | | | | | | | | | | | This adds xz decompression support from the kernel. Both compressing the barebox binary with xz and decompressing xz files on the commandline is supported. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * filetype: Add XZ filetype supportSascha Hauer2014-10-242-0/+5
| | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/tegra'Sascha Hauer2014-11-0555-2942/+4241
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| * | clk: tegra: don't enable UART clocks by defaultLucas Stach2014-11-043-14/+14
| | | | | | | | | | | | | | | | | | | | | | | | Now that we are registering a proper driver for the UARTs we no longer need to enable the clocks unconditionally. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | tegra: remove custom UART setupLucas Stach2014-11-043-119/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The config option doesn't make any sense anymore when building a multiimage barebox. With a proper DT built into the image we don't need the ODMdata mechanism to find the debug UART anymore. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | serial: ns16550: add Tegra supportLucas Stach2014-11-041-0/+11
| | | | | | | | | | | | | | | Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | serial: ns16550: enable clock if availableLucas Stach2014-11-041-0/+1
| | | | | | | | | | | | | | | Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | tegra: jetson-tk1: add stdout-pathLucas Stach2014-11-041-0/+3
| | | | | | | | | | | | | | | Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | tegra: tegra124: add serial alias nodesLucas Stach2014-11-041-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | They are missing in the upstream DT. Add them locally for now. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | tegra: colibri-t20: add stdout-pathLucas Stach2014-11-041-0/+4
| | | | | | | | | | | | | | | Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | tegra: beaver: add stdout-pathLucas Stach2014-11-041-0/+2
| | | | | | | | | | | | | | | Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | tegra: beaver: switch to upstream Tegra30 dtsiLucas Stach2014-11-042-893/+1
| | | | | | | | | | | | | | | | | | | | | | | | It's the same as our version, so no need to carry it around any longer. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | tegra: colibri-t20: set hostname in board initLucas Stach2014-11-042-0/+30
| | | | | | | | | | | | | | | Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | pinctrl: tegra: add XUSB pad controllerLucas Stach2014-11-043-0/+528
| | | | | | | | | | | | | | | | | | | | | | | | This is a combined pincontrol/PHY driver for the SerDes lanes on Tegra K1. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | clk: tegra: slow down MSELECT to 102MHzLucas Stach2014-11-042-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Don't know where I got the 204MHZ previously, but 102MHz is the official supported maximum. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | arm: dts: jetson-tk1: switch to upstream DTLucas Stach2014-11-041-1822/+1
| | | | | | | | | | | | | | | | | | | | | | | | Almost everything is upstream now, so no need to keep our private copy of the DT. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | pinctrl: tegra: try to select "boot" stateLucas Stach2014-11-042-4/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | New DTs call the initial pinctrl state "boot" in order to avoid Linux reconfiguring the pinctrl by default. The bootloader should explicitly set this state. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | tegra: defconfig: enable barebox OF driversLucas Stach2014-11-041-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | We use them to configure the environment location so it's a good idea to have them available by default. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | tegra: pmc: add support for reset src detectionLucas Stach2014-11-043-0/+42
| | | | | | | | | | | | | | | | | | | | | Also activate in defconfig. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | reset_source: add thermal resetLucas Stach2014-11-042-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Some SoCs are able to detect if they got reset in response to an overtemperature event. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: tegra124: add environment path to Jetson-TK1 DTLucas Stach2014-11-041-1/+8
| | | | | | | | | | | | | | | Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: tegra30: add environment path to Beaver DTLucas Stach2014-11-041-1/+8
| | | | | | | | | | | | | | | Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | tegra: jetson-tk1: set hostname in board initLucas Stach2014-11-041-2/+13
| | | | | | | | | | | | | | | Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | tegra: beaver: set hostname in board initLucas Stach2014-11-041-2/+13
| | | | | | | | | | | | | | | Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | pci: tegra: add tegra124 supportLucas Stach2014-11-041-22/+134
| | | | | | | | | | | | | | | Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | add generic PHY frameworkLucas Stach2014-11-046-0/+583
| | | | | | | | | | | | | | | | | | | | | | | | | | | This brings in the generix PHY framework from Linux. I tried to strip it down as much as possible while keeping it useful. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | clk: tegra124: add PCIe clocksLucas Stach2014-11-041-0/+35
| | | | | | | | | | | | | | | Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | clk: tegra124: add PLLE setup functionsLucas Stach2014-11-042-3/+177
| | | | | | | | | | | | | | | | | | | | | | | | This adds functions to bring up the new style Tegra114+ PLL_E. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | tegra: jetson-tk1: enable 1.05V_RUNLucas Stach2014-11-043-1/+53
| | | | | | | | | | | | | | | | | | | | | Needed for the PCIe PLL amongst other things. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | tegra: pmc: work around power domain failureLucas Stach2014-11-031-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Sometimes a power domain didn't properly power up, reading back the command register seems to fix this by flushing the write. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | net: rtl8169: clean receive buffer after net handlerLucas Stach2014-11-031-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The processing of the buffer might change some data, which will eventually trigger a cache writeback later on, corrupting data written by the network chip. Clean the cache range to make sure there is no writeback pending. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | net: rtl8169: add support for RTL-8168/8111gLucas Stach2014-11-031-0/+1
| | | | | | | | | | | | | | | | | | | | | This is the version of the chip found on Jetson-TK1. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: tegra: enable network related options in defconfigLucas Stach2014-10-081-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | Now that we have working network support on the Beaver board it makes sense to enable some network options. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | net: add rtl8169 driverLucas Stach2014-10-083-0/+575
| | | | | | | | | | | | | | | | | | | | | | | | This adds the driver for RealTek 8169 and compatible pci attached network chips. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: tegra: advertise PCI supportLucas Stach2014-10-082-0/+2
| | | | | | | | | | | | | | | Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | pci: add Tegra host controller driverLucas Stach2014-10-083-0/+1201
| | | | | | | | | | | | | | | | | | | | | Only tested on Tegra30 for now. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | of: import pci range parser from linuxLucas Stach2014-10-083-0/+126
| | | | | | | | | | | | | | | Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | tegra: pmc: add powerdomain handlingLucas Stach2014-10-082-3/+229
| | | | | | | | | | | | | | | | | | | | | | | | | | | In order to use some devices we first have to power up their power domain. Add support to do this in a generic way. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: tegra: beaver: enable PEX voltage railLucas Stach2014-10-081-1/+10
| | | | | | | | | | | | | | | | | | | | | Supply for the PCIe PLL. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | i2c: tegra: move to fs initcallLucas Stach2014-10-082-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | i2c is needed to enable voltage rails that are later needed by other drivers. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | clk: tegra30: add PCIe clocksLucas Stach2014-10-082-0/+33
| | | | | | | | | | | | | | | Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | clk: tegra: add PLLE setup functionsLucas Stach2014-10-083-0/+124
| | | | | | | | | | | | | | | Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | commands: lspci: go down into subordinate bussesLucas Stach2014-10-081-9/+16
| | | | | | | | | | | | | | | | | | | | | | | | This way we also list devices that are behind bridges. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | pci: track parent<->child relationshipLucas Stach2014-10-082-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | So that PCI devices hang down from bridges and root bridges down from the PCI host controller when calling devinfo. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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