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* Documentation: zii-vf610-dev: Fix bogus DDR configuration valuesAndrey Smirnov2019-10-141-4/+4
| | | | | | | | | There's a clear mismatch between actual TCL code and comment right next to it. Comments are definetly right, so fix the TCL code. Fixes: 02738f4b59 ("Documentation: zii-vf610-dev: Reconcile DDR setup with DCD") Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Documentation: zii-vf610-dev: Fix 'halt' in openocd configuration scriptCory Tusar2019-08-231-0/+1
| | | | | | | | | | | | | | | When attempting to use the existing configuration file to bootstrap an SCU4 AIB board, openocd would consistently fail on the 'halt' command with a "Target not examined yet" error. Dumping target information showed that vf610.cpu1 was the active target, rather that vf610.cpu0. Adding a command prior to the halt to explicitly set the target core resulted in proper operation. Tested with openocd-0.10.0+dev-00924-g16496488 on a Zodiac SCU4 AIB. Signed-off-by: Cory Tusar <cory.tusar@zii.aero> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Documentation: zii: Fix buggy check_bits_set_32Andrey Smirnov2019-06-261-1/+1
| | | | | | | | | Fix a buggy while loop expression, that, due to '==' operator's precedence (higher than that of '&') was always evaluating to false rendering busy loop into a no-op. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Documentation: zii-vf610-dev: Reconcile DDR setup with DCDAndrey Smirnov2019-06-261-143/+151
| | | | | | | | | Reconcile DDR setup code with corresponding DCD line by line, to avoid having any doubts if the two are identical (there wer some minor differences). Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Documentation: zii-vf610-dev: Add necessary post reset delayAndrey Smirnov2019-06-261-2/+3
| | | | | | | | | | | | | | | As observed on CFU1 board, without this delay we interrupt mask ROM code execution even before it sets up any PLLs correctly preventing Barebox from correctly starting up. Fixing this by adding PLL setup code to OpenOCD script helps somewhat and Barebox starts, howerver CPU started this way ends up being unstable crashing randomly during further Barebox use. Adding a simple 100 ms post reset delay resolves all of the described issues. This is also consistent with how other ZII boards are set up. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Documentation: Add zii-vf610-dev board documentationAndrey Smirnov2019-06-041-0/+259
Add OpenOCD scipts and notes on usage for various ZII VF610 based boards. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>