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* RISC-V: add Allwinner Sun20i D1 Nezha supportMarco Felsch2022-10-071-0/+102
| | | | | | | | Add Allwinner sun20i SoC and D1-Nezha board support. Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Link: https://lore.barebox.org/20221005111214.148844-7-m.felsch@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* RISC-V: squash 64bit defconfigs into rv64i_defconfigMarco Felsch2022-10-071-3/+3
| | | | | | | | | | This commit squashes all 64bit risc-v defconfigs into one like armv8. The 32bit defconfigs are not changed since those systems have tight resource constraints and a generic defconfig may break some systems. Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Link: https://lore.barebox.org/20221005111214.148844-6-m.felsch@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Documentation/boards/riscv.rst: fix code blocksAntony Pavlov2021-11-221-2/+2
| | | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Link: https://lore.barebox.org/20211006223038.129681-1-antonynpavlov@gmail.com Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* RISC-V: StarFive: add board support for BeagleV StarlightAhmad Fatoum2021-06-241-0/+37
| | | | | | | | | With the different drivers now in place, we have everything to start a barebox image. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20210619045055.779-30-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/testing'Sascha Hauer2021-06-161-10/+10
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| * Documentation: boards: RISC-V: update TinyEMU supportAhmad Fatoum2021-06-091-10/+10
| | | | | | | | | | | | | | | | | | | | | | Adding the tinyemu files as separate files and including them has the nice benefit that temu users can just use these files directly instead of copy pasting. While at it, update the section as input, as support was added meanwhile. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20210604084704.17410-7-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Documentation: RISC-V: erizo: fix header levelAntony Pavlov2021-06-151-1/+1
|/ | | | | | | | | The "Running on DE0-Nano FPGA board" is a "Erizo" subsection not independent section. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Link: https://lore.barebox.org/20210614142753.86477-1-antonynpavlov@gmail.com Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Documentation: virtio: Fix virtio referenceAhmad Fatoum2021-04-131-1/+1
| | | | | | | | Sphinx complains, probably, because _virtio is used for footnote in the same document. Rename it to fix the reference. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* RISC-V: add Qemu virt supportRouven Czerwinski2021-03-231-0/+59
| | | | | | | | | | | | | | | | The generic dt board added in a previous commit can be booted on RISC-V qemu -M virt. Add defconfigs for both 32- and 64-bit machines. We could in theory drop the mach directory altogether like it's done on arm64, but for now it's left in as it provides <mach/debug_ll.h>. It's expected that we can drop it in future in favor of generic earlycon support (which also wouldn't require manual adjustment of the shared entry point like with debug_ll). Signed-off-by: Rouven Czerwinski <r.czerwinksi@pengutronix.de> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* RISC-V: erizo: migrate to PBLAhmad Fatoum2021-03-231-5/+8
| | | | | | | | | | We now have everything in place to migrate erizo to PBL. As currently, this is the only board, we can drop all non-PBL support in the same go. Cc: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Documentation: add RISC-V docsAntony Pavlov2019-01-071-0/+91
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>