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path: root/arch/arm/boards/omap343xdsp/lowlevel.c
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* sizes.h: move include/sizes.h to include/linux/sizes.hMasahiro Yamada2015-01-081-1/+1
| | | | | | | | | | | | | | This file originates in Linux. Linux has it under include/linux/ directory since commit dccd2304cc90. Let's move it to the same place as well in barebox. This commit was generated by the following commands: find -name '*.[chS]' | xargs sed -i -e 's:<sizes.h>:<linux/sizes.h>:' git mv include/sizes.h include/linux/ Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: change signature of barebox_arm_entryLucas Stach2014-05-051-1/+1
| | | | | | | | | | | Mostly to make it clear that boarddata needs to be something we can dereference. As this is a pretty invasive change, use the opportunity to make the signature 64bit safe. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: OMAP: Add SoC prefix to running_in_* functionsSascha Hauer2013-11-221-1/+1
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: omap: fix omap_save_bootinfoSascha Hauer2013-08-271-1/+2
| | | | | | | | | | | | | | omap_save_bootinfo derefences the argument passed to barebox without checking it for validity. This breaks 2nd stage booting where r0 is undefined. The best we can do is to check whether the pointer is somewhere in SRAM and is word aligned. This at least makes sure that we do not oops. This introduces SoC specific xxx_save_bootinfo variants since the SRAM addresses/sizes differ between SoCs. Additionally fix the prototype for omap_save_bootinfo. It uses r0, so it must be passed this variable. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* arm: omap: store boot source info from ROM loaderTeresa Gámez2013-07-101-1/+5
| | | | | | | | | | | | | | | | | | The ROM loader passes the address of a buffer to the MLO in register 0. Store this data so we can find the boot source later. On the same way the bootinformation are passed to the barebox, then. It has to be enshured that r0 contains always the buffer or the boot source detection will not work. Applied this on all OMAPs. This patch is based on work of Jan Luebbe <jlu@pengutronix.de>. Compile tested on all OMAP boards. Tested on pcm049, phyCARD-A-L1 and pcm051. Signed-off-by: Teresa Gámez <t.gamez@phytec.de> Tested-by: Christoph Fritz <chf.fritz@googlemail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: OMAP3: invalidate L2 cache using ROM APISascha Hauer2013-03-041-2/+0
| | | | | | | Code taken from U-Boot. This makes the beagle board much more reliable. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* arm: rename reset and common_reset to barebox_arm_reset_vector and ↵Jean-Christophe PLAGNIOL-VILLARD2013-02-081-2/+2
| | | | | | | | | arm_cpu_lowlevel_init reset is confusing with the cpu reset and impossible to grep Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM OMAP boards: switch to barebox_arm_entrySascha Hauer2013-02-041-2/+13
| | | | | | | | | All boards use hardcoded SDRAM addresses, copied from the board init file. OMAP3 boards are a bit special, they had a SoC specific reset() function. This is renamed to omap3_invalidate_dcache() and called from the board lowlevel init code now. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM omap3 omap343xdsp: move lowlevel code to lowlevel.cSascha Hauer2013-01-291-0/+546
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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