| Commit message (Collapse) | Author | Age | Files | Lines |
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Move the ethernet phy timinigs to phyFLEX-i.MX6 devicetree.
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Remove mmd_write_reg function from board file and use phy_write_mmd_indirect.
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Remove ethernet phy reset from board file. The reset is now made by the fec
driver since commit:
|commit 5c1846b625247f4b99eb429dcd5b0854699a4298
|Author: Rostislav Lisovy <lisovy@gmail.com>
|Date: Wed Nov 20 22:22:25 2013 +0100
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| ARM: i.mx53: Parse Reset GPIO pin in FEC driver from Devicetree
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| Signed-off-by: Rostislav Lisovy <lisovy@gmail.com>
| Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add defaultenv_append_directory to phyFLEX-i.MX6.
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Instead of repeating the same lowlevel init for every board
move it to it's own initcall.
Avoids code bloat and shaves off almost 1.5kB of uncompressed
barebox size for a default imx_v7_defconfig build.
For boards wherethe hostname setup was done in the postcore
initcall we move this to a device initcall to get it out of
the way.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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phyFLEX boards beginning with 1362.2 have a workaround for this
i.MX6 bug:
ERR006282 ROM code uses nonreset PFDs to generate clocks, which may
lead to random boot failures
On these boards the SD4_DAT3 pin os connected to the CMIC. The CMIC
will reset the board after 10s when the pin isn't toggled.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Conflicts:
arch/arm/boards/phytec-phyflex-imx6/board.c
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TX_CLK line is approx. 54mm longer than other TX lines which adds
a delay of 0.36ns. RGMII need a delay of min. 1.0ns. This mean we have to add
a delay of 0.64ns. We choose 0.78 to have a little gap. This can be done by
setting GTX pad skew value to 11100
Also add a delay for the RX delay lines, needed for the Duallite variant.
=> Set register 2.8 (RGMII Clock Pad Skew) to 0x039F.
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
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Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This renames the Freescale and Phytec board directories and defconfig
files to a common naming scheme. The board directories are named
<vendor>-<board> and the defconfig files are named
<vendor>-<board>_defconfig. Also the DataModul realq7 is renamed to its
Marketing Name eDM-QMX6.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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