| Commit message (Collapse) | Author | Age | Files | Lines |
|---|
| |
|
|
|
|
|
|
|
|
| |
The Layerscape DDR code has two entry points, one which calculates the
DDRC register values from the DDR timings and one which directly sets
precomputed values. The TQMLS1046a has soldered RAM and does not require
the dynamic calculation code which currently isn't used. Remove it.
Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
We already disable PHYs 4-7, which are currently unusable as they hang
off SGMII, which barebox' FMan driver does not yet support.
Follow suit for the SGMII eth0 and eth1 as well, so they don't
unnecessarily clutter the barebox output with
Unable to find a PHY (unknown ID?)
messages.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
| |
|
|
|
|
|
|
|
|
|
| |
The "Primary Protected Application" (PPA) is a PSCI compliant firmware
distributed by NXP. It is needed to start the secondary cores on
Layerscape SoCs. Without it Linux will be started in EL3 and doesn't
work properly. The precompiled firmware images can be found on
https://github.com/NXP/qoriq-ppa-binary and are not included in
barebox.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
| |
|
|
|
|
|
| |
Enrich the image metadata with the device tree compatible string
the image supports.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
| |
|
|
|
|
|
| |
The TQMLS1046a can boot from QSPI and SD/MMC. Add partitioning for these
devices and barebox environment / barebox update handlers on them.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
| |
|
|
|
|
|
|
|
| |
We have to build correct images suitable for QSPI, thus have to call
lspbl_spi_image instead of lspbl_image. In lowlevel code call the
xload function which detects the bootsource rather than hardcoding
SD/MMC.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
| |
|
|
|
|
|
|
|
|
|
| |
This unifies the two different pbi files. With our approach for QSPI
booting differences in the pbi files are not necessary:
- We do not do execute in place for QSPI, so we do not need different
image execution addresses
- Setting up the QSPI clock doesn't hurt even for SD boot
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
| |
|
|
|
|
|
|
| |
Do the UART initialization after the SoC specific lowlevel setup and
print the usual '>' when early debuging is enabled. To let this go out
properly it seems we have to wait a small amount of time beforehand.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
| |
|
|
| |
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
| |
|
|
| |
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
| |
|
|
|
|
| |
With this the I2C mux on i2c4 works properly.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
| |
|
|
|
|
|
| |
TQ has unified SD and eMMC images in their U-Boot. Do the same in
barebox aswell.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
| |
|
|
|
|
|
| |
TQ prefers static values in their U-Boot, so use these values in
barebox aswell.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
| |
|
|
|
|
|
|
|
|
| |
Starting the board issues the warning:
WARN: pls set popts->cpo_sample = 0x48
So set the value to the desired value.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
|
This adds support for the TQ TQMLS1046a board. Currently supported:
- UART
- SD/MMC
- Network on eth3, eth2 currently not working for unknown reasons
First stage support exists but is currently untested. Serdes ports are
not yet supported.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
