| Commit message (Collapse) | Author | Age | Files | Lines |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This commit adds basic mmu support, ie:
- DMA cache handling is not supported
- Remapping memory region also
The current mmu setting is:
- 4KB granularity
- 3 level lookup (skipping L0)
- 33 bits per VA
This is based on coreboot and u-boot mmu configuration.
Signed-off-by: Raphael Poggi <poggi.raph@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
|
|
|
|
|
|
| |
Enclosed by #if directive OMAP specific code
and mmu_disable (ARMv8 code will implemented it somewhere else).
Signed-off-by: Raphael Poggi <poggi.raph@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
In commit 104a6a7ccfb7928ca5dc28c8cbe0ea231ffc45ee support was added
for Thumb2. It added do_execute() as a way to provide arch dependent
calling veneers for use in "go" and thumb2_execute() as the thumb2 to
arm veneer.
But thumb2_execute() isn't necessary as gcc generates a proper calling
sequence from a standard function pointer call. Thumb2 barebox is
compiled with the AAPCS ABI which requires this.
It also had a bug and didn't pass the arguments properly, but code
execute via "go" rarely uses arguments so this wasn't very noticeable.
Since thumb2 was always the only user of do_execute(), go ahead and
delete that too.
Signed-off-by: Trent Piepho <tpiepho@kymetacorp.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
There are systems like the Calxeda Highbank, which need to do SMC
calls in order to access the secure L2C registers, which means they
want to replace the outer cache disable function with their own.
As the cache flush before entering the boot target is still needed
and to avoid exposing L2C internals to the architectures move the
flush before disable into the only current user.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
|
|
|
|
| |
Otherwise entries may still be in the cache and never reach memory.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
|
|
|
| |
Signed-off-by: Herve Codina <Herve.CODINA@celad.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
|
|
|
| |
Signed-off-by: Holger Schurig <holgerschurig@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
|
|
|
|
|
| |
It might be needed in pbl code, so move it to a file which is
compiled in pbl mode.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
|
|
|
|
|
|
|
| |
When we have multi cpu support compiled in we need the cpu architecture
early so that we can pick the correct cacheflush function. Make it available
as static inline function and add a comment above it that this function
normally should not be used.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
|
|
|
|
|
| |
the l2x0
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
|
|
| |
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
|
|
|
| |
Signed-off-by: Vicente Bergas <vicencb@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
|
|
|
|
|
|
| |
Without MMU enabled we do not need to call __mmu_cache_* as the
caches are not enabled. Calling flush_icache() before jumping
to new code is enough.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
|
|
|
|
|
| |
Once we run on multiple SoCs we must know which arm architecture we
are on. Add cpu_architecture() from the kernel to detect it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
|
|
|
|
|
| |
The FSF address has changed in the past. Instead of updating it
each time the address changes, just drop it completely treewide.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
|
|
|
|
|
|
|
| |
This shrinks the resulting binary size by ~25%. Exceptions
are still handled in arm mode, so we have to explicitely
put .arm directives into the exception code. Thumb-2 mode
has been tested on i.MX51 Babbage board.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|\ |
|
| |
| |
| |
| |
| |
| |
| | |
The icache command is unused. Instead of adding it to compilation
again, remove it as the cpuinfo command provides the same information.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|/
|
|
|
|
|
|
| |
When executing 'bl' in inline assembler, the 'lr' register must be
marked as clobbered too.
Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
|
|
| |
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
|
|
|
|
|
|
|
|
|
| |
We want to use the memory banks later in the MMU which is
independent of Linux, so move this to a location which is
always compiled.
Also, make the memory bank list global and add an iterator
for it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
|
|
| |
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
|
|
| |
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
|
|
| |
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
|
|
|
|
|
|
| |
The way it was done before does not work on Cortex processors.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Orjan Friberg <of@flatfrog.com>
Tested-by: Luca Ceresoli <list@lucaceresoli.net>
|
|
|
|
| |
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
|
|
| |
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
|
|
| |
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This has been done with the following script:
find -path ./.git -prune -o -type f -print0 | xargs -0 -r sed -i \
-e 's/u2boot/barebox/g' \
-e 's/U2Boot/barebox/g' \
-e 's/U-boot V2/barebox/g' \
-e 's/u-boot v2/barebox/g' \
-e 's/U-Boot V2/barebox/g' \
-e 's/U-Boot-v2/barebox/g' \
-e 's/U_BOOT/BAREBOX/g' \
-e 's/UBOOT/BAREBOX/g' \
-e 's/uboot/barebox/g' \
-e 's/u-boot/barebox/g' \
-e 's/u_boot/barebox/g' \
-e 's/U-Boot/barebox/g' \
-e 's/U-boot/barebox/g' \
-e 's/U-BOOT/barebox/g'
find -path ./.git -prune -o \( -name "*u-boot*" -o -name "*uboot*" -o -name "*u_boot*" \) -print0 | \
xargs -0 -r rename 's/u[-_]?boot/barebox/'
It needs some manual fixup following in the next patch
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Nishanth Menon wrote:
> no signed off by and no diffstat?
Ups.
> can you use git-format-patch to send please? it is easier to review.
Sure. Here it comes:
jbe
------8<---------8<---------8<---------8<---------8<---------8<----
Subject: [PATCH] Some doxygen related fixes:
- fix a few doxygen comments that are used in a wrong way
- move some pages and their content to a better place in the
generated documentation
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
|
|
|
|
|
| |
No need to check for maximum argument counts. The commands are
safe to be called with more arguments, so lets safe some bytes.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
|
|
| |
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
|
|
| |
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
|
|
|
|
|
|
| |
Some devices, especially the ones doing DMA should be disabled before
giving control to an OS. We take the simple approach here: Just shutdown
the devices in the reverse order they were activated.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
|
|
| |
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
|
|
|
|
|
| |
Memory layout can now be specified via kconfig options. Two
possibilities exist: default layout means the layout is stack
/ malloc heap / U-Boot. The user can also specify fixed addresses
for each TEXT_BASE / stack / malloc heap.
|
|
|
|
|
|
|
|
|
| |
This patch fixes the following warnings:
arch/arm/cpu/cpu.c:176:4: warning: no newline at end of file
commands/bootm.c:872:4: warning: no newline at end of file
Signed-off-by: Robert Schwebel <r.schwebel@pengutronix.de>
|
| |
|
| |
|
|
|
|
| |
remove do_reset
|
| |
|
| |
|
|
|